THE APPLICATION OF CCD'S IN MULTIPLE-VALUED LOGIC Hans G ...

THE APPLICATION OF CCD'S I N MULTIPLE-VALUED LOGIC

Hans G. K e r k h o f f

and Henk D i j k s t r a ABSTRACT

The advantages and disadvantages of using multiple-valued logic in integrated circuits are discussed. The benefits of applying CCD's in the implementation of multiple-valued circuits are explained. The combination of a few basic multiple-valued logic (MVL) functions makes it possible to implement any MVL function. Three basic functions in four-valued, logic ho.ve been designed^ fabricated and tested.. These are the minimum^ maximum and complement functions. The latter has also the feature that it is able to regenerate the logical value. It is explained why four-valued logic is preferred at this moment. The CCD design principles however can also be applied for multiple-valued logic with other radices. The design considerations and operation principles of the devices are presented. and the performance data given. 3

INTRODUCTION Research i n t h e f i e l d o f b i n a r y l o g i c CCD's has been c a r r i e d o u t s i n c e 1972 [ l , 2 ] . I n c o m b i n a t i o n w i t h CCD memories, p o w e r f u l a r i t h m e t i c IC's can be r e a l i z e d . A CCD however i s an analogue d e v i c e , and i t i s t h e r e f o r e p o s s i b l e t o employ more t h a n two l o g i c a l v a l u e s . Carnes [ 3 ] suggested u s i n g more t h a n two v a l u e s i n CCD memories, i n o r d e r t o i n c r e a s e t h e i n f o r m a t i o n d e n s i t y . H i s c a l c u l a t i o n s show t h a t a f o u r - l e v e l CCD memory u s i n g a 4 ym minimum geometry would occupy i n area p e r b i t 3.7 times l e s s t h a n a RAM designed w i t h the same minimum geometry. The s u c c e s s f u l o p e r a t i o n o f a f o u r v a l u e d CCD memory has a l r e a d y been r e p o r t e d [ 4 ] . I t would be an advantage i f a r i t h m e t i c o p e r a t i o n s c o u l d a l s o be performed on t h e same c h i p , u s i n g t h e same t y p e o f i n f o r m a t i o n r e p r e s e n t a t i o n . T h i s paper d e a l s v/ith t h e d e s i g n and performance o f s e v e r a l b a s i c CCD c i r c u i t s i n f o u r - v a l u e d l o g i c . I f t h e complete s e t o f b a s i c f u n c t i o n s becomes a v a i l a b l e , i t v / i l l be p o s s i b l e t o p e r f o r m MVL a r i t h m e t i c o p e r a t i o n s . MULTIPLE-VALUED LOGIC (MVL) AND CCD'S M u l t i p l e - v a l u e d s i g n a l s can o f f e r s e v e r a l advantages over two-valued s i g n a l s i n IC's. As has a l r e a d y been d i s c u s s e d above, a s i g n i f i c a n t l y h i g h e r i n f o r m a t i o n d e n s i t y can be achieved i n CCD memories. A l s o t h e i n t e r c o n n e c t i o n problem caused by t h e l i m i t e d number o f p i n s a v a i l a b l e on packages o f complex IC's can be d i m i n i s h e d i f t h e p i n s a r e used e f f i c i e n t l y by a p p l y i n g m u l t i p l e v a l u e d s i g n a l s [ 5 , 6 ] . I n some cases t h e number o f components and i n t e r c o n n e c t i o n s i n a c i r c u i t can be decreased e f f e c t i v e l y , a t t h e c o s t however of more complex b a s i c d e v i c e s . One o f t h e maj'or o b s t a c l e s i n r e a l i z i n g m u l t i p l e - v a l u e d l o g i c c i r c u i t s i s t h e i n c r e a s e d s e n s i t i v i t y t o s u p p l y v o l t a g e v a r i a t i o n s , n o i s e and process t o l e r a n c e s [ 7 ] . I n most o f t h e papers d e a l i n g v/ith MVL c i r c u i t s , t h e v a l u e of the r a d i x i s r e s t r i c t e d e s s e n t i a l l y t o t h r e e ( i n b i n a r y l o g i c t h e r a d i x i s t w o ) . The c i r c u i t concepts d i s c u s s e d i n t h i s paper a r e n o t f u n d a m e n t a l l y r e s t r i c t e d by t h e r a d i x .

* Twente U n i v e r s i t y o f Technology, S o l i d - S t a t e E l e c t r o n i c s Group, Dept. o f E l e c t r i c a l E n g i n e e r i n g , P.O.Box 217, 7500 AE Enschede, N e t h e r l a n d s .

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A r a d i x o f f o u r i s however f a v o u r a b l e f o r a number o f reasons: f i r s t , the c o n v e r s i o n t o b i n a r y l o g i c can be e a s i l y implemented. Second, t h e p o s s i b i l i t y o f malfunctioning increases considerably i f a higher r a d i x i s used, due t o s m a l l e r n o i s e margins [ 7 ] . A l s o t h e r e d u c t i o n i n area p e r b i t i n MVL memories compared w i t h t h a t o f RAM's becomes l e s s s i g n i f i c a n t f o r h i g h e r v a l u e s o f t h e r a d i x [ 3 ] . A l l these arguments may e x p l a i n t h e r e c e n t i n t e r e s t i n research o f four-valued l o g i c [ 8 ] . J u s t as i n b i n a r y l o g i c , one r e q u i r e s a s e t o f b a s i c f u n c t i o n s . Any MVL f u n c t i o n can be r e a l i z e d by means o f p r o p e r c o m p o s i t i o n o f these b a s i c MVL f u n c t i o n s [ 6 , 8 ] . Depending on t h e s p e c i f i c a p p l i c a t i o n s , a c h o i c e o f the most e f f i c i e n t s e t o f b a s i c f u n c t i o n s can be made. An example o f a complete s e t i s l i s t e d i n t h e t a b l e below: Name o f t h e f u n c t i o n

Symbol

Minimum Maximum

min ( x , y ) max ( x , y )

Literal

a .b

Complement Successor

X X

sue ( x )

Definition x i fx < y else: y y i f x < y else: x J " (R-1) i f a < x < b L 0 else (R-1) - x (x+1) modulo R

R = Radix T h i s s e t o f f u n c t i o n s has been implemented by Dao i n I L t e c h n o l o g y [ 8 ] . The minimum, maximum and complement f u n c t i o n s have t h e i r e q u i v a l e n t i n b i n a r y l o g i c b e i n g t h e AND, OR and INVERT f u n c t i o n . The successor and t h e complement a r e m e r e l y i n c l u d e d t o make d e s i g n i n g i n MVL more c o n v e n i e n t . The minimum, maximum and complement c i r c u i t s have been designed i n CCD t e c h n o l o g y . Beside t h e c o m p a t i b i l i t y w i t h e x i s t i n g MVL memories, CCD t e c h n o l o g y i s v e r y w e l l s u i t e d f o r L S I c h i p d e s i g n , i n which MVL i s expected t o have t h e most p r o m i s i n g p r o s p e c t s . The p r o p e r t i e s o f b i n a r y l o g i c CCD's, can a l s o be a p p l i e d i n MVL-CCD's. These a r e t h e p r o p e r t i e s of b e i n g a b l e t o add charge, t o c o n t r o l i t by means o f another charge u s i n g a f l o a t i n g g a t e s t r u c t u r e , and t h e o v e r f l o w o f charge o u t o f a s t o r a g e w e l l due t o i t s l i m i t e d c h a r g e - h a n d l i n g c a p a c i t y [ l , 2 ] , The i n f o r m a t i o n i n MVL-CCD's i s r e p r e s e n t e d by f o u r d i f f e r e n t amounts of charge. These charge packets a r e i n t e g e r - v a l u e d m u l t i p l e s ( 0 , I , 2 and 3) of t h e u n i t y - c h a r g e packet Q . The d i f f e r e n c e i n magnitude between t h e charge p a c k e t s has t o be s u f f i c i e n t f o r r e l i a b l e d e t e c t i o n o f t h e d i s t i n c t charge packet l e v e l s , even when t h e normal process t o l e r a n c e s , t h e v a r i a t i o n s i n t h e s u p p l y v o l t a g e s and n o i s e a r e t a k e n i n t o a c c o u n t . I n t h e p r e s e n t designs, a u n i t y - c h a r g e o f 0.3 pC was used. T h i s r e s u l t s i n a s t o r a g e area o f 650 ura i f normal v o l t a g e l e v e l s a r e assumed and a pseudo one-phase c l o c k i s used. The i n p u t c i r c u i t employs t h e " f i l l - a n d - s p i l l " p r i n c i p l e , and t h e o u t p u t c i r c u i t c o n s i s t s o f a f l o a t i n g d i o d e connected t o a c h a r g e - s e n s i n g a m p l i f i e r i n o r d e r t o a c h i e v e a l i n e a r charge t o v o l t a g e c o n v e r s i o n . THE MINIMUM, MAXIMUM AND COMPLEMENT FUNCTIONS The schematic drawing i n f i g . 1, shows t h e p r i n c i p l e o f t h e minimum and t h e maximum f u n c t i o n s . T h e i r o p e r a t i o n i s based on t h e almost l i n e a r r e l a t i o n s h i p between t h e charge i n s t o r a g e w e l l 3, and t h e p o t e n t i a l o f the f l o a t i n g g a t e f on t o p o f i t (see f i g . 3 ) . The f l o a t i n g g a t e f i s connected t o t h e b a r r i e r gate b. A computer s i m u l a t i o n o f t h e f l o a t i n g gate b e h a v i o u r i s shown i n f i g . 3. A r e s e t v o l t a g e o f 8 V on t h e f l o a t i n g g a t e has been assumed.

305.

As can be seen i n f i g . 2, t h e charge h a n d l i n g c a p a c i t y o f w e l l 4, i s d e t e r m i n e d by t h e f l o a t i n g g a t e p o t e n t i a l and t h e r e f o r e by t h e s i z e o f the charge p a c k e t i n 3. The f o u r l i n e s drawn under b a r r i e r g a t e b i n f i g . 2, i n d i c a t e t h e d i f f e r e n t s u r f a c e p o t e n t i a l l e v e l s t h a t a r e p o s s i b l e in this circuit. I f , f o r i n s t a n c e , the charge i n w e l l 3 has t h e l o g i c a l v a l u e < i > , t h e n w e l l 4 i s a b l e t o c o n t a i n one u n i t y - c h a r g e Q e t c . The o p e r a t i o n o f the c i r c u i t i n f i g . 1 w i l l be demonstrated f o r i n p u t charges X and Y h a v i n g t h e l o g i c a l v a l u e s and . A f t e r t h e t r a n s f e r o f t h e i n p u t charges from t h e s t o r a g e gates 1 and 2 t o t h e r e s p e c t i v e s t o r a g e w e l l s 3 and 4, t h e charge under 3 w i l l change t h e p o t e n t i a l o f t h e f l o a t i n g b a r r i e r g a t e b , and w i l l reduce t h e charge h a n d l i n g c a p a b i l i t y o f w e l l 4 t o 2 Q^. Because t h e charge p a c k e t i n 3 has t h e l o g i c a l v a l u e , one Q w i l l have t o s p i l l over from w e l l 4 i n t o w e l l 5. F i n a l l y t h e charges i n the w e l l s 3 and 5 a r e added t o g e t h e r i n 6 r e s u l t i n g i n t h e maximum o u t p u t , and t h e r e s i d u a l charge under w e l l 4 i s t r a n s f e r r e d t o 7 r e s u l t i n g i n t h e minimum o u t p u t .

E

A schematic drawing o f t h e complement c i r c u i t i s p r e s e n t e d i n f i g . 4. Each o f t h e s t o r a g e w e l l s 2, 3 and 4 has a charge h a n d l i n g c a p a c i t y o f l.Q , and i s s e p a r a t e d by two b a r r i e r s b. There are t h r e e f l o a t i n g gate's s i t u a t e d on t o p o f these w e l l s . They c o n t r o l t h e i n j e c t i o n of charge f r o m t h e source S i n t o t h e w e l l s 5, 6 and 7. These f l o a t i n g gates have been designed i n such a way, t h a t a u n i t y - c h a r g e packet p r e s e n t i n w e l l s 2, 3 and 4 i s s u f f i c i e n t t o b l o c k charge t r a n s f e r from S i n t o w e l l s 5, 6 and 7 r e s p e c t i v e l y . I n 8, t h e charges i n 5, 6 and 7 a r e added t o g e t h e r . I f a charge packet w i t h , f o r i n s t a n c e , t h e l o g i c a l v a l u e i s t r a n s f e r r e d i n t o w e l l 2, one u n i t y charge w i l l s p i l l over f r o m w e l l 2 i n t o 3, w h i l e 4 remains empty (see f i g . 4 and f i g . 5 ) . As a r e s u l t , o n l y charge w i l l be i n j e c t e d from t h e source S i n t o 7. A f t e r t h e a d d i t i o n o f the charge c o n t e n t s o f t h e w e l l s 5, 6 and 7 t h i s r e s u l t s i n t h e complement o u t p u t . I n a s i m i l a r way, t h e i n p u t charges , and v / i l l produce the l o g i c o u t p u t s , and r e s p e c t i v e l y . T h i s c i r c u i t has a l s o the f e a t u r e o f b e i n g a b l e t o r e g e n e r a t e t h e l o g i c a l charge l e v e l , because the f l o a t i n g gates f w i l l o n l y p r e v e n t t h e i n j e c t i o n o f charge f r o m S i n t o the s t o r a g e w e l l s i f t h e charge l e v e l s i n t h e sensing w e l l s 2, 3 and 4 exceed a c e r t a i n t h r e s h o l d . The s u r f a c e p o t e n t i a l diagram o f t h e complementing " q u a n t i z e r " i s seen i n f i g . 5. Photographs o f t h e l a y o u t s o f the minimum, maximum and complement c i r c u i t s a r e shown i n f i g . 6a,b. MEASUREMENTS The d e v i c e s have been f a b r i c a t e d i n t h e n--channel s u r f a c e CCD d o u b l e p o l y s i l i c o n process a t Twente U n i v e r s i t y o f Technology, u s i n g 10 um minimum geometry. I n o r d e r t o t e s t t h e (analogue) minimum and maximum f u n c t i o n , a dc v o l t a g e and a t r i a n g u l a r shaped v o l t a g e o f 2 kHz have been a p p l i e d t o t h e i n p u t s . The c l o c k f r e q u e n c y was 50 kHz. The i n p u t s and t h e maximum and minimum o u t p u t s a r e shown i n f i g . 7. The s u p p l y v o l t a g e s and c l o c k p u l s e a m p l i t u d e s w h i c h were a c t u a l l y a p p l i e d , d i f f e r e d s l i g h t l y from t h e t h e o r e t i c a l v a l u e s , due t o c l o c k f e e d t h r o u g h on t h e f l o a t i n g g a t e . The d e l a y time i s a p p r o x i m a t e l y e q u a l t o t h r e e times t h e c l o c k p e r i o d T^ | t j « 3 us a t f = 1 MHz). Tb,e e f f e c t i v e area o f the'combined minimum and maximum c i r c u i t " i s 0.028 mm and t h e power d i s s i p a t i o n 118 uW a t 1 MHz ( e x c l u d i n g i n and o u t p u t b u f f e r s ) . A t 60 C, and u s i n g a c l o c k f r e q u e n c y o f 10 kHz, t h e d e v i c e s s t i l l o p e r a t e d s a t i s f a c t o r i l y . I n o r d e r t o show t h e r e g e n e r a t i n g f e a t u r e s o f t h e complement c i r c u i t , a lov; f r e q u e n c y l i n e a r ramp v o l t a g e o f 1 kHz was a p p l i e d t o t h e i n p u t . F i g . 8 shows t h e complementing and " r e g e n e r a t i n g b e h a v i o u r o f the. c i r c u i t . 11

306.

The power d i s s i p a t i o n o f t h e complement c i r c u i t i s 149 uW, and a c h i p area o f 0.025 mm i s r e q u i r e d . The d e l a y time i s twice the c l o c k p e r i o d T^ (i?, m 2 us a t f = 1 MHz) . The h i g h e s t c l o c k f r e q u e n c y t u r n e d out t o be a t l e a s t 1 MHz f o r a l l d e v i c e s . I t s h o u l d be emphasized t h a t a 10 nm geometry had t o be used, and no e f f o r t was made t o m i n i m i z e t h e c h i p area. I n f u t u r e designs w i t h i o n i m p l a n t a t i o n p r o c e s s i n g , t h e dimensions w i l l be decreased. A q u a t e r n a r y t o b i n a r y l o g i c c o n v e r t e r and v i c e v e r s a , a l i t e r a l and a successor a r e under d e s i g n a t t h i s moment. T h i s v / i l l r e s u l t i n t h e a v a i l a b i l i t y o f a complete MVL b a s i c f u n c t i o n s e t .

i

CONCLUSIONS f

D e s p i t e c e r t a i n problems, t h e advantages o f MVL i n IC's j u s t i f y t h e r e s e a r c h a c t i v i t i e s i n m u l t i p l e v a l u e d l o g i c . The CCD t e c h n o l o g y t u r n s o u t t o be w e l l s u i t e d f o r MVL d e s i g n . The f e a s i b i l i t y o f charge-coupled d e v i c e s f o r t h e i m p l e m e n t a t i o n o f m u l t i p l e - v a l u e d l o g i c has been shown. The d e s i g n p r i n c i p l e s can be a p p l i e d t o any r a d i x . The designed minimum, maximum and complement c i r c u i t s worked s u c c e s s f u l l y . However i n t h e p r e s e n t designs they s t i l l s u f f e r from c l o c k f e e d t h r o u g h on t h e f l o a t i n g g a t e s . I t i s expected t h a t t h i s problem w i l l be s i g n i f i c a n t l y diminished i n f u t u r e designs. ACKNOWLEDGEMENTS The a u t h o r s would l i k e t o thank J. Holleman f o r p r o c e s s i n g t h e d e v i c e s , and O.W. Memelink f o r h i s encouragement and d i s c u s s i o n s . REFERENCES

f

1. T.A. Zimmerman, e t a l . , " D i g i t a l Charge Coupled L o g i c (DCCL)", IEEE J o u r n a l o f S o l i d - S t a t e C i r c u i t s , SC-12, No. 5, pp. 473-485, October 1977. 2. H.G. K e r k h o f f and J . Jansen, " E x p e r i m e n t a l R e s u l t s o f B i n a r y Charge Coupled D e v i c e s " , To be p u b l i s h e d . 3. J.E. Carnes, e t a l . , "Fundamental Packing D e n s i t y L i m i t a t i o n s o f CCD and RAM Memory", E l e c t r o 1977, P r o f e s s i o n a l Program, S e c t i o n 19, CCD Memories, pp. 19.4-1/9, A p r i l 1977. 4. , " M u l t i - l e v e l Storage Packs B i t s i n t o CCD Memory", E l e c t r o n i c s , pp. 7E-8E, September 29, 1977. 5. C.W. Ross, "Reducing System I n t e r c o n n e c t i o n s w i t h M u l t i p l e - V a l u e d L o g i c " , E l e c t r o n i c s , pp. 122-124, September 15, 1977. 6. D.C. Rine, "Computer Science and M u l t i p l e - V a l u e d L o g i c , Theory and A p p l i c a t i o n s " , N o r t h - H o l l a n d P u b l i s h i n g Company, 1977. 7. C.H. Sequin and M.F. Tompsett, "Charge T r a n s f e r D e v i c e s " , Academic Press, New Y o r k , pp. 238-243, 1975. 8. T.T. Dao, " T h r e s h o l d I L and i t s A p p l i c a t i o n s t o B i n a r y Symmetric F u n c t i o n s and M u l t i v a l u e d - L o g i c " , IEEE J o u r n a l o f S o l i d - S t a t e C i r c u i t s , SC-12, No. 5, pp. 463-472, 1977. 9. K.C. S m i t h , " C i r c u i t s f o r M u l t i p l e - V a l u e d L o g i c , a T u t o r i a l and A p p r e c i a t i o n " , Proceedings o f t h e S i x t h I n t e r n a t i o n a l Symposium on M u l t i p l e - V a l u e d L o g i c , pp. 30-43, May 25-28, 1976.

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