The Effect of Dynamic Bias Stress on the Photon-Enhanced Threshold ...

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Manuscript received October 14, 2010; accepted November 3, 2010. The review of this ... The authors are with the Display Laboratory, Samsung Advanced Institute of Technology ... 2(b)] result in a much larger negative VT shift of −10.9 V after ...
IEEE ELECTRON DEVICE LETTERS

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The Effect of Dynamic Bias Stress on the Photon-Enhanced Threshold Voltage Instability of Amorphous HfInZnO Thin-Film Transistors Kyoung-Seok Son, Hyun-Suk Kim, Wan-Joo Maeng, Ji-Sim Jung, Kwang-Hee Lee, Tae-Sang Kim, Joon Seok Park, Jang-Yeon Kwon, Bonwon Koo, and Sang-Yoon Lee

Abstract—The electrical stability of amorphous HfInZnO (HIZO) thin-film transistors (TFTs) was investigated under static and dynamic stress conditions, with simultaneous visible light radiation. The extent of device degradation is found to be strongly sensitive to the gate voltage, pulse duty ratio, pulse frequency, and exposure to visible light. Dynamic stress experiments demonstrate that highly stable devices can be realized by adjusting the pulse duty ratio and frequency, which suggests that amorphous HIZO TFTs are a promising candidate of switching devices for large-area high-resolution AMLCD applications. Index Terms—Dynamic stress, HfInZnO, instability, thin-film transistor (TFT).

Fig. 1. Schematic cross section of (a) the HIZO TFT and (b) optical spectrum of the backlight.

I. I NTRODUCTION

II. E XPERIMENTAL P ROCEDURE

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ECENTLY, thin-film transistors (TFTs) employing amorphous oxide semiconductors such as Ga–In-Zn-O (GIZO) and Hf-In-Zn-O (HIZO) have been subjects of intensive study as promising alternatives to a-Si devices, owing to their high field-effect mobility (> 10 cm2 /Vs), excellent subthreshold swing (< 0.4 V/decade), and high ION /IOFF ratios (> 107 ), which are superior to those of their a-Si counterparts [1]–[5]. In an operating AMLCD device, the switching transistor that experiences a continuous pulsed gate voltage is inevitably exposed to light, due to the presence of the back light unit underneath. However, most of the reports available in the literature involve the bias stress-induced instability of oxide TFTs with static bias stress only or in the dark [6]–[9]. The examination of bias stress instability under dynamic stress with backlight illumination mimics real operating conditions and allows a more reasonable approximation of the reliability of oxide TFTs for AMLCD backplanes. In this letter, the effects of static and dynamic stresses on the photon-enhanced threshold voltage instability of HIZO TFTs are observed, which have recently been developed and shown to exhibit excellent electrical performance [5].

A bottom gate HIZO TFT was fabricated, as shown in Fig. 1, which is similar to that of conventional a-Si TFTs. The detailed fabrication process is described in a former report [1]. A SiNx (400 nm) gate dielectric layer was deposited using plasmaenhanced chemical vapor deposition (PECVD) with a substrate temperature of 350 ◦ C. A HIZO film (70 nm) was then grown as the active channel layer using RF magnetron sputtering at room temperature with a single ceramic target (HfO2 : In2 O3 : ZnO = 0.19:1:2 mol). After patterning the source and drain electrodes, a SiOx passivation layer with a thickness of 200 nm was deposited by PECVD at 150 ◦ C. The resulting device was then annealed in air at 250 ◦ C for 1 h. The device characterization was carried out using a Keithley 4200 semiconductor parameter analyzer, which consists of a heating stage, a light emitting diode backlight unit (BLU), and an electrical pulse generator. During the illumination stress test, the devices were exposed to white light emanating from the BLU, with a brightness of 20 000 cd/m2 . All measurements were performed on TFTs with channel width/length = 90/8 μm. III. R ESULTS AND D ISCUSSIONS

Manuscript received October 14, 2010; accepted November 3, 2010. The review of this letter was arranged by Editor A. Nathan. The authors are with the Display Laboratory, Samsung Advanced Institute of Technology, Yongin 446-712, Korea (e-mail: kyoungseok.son@samsung. com; [email protected]; [email protected]; jisim.jung@ samsung.com; [email protected]; [email protected]; js98.park@ samsung.com; [email protected]; [email protected]; sangyoon. [email protected]). Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2010.2093867

We first describe the impact of photon radiation on the instability of HIZO TFTs under static stress. Fig. 2(a) and (b) shows the evolution of transfer curves as a function of the applied negative bias temperature stress (NBTS) time in dark and under illumination, respectively. During stress periods, VGS and VDS were fixed at −20 and +10 V, respectively, and a stage temperature of 60 ◦ C was maintained. For bias stress tests with light illumination, the backlight is turned on during the sampling periods as well as the stress periods. The field-effect

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IEEE ELECTRON DEVICE LETTERS

TABLE I S TRETCHED E XPONENTIAL PARAMETERS U NDER VARIOUS S TRESS C ONDITIONS

Fig. 2. Evolution of the transfer curves as a function of the applied stress time under (a) NBTS and (b) NBITS. (c) VT shift (|ΔVT |) as a function of the applied NBTS and PBTS time with and without BL illumination.

mobility (μFE ) in the saturation regime was extracted from IDS –VGS characteristics, in compliance with the gradual channel approximation [2]. We define the threshold voltage (VT ) as the VGS that induces a drain current (IDS ) of 1 nA, which is an important parameter regarding switching TFTs. A pristine device measured in the dark [Fig. 2(a)] exhibits a μFE value of 2.4 cm2 /V · s, SS value of 0.3 V/decade, and VT of −0.23 V. The VT slightly moves to −1.42 V after 3 h of stress. On the other hand, the NBITS experiments with BL illumination [Fig. 2(b)] result in a much larger negative VT shift of −10.9 V after 3 h of stress. It is also noted that the large negative shift of VT under NBITS conditions does not involve any change in μFE or SS with respect to stress time. Fig. 2(c) shows the magnitudes of VT shift (|ΔVT |) as a function of the applied positive bias temperature stress (PBTS) and NBTS time with and without BL illumination. For PBTS experiments, the applied VGS was set to +20 V while keeping other variables such as VDS and substrate temperature identical to those used in NBTS studies. In Fig. 2(c), the direction of VT shift for NBTS and PBTS is negative and positive, respectively, regardless of light illumination. It is noted that the BL illumination has a more pronounced influence on ΔVT under NBTS than that under PBTS. All the measurements fit the stretched exponential equation, which is defined as    ΔVT = ΔVT (0) 1 − exp −(t/τ )β where ΔVT (0) is the ΔVT at infinite time, τ represents the characteristic time constant, and β is the stretched exponential exponent [7]. The stretched exponential parameters for each stress condition are listed in Table I. The stretched exponential

Fig. 3. Duty ratio dependence of ΔVT at a frequency of 60 Hz in (a) low duty ratio (≤ 1%) region and (b) high duty ratio (≥ 10%) region. (Inset) Applied ac square wave pulse. (c) Frequency dependence of ΔVT at a duty ratio of 0.1%.

time dependence and negligible changes of SS suggest that charge trapping in the gate dielectric bulk or at the gate dielectric/channel interface is the dominant mechanism for VT instability of HIZO TFTs. The BL illumination accelerates the negative VT shift, by providing excess photo-generated holes, which become trapped under negative bias stress [10]. Next, the effects of dynamic stress on the photon-enhanced VT instability of HIZO TFTs are examined. A rectangular wave was used as the source of dynamic pulse, as shown in the inset of Fig. 3(a). The duty ratio (D) is given by the ratio of tON to pulse period (T ). The Von and Voff were fixed to +20 V and −20 V, respectively. Fig. 3(a) and (b) shows the duty ratio dependence of VT shift after 3 h in low duty ratio and high duty ratio region, respectively. The frequency was fixed at 60 Hz. Dark and white triangles represent the measured ΔVT and estimated ΔVT , using the stretched exponential equations obtained from dc stress tests, respectively. Negative shifts in VT were observed in the low duty ratio region (≤ 1%), while positive ΔVT values were obtained with high duty ratios (≥ 10%). One may anticipate negative VT shifts in the low duty ratio region, where the “OFF” state is dominant. However, it should be noted that negative VT shifts are considerably reduced by the addition of a short “on” pulse. ΔVT was then calculated as the sum of

SON et al.: EFFECT OF STRESS ON THE INSTABILITY OF AMORPHOUS HfInZnO TFTs

the VT shift for the total duration of negative and positive bias stresses, using the stretched exponential equation weighed by each portion of positive and negative dc stress ΔVT = ΔVT P + ΔVT N    = ΔVT P (0) 1 − exp −(DtST /τP )βP    + ΔVT N (0) 1 − exp − ((1 − D)tST /τN )βN . In Fig. 3(a), as the duty ratio increases, larger differences between the measured and the estimated values for ΔVT are observed. This phenomenon may be interpreted as follows. During the “on” pulse, the already trapped holes become detrapped and annihilated through the recombination process with electrons. From the equation of ΔVT = qΔNtr /Ci , the number of trapped hole under dc stress and dynamic stress with 1% duty can be estimated to 7.60 × 1011 cm−2 and 1.01 × 1011 cm−2 , respectively, suggesting that 87% of photo-generated holes are annihilated. Since the trapping rate is proportional to the existing charge concentration, the reduction of hole concentration in the “ON” state induces a net decrease in negative VT shift. Therefore, under dynamic stress with the presence of light, the reduction of negative VT shift can be attributed to the detrapping and successive extinction of photo-generated holes. On the other hand, in the high duty ratio region, complete annihilation of the photo-generated holes occurs, and so, the threshold voltage shift is mainly associated with electron trapping during the “ON” state. From Fig. 3(b), positive shifts in VT are observed, and the measurement data fit well with the estimated values, based only on the stretched exponential equation for the positive bias stress and time. Fig. 3(c) shows the frequency dependence of VT shift with a duty ratio of 0.1%. The magnitude of ΔVT decreases with increasing frequency. This behavior can also be interpreted by the recombination process. As the pulse frequency increases, the number of positive pulse per unit time increases. Once a positive pulse is applied, the hole trapping rate during the subsequent negative pulse should continuously decrease owing to the reduction of hole concentration. IV. C ONCLUSION In this letter, the photon-enhanced threshold voltage instability of amorphous HIZO TFTs under both static and dynamic stresses has been evaluated. Compared to static stress conditions, superior electrical stability under dynamic stress even with BL illumination has been observed particularly at higher pulse frequencies. The aforementioned results have suggested that by properly optimizing the pulse conditions, the operating lifetime of oxide semiconductor TFTs can be prolonged and so will allow the realization of large-size and high-resolution AMLCD products.

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