Transistor Diagnostic Strategies and Extended ... - IEEE Xplore

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 2, FEBRUARY 2010

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Transistor Diagnostic Strategies and Extended Operation Under One-Transistor Trigger Suppression in Inverter Power Drives Antonio E. Ginart, Senior Member, IEEE, Patrick W. Kalgren, Member, IEEE, Michael J. Roemer, Douglas W. Brown, Student Member, IEEE, and Manzar Abbas

Abstract—A fault-accommodation technique proposed for inverter drive systems extends the operation of an electrical power drive during an incipient power transistor fault. The discussed technique utilizes diagnostic methods to identify and isolate degraded power transistors. Once isolated, an appropriate faultaccommodating control method using one-transistor trigger suppression control relieves electrical overstress being applied to the degraded transistor to maintain motor operation, thus avoiding an inverter failure. Simulations and experimental tests demonstrate the feasibility of the proposed method for motor start-up even with a suboptimal control technique of constant V /f type. Also discussed are advantages and potential drawbacks of this technique. Index Terms—Fault diagnosis, fault tolerance, motors, motor drives, power semiconductor devices, power system availability.

I. INTRODUCTION ELIABILITY of transistors in power electronic drives had been a critical concern for many years. Several researches have proposed fault-tolerant configurations/strategies that provide extended operation during power transistor failure [1]–[6]. For a six-transistor inverter, a typical response after a transistor failure is total shutdown. This case is common during transistor latch-up, one of the most common transistor failure mode in MOS electronic [7], [8]. Latch-up refers to an event where a power transistor is unable to turn OFF, thereby producing a short circuit. Such an event causes an inverter leg to short circuit the dc bus and triggers the internal diagnostic instrumentation to shutdown the inverter. However, there are occasions when system integrity is secondary to the need of continuing operation, at least, until the main task is completed and a programmable shutdown is appropriate. This is, particularly, true for critical industrial and military applications where continuous operation must be sustained, regardless of the stress applied to the power

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Manuscript received December 17, 2008; revised April 10, 2009. Current version published February 12, 2010. This work was supported by the Office of Naval Research (ONR) Navy Small Business Technology Transfer (STTR), with joint services oversight and technical support provided by the ONR, the Army, and the Air Force. Recommended for publication by Associate Editor E. Santi. A. E. Ginart, P. W. Kalgren, and M. J. Roemer are with Impact Technologies, LLC, Marietta, GA 30308 USA (e-mail: [email protected]; patrick.kalgren@ impact-tek.com; [email protected]). D. W. Brown and M. Abbas are with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332 USA (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2009.2026750

drive equipment. For example, on industrial side, there are certain processes that deal with liquid substances such as molten concrete and glass. These processes require that these substances should be removed while in molten state at all cost. In the fields of military operations, important examples are electromechanical actuators in modern airplanes and the new generation of propulsion systems for navy ships. Standard inverters are controlled by powerful microcontrollers instrumented with high-band signal measurement devices with isolation capabilities. Real-time current measurements for each inverter phase and the dc bus voltage are commonly available. Furthermore, many controllers provide measurements for rotor position and speed. Most inverters also contain overheating protection circuits to safeguard power transistor and the motor stator winding against excessive thermal stress. In some instances, overheating protection is also available for the motor bearings. Specialized inverter microcontrollers contain fast A/D converters allowing conversion at 500 kHz or more. These microcontrollers perform highly demanding tasks such as vector control, diagnostic monitoring, etc. Embedded programs used to implement these algorithms contain approximately 2000 lines of code and commonly execute in 20 µs; this is below the typical 50–100 µs available between pulsewidth-modulated (PWM) pulses for most common inverters. This available free process time can accommodate several embedded prognostic health monitoring (PHM) algorithms with the aim of delivering an effective fault-tolerant reconfigurable control strategy. This paper proposes a fault-accommodation strategy for a transistor latch-up in the inverter. The proposed solution utilizes a one-transistor trigger suppression (OTTS) faultaccommodation control. This control scheme maintains motor operation during a transistor incipient fault condition while avoiding an inverter failure. Historically, the operation of a power inverter under OTTS has been disregarded because the additional stress imposed on the motor and power drive components is undesired [9], [10]. The proposed technique attempts to minimize the additional stress while extending inverter operation during critical use. Application of the proposed OTTS technique requires realtime fault-detection capability for each power transistor in the inverter. Previous work using parametric monitoring, specifically with measurements of transistor gate-to-source voltage, gate current, and the drain-to-source resistance, has demonstrated the ability to perform real-time diagnosis of power

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Fig. 1.

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 2, FEBRUARY 2010

Simplified modeling of ringing characterization as a second-order system.

transistors [11]–[15]. Recently, online ringing characterization has been reported as an effective diagnostic indicator for power semiconductor aging [16], [17]. Once a potential transistor failure is detected, the failing transistor is isolated by suppressing its trigger. This not only prevented a short circuit, but also retained the control of the inverter by operating in a five-transistor scheme. The rest of this paper is organized as follows. Section II discusses an online diagnostic strategy based on ringing characterization. In case the diagnostic strategy returns a false indication, a backup strategy to maintain controllability is also proposed. Section III presents the vector analysis of the proposed OTTS fault-accommodation control. In this paper, it is shown that the proposed fault-accommodation control can be used to maintain not only the motor operation, but also to start the motor. The paper aims at giving a proof of concept of the methodology. To demonstrate the concept, a simple V /f control was used. Section IV presents the simulation results of motor start-up procedure, performed in MATLAB/Simulink. One disadvantage of the OTTS technique is that it results in an additional thermal stress applied to the stator winding. Thermal stress has an adverse effect on the expected lifetime of the motor. Section V attempts to quantify the effects of increased thermal stress on the expected lifetime of the motor windings. Finally, the proposed approach was validated on an experimental setup consisting of an insulated-gate bipolar transistor (IGBT) based three-phase inverter using a dsPIC30F6010 microcontroller and a 1/3 Hp, 208 V/1.4 A induction motor. The experimental results are presented in Section VI. Finally, conclusions are presented in Section VII.

II. DIAGNOSTICS AND REMEDIAL STRATEGY A diagnostic indicator based on “ringing characterization” was used to identify precursors to transistor latch-up. More specifically, “ringing characterization” is a methodology to identify and track specific frequencies that get attenuated as the transistor degrades over time [16], [17]. The step inputs introduced by the PWM waveform in a power drive system elicit a response in the system. The system’s response at high frequencies establishes the ringing. High-frequency responses (>1 MHz) present in power drives are mainly attributed to small internal or parasitic capacitances, inductances, and resistances that are part of

the intrinsic models of each of the components in the power drive system. In the presence of step inputs, these parasitic or internal elements interact with each other producing ringing. As these power components deteriorate over time, their internal parasitic elements also undergo aging. Since high-frequency responses are dependent on parasitic elements, a change in ringing is expected with component aging. A simplified modeling of this process can be achieved during the transition between OFF-to-ON states for a transistor such as an IGBT, and the drain-to-source properties may be modeled as a switched capacitor for a short period of time. During this transition, second- and third-order harmonic oscillations are observed between the inductive load of the motor and the nonlinear capacitive behavior of the semiconductor. Fig. 1(b) illustrates a simplified series model of the ringing oscillation observed during the transition between transistor (S1) and its clamping diode (S2). This is observed as a step response of a second-order system. Fig. 1(a) shows the actual ringing observed in the system, while Fig. 1(c) shows a simplified characterization of the system as a step response of a second-order circuit. Fig. 2 shows the diagram corresponding to the implementation of the ringing characterization technique highlighting the signal conditioning and fault-detection stages. In this implementation, digital filters can also be used. Analog implementation, however, has been proposed in this paper in order to create a lowcost system. Frequency attenuation is tracked using an analog high-frequency passband filter tuned to the ringing frequency, as discussed in [16] and [17]. A backup strategy (see Fig. 3) is presented for the case where the diagnostic strategy returns a false positive. During this event, a short circuit triggers a temporary shutdown of the inverter. This period utilizes the self-healing properties inherent to power IGBT and MOSFETs [12], [13], [21]. After the short is detected, the inverter is restarted with the remaining five healthy transistors openly allowing the failing transistor to remain OFF. This period typically lasts several seconds, providing sufficient conditions for latch-up recovery. Afterwards, the failing transistor regains controllability.

III. OTTS VECTORS ANALYSIS The control possibilities provided by a voltage-fed inverter are analyzed in order to evaluate the OTTS fault-accommodation

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Fig. 2.

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Online ringing characterization diagnostic block diagram. TABLE I STANDARD VECTOR CONTROL POSSIBILITIES, AND α AND β TRANSFORMATION

Fig. 3.

Temporary shutdown strategy.

method. The relationships between the neutral voltage and the corresponding line-to-neutral voltage obtained from the line-to-line input voltage are expressed using (1) and (2) can be written in the matrix form, as shown in (3) Van + Vbn + Vcn 3 Vab − Vca Van = Vab − Vn = 3      Van 1 0 −1 Vab   1   0   Vbc   Vbn  =  −1 1 3 Vcn Vca 0 −1 1 Vn =

(1) (2)

(3)

where n is defined as neutral of the load. Using (3) with Clarke’s transformation [given in (4)], the complete relationship between the line-to-line voltages, and α and β transformation parameters is established. The final

transformation is summarized in (5) as   1  1 Van 1 −    2 2  Vα  =  Vbn  √  √   Vβ 3 3 Vcn − 0 2 2  3  3  Vab 0 −   2  Vα 1 2  =   Vbc  . √ √    3 Vβ 3 √ 3 Vca − 3 − 2 2

(4)

(5)

Table I is constructed using (3)–(5) for the possible control states (Sn ) during normal operation, and Fig. 4 graphically represents the table as vector diagram. In this table, 1 or 0 correspond to the state (ON or OFF) of the respective transistor (Tn ) shown in Fig. 2. The six possible nonzero phasors and their corresponding values are also provided [18]–[20]. Traditionally, the complementary leg switch is omitted because, in standard operation, one state is the opposite of the other to avoid a short

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Fig. 4.

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 2, FEBRUARY 2010

Vector diagram for normal operation. TABLE II MODIFIED VECTOR CONTROL POSSIBILITIES WITH TOP PHASE-A TRANSISTOR SUPPRESSED

Fig. 5.

Vector diagram for T1 suppression.

circuit. In these analyses, both transistors can remain open as part of the control strategies. Consider the following example of a fault-accommodating control utilizing OTTS. Suppose the top transistor of phase A (T1 in Fig. 2) is suppressed or nontriggered. The resulting vector possibilities (Vm ) for this condition are outlined in Table II. For the OTTS, there are no α components, thus restricting the control to the β component only. This is graphically represented in Fig. 5 using the vector diagram. From the six nonzero vectors in normal operation, only five are obtainable during OTTS, three vectors remain unaltered (V3 , V4 , and V5 ), and the magnitudes of the two remaining vectors (V2∗∗ and V6∗∗ ) are reduced to 86% of their original magnitude with a 30◦ shift in their spatial angles. Therefore, only half of the plane is controllable. Another way to represent the OTTS phenomenon topologically for T1 is shown in Fig. 6. In this figure, the motor is

Fig. 6.

Connection diagram of OTTS for T1 suppression.

Fig. 7.

Modified V /f control.

represented by a simplification as a resistive Y load. The topologic changes in the switches are shown in the top part of the diagram, in the middle, where the distribution of the voltage in the load is illustrated, and at the bottom, where the resultant voltages on the phases are indicated. PWM is suppressed from the picture for simplification. A. Control Techniques Suitable for OTTS Several motor control techniques can be implemented to start and maintain operation of the motor with OTTS. These control techniques include: voltage–frequency constant (V /f ), vector, and direct torque control. The V /f constant control, due to its wide spread in industry application, was selected to demonstrate the OTTS approach. The V /f constant control presents limitations such as the inability to control the position of magnetic flux. Additionally, under OTTS, control of the vectors is restricted to half of the plane (see Fig. 5), and accelerations too fast or too slow can stall the motor. The optimal acceleration rate depends on the load torque and inertia properties of the electrical machine. To solve this problem, an additional fuzzy external control loop can be used to modify the original set points to obtain positive torque during the starting and transient periods, as shown in Fig. 7.

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TABLE III MOTOR PARAMETERS

Fig. 9.

Motor thermal model and winding expected life.

TABLE IV COMPARISON OF PHASE CURRENT AND POWER MEASUREMENTS FOR A HEALTHY SYSTEM AND ONE WITH SUPPRESSED TRANSISTOR

Fig. 8. Angular speed, current, and torque in the simulated starting OTTS technique.

V. MOTOR THERMAL STRESS EVALUATION IV. SIMULATION RESULTS The OTTS techniques were simulated using MATLAB/ Simulink. The motor parameters used for this simulation are shown in Table III. Fig. 8 shows the speed, phase current, and torque versus angular speed, respectively, during start-up of a three-phase induction machine OTTS. Despite a strong pulsating torque, a net torque is produced allowing the motor to start. This indicates that OTTS is capable of delivering starting torque under emergency conditions.

A drawback of this fault mitigation strategy is an increase in phase current rms, thus increasing power losses and reducing the system efficiency. This might result in an increase in thermal stress and, subsequently, increase life consumption of some of the system components. In order to estimate the effect of this strategy on system health, a healthy system was simulated and rms values of each phase current were recorded once the system reached a steady state. Then, the fault condition was simulated and OTTS control strategy was activated. Then, the same operating conditions were used to measure the steady-state parameters. Table III presents a comparison between healthy system

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Fig. 10.

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 2, FEBRUARY 2010

Experimental diagram setup for OTTS.

measurements and those with the OTTS control strategy enabled for the same steady-state conditions. The comparison shows that the OTTS technique causes a significant increase in the phase currents. This might have a detrimental effect on the overall system since it results in an additional thermal stress being applied to the stator winding. Thermal stress has an adverse effect on the expected lifetime of the motor. The OTTS control can only be applied if the expected lifetime of the motor is within acceptable limits. The winding lifetime, or remaining useful life (RUL) can be computed based on two factors: the class of isolation and the operational temperature of the motor [22]. The impact of temperature on the winding can be computed using τW inding = AC 10−0.0267T

(6)

where T temperature in degrees Celsius AC constant class isolation dependant Class A AC = 1.89 × 109 Class B AC = 3.22 × 108 Class F AC = 4.73 × 107 Class H AC = 7.57 × 106 . From the simplified thermal model shown in Fig. 9, the expected lifetime of the stator winding can be computed using knowledge of the thermal resistance (RT ), stator winding losses (PS ), ambient temperature (TAmb ), and its respective motor class as τW inding = AC 10−0.0267(P S R T +T A m b ) .

(7)

Using (7) with the data from Tables III and IV, it is possible to estimate the reduced lifetime operation under OTTS. The results show that a typical motor can be operated under OTTS strategy for several days under worst-case scenario.

Fig. 11.

Experimental platform.

VI. EXPERIMENTAL RESULTS Operation of the induction motor with OTTS was implemented on an IGBT-based three-phase inverter using a dsPIC30F6010 microcontroller and a 1/3 Hp, 208 V/1.4 A induction motor, as shown in Fig. 10. The experimental test was designed specifically to evaluate the OTTS approach. Fig. 11 shows the experimental platform used during laboratory testing, evaluation, and demonstration of the OTTS control algorithm An external fuzzy controller was used as an outerloop control in conjunction with the OTTS control algorithm to adjust the controller set points during start-up and other transient events. Fuzzy variables for motor speed, tracking error, change in tracking error, and set-point adjustment where used with triangular membership functions to assign fuzzy values to each variable. Fuzzy values for each variable were defined as [“Neg,” “Zero,” and “Pos”] for the tracking error and change in tracking error, and [“Zero,” “Small,” “Medium,” and “Large”] for the motor speed and set point adjustments accordingly. Then, fuzzy rules were determined heuristically to offset the reference speed to the nominal controller during dynamic events. Finally,

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the adjusted set points were computed from the fuzzy membership functions using centroid defuzzification. Fig. 10 shows the current for two phases (Y and R) obtained from the power drive Hall current sensors for no-load operation. The top plot in Fig. 9 shows the normal operation current, while the bottom plot shows the current under OTTS with transistor T1 suppressed. During this test, the suppressed transistor generated a dc current in the R phase. The corresponding dc current was observed in the other two phases. The results are consistent with the simulation results (see Fig. 8). Fig. 12 shows the currents in phase A(Y) and phase B(R), and the speed during start-up with OTTS. The ability to start the induction motor with only five transistors enabled can be observed in the bottom plot of Fig. 13. The shape of the phase currents can be compared with the simulation results shown in Fig. 8.

VII. CONCLUSION

Fig. 12.

(Top) Phase current under normal and (bottom) OTTS operation.

In this paper, a fault-accommodation technique for an induction motor to suppress transistor failure during incipient fault conditions was presented. As a proof of concept, it was shown that the proposed technique not only allows the motor to continue operating, but also provides necessary starting torque, even with the suboptimal constant V /f control. Also, the effect of the proposed technique on windings life was quantified. Simulation results and experimental evaluations validated the utility of the technique in both continuing operation and start-up.

REFERENCES

Fig. 13.

Experimental results for T1 transistor trigger suppressed start-up.

[1] D. Kastha and B. K. Bose, “Investigation of fault modes of voltage-fed inverter system for induction motor drive,” IEEE Trans. Ind. Appl., vol. 30, no. 4, pp. 1028–1038, Jul./Aug. 1994. [2] B. A. Welchko, T. A. Lipo, T. M. Jahns, and S. E. Schulz, “Fault tolerant three-phase AC motor drive topologies: A comparison of features, cost, and limitations,” IEEE Trans. Power Electron., vol. 19, no. 4, pp. 1108– 1116, Jul. 2004. [3] G. Gentile, N. Rotondale, and M. Tursini, “Investigation of inverter-fed induction motors under fault conditions,” in IEEE PESC Rec., 1992, pp. 126–132. [4] K. S. Smith, L. Ran, and J. Penman, “Real-time detection of intermittent misfiring in a voltage-fed PWM inverter induction-motor drive,” IEEE Trans. Ind. Electron., vol. 44, no. 4, pp. 468–476, Aug. 1997. [5] M. S. Khanniche and M. R. M. Ibrahim, “Condition monitoring of PWM voltage source inverters,” in Proc. TENCON 2000, vol. 3, pp. 295–299. [6] J. Zhu, N. Ertugrul, and W. L. Soong, “Fault analysis and remedial strategies on a fault-tolerant motor drive with redundancy,” in Proc. IEMDC 1997, pp. 1119–1124. [7] D. B. Estreich, “The physics and modeling of latch-up and CMOS integrated circuits,” Ph.D. dissertation, Stanford Univ., Stanford, CA, 1980. [8] M. K. Achuthan and K. N. Bhat, Fundamentals of Semiconductor Devices. New York: McGraw-Hill, 2007. [9] D. Kastha and B. K. Bose, “Fault mode single-phase operation of a variable frequency induction motor drive and improvement of pulsating torque characteristics,” IEEE Trans. Ind. Electron., vol. 41, no. 4, pp. 426–433, Aug. 1994. [10] R. L. de Araujo Ribeiro, C. B. Jacobina, E. R. Da Silva, and A. M. N. Lima, “Fault detection of open-switch damage in voltage-fed PWM motor drive systems,” IEEE Trans. Power Electron., vol. 18, pp. 587–593, Mar. 2003.

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[11] P. Srinivasan, “Reliability of solder die attaches for high power application,” Master’s thesis, Dept. Mech. Eng., Univ. Maryland, College Park, 2000. [12] D. C. Katsis, “Thermal characterization of die-attach degradation in the power MOSFET,” Ph.D. dissertation, Virginia Polytech. Inst., Blacksburg, 2003. [13] A. Ginart, I. Barlas, J. L. Dorrity, M. J. Roemer, and P. Kalgren, “Self-healing from a PHM perspective,” in Proc. AUTOTESTCON 2006, pp. 697–703. [14] M. A. Rodr´ıguez1, A. Claudio, D. Theilliol, and L. G. Vela, “A new fault detection technique for IGBT based on gate voltage monitoring,” in Proc. PESC 2007, pp. 1000–1005. [15] W. Wu, G. Gao, L. Dong, Z. Wang, M. Held, P. Jacob, and P. Scacco, “Thermal reliability of power insulated gate bipolar transistor (IGBT) modules,” in Proc. 12th Annu. IEEE Semicond. Therm. Meas. Manag. Symp., Mar. 1996, pp. 136–141. [16] A. E. Ginart, D. Brown, P. W. Kalgren, and M. J. Roemer, “On-line ringing characterization as a PHM technique for power drives and electrical machinery,” in Proc. IEEE AUTOTESTCON 2007, pp. 654–659. [17] A. E. Ginart, D. Brown, P. W. Kalgren, and M. J. Roemer, “On-line ringing characterization as a diagnostic technique for power drives,” IEEE Trans. Instrum. Meas., vol. 58, no. 7, pp. 2290-2299, Jul. 2009. [18] W. Leonhard, Control of Electrical Drive. Berlin, Germany: SpringerVerlag, 1996. [19] J. M. Aller, Maquinas El´ectricas Rotativas, Ed. Equinoccio, Caracas, 2008. [20] “AC induction motor control using the constant V/f principle and a spacevector PWM algorithm,” Atmel Corporation, San Jose, CA, Appl. Rep. AVR495, 2005. [21] E. Miranda and J. Sune´, “Electron transport through broken down ultrathin SiO2 layers in MOS devices,” Microelectron. Rel., vol. 44, pp. 1–23, 2004. [22] G. Stone, E. A. Boulter, I. Culbert, and H. Dhirani, Electrical Insulation for Rotating Machines. Piscataway, NJ: Wiley–IEEE Press, 2004.

Antonio E. Ginart (S’90–M’92–SM’07) received the B.Sc. and M.Sc. degrees in electrical engineering from Simon Bolivar University, Caracas, Venezuela, in 1986 and 1990, respectively, and the Ph.D. degree in electrical engineering from Georgia Institute of Technology, Atlanta, in 2001. From 1989 to 2002, he was an Instructor in Simon Bolivar University, where he was also an Assistant Professor and, later, an Associate Professor. From 1999 to 2000, he was a Consultant for Aureal Semiconductors, Inc., where he was engaged in power amplification and pioneered the effort to develop Class AD amplifiers. He is currently with Impact Technologies, LLC, Marietta, GA, where he is responsible of developing intelligent automated monitoring systems for electrical and electronics equipment for industrial and military applications. He has over 20 years of experience in motors, electronic drives, and industrial controls. He has authored or coauthored more than 50 publications.

Patrick W. Kalgren (S’02–M’03) received the B.S. degree in computer engineering from Pennsylvania State University (PSU), University Park. He was in the Applied Research Laboratory, PSU, where he was involved in the research on automated classifiers and developed performance tests to assess cross-data-type performance. He is currently with the Electronic Systems Prognostics and Health Management (PHM) Group, Impact Technologies, LLC, Marietta, GA, where he has developed advanced signal processing, applied AI techniques to fault classification, researched advanced database design, and supervised various software projects related to vehicle health management. For more than 20 years he was involved in mechanical and electronic system analysis, diagnosis, and repair. His current research interests include development of improved diagnostics and failure prediction to enable health/management for electronic systems. Mr. Kalgren is a member of the Tau Beta Pi Society, the IEEE Standards Association, and the IEEE Computer Society.

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Michael J. Roemer received the B.Sc. degree in electrical engineering and the Ph.D. degree in mechanical engineering from the State University of New York at Buffalo, Buffalo. He is a Co-Founder and the Director of Engineering at Impact Technologies, LLC, Marietta, GA. He has more than 18 years of experience in the development of real-time, monitoring, diagnostic, and prognostic systems for a wide range of military and commercial applications. He is also an Adjunct Professor of mechanical engineering at the Rochester Institute of Technology, Rochester, NY. He has extensive working knowledge in technologies such as artificial intelligence methods, vibration analysis, electrical signal analysis, aerothermal performance monitoring, nondestructive structural evaluation and monitoring, and probabilistic risk assessment methods. He is the coauthor of a recent book Intelligent Fault Diagnosis and Prognosis for Engineering Systems (New York: Wiley) and has authored or coauthored more than 100 technical papers related to integrated systems health management. Dr. Roemer is a past Chairman of the Machinery Failure Prevention Technology (MFPT) Society and the Prognostic Lead for the SAE E-32 Engine Condition Monitoring Committee. He is a member of the International Gas Turbine Institute (IGTI) Marine Committee, and the American Society of Mechanical Engineers (ASME) Controls and Diagnostics Committee.

Douglas W. Brown (S’08) received the B.S. degree in electrical engineering in 2006 from Rochester Institute of Technology, Rochester, NY, and the M.S. degree in electrical and computer engineering (ECE) in 2008 from Georgia Institute of Technology, Atlanta, where he is currently working toward the Ph.D. degree in ECE. He was a full-time Project Engineer at Impact Technologies, where he was engaged in incipient fault detection techniques, electronic component test strategies, and diagnostics/prognostic algorithms for power supplies and RF component applications. His current research interests include incorporation of prognostics health management (PHM) for fault-tolerant control. Mr. Brown is a recipient of the National Defense Science and Engineering Graduate (NDSEG) Fellowship.

Manzar Abbas received the B.E. degree in 1999 from the National University of Sciences and Technology (NUST), Islamabad, Pakistan, and the Masters of Electrical Engineering degree in 2007 from Georgia Institute of Technology, Atlanta, where he is currently working toward the Ph.D. degree in the School of Electrical and Computer Engineering. Since summer 2005, he has been with the Intelligent Control Systems Laboratory (ICSL), Georgia Institute of Technology. He was involved in applied research in the areas of fault diagnostics and failure prognostics of electrical, electrochemical, electromechanical, and electronics systems. He is currently engaged in developing a methodology to analyze fault propagation from one subsystem to the other subsystems with a specific focus on turbo machinery.