VI-Based Measurement System Focusing on Space

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Dec 5, 2016 - General Purpose Interface Bus (GPIB - IEEE-488) [10] or another Bus type proven to be ... The ATE-PXI test system includes an enclosure bus.
VI-Based Measurement System Focusing on Space Applications

L. E. Seixas, S. Finco & S. P. Gimenez

Journal of Electronic Testing Theory and Applications ISSN 0923-8174 J Electron Test DOI 10.1007/s10836-017-5651-3

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Author's personal copy J Electron Test DOI 10.1007/s10836-017-5651-3

VI-Based Measurement System Focusing on Space Applications L. E. Seixas, Jr 1,2 & S. Finco 1 & S. P. Gimenez 2

Received: 5 December 2016 / Accepted: 10 February 2017 # Springer Science+Business Media New York 2017

Abstract This article describes in detail a custom, highperformance, compact, flexible and reconfigurable test equipment. This measurement system is able to perform, locally or remotely, the electrical characterization of semiconductor devices and integrated circuits (ICs) under ionizing irradiation tests. This measurement platform can be managed remotely through serial, Local Network Area (LAN) link, allowing the electrical characterization of these devices in harsh test environments. Using this customized test measurement system, we were capable to reduce total test time by 1/3 in our TID test application. Keywords PXI test equipment . IC electrical characterization . Radiations effects on ICs

1 Introduction Semiconductors devices, integrated circuits (ICs), and subsequently the electronics are strongly influenced by ionizing radiations [3]. These effects are usually classified as cumulative and transient [3]. The cumulative effects commonly cause

Responsible Editor: S. Sindia This work was supported by the FINEP CITAR Project under Covenant number 01.12.0224.00 and CAPES. * L. E. Seixas, Jr [email protected]

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Center for Information Technology Renato Archer (CTI), Rod. (SP 65) Km 143,6, Campinas, São Paulo, Brazil

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Electrical Engineering Department, FEI University Center, São Bernardo do Campo, São Paulo, Brazil

permanent damages in the devices’ structures and hence their electrical characteristics are heavily degraded [2, 3]. The Total Ionizing Dose (TID), which is responsible for inducing positive charges in the gate thin oxide and in the interface between the silicon-film (channel region) and the thin gate oxide of Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), is responsible for changing their main figures of merit, such as the threshold voltage (VTH), the subthreshold slop (SS), transconductance (gm), etc. [2, 3]. The transient effects are usually caused by individual ionizing particles of high energy (atomic ionization mechanism) [2, 3]. The Single Event Effect (SEE) is a non-cumulative radiation effect, is stochastically caused by the heavy particle, electron and proton [2, 3]. It can be considered an electrical noise, which can affect the MOSFET’s drain current (IDS) and consequently it’s main figures of merit. This effect can be non-destructive (IDS transient disturbance or data corruption) or destructive (burn-out, gate rupture, latch-up, etc.). If these effects are not controlled appropriately, they can cause malfunction, interruptions, or catastrophic failures in MOSFETs and consequently in the ICs of the electronics [2, 3]. In order for electronics to meet the stringent operating requirements in a space environment, it is mandatory to perform radiation hardness assurance and reliability tests [5, 9, 17] of devices previously, following the standards for space projects [3]. These devices are increasingly becoming more sophisticated and complex and hence their radiation tolerance qualification and tests processes become longer and more onerous [2, 3]. The motivation for this research is the use of an open test system architecture approach [6, 7, 10, 12, 13, 15, 16] (www. ni.com.http://sine.ni.com/cs/app/doc/p/id/cs-16626#). An open architecture includes the use of both commercial and industry standards to provide the optimum framework to develop the test system. We may associate some benefits

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with an open architecture test system approach, such as excellent reliability at a low cost because of its extensive use of PXI hardware (PCI eXtensions for Instrumentation) (www. ni.com.http://sine.ni.com/cs/app/doc/p/id/cs-16626#) and COTS software. It presents an optimized performance because the PXI bus provides the fastest commercially [6, 7, 10, 12, 13, 15, 16] (www.ni.com.http://sine.ni.com/cs/app/ doc/p/id/cs-16626#) [1, 8, 14] available bus platform for ATE (Automatic Test Equipment) today. In this context, we aim at significantly improving the cycle time of radiation hardness assurance and reliability tests of semiconductor devices and ICs. This manuscript describes an innovative compact (portability), modular (expandable), flexible, and reconfigurable measurement platform (easy to customize for future specific needs) [1, 8, 13, 14], based on a common PXI bus [6, 10, 13]. It is easy to generate new measurement routines and consequently be able to follow the advanced IC technology nodes thus increasing their lifetime and modular capacity. Different instruments can be connected and programmed on it, for instance via LabVIEW National Instruments (Virtual Instruments – VI) [6, 12, 16] (www.ni.com.http://sine.ni. com/cs/app/doc/p/id/cs-16626#), without the need to use General Purpose Interface Bus (GPIB - IEEE-488) [10] or another Bus type proven to be slower [6, 12, 16] (www.ni. com.http://sine.ni.com/cs/app/doc/p/id/cs-16626#). The PXI bus provides the highest bandwidth and lowest latency in the test and measurement industry (www.ni.com.http://sine.ni. com/cs/app/doc/p/id/cs-16626#).

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doc/p/id/cs-16626#) precision source measure unitSMU) for biasing and I-V characterizing semiconductor devices under various conditions. An arbitrary function generator module, type NI-PXI-5406 (www.ni.com.http://sine.ni.com/cs/app/doc/p/id/cs16626#), with 40 MHz operational frequency. It is able to apply several kinds of signals to DUT. A high-speed digitizer module, type NI-PXI-5153 (www.ni. com.http://sine.ni.com/cs/app/doc/p/id/cs-16626#) (oscilloscope), with 8-bit resolution, operating in the 500MHz band with a maximum sample rate of 20 GS/s, two channels with a minimum sensitivity voltage of 390 μV, and output impedance of 50 Ω. This is useful to measure low levels and fast signals or the time of an abrupt transition. A field-programmable gate array (FPGA) multifunction I/O based on a Virtex-5, type NI-PXI-7852R (www.ni. com.http://sine.ni.com/cs/app/doc/p/id/cs-16626#), which can sense Transistor–Transistor Logic (TTL) and non-TTL signals; detect DC voltages levels changes in the output lines and has current drive capability to digital devices. This equipment is able to test digital and mixed-signal ICs. For multiplexing the instrument modules from ATE to DUT a 512 cross-point matrix switch module type NI-PXI-2532 (www.ni.com.http://sine.ni.com/cs/app/ doc/p/id/cs-16626#).

3 Software Architecture 2 Hardware Architecture The ATE-PXI test system includes an enclosure bus (NI-PXIe-1062Q) (www.ni.com.http://sine.ni.com/cs/app/ doc/p/id/cs-16626#) and multiple-purpose test fixtures that are externally connected to the test head. Figure 1 shows a general diagram block which represents the ATE and consists of: i. A controller (NI-PXIe-8135 [6] compact PC) and the following modular instrumentation: ii. Four quadrant sources with current monitor (type NI-PXI-4132 (www.ni.com.http://sine.ni.com/cs/app/

Fig. 1 ATE general diagram blocks [13, 14]

The software system is based on Application Programming Interface (API) concepts and is a complete set of software (code) modules and instrument drivers built upon National Instruments’ LabVIEW [6, 7, 10, 12, 13, 15, 16] (www.ni. com.http://sine.ni.com/cs/app/doc/p/id/cs-16626#) executive test. A code module is a program module such as a dynamic link library (dll) function or a Virtual Instrument (VI) that contains one or more test functions. The software allows the user to create, edit, and execute sequences of reusable test code modules to determine I–V curves for MOSFETs. This was measured with a high precision SMU (type PXI-4132) www.ni.com.http://sine.ni.com/ cs/app/doc/p/id/cs-16626#. All modules have a standard

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interface and can be adapted to run in one or more different programming languages (C++, dll, HTBasic, etc.) www.ni. com.http://sine.ni.com/cs/app/doc/p/id/cs-16626#. Figure 2 shows two examples of interactive code modules. Figure 2a and b respectively present I DS as a function of VGS in logarithm scale in the panel of Code module 1 and the IDS as a function of VDS in the panel of Code module 2. By measuring and analyzing these curves, the ionizing radiation effects [2, 3, 9, 13, 17] can be observed in the devices. Regarding the panel of Code module 1, the MOSFETs’ parameters can be obtained, such as the threshold voltage (VTH), which is acquired through some methods [11] (second–derivative or extrapolation in the saturation region): ∂2 I DS ∂V 2 GS

ð1Þ

Other parameters such as transconductance (extracted by first–derivative) can be obtained, such as the transconductance (gm) (Eq. (2)): Fig. 2 Examples of PANELS of the VI Codes; module 1 (IDS X VGS) (a) and module 2 (IDS X VDS) (b) [13]

gm ¼

∂I DS ∂V GS

ð2Þ

Additionally, the currents in the Bturned off^ and Bturned on^ states and the subthreshold slope can also be obtained and studied [2, 3]. In Fig. 2b, considering the panel of Code module 2, we can see four IDS curves as a function of VDS regarding four gate to source bias (VGT). The software’s setup is capable of setting the number of curves for different bias conditions. Regarding these curves, the following DC parameters are calculated and saved for analysis, such as the drain saturation currents (IDS_SAT), in Saturation region, and on-state series resistance (RON) in the Triode region (Eq. (3)): RON ¼

ΔV DS ΔIDS

ð3Þ

These two images of Fig. 2 are the interactive test panels to program the test-code modules, and they can be used to electrically characterize the I–V curves of the semiconductor

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devices (two to four terminals). Therefore, the main DC figures of merit taking into account the Total Ionizing Dose (TID) effects (performed in situ) [2, 3, 9, 13, 17] can be obtained from these curves in order to reduce testing time and costs. The same test Code module 1 can also be adapted to measure the DC figures of merit of analog or digital CMOS ICs. The PXI-4132 [13] (www.ni.com.http://sine.ni.com/cs/ app/doc/p/id/cs-16626#) precision Source Measure Unit (SMU) it is commonly used to trace the experimental I-V curves of the devices under test (DUT). These PXI modules have several additional features because of properties of their analog-digital converters (ADC), which can be programmed to adjust the measurement time and precision of the data obtained [13, 15] (www.ni.com.http://sine.ni.com/cs/app/doc/p/ id/cs-16626#). Besides, the calibration of ADCs of these SMUs can increase the accuracy by removing the ADCs’ gains. The Bauto-zero^ is a property that compensates the

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Fig. 3 Code module 3 to acquire SEE in a DUT (a) and SEE data acquired via scope of the PXI test equipment (b) [14]

ADC offsets. Disabling this feature leads to gradual error increase. However, it is possible to improve the ADC precision and reduce the measurement time by carrying out automatic zero level determination. The precise measurements in subthreshold region should be carried out with resolution not less than 6.5 digits and thereby make the main contribution into measurement time [13, 15]. With the default settings one point acquisition with 6.5 digits resolution takes 235 ms to complete. That means 20 IDS current vs VGS voltage dependencies each consisting of 20 samples require 94 s. Thus, the measurement test program will last more than 30 min; such time is long in terms of radiation experiment. Regarding the time interval for measurement, it may be necessary to extend the recommended intervals of 1 h for measurement and 2 h for re-exposure [9, 17]. The aperture time is the period during which the input signal is digitized by ADC (into SMU – PXI-4032). It was observed that aperture time can be decreased from 100 ms

-4m SEE acquired on a output of rectangular MOSFET (DUT) 28 using Si particle

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(ADC default value) to 60 ms without severe accuracy loss. Thus, the time needed for the first current sample acquisition with 6.5 digits resolution after range switch remained 235 ms and the time of the subsequent sample acquisitions was decreased down to 60 ms. Therefore, the total measurement time was reduced about 20 min. Like this, we were capable to reduce time by 1/3 in our TID test application, this without severe accuracy loss [13] (www.ni.com.http://sine.ni.com/cs/ app/doc/p/id/cs-16626#). The test plan of this measurement system requires specific test code modules and simultaneously the development of the multiple-purpose test fixtures [13, 14]. When performing an SEE characterization test [1, 3–5, 8, 10, 14], the basic principle is to activate the device while it is being irradiated and count the errors (for example, a bias current transient signal). This assumes that the device survives after an SEE event, and consequently the device’s behavior can be drawn. The measurements in this case could be done remotely, during the ionizing irradiation session, since the experimental hall is hazardous for human beings. Figure 3a shows another test Code module 3, which is capable of measuring fast variations of signals (voltage transients) in the DUTs, by controlling a PXI-5153 high-speed digitizer connected to the devices’ terminals. The PXI-5153 module is smaller, lighter and cheaper in comparison to the same classical bandwidth oscilloscopes (www.ni.com.http:// sine.ni.com/cs/app/doc/p/id/cs-16626#).

energies produced by the 8 MV Pelletron accelerator of the University of São Paulo [14]. Case study 1 shows a comparison between two different MOSFET structures: a conventional or rectangular layout (CM) and Diamond (DM - hexagonal layout transistor), comparing sensitivity to the SEE [14]. Both devices were designed in CMOS 350 nm technology,have the same geometric factor (W/L) and gate area. Both DUTs during irradiation were biased (with the same constant IDS) and monitored continuously to detect and acquire the SEEs based on test module of the Fig. 3a and b and the PXI test system. This experiment consisted in monitoring two signals at same time with an oscilloscope (PXI-5153 module), Fig. 3a, channels (CH0, CH1) while have flux at different particles. The signals can come directly from outputs of the DUTs, from a test board after gate stimulus test pattern applied (PXI-5406 module) to DUTs: on-state, off-state switches and float gate. The approximate total weight of the PXI test system used is 5 kg, four times lighter than a standard test rack. Figure 3b shows an example of an SEE signal [14]. A number of accumulated SEEs were acquired via a scope during the ionizing radiation exposure of the devices. The number of accumulated events (NEVENT), divided by the total fluence (particles/cm2) hitting the device, provides the DUT sensitivity for Linear Energy Transfer (LET), named SEE cross section [1, 3, 5, 8], due to a particle with specific energy. Figure 4 illustrates one example, case study 2 (SEE cross section curve extraction) [1], using standard instrumentation (a big rack with scopes and power supplies), however weighing 20 kg. Here the SEE cross section curve was traced to the commercial p-type Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) 3N163 as a function of LET produced by 12C, 16O, 19F, 28Si, 35Cl, 63Cu and 107Ag heavy ion beams [1, 8] obtained via Eq. (4) [1, 8].

4 Results of SEE and TID Obtained Via the PXI Test System A specific experimental setup was developed to perform the Single Event Effects (SEE) test in semiconductors devices. In this setup, the DUTs were irradiated with heavy ion beams at

Fig. 4 SEE cross section of p-type MOSFET 3N163 as a function of LET produced by heavy ion beams [1, 8], It was measured by an instrumentation five times heavier than the PXI system

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This electrical measurement PXI system can also be used to study TID effects in semiconductor devices and ICs focusing on space applications by using standard test procedures [2, 3, 9, 17] with several radiation sources, such as x-rays, protons [13], electrons, and Cobalt-60 (v rays). The effects of ionizing radiation in semiconductor and integrated circuit devices, basically can be: non cumulative (SEE) and cumulative (TID) [2, 3]. In semiconductors devices, after cumulative dose of ionizing radiation (TID), occurs positive charges trapped in a gate oxide and between oxide/silicon interface may cause damages in the DUTs, changing the electrical characteristics of the devices due to the ionizing radiation effects [2, 3, 9, 17]. One method to verify the DUT robustness against TID effects is analyzing the shifts in threshold voltage (VTH), variations in the sub-threshold slope (SS), and the off-state drain current (IOFF) [2, 3]. Figure 5 presents the characteristic curves drain current (IDS) as a function of the gate (VGS) and drain (VDS) biases. These curves were obtained via the PXI test

equipment (PXI – 4132 SMU) using the test codes (I–V curves measure) shown in Fig. 2a and b. The TID case study 3 [13] was proposed to compare two different MOSFETs geometries (the same devices of study case 1 [14]) regarding the response of each geometry in these experimental conditions. The goal was to understand the behavior between layouts considering a high recombination rate (high dose rate) and under high cumulative dose (high TID). During the test, all DUTs were biased (using test code module 1 and 2 of Fig. 2) in the same bias conditions (VGS = 0.8 V and VDS = 200 mV by PXI – 4132 SMU) and exposed to protons irradiation supplied by an Electrostatic Tandem Accelerator of 1.7 MeV (facility of Physics Institute of University São Paulo) [13]. After the end of each irradiation dose the I–V curves were measured using the same test code module 1 (Fig. 2a and b) to analyze TID sensitivity (in local or remote site) between kinds of DUTs. It used the PXI test system to avoid moving to another laboratory to perform the measurements. The I–V curves, case study 3 [13] presented in Fig. 5a and b, were measured by the module 1 and module 2, as shown in Fig. 2a and b. These curves are useful to analyze the sensitivity

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of the devices taking the TID effects into account [2, 3, 9, 17]. Figure 5a shows the shifts of the threshold voltage (VTH) curves. With this curve in logarithm scale, we can obtain the characteristics of transconductance (gm), sub-threshold slope (SS), offstate drain current (IOFF), and on-state drain current (ION). Additionally, with Fig. 5b we can observe the shifts of the drain-source saturation current (IDS_SAT), on-state series resistance (RON), and Early Voltage (VEA). The test system can be analyzing in real time the main parameters from characteristic curves of the DUT. Also, at the end of each test cycle, our system records all data from the measurements for a subsequent test report.

5 Conclusion This manuscript described an Automatic Test Equipment (ATE) based on a Peripheral Component Interconnect (PCI) extension for instrumentation (PXI) of the National Instruments (www.ni. com.http://sine.ni.com/cs/app/doc/p/id/cs-16626#). This measurement system is capable of performing a comprehensive electrical characterization in real time and Bin situ^ [17] (local intermediates measurements) of semiconductor devices and integrated circuits (ICs) under multiple test environments (low and high temperatures, ionizing irradiation, vacuum, etc.). A good option to complement the radiation laboratories facilities. This proposal presents a custom measurement system focusing on space CMOS ICs applications, which enables the study of the ionizing irradiation effects (Total Ionizing Dose, TID and Single Event Effect, SEE) in semiconductor devices and CMOS ICs [5, 9, 17] before, during (transient regime), and after the ionizing irradiation procedure (permanent regime) [2, 3]. Besides, this customized ATE [1, 8, 13, 14] can be monitored and controlled remotely through serial communication, allowing the electrical characterization of these devices in harsh (ionizing radiation) test environments. Acknowledgments The authors would like to acknowledge the financial support from the Brazilian Agencies CAPES, FAPESP and FINEP (CITAR project).

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Aguiar VAP, Seixas LE, Silveira MAG, Added N (2014) Experimental setup for single event effects at the S.P. 8UD pelletron accelerator. Nucl Inst Methods Phys Res B 332:397–400 Barnaby H (2006) Total-ionizing-dose effects in modern CMOS technologies. IEEE Trans Nucl Sci 53(6):3103–3120 Duzellier S (2005) Radiation effects on electronic devices in space. Aerosp Sci Technol J 9:93–99 Ferlet-Cavrois V, Paillet P, Shaneyfelt MR et al (2006) Statistical analysis of the charge collected in SOI and bulk devices under heavy lon and proton irradiation implications for digital SETs. IEEE Trans Nucl Sci 53(6):3242–3252

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Single Event Effects Test Method and Guidelines, ESA/SCC Basic Specification 25100, 1995 Howard J, LaBel K (2002) Total ionizing dose testing of the Intel Pentium III (P3) and AMD K7 microprocessors. Proc. http:// radhome.gsfc.nasa.gov/radhome/papers/tid/G020802_P3_TID.pdf José M, Verigy (2011) Development of an ATE test cell for at-speed characterization and production testing. Proc. IEEE International Test Conference - 978-1-4577-0152-8/11 Medina NH, Seixas LE, Silveira MAG, Added N (2014) First successful SEE measurements with heavy ions in Brazil. Proc. IEEE Radiation Effects Data Workshop (REDW2014), Paris, France MIL-STD-883 (2010) Method 1019.9, Total ionizing radiation (total dose) test procedure,In:ttp://www.dscc.dla.mil/Downloads/ MilSpec/Docs/MILSTD-883/std883.pdf Nicolas V, Eric G (December 2009) Development of a versatile test platform for Single Event Effect (SEE) characterization of analog, digital and mixed-signals Integrated Circuits (ICs). IEEE Trans Nucl Sci 56(06):3341–3346 Ortiz-Conde A, Garcıa Sanchez FJ, Yue Y (2002) A review of recent MOSFET threshold voltage extraction methods. Microelectron Reliab 42(4–5):583–596 Salopek PR, Albert JC (2005) Rugged general purpose mixed signal COTS based test system for military use. Proc. IEEE Conference Publications AUTOTESTCON, pp. 848–856. doi:10. 1109/AUTEST.2005.1609244 Seixas LE Jr, Finco S, Silveira MAG, Medina NH, Gimenez SP (2017) Study of proton radiation effects among diamond and rectangular gate MOSFET layouts. Mater Res Express IOP Sci J 4:1. doi:10.1088/2053-1591/4/1/015901 Seixas LE, Silveira MAG, Medina N, Aguiar VAP, Added N, Gimenez SP (2015) A new test environment approach to SEE detection in MOSFETs. Adv Mater Res (Online) 1083:197–201 Shvetsov-Shilovskiy, Nekrasov PV, Ulanova AV (2015) Automated I–V measurement system for CMOS SOI transistor test structures. Proc. IEEE Conference Publications, International Siberian Conference on Control and Communications (SIBCON), pp. 1–4. doi:10.1109/SIBCON.2015.7147282 Soni S, Tandon A, Mankadiya K (2013) High speed real time data acquisition system using PXIe technology. Proc. IEEE International Conference Publications, Engineering (NUiCONE), pp. 1–4. doi: 10.1109/NUiCONE.2013.6780169, Nirma University Total Dose Steady-State Irradiation Test Method (2010) ESCC basic specification 22900, 2010

Luis Eduardo Seixas Jr. was born in São Paulo, Brazil, in 1962. He received the B.S. degree in electrical engineering from the São Paulo School Engineering (FESP), São Paulo, Brazil, in 1987, and the M.S. degree from State University of Campinas (UNICAMP), Campinas, Brazil, in 2003. Test Specialist Engineer in industrial semiconductors and automotive areas, worked at the Itautec Components S/A in São Paulo, and Magneti Marelli Power Train in Campinas, Brazil. He has skill in Automatic Test Equipment’s. Since 1998, he has been working as an integrated circuits (IC) designer and IC electrical test developer, in Center for Information Technology Renato Archer (CTI), Campinas, Brazil. Saulo Finco graduated in Electrical Engineering from the FEJ/UDESC (1987) and received M.S, (1996) and Ph.D. (2000) degrees in Electrical Engineering from UNICAMP. He works at Center for Information Technology Renato Archer - CTI, as a researcher since 1988. He served as chief of the Division of Design of Hardware Systems for over 15 years. He served as Project Coordinator of DH CTI, a Design House created in Brazilian Microelectronics Program. He has also served as coordinator of several projects with Government financing since 1993. He acts as a guest

Author's personal copy J Electron Test researcher at UNICAMP, performing activities at the Microelectronic Sensors Lab of the Department of Photonic and Instrumentation Systems of the School of Electrical and Computer Engineering. His research activities are related especially photodiodes for applications to the study and development of sensors, including radiation sensors, in the region of the visible and infrared spectrum, also in the development of hardware with high-capacity signal processing based on programmable logic and Rad-Hard ICs. Salvador P. Gimenez was born in Sao Paulo, Brazil, in 1962. He graduated in electrical engineering at Mogi das Cruzes University, Sao Paulo, Brazil, in 1984. He received the M.S. and Ph.D. degrees in electrical

engineering from the University of Sao Paulo, Brazil, in 1990 and 2004, respectively. From 1987 to 1993, he worked as a Product Engineer at Dimep and Tracecom Telecommunications Systems. In 1994, he joined Ford (Electronic Division/Visteon) in Guarulhos, Sao Paulo, Brazil, as a Component Engineer, then becoming a Coordinator of Supply Quality Assurance. Since 1999, he has been a Full Professor and Researcher at FEI University Center, Brazil. He has authored text books on microcontrollers and holds industrial patents on MOSFET with innovative gate geometries. His major fields of study include new devices, digital and analog CMOS ICs design and evolutionary electronic by developing analog CMOS ICs tools. Dr. Gimenez is a member of the Microelectronic Brazilian Society and IEEE.