Analog Integr Circ Sig Process (2007) 53:19–25 DOI 10.1007/s10470-006-9002-z
1 V fully balanced differential amplifiers: Implementation and experimental results Herv´e Facpong Achigui · Mohamad Sawan · Christian J´esus B. Fayomi
Received: 10 December 2005 / Accepted: 25 September 2006 / Published online: 11 November 2006 C Springer Science + Business Media, LLC 2006
Abstract We report a novel low voltage fully differential class AB operational amplifier and a fully balanced preamplifier, which are based on Dynamic Threshold voltage MOSFET (DTMOS) transistors. Pseudo P type DTMOS transistors are used to enhance the differential input common-mode range. The proposed circuits were fabricated using standard CMOS 0.18 µm CMOS process technology. The fully differential class AB amplifier is implemented to enhance the noise performance of low voltage high precision switched capacitor circuits, the fully balanced preamplifier is implemented to drive the differential inputs of the analog to digital converter used in the analog front-end of a near-infrared spectroreflectometry (NIRS) receiver of a multi-wavelength wireless brain oxymeter apparatus. The power consumption of the proposed preamplifier is only 80 µW. The minimum experimental supply voltage is roughly 0.8 V. Keywords DTMOS transistor . Preamplifier . Operational amplifier . Low voltage circuits . Fully differential . CMOS process
H. F. Achigui () PMC-Sierra, 3333, Boulevard Graham, Bureau 500, Mont-Royal (Qu´ebec) H3R 3L5, Canada e-mail:
[email protected] M. Sawan Polystim Neurotechnologies Laboratory, Electrical Engineering Department, Ecole Polytechnique de Montr´eal, Qu´ebec, Canada C. J. B. Fayomi Wireless Smart Devices Laboratory, Computer Science Department, Universit´e du Qu´ebec a` Montr´eal, Canada
1 Introduction Increasing demand for high performance, battery powered portable and handheld electronic devices with reduced size and weight, having a longer period of operation without replacing or charging the battery, has been the motivation towards lowering supply voltages and power consumption in mixed signal integrated circuits (IC). As technology feature size continues to scale down to the nanometre range, the supply voltage of mixed signal ICs must be reduced as well. This reduction in the supply voltage primarily affects the performance of analog circuits in terms of speed, linearity, dynamic range, noise, gain and bandwidth. Several design techniques have been proposed to circumvent these limitations and implement circuits capable of operating under supply voltage as low as 1 V, and have been presented and reviewed in previous works. For high performance linear integrated circuits, fully differential architectures are becoming popular, especially in data acquisitions systems where they are used to provide the following stages with signal amplification and filtering, since a low pass active filter can easily be created by adding capacitors in the feedback path. In addition, they provide excellent impedance matching, as required at the input of high speed data converter systems. Fully differential circuits’ structures provide a better immunity to common mode noise, as well as to power supply noise. They exhibit larger output signal swing due to the phase shift between the differential outputs, and reduced harmonic distortion. They have improved dynamic range in comparison to their single ended counterparts. Differential amplifiers are mostly used for high commonmode rejection ratio (CMRR) and power supply rejection ratio (PSRR), and to enhance the performance of switched capacitors systems-based applications, as they provide higher rejection capabilities to clock feed-through charge injection Springer
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errors. Class AB output stages have been adopted, since they enable the operational amplifier (opamp) to maximize the output swing under low voltage and low power operation. In this paper, a novel DTMOS-based Class AB fully differential opamp circuit, and a fully balanced preamplifier based on a modified version of a single ended opamp and preamplifier, have been fabricated and tested for low voltage applications. The fully differential opamp circuit makes use of the DTMOS folded cascode differential input pairs to increase the input common mode range (ICMR), followed by class AB output stages. Standard Miller compensation is used for bandwidth enhancement. The fully balanced preamplifier is made of modified dual inputs of single ended preamplifiers. The experimental results are reported, along with the effectiveness of the proposed circuits, which verify the operation of the common mode feedback circuit dedicated to the design of low-voltage low-power analog circuits.
2 Fully differential class AB opamp design The proposed implementation makes use of DTMOS transistors for low voltage operation. Matching these transistors yields results which are twice as good as that of their PMOS
transistor counterparts [1]. More details on the operation of DTMOS transistors have been presented in our previous work. The fully differential class AB opamp is the fully differential version of the single ended folded cascode class AB opamp presented in [2], and consists of differential input stages followed by class AB output stages capable of driving off chip resistive load, and a common mode feedback circuit as illustrated in the block diagram of Fig. 1(a). The biasing circuit consists of a standard current source using a resistor and an NMOS transistor. A wide swing current mirror with high output impedance is used to produce bias voltages VBP and VBN as shown in Fig. 1(b) and (c), and Fig. 2(b). DTMOS transistors MP1 -MP3 provide the required bias current for the differential input transistors and cascode current mirror. The common mode feedback voltage (Vctrl ) is used to bias MN1 and MN2 , so that the output common mode voltage remains the same. Transistors MPS1 and MPS2 have been added to enhance the slew-rate limitation of the folded cascode configuration. When the opamp is slew-rate limited, these transistors prevent the drain of MN1 and MN2 from having large transients, which would change their small signal voltages to levels close to the positive power-supply voltage. We recently proposed a folded cascode class AB opamp architecture [2], which has been modified to form the fully VDD VBP MP1
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Fig. 1 Schematic of the DTMOS-based fully differential class AB opamp: (a) block scheme, (b) fully differential input stage, (c) class AB output stage, (d) common mode feedback circuit Springer
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Fig. 2 Schematic of the DTMOS-based fully balanced preamplifier: (a) block diagram architecture, (b) schematic of one dual input DTMOS-based single ended preamplifier
differential version illustrated in Fig. 1(b), as well as the class AB output stage depicted in Fig. 1(c). Typically, PMOS threshold voltage is much larger than that of NMOS; consequently, to achieve 1-V operation or less, we used PMOS based DTMOS transistor pairs (M1 , M2 ) in the differential input, which enables us to take advantage of the maximum input range, while having all transistors operating in the strong inversion region. 2.1 Common mode feedback circuit design The continuous time common mode feedback (CMFB) circuit presented in Fig. 1(c), has been adopted from [3], and is
fully operational under 1-V supply voltage. This circuit enables the opamp to have excellent linearity and large sensitivity to common mode (CM) voltage. The CMFB circuit is used to sense the CM output voltage, Vo,CM , and its output voltage, Vctrl , is used bias the amplifier and adjust the DC current of the transistors MN1 and MN2 of the differential input stage, so that the output common mode voltage is maintained at a specific DC level. The voltage VCM is the preset DC output level. In the proposed CMFB circuit, two differential pairs (MCM1 , MCM3 ) and (MCM2 , MCM4 ) sum their currents into current mirror loads MCM5 and MCM6 . The CM voltage is held constant at a reference potential VCM = (VDD + VSS )/2 in order to maximize the output signal swing. The CMFB determines the CM Springer
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output voltage VO,CM = (VO1 + VO2 )/2, which is subtracted from VCM . Changes in the drain current of MCM1 (Id,MCM1 ) and MCM2 (Id,MCM2 ) caused by changes in Vo,CM , are balanced by corresponding changes in the drain current of MCM3 (Id,MCM3 ) and MCM4 (Id,MCM4 ), and the output voltage (Vctrl ) changes correspondingly until a new balance is reached.
3 Fully balanced preamplifier design Fully balanced architectures have been widely used in audio systems, since their balanced nature leads to better power supply rejection, increased output dynamic range and reduced harmonic distortion. The circuit architecture shown in Fig. 2(a) is based on the single ended preamplifiers
described in [4], which have been modified by splitting the input stage into two matched parts to form the two dual input amplifiers. Also, two matched dual resistors R are needed to close the CMFB loop at the output [5]. The proposed circuit does not require a CMFB circuit, and the CM output is defined by the axis of symmetry. The schematic of one of the dual inputs single ended preamplifiers used to form the fully balanced and symmetric preamplifier is depicted in Fig. 2(b). It has been optimized for biomedical applications, and is implemented to properly drive the differential analog-to-digital (ADC) inputs of the analog front-end of a near infrared spectroreflectometry (NIRS) receiver of a multi-wavelength wireless brain oxymeter apparatus. Input devices, PMOS based DTMOS M11 , M21 , M12 , and M22 , are operated between weak and moderate inversions
Fig. 3 Photomicrograph of proposed DTMOS-based circuits: (a) fully differential class AB opamp, (b) fully balanced and symmetric preamplifier Springer
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to ensure transconductance efficiency (gm /ID ) for the lowest amount of input referred gate noise voltage at the minimum possible bias current. MP1 -MP4 , MF21 , and MF22 are DTMOS transistors. Also, transistors MF11 , MF12 , MF21 , and MF22 implement the flipped voltage follower cell as described in [6], which provides the differential input pairs with adaptive biasing, high linearity, and a significantly enhanced slew rate and bandwidth. The input devices M11 , M21 , M12 , and M22 have a W/L ratio of 984/0.72 each, to ensure sub-threshold
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voltage operation under a relatively large bias current of 4 µA per device, for lower input noise voltage and higher GBW product enhancement. 4 Measurement results The proposed circuits were fabricated in a standard 0.18-µm CMOS technology process with single poly, six metal salicide and metal-to-metal (MiM) capacitors. Nominal
Fig. 4 Measured transient results: (a) fully differential class AB opamp step input response, (b) step input response of the fully balanced preamplifier
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values for the threshold voltages are approximately 0.47 V and − 0.55 V for NMOS and PMOS transistors respectively. Measurements were taken using the Agilent 33250A function waveform generator and the Tektronix TDS7154 oscilloscope, with a 5 pF capacitive load in parallel with a 10 k resistive load for the fully differential opamp, and a 5 pF capacitive load for the fully balanced preamplifier. All measurements were made single-endedly. The die micrograph of the DTMOS-based class AB fully differential opamp is presented in Fig. 3(a). The measured transient results for a 0.6 VP−P pulse input signal is shown in Fig. 4(a). The rising-time and falling-time for the proposed opamp are 12 ns and 14 ns respectively. The measured DC open loop gain is 50 dB with a GBW of 26 MHz, and the total power consumption for the circuit is 750 µW. For the fully balanced preamplifier, the die micrograph is presented in Fig. 3(b). The measured transient results for a 0.7 VP−P pulse input signal is shown in Fig. 4(b). The rising-time and falling-time for the proposed preamplifier are 114 ns and 131 ns respectively. The latter has a lower power consumption of only 80 µW, and it has been optimized for biomedical applications, to be used as preamplifier, and antialias filter for signal conditioning of the ADC with a differential input used in the front-end of the NIRS receiver.
5 Conclusion Novel DTMOS-based fully differential opamp and fully balanced preamplifier architectures were reported along with their experimental measurements. These circuits were fabricated and tested for 1-V applications under standard 0.18-µm CMOS process technology. The proposed circuits work and exhibit good linearity for supply voltage as low as 0.8 V. Application for the fully differential class AB opamp circuit should extend from sample-data systems to switchedcapacitor filters and data converters. Meanwhile, the fully balanced preamplifier circuit is implemented to accurately drive the differential ADC inputs used in the analog frontend of a NIRS receiver of a multi-wavelength wireless brain oxymeter apparatus. Acknowledgments The authors would like to acknowledge the financial support of the Natural Sciences and Engineering Research Council of Canada (NSERC), the Microsystems Strategic Alliance of Quebec (ReSMiQ), and CMC Microsystems.
References 1. A.-J. Annema, “Low-power bandgap references featuring DTMOSTs,” IEEE J. Solid- State Circuits, vol. 34, no. 7, pp. 949–955, July 1999.
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2. H.F. Achigui, C.J.B. Fayomi, and M. Sawan, “1 V DTMOS based class AB operational amplifier: Implementation and experimental results.” to appear, IEEE J. Solid-State Circuits, vol. 41, no. 11, Nov. 2006. 3. S. Mallya and J.H. Nevin, “Design procedures for a fully differential folded-cascode CMOS operational amplifier,” IEEE J. Solid-State Circuits, vol. 24, no. 6, pp. 1737–1740, Dec. 1989. 4. H.F. Achigui, M. Sawan, and C.J.B. Fayomi, “A 1 V low power, low noise DTMOS based NIRS front-end receiver,” in Proc. IIIS WMSCI conf., vol. 6, pp. 56–59, July 2005. 5. Z. Czarnul, et al., “Design of fully balanced analog systems based on ordinary and/or modified single-ended opamps,” Trans. IEICE, vol. E82-A, no. 2, pp. 256–270, Feb. 1999. 6. A.J. L´opez-Mart´ın, A. Carlosena, and J. Ramirez-Angulo, “Very low voltage MOS translinear loops based on flipped voltage followers,” Analog Integrated Circuits and Signal Processing, vol. 40, no. 1, pp. 71–74, July 2004.
Herv´e Facpong Achigui received the B. Eng. (2002) and M.Sc.A. ´ (2006) both in Electrical Engineering from Ecole Polytechnique de Montr´eal (Canada). He worked at Motorola in 2001 during his studies and joined Polystim neurotechnologies Laboratory at Ecole Polytechnique in 2002. He was a research and teaching assistant at both Polystim ` neurotechnologies, and Universit´e du Qu´ebec a` Montr´eal (UQAM) in the Computer Science Department, from 2004 to 2006. He is currently with PMC-sierra in Montreal working on low voltage CMOS mixedsignal integrated circuits and systems.
Mohamad Sawan received his B.Sc. in Electrical Engineering from Universit´e Laval (1984), and his M.Sc. (1986) and Ph.D. (1990), both in Electrical Engineering, from Universit´e de Sherbrooke. He then completed postdoctoral training at Montr´eal’s McGill University in 1991, ´ and in that same year, joined Ecole Polytechnique de Montr´eal, where he is currently a Professor of Microelectronics. Dr. Sawan’s scientific interests focus on the design and testing of mixedsignal (analog, digital and RF) circuits and systems; digital and analog signal processing; and the modelling, design, integration, assembly and validation of advanced wirelessly powered and controlled monitoring and measurement techniques. These topics are oriented toward biomedical implantable devices and telecommunications applications. Dr. Sawan is holder of the Canada Research Chair in Smart Medical Devices. He heads the Regroupement strat´egique en microsyst`emes du Qu´ebec (Microsystems Strategic Alliance of Qu´ebec—ReSMiQ) and is founder of the Eastern Canada Chapter of the IEEE-Solid State Circuits Soci-
Analog Integr Circ Sig Process (2007) 53:19–25 ety. He also founded the International IEEE-NEWCAS conference, cofounded the International Functional Electrical Stimulation Society, and founded the Polystim neurotechnologies laboratory at Ecole Polytechnique. He is the editor of Springer Mixed-signal Letters, Distinguished Lecturer for the IEEE Circuits and Systems (CAS) Society, Chair of the IEEE Biomedical CAS (BioCAS) Technical Committee, and member of the Biotechnology Council representing the IEEE-CAS Society. He has published more than 350 papers in peer-reviewed journals and conference proceedings, and has been awarded seven patents. He received the Barbara Turnbull Award for spinal cord research (2003), the Medal of Merit from the Lebanese President (2005), the J.-ArmandBombardier Award from the Association Francophone pour le savoir (ACFAS), and The American University of Science and Technology Achievement Award. Dr. Sawan is a Fellow of both the Canadian Academy of Engineering and the IEEE.
25 nique de Thi`es (S´en´egal), in 1993 and the M.A.Sc. (with first class ´ honors) and Ph.D. degrees from Ecole Polytechnique de Montr´eal (Canada), in 1995 and 2003, respectively, all in electrical engineering. From 1996 to 2001, he has been with the mixedsignal design group of Goal Semiconductors Inc. (Montr´eal—Canada) working on readout electronic circuits for bolometer, phototransistors, microprocessor supervisory circuits and data converters. From 1998 to 1999, he was also a Teaching Assistant at Microelectronics and Computer Laboratory (MACS—Lab) at McGill University (Montreal—Canada) in the electrical engineering department. From 2001 to 2002, he was with the Microelectronics Division of IBM at Essex Junction (Vermont—USA) as an Advisory Engineer, designing data converters for video applications. Dr. Fayomi is currently Assistant Professor at Universit´e du ` Qu´ebec a` Montr´eal (UQAM) in the Computer Science Department and is leading the Wireless Smart Devices Laboratory. Since June 2006, he held the Adjunct Professor position in the Electrical and Computer Engineering Department at the Universit´e du Qu´ebec a` Trois-Rivi`eres (UQTR). His funded research area is the design of reliable low voltage deep submicron CMOS mixed-signal integrated circuits and systems.
Christian J`esus B. Fayomi received the B. Eng. (with first in one’s ´ year honors) in electromechanical engineering from Ecole Polytech-
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