A Self-Adaptive Low-Voltage Current Mode ASK Demodulator for RFID Tags Wei Liu, Yongming Li, Chun Zhang, Zhihua Wang Tsinghua National Laboratory for Information Science and Technology Institute of Microelectronics, Tsinghua University, Beijing 100084, China Email:
[email protected] Abstract—Proposed a self-adaptive current mode
As in RFID tags, digital modules are the major source
amplitude shift-keying (ASK) demodulator to meet the
of power dissipation, reducing the voltage supply of the
requirements of the Low-Voltage RFID tags. This
whole RFID tag could drastically reduce its overall power
demodulator improves the dynamic demodulation
dissipation. However, it is very difficult to further reduce
performance by converting voltage signal to more
the voltage supply of analog modules in voltage-mode
detectable current signals, by employing two-stage
implementations[4,
current-peak-hold technique, and by introducing leak
points out that lower node resistance in current-mode
circuit. It could operate under the supply voltage range
circuits allows very low voltage supply. In addition,
from 0.6V to 1.8V, the input carrier magnitude range
current-mode circuits have many other advantages over
from 250mV to 1.1V, and the modulation depth range
voltage-mode circuits, such as higher speed and larger
from 20% to 100%. Under the voltage supply of 1.8V,
bandwidth, at the expanse of higher power dissipation.
5]
due to the analysis in [6], which
its dynamic demodulation range is from 80nA to
Two current-mode demodulator structures are proposed
3.96μA. The demodulator is designed and implemented
in [7, 8]. [7] utilizes current edge detection technique,
with 0.18-μm CMOS technology process.
which brings in high power consumption and small
Index Terms—RFID; current-mode demodulator;
dynamic detection range due to its unchangeable reference current. [8] adopts current-peak-hold (CPH) technique to
current peak hold; Low-Voltage
convert small modulated voltage change into large current
EEACC: 1250 CLC number: TN292
Document Code: A
difference, which is easier to be detected by demodulators. However, it has the following disadvantages: a) The fixed
0
INTRODUCTION
reference current to peak current ratio limits the farthest
The Radio Frequency Identification (RFID) system, as
working distance of tags and the minimum modulation
one type of electric identification system, is capable of tag
depth of RF modulated signal; b) The demodulator can
[1]
reading and tag writing over a long distance . The signal
work properly only when the position of tag is fixed.
strength of passive RFID tags ranges from several hundred
To resolve these problems, a self-adaptive low-voltage
millivolts to a few volts as the reading/writing distance
current mode ASK demodulator is proposed, which is
and orientation varies . ASK demodulator used in RFID
composed of a V-to-I convertor (voltage to current convertor), a
tags should not only meet the low-voltage and low-power
two-stage CPH and a leak circuit. This demodulator has
requirements, but also have great dynamic range and high
large dynamic detection range, and could work properly
detection sensitivity. To ensure an adequate energy supply
when the voltage supply is as low as 0.6V in far-field.
[2]
in far-field[3], the modulation depth of ASK signal is
Section 2 first gives an overview of the ASK
required to be very shallow, such as 20%, although
demodulator and then discusses the design details in 2.1,
ISO/IEC 18000-6 protocol just requires 27%~100%.
2.2 and 2.3. Finally, section 3 and 4 contain preliminary
results and conclusion respectively.
envelope detector. As Table І shows, when the input RF modulated signal is as large as 4V, the VMAX is 2.14V,
1
DEMODULATOR ARCHITECTURE
The block diagram of the ASK demodulator is shown in
which satisfies the requirement mentioned above. TABLE І Simulation Result of Envelope Detector and
Fig.1. Envelope detector extracts and filters envelope from
V-to-I Convertor
RF modulation signal received by a dipole antenna. V-to-I
表 І 包络检波及电压电流转换器仿真结果
convertor limits the current amplitude, and accordingly,
VDD
ANT
reduces the power dissipation of the whole circuit. The
VDD
VIN
subtraction circuit exports IDIFF, the current difference
(V)
(V)
between IPK1 and ISIG, to CPH2 and current comparator.
0.6
The current comparator is a transimpedance amplifier
VSIG(V)
ISIG(μA)
Idx
VMAX
VMIN
IMAX
IMIN
0.25
0.2
0.53
0.40
0.14
0.06
1.8
0.25
0.2
0.53
0.40
0.28
0.11
used to generate the output voltage VASK from IDIFF*2 and
1.8
1.1
0.2
1.70
1.56
3.96
3.43
IREF. The circuit uses two-stage CPH to extend the dynamic
1.8
4
0.2
2.14
2.07
4.81
4.56
detection range and leak circuit inside CPH1 to enable the
Note: VIN is the signal amplitude and Idx is the modulation depth. IMAX/IMIN is the
demodulator to function properly while the tag is moving.
logic ‘1’/‘0’ of ISIG, which corresponds to VMAX/VMIN, the logic ‘1’/‘0’ of VSIG.
Fig.2. Schematic of the V-to-I Convertor
图 2 电压电流转换电路图 Fig.1.
Block Diagram of the Current-mode Demodulator
图 1 电流模解调器的结构图
1.2 CPH1 Circuit and Subtraction Circuit As is shown in Fig.3, CPH1 circuit holds the maximum
1.1 Envelope Detector, V-to-I Convertor
value of ISIG, which is subtracted from IPK1 by the
The envelope detector is composed of a Dickson
subtraction circuit to generate IDIFF. As transistors
voltage multiplier, a current sink, a voltage limiter and a
connected to VP are just used to form a cascode structure
filter. The function of the envelope detector is to extract
to increase output resistance and obtain accurate current
the envelope of RF modulated signal.
ratio, it is directly connected to supply power GND. To
The schematic of V-to-I convertor is shown in Fig.2. In
guarantee that the transistors connected to VN work in
this circuit, the negative feedback introduced by resistance
saturated region, node VN is generally set to 0.7V, which is
R3 could guarantee that the output ISIG is within the
an output of bias circuit. When current is small in far-field,
detection range of the post-processing circuit. To limit the
it could alternatively set to 0.6V, the lowest supply
amplitude of VSIG below 2.5V, which is a requirement of
voltage.
0.18μm CMOS process, a voltage limiter is included in
Leak circuit composed of transistors M58~M61 is
shown in the rightmost block (shown by dashed line) in
small/large as is shown in Fig. 5, n should be large/small
Fig.3. It allows the tag to move and could reenter the proper
to guarantee the proper behavior of the demodulator.
demodulation state after the tag is settled. Designing the
Consequently, dynamic range of the demodulator is
circuit, we consider the following two aspects:
confined by n, which is a constant in actual design.
a)
It is active only when ISIG is lower than IPK1. When
Another factor that might decrease the dynamic range is
ISIG < IPK1, VOUT2=“1”, which turns the transistor
the mismatch between IPK1 and the peak of ISIG. To
M61 on and discharge the node Vh1 slowly;
alleviate this problem, the IREF is mutable in CPH2 to
otherwise, VOUT2 =“0”, which turns the leak circuit
support both strong and weak signals. The current
off and allows ISIG to charge C2 and C3 through M49
comparator compares IREF with IDIFF*2 to obtain the
quickly. When the tag is at settled place, the leakage
demodulation result VASK. IDIFF*2 is used in the
current has little impact on the demodulation result.
comparison to ensure the rise time and fall time of the
But while tags are moving from near-field to far-field, output signal be equal. [7] discusses the design details of the leak circuit will be open until Vh1 reaches
the current comparator.
another stable state. While tags are otherwise moving from far-field to near-field, as the leak circuit is always closed, Vh1 could enter to stable state easily as soon as the tag. In ISO/IEC 18000-6 protocol, it is favorable that the time sine-carrier modulated by the logic of “1” is rarely. b)
For shallow modulated signals, the leakage current should
be
small.
Given
the
accuracy
of
post-comparator, Vh1 node voltage (0.45V~0.3V), capacitance and the pulse width restricted by protocol, the leakage current Ileak range could be derived as: (Vh1H − Vh1L ) * (C2 + C3 ) = I ave *τ PW (2) I leak < I ave
(1)
Fig.3. Schematic of CPH1 and Subtraction Circuit
图 3 CPH1 及减法器电路图
where Ileak is the average drain-source current of the transistors M62 and M65 when Vh1 changes from Vh1H to Vh1L. In this design, the leakage current is adjusted to 10nA@Vh1=0.45V. 1.3 CPH2 and Current Comparator CPH2 is shown in Fig.4, whose responsibility is to extend the dynamic demodulation range of the tag by detecting and holding IREF, or the peak current difference of IPK1 and ISIG. If IPK1/n is set as the reference current like [8], it is difficult for the modulator to cover large dynamic range of input modulated signal because the amplitude of ISIG varies widely, as is shown in Table І. When the logic
Fig.4. Schematic of CPH2 and Current Comparator
“0” of ISIG is large/small while the dynamic range of ISIG is
图 4 CPH2 及电流比较器电路图
Fig.5. Example to illustrate the dynamic range of [8] under both strong and weak input signals
图 5 文献[8]在强、弱输入信号下的动态范围分析
Fig.7. Post simulation results when the amplitude of the RF input signal is 1.1V, modulation depth is 20% and the
2
PRELIMINARY RESULTS
The proposed demodulator, whose layout is presented in Fig.6, is implemented with 0.18-μm CMOS technology.
power supply voltage is 1.8V 图 7 1.8V 工作电压下解调电路输入载波幅度为 1.1V， 调制深度 20%时的后仿真结果
The layout without pads occupies 140μm × 190μm. Fig.7 presents the waveforms of the demodulation process of a strong ASK modulated input sine-carrier; while Fig.8 presents the waveforms of the demodulation process of a weak modulated signal, where Itot is the total current dissipation. All the input sine-carriers of both the above cases are of 915MHz frequency.
Fig.8. Post simulation results when the amplitude of the RF input signal is 250mV, modulation depth is 20% and power supply voltage is 0.6V 图 8 0.6V 工作电压下解调电路输入载波幅度为 0.25V， 调制深度 20%时的后仿真结果 3
CONCLUSION
A self-adaptive low-voltage current mode ASK demodulator for RFID Tags implanted with CMOS 0.18-μm technology is presented. The circuit is based on current mode techniques and could operate when the voltage supply is as low as Fig.6.The layout of proposed demodulator
0.6V. Under the voltage supply of 1.8V, the demodulation
图 6 电流模解调器的版图
current range is from 80nA to 3.96μA, which corresponds to all inter-modulated signals under the modulation depth
of 20%~100% that could satisfy the requirements of
Low-Voltage/Low-Power ASK Demodulator for RFID
ISO/IEC 18000-6 protocol.
Tags [J]. Microelectronics, 2007, 37(6):790-793. [5] Cinco-Galicia J C, Sandoval-Ibarra F. A Low-Power
ACKNOWLEDGEMENT
2.7μW, 915-MHz Demodulator for RFID Applications
This research was partly supported by the National
[C]//Electrical and Electronics Engineering, 2006 3rd
Natural Science Foundation of China (No. 60475018,) and
International Conf. Mexico: Veracruz, 2006:1-4.
National Key Basic Research and Development Program
[6] BARTHELEMY H, Current Mode and Voltage Mode:
（ No. G2000036508 ） Beijing Municipal Science &
basic considerations [C]// Circuits and Systems, 2003:
Technology Development Program（ D0305003040111）.
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[4] BAI R R, LI Y M, ZHANG C, et al. Novel
一种用于 RFID 标签的自适应低压电流模 ASK 解调器 刘 伟,李永明,张 春,王志华 (清华信息科学与技术国家实验室, 清华大学微电子学研究所,北京 100084) 摘 要:针对RFID标签低压工作的要求，设计了一种自适应电流模ASK解调器。通过把电压信号转换为电流 信号、采用两级电流峰值保持技术以及泄漏电路等技术提高了解调器的动态检测性能。解调器的工作电源 电压范围为 0.6V～1.8V,能对输入载波幅度为 250mV～1.1V,调制深度为 20%～100%的信号进行正确解调。 电源电压为 1.8V时，解调器的动态检测范围从 80nA到 3.96μA。电路采用 0.18μm CMOS工艺设计。 关键词: RFID；电流模解调器；电流峰值保持；低压 EEACC: 1250 中图分类号: TN492 文献标识码: A 文章编号：80722-43
作者简介：刘 伟 (1982- ), 男，湖北人，清华大学微电子学研究所硕士研究生，主要研究方向为UHF频 段低压低功耗无源射频识别标签的设计实现。 Liu Wei (1982- ), Male, was born in Hubei province, is a graduate of the Institute of Microelectronics, Tsinghua University. His current research interests include analog circuit design for UHF passive low-voltage/low-power radio frequency identification (RFID) tags. 李永明 (1945- ), 男，四川人，清华大学微电子学研究所教授，长期从事模拟及数模混合集成 电路的研究与设计。 Li Yongming (1945- ), Male, was born in Sichuan province, is a professor of the Institute of Microelectronics, Tsinghua University, where he has been engaged in the research and development of analog and mixed signal integrated circuits for a long time.
