An Approach to Determine Small-Signal Model Parameters for InP ...

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Cascade Microtech's Air-Coplanar Probes ACP50-GSG-100, with all instruments under IC CAP software control. Fig. 5 shows the S-parameter measurement ...
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IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 19, NO. 1, FEBRUARY 2006

An Approach to Determine Small-Signal Model Parameters for InP-Based Heterojunction Bipolar Transistors Jianjun Gao, Member, IEEE, Xiuping Li, Member, IEEE, Hong Wang, Member, IEEE, and Georg Boeck, Senior Member, IEEE

Abstract—A new method for the extraction of the small-signal model parameters of InP-based heterojunction bipolar transistors (HBT) is proposed. The approach is based on the combination of the analytical and optimization technology. The initial values of the parasitic pad capacitances are extracted by using a set of closed-form expressions derived from cutoff mode S-parameters without any test structure, and the intrinsic elements determined by using the analytical method are described as functions of the parasitic elements. An advanced design system is then used to optimize only the parasitic parameters with very small dispersion of initial values. Good agreement is obtained between simulated 5 m2 emitter and measured results for an InP HBT with 5 area over a wide range of bias points up to 40 GHz. Index Terms—Heterojunction bipolar transistor (HBT), modeling, parameter extraction.

I. INTRODUCTION

A

N ACCURATE procedure for extraction of the parasitic parameters is extremely important for optimizing device performance of heterojunction bipolar transistor (HBTs) based on a III-V material system [1], [2]. Optimization methods have been usually used for the determination of these parameters. However, the accuracy of the numerical optimization methods that minimizes the difference between measured and modeled S parameters versus frequency can vary, depending upon the optimization method and the starting values, and may result in nonphysical and nonunique results for the extracted elements. An analytical approach in an HBT equivalent circuit parameter extraction was addressed in [3]–[14]. The parasitic capacitances can be extracted by using open or through test structures [3], [13]. However, these methods require special test structures for each device size on the wafer, and the nonuniformity across the wafer has to be ignored. Alternatively, the cutoff cold-HBT method (both junctions are zero or reverse biased) has been extensively used for the extraction of the parasitic capacitances

Manuscript received August 2, 2004; revised August 25, 2005. J. Gao is with the Institute of RF- and OE-IC’s, Radio Engineering Department, Southeast University, Nanjing 210096, China (e-mail: gaojianjun@ seu.edu.cn). X. Li is with the Department of Telecommunication Engineering, Beijing University of Posts and Telecommunications, Beijing 100876, China. H. Wang is with the Department of Electrical and Electronics Engineering, Nanyang Technological University, 639798 Singapore. G. Boeck is with the Microwave Engineering Department, Technische Universität Berlin, Berlin 10587, Germany. Digital Object Identifier 10.1109/TSM.2005.863222

[9]–[13]. Unfortunately, the accuracy of this method has been found to be not satisfactory. As a consequence of these difficulties, the values of the pad capacitances are often guessed or set to zero because it is difficult to distinguish between base pad capacitance and the corresponding base-emitter junction capacitance [11]–[13]. In order to overcome these difficulties, an improved method is proposed in this paper. This method is combination of numerical optimization and direct extraction methods. There are two aspects which are new here. 1) The PAD capacitances are determined by using a new cutoff cold-HBT method, so the PAD capacitances can be separated from other parasitic elements. This method is based on two-port analysis of the equivalent circuit model of the cutoff HBT. The series inductances and resistances are determined by using an open-collector method. 2) The above model parameters are regarded as the initial value for optimization by using advanced design system (ADS) software without programming. The intrinsic elements are described as functions of the parasitic elements. So, the method combines the advantages of the analytical and optimization extraction methods; thus, more accurate extracted results can be obtained. This paper is organized as follows. Section II describes the basic formalism of the new method used in the extraction procedure. In Section III, extraction results are given and discussed. The conclusions are discussed in Section IV. II. THEORETICAL ANALYSIS A. Device Structure The InP HBTs used in this paper were grown by gas-source molecular beam epitaxy (GSMBE) on semi-insulating (100) InP substrates supplied by a commercial vendor. Be and Si are used for p- and n-type dopants, respectively. The detailed layer structure of the InP/InGaAsInP DHBT is shown in Table I. An InGaAs/InP composite collector structure with a dipole doping at the InGaAs/InP interface is employed to avoid a current blocking effect.The devices were fabricated with a triple mesa process with different emitter sizes. Nonalloyed TiPtAu were used for emitter, base, and collector ohmic contacts. Gold-electroplated air bridges were then used to connect the emitter, base, and collector contacts to the external wire-bonding pads. and for the HBTs with 5 5 m are 75 The peak and 50 GHz, respectively. In order to alleviate the influence of surface effect which may be process dependent, devices with

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GAO et al.: APPROACH TO DETERMINE SMALL-SIGNAL MODEL PARAMETERS FOR INP-BASED HBT

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represents PAD capacitance part

TABLE I EPITAXIAL STRUCTURE OF InP/InGaAs/InP DHBT

(2) parameters of the small-signal The open circuit equivalent circuit can be expressed as [2]

(3) (4) (5) (6) with

Fig. 1. Small-signal equivalent circuit for InP HBT.

larger emitter area 40 40 m were chosen for low-temperature testing. To minimize series resistance, diced devices were assembled in the standard TO package bonded using golden wires.

where , , and represent the inductances of the base, and collector, and emitter device connection, respectively, represent the base and collector pad capacitances, and are the extrinsic and intrinsic base resistances, and are the collector and emitter resistances, and and are the extrinsic and intrinsic base-collector capacitances, respectively. is base-to-emitter capacitance. Assuming a single-pole approximation, the transport factor can be written

B. Small-Signal Model The conventional hybrid- -type small-signal equivalent circuit model is shown in Fig. 1. Since the T-shaped equivalent circuit is more closely related to the original derivation of the common base parameters of bipolar transistors, and involves less simplifying assumptions than the equivalent circuit, it is usually employed in the literature for the purpose of smallsignal parameters extraction of HBTs. The circuit is divided into two parts, i.e., the outer part contains the extrinsic elements, considered bias independent, and the inner part contains the intrinsic elements, consideded bias dependent. The matrix of a complete device model of the small-signal equivalent circuit can be written as

(1)

(7) where denotes the intrinsic current gain at low frequency, is the 3-dB rolloff frequency, and is the transit time delay. and It is noted that the extrinsic base-collector resistance are neglected in this the intrinsic base-collector resistance model, due to the fact that values of and are very large and do not affect the frequency response much, as long as we are only concerned with forward operation. The HBT small-signal equivalent circuit model under cutoff condition is shown in Fig. 2. Cutoff bias condition for HBTs is defined as the condition when both junctions are zero or reverse biased. Under such conditions, dc current is zero, hence would be extremely small and the device behaves like a passive component .

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IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 19, NO. 1, FEBRUARY 2006

the intrinsic part extended by expressed as follows:

,

,

,

, and

can be

(11) (12) (13) Fig. 2. Small-signal equivalent circuit for InP HBT under cutoff condition.

where

(14)

(15) Fig. 3. HBT cutoff model at low frequency.

(16) At low frequency, the HBT equivalent circuit of Fig. 2 exhibits a pure capacitive behavior and is simplified as shown in Fig. 3.

(17) and can be obtained from Because the parameters at low frequency, only three unknown parameters are left to be determined. The following equations are obtained after simple calculation and neglect of second-order terms

C. Determination of PAD Capacitances The capacitances , determined by linear regression of under cutoff condition [2]

, and

can be at low frequency

(18)

(8)

(19)

(9) (10) Because the range of the applicable reverse base-emitter voltage is limited, a separation of from its corresponding internal p–n junction capacitance by using fitting techniques is difficult. In this paper, a new method is employed to determine based on a complete cutoff the parasitic base capacitance equivalent circuit (Fig. 2). First, the series inductances and , , and are determined resistances, i.e., , , , by using an open-collector method. After de-embedding the , , and , the open circuit parameters of effects of

(20) Substituting (18) and (19) into (20), a polynomial equation for can be obtained

(21)

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with

In general, there will be three solutions for , two are non). The physical solution is physical (complex or large than the smaller one of the real solutions. With a sequence, substiinto (10), (18), and (19), all unknown tuting the value of parameters are obtained. D. Determination of Intrinsic Elements Once the extrinsic elements are obtained, the intrinsic elements are determined as follows after de-embedding the effects of the parasitic elements:

Fig. 4. Algorithm.

E. Optimization Procedure (22)

(23)

Also, the extracted parasitic elements can be considered as an initial guess of an optimization procedure, and the intrinsic elements determined by using the analytical method are described as functions of the parasitic elements. A flowchart of the iterative process is shown in Fig. 4. III. RESULTS AND DISCUSSION

(24)

(25) (26)

(27) (28)

(29)

To illustrate the above method, we present the extracted model parameters for several 5 5 m InP HBTs [15]. The S-parameter measurements for model extraction and verification were made up to 40 GHz for InP HBT using an Agilent 8510C network analyzer with dc bias supplied by Agilent 4156A. All measurements were carried out on a wafer using Cascade Microtech’s Air-Coplanar Probes ACP50-GSG-100, with all instruments under IC CAP software control. Fig. 5 shows the S-parameter measurement system. , , and The extracted capacitances at low frequency are shown in Fig. 6 for InP HBT. Fig. 7 shows , , and the plots of versus frequency for InP HBT. Rather constant values can be ob, served. In order to eliminate the second-order effects, , and should be extracted at the middle frequency range. Therefore, all the factors of the in (21) can be obtained, and polynomial equation of will be extracted from (10) directly. The series inductances and resistances, i.e., , , , , , and are determined by

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Fig. 5. S-parameter measurement system.

TABLE II EXTRACTED EXTRINSIC ELEMENTS

Fig. 6. Extracted capacitances for 5

2 5 m

InP HBT under cutoff condition.

Fig. 8. Extracted

0

Fig. 7. Plots of Re(Z ), Re(Z Z ), and Im(Z frequency for InP HBT under cutoff condition.

=(Z

0Z

j (!)j versus frequency at V

= 2 V.

)) versus

using an open-collector method. The above model parameters are regarded as the initial values for optimization by using ADS software without programming. The intrinsic elements are described as functions of the parasitic elements. All the extrinsic elements are summarized in Table II. On the basis of the equivalent circuit method developed, we investigate the intrinsic element characteristics of the smallsignal equivalent circuit model for the metamorphic InP HBT operating at different active biases. versus Fig. 8 shows the magnitude of the current gain increases with injection level and defrequency, and

Fig. 9. Extracted f versus frequency at V

= 2 V.

creases with frequency. can be obtained by taking the value at low frequency. of Fig. 9 shows the extracted 3-dB rolloff frequency versus freincreases. quency. It can be observed that increases when

GAO et al.: APPROACH TO DETERMINE SMALL-SIGNAL MODEL PARAMETERS FOR INP-BASED HBT

Fig. 10. Extracted  versus frequency at V

Fig. 11. Extracted  versus I

Fig. 12. Extracted C

and V

= 2 V.

.

versus frequency at V

= 2 V.

143

Fig. 13. Extracted C

versus frequency at V

= 2 V.

Fig. 14. Extracted R

versus frequency at V

= 2 V.

Fig. 15. Extracted R

versus frequency at V

= 2 V.

Fig. 16. Extracted C

versus frequency at V

= 2V.

The reason is decreases quickly while increases; meanis smaller with a increase ( can while, the variation of be expressed by ). As is known, an intrinsic time delay can be expressed by

(30) and are base transit time and collector transit time, where respectively, is the base-collector junction depletion region is the high field carrier saturation velocity. thickness, and is the empirical factor that fits the single-pole expression of base transport factor to its more accurate secant hyperbolic representation. The collector transit time increases with increased reversed bias on the base-collector junction, and as expected at that depletion region thickness swells while the intrinsic transit time decreases with a increase as increases. The extracted

versus frequency at V with different is shown in and , as shown in Fig. 11. Fig. 10, and as a function of versus The extracted extrinsic base-collector capacitance V with different is shown in Fig. 12. frequency at It is also found that can be considered to be independent.

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frequency response can be observed. This is due to the accurate extraction of all extrinsic elements and reflects the physical situation. Fig. 17(a)–(c) compares the measured and modeled S parameters for the InP HBT in the frequency range of 50 MHz to 40 and GHz under three different bias conditions ( uA, V). The modeled S parameters agree very well with the measured ones. IV. CONCLUSION In this paper, an improved extraction technique for HBT small-signal model parameters is developed and applied to extract the parameters of an InP DHBT. The approach is based on the combination of the analytical and optimization technology. ADS is then used to optimize only the parasitic parameters with very small dispersion of initial values. Good agreement is obtained between simulated and measured results for an InP HBT with 5 5 m emitter area over a wide range of bias points up to 40 GHz. REFERENCES

Fig. 17. Comparison of modeled and measured S parameters for InP HBT. Bias: (a) I = 20 uA, V = 2 V (b) I = 100 uA, V = 2 V, and (c) I = 200 uA, V = 2 V.

The base-collector capacitance characteristics are shown reduces with increasing in Fig. 13. It can be observed that under constant . The reduction of with current is attributed to current-induced broadening of the base-collector junction depletion layer. . Fig. 14 shows the extracted results for intrinsic resistance looks bias independent in the linear It can be found that region. The reason is that the variation of is very small . (0.65 0.75 V) in the linear region and independent with Figs. 15 and 16 show the extracted results of base-emitter junction resistance and capacitance . A remarkable flat

[1] M. Linder, F. Ingvarson, K. Jeppson, J. Grahn, S.-L. Zhang, and M. Östling, “Extraction of emitter and base series resistances of bipolar transistors from a singel dc measurement,” IEEE Trans. Semiconduct. Manufact., vol. 13, no. 2, pp. 119–126, May 2000. [2] F. Ingvarson, M. Linder, and K. O. Jeppson, “Extraction of the base and emitter resistances in bipolar transistors using an accurate base resistance model,” IEEE Trans. Semiconduct. Manufact., vol. 16, no. 2, pp. 228–232, May 2003. [3] D. Costa, W. U. Liu, and J. S. Harris, Jr., “Direct extraction of the AlGaAs/GaAs heterojunction bipolar transistors smallsignal equivalent circuit,” IEEE Trans. Electron. Devices, vol. 38, no. 9, pp. 2018–2024, Sep. 1991. [4] C.-J. Wei and C. M. Huang, “Direct extraction of equivalent circuit parameters for heterojunction bipolar transistor,” IEEE Trans. Microwave Theory Tech., vol. 43, no. 9, pp. 2035–2040, Sep. 1995. [5] S. J. Spiegel, D. Ritter, R. A. Hamm, A. Feygenson, and P. R. Smith, “Extraction of the InP/GaInAs heterojunction bipolar transistors small signal equivalent circuit,” IEEE Trans. Electron. Devices, vol. 42, no. 6, pp. 1059–1064, Jun. 1995. [6] S. Lee, B. R. Ryum, and S. W. Kang, “A new parameter extraction technique for small-signal equivalent circuit of polysilicon emitter bipolar transistors,” IEEE Trans. Electron. Devices, vol. 41, no. 2, pp. 233–238, Feb. 1994. [7] B. Li, S. Prasad, L. W. Yang, and S. C. Wang, “A semianalytical parameter- extraction procedure for HBT equivalent circuit,” IEEE Trans. Microwave Theory Tech., vol. 46, no. 10, pp. 1427–1435, Oct. 1998. [8] J. M. M. Rios, L. M. Lunardi, S. Chandrasekhar, and Y. Miyamoto, “A selfconsistent method for complete small signal parameter extraction of InP-based heterojunction bipolar transistors (HBT’s),” IEEE Trans. Microwave Theory Tech., vol. 45, no. 1, pp. 39–44, Jan. 1997. [9] A. Ouslimani, J. Gaubert, and H. Hafdallah et al., “Direct extraction of linear HBT-model parameters using nine analytical expression blocks,” IEEE Trans. Microwave Theory Tech., vol. 50, no. 1, pp. 218–221, Jan. 2002. [10] A. Samelis and D. Pavlidis, “DC to high-frequency HBT-model parameter evaluation using impedance block conditioned optimization,” IEEE Trans. Microwave Theory Tech., vol. 45, no. 7, pp. 886–897, Jul. 1997. [11] M. Sotoodeh, L. Sozzi, and Vinay et al., “Stepping toward standard methods of small signal parameters extraction for HBT’s,” IEEE Trans. Electron. Devices, vol. 47, no. 6, pp. 1139–1151, Jun. 2000. [12] S. Bousnina, P. Mandeville, A. B. Kouki, R. Surridge, and F. M. Ghannouchi, “Direct parameterextraction method for HBT smallsignal model,” IEEE Trans. Microwave Theory Tech., vol. 50, no. 2, pp. 529–536, Feb. 2002. [13] B. Sheinman, E. Wasige, and M. Rudolph et al., “A peeling algorithm for extraction of the HBT small-signal equivalent circuit,” IEEE Trans. Microwave Theory Tech., vol. 50, no. 12, pp. 2804–2810, Dec. 2002.

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[14] J. Gao, X. Li, H. Yang, H. Wang, and G. Boeck, “An approach to determine R and R for InP HBT using cutoff mode measurement,” in Proc. Eur. Microwave Week, GAAS Conf. 2003, pp. 145–147. [15] H. Wang, G. I. Ng, H. Zheng, Y. Z. Xiong, L. H. C. Yuan, K. Radhakrishnan, and S. F. Yoon, “Demonstration of aluminum free metamorphic InP/In0.53Ga0.47As/InP double heterojunction bipolar transistors on GaAs substrates,” IEEE Electron. Device Lett., vol. 21, no. 9, pp. 379–381, Sep. 2000.

included micromachined filter design, fabrication, and coaxial and on-wafer measurement. In 2003, she was a Research Professor at Yonsei University, Seoul, Korea. Since 2004, she has been an Associate Professor at the Telecommunication Engineering School, Beijing University of Posts and Telecommunications, China. Her current research interests include RF and microwave devices for communications, microwave filters and antennas, and coaxial and on-wafer measurement.

Jianjun Gao (M’05) was born in Hebei, China, in 1968. He received the B.Eng. and Ph.D. degrees from Tsinghua University, China, in 1991 and 1999, respectively, and the M.Eng. degree from the Hebei Semiconductor Research Institute, in 1994. From 1999 to 2001, he was a Postdoctoral Research Fellow at the Microelectronics R&D Center, Chinese Academy of Sciences, developing PHEMT optical modulator drivers. In 2001, he joined the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, as a Research Fellow in semiconductor device modeling and on-wafer measurement. In 2003, he joined the Institute for High-Frequency and Semiconductor System Technologies, Berlin University of Technology, Berlin, Germany, as a Research Associate working on InP heterojunction bipolar transistor modeling and circuit design for high-speed optical communication. Since 2004, he has been a Full Professor of the Institute of RF- and OE-ICs at Southeast University, Nanjing, China. His research interests include characterization, modeling, and on-wafer measurement of microwave semiconductor devices, optoelectronics devices, and high-speed integrated circuits for optical communication.

Hong Wang (S’98–M’01) received the B.Eng. degree from Zhejiang University, China, in 1988, and the M.Eng. and Ph.D. degrees from the Nanyang Technological University (NTU), Singapore, in 1998 and 2001, respectively. From 1988 to 1994, he was with the Institute of Semiconductors, Chinese Academy of Sciences, developing InP-based OEICs. From 1994 to 1995, he was a Royal Research Fellow at British Telecommunications Laboratories, Ipswich, U.K., working on the development of InP-based HFETs. Since 1996, he has been with the Microelectronics Centre, Nanyang Technological University, where he is currently an Assistant Professor. His current research interests include InP- and GaAs-based compound semiconductor device physics, fabrication technology, and characterization. He has published over 70 technical papers related to his research.

Xiuping Li (M’05) received the B.S. degree from Shandong University, Shandong, China, in 1996, and the Ph.D. degree from the Beijing Institute of Technology, Beijing, China, in 2001. From 1996 to 2001, she worked on multilayer microstrip antenna design and analysis. From 2001 to 2003, she joined the Positioning and Wireless Technology Center, Nanyang Technological University, Singapore, where she was a Research Fellow and was involved in the research and development of RFID systems. In the MEMS group, her work

Georg Boeck (M’93–SM’00) was born in Wertingen, Germany, in 1951. He received the Dipl.-Ing. degree in electrical engineering and the Ph.D. degree from Technische Universität Berlin, Berlin, Germany, in 1977 and 1984, respectively. In 1984, he joined the Siemens Research Laboratories, Munich, Germany, where his research areas included fiber optics and GaAs electronics. From 1988 to 1991, he was a Full Professor of electronic devices and circuits at the Fachhochschule Regensburg, Germany. Since 1991, he has been a Full Professor of microwave engineering at the Technische Universität Berlin. His research interests include characterization, modeling, and design of microwave semiconductor devices, monolithic integrated circuits, and MMICs up to the millimeter-wave range.

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