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Aug 18, 2018 - for generating high-frequency magnetic field, namely, AC to DC and then ... embarks upon a direct conversion of utility AC to high frequency AC.
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An Effective Switching Algorithm for Single Phase Matrix Converter in Induction Heating Applications Anand Kumar 1, * ID , Pradip Kumar Sadhu 1 , Dusmanta Kumar Mohanta 2 and Maddikara Jaya Bharata Reddy 3 1 2 3

*

Department of Electrical Engineering, Indian Institute of Technology, Indian School of Mines, Dhanbad 826004, India; [email protected] Department of Electrical and Electronics Engineering, Birla Institute of Technology, Mesra, Ranchi 835215, India; [email protected] Department of Electrical and Electronics Engineering, National Institute of Technology, Trichy 620015, India; [email protected] Correspondence: [email protected]; Tel.: +91-977-193-0334

Received: 26 June 2018; Accepted: 16 August 2018; Published: 18 August 2018

 

Abstract: Prevalent converters for induction heating (IH) applications employ two-stage conversion for generating high-frequency magnetic field, namely, AC to DC and then DC to high-frequency AC (HFAC). This research embarks upon a direct conversion of utility AC to high frequency AC with the design of a single-phase matrix converter (SPMC) as a resonant converter using a modified switching technique for IH application. The efficacy of the proposed approach is validated through different attributes such as unity power factor, sinusoidal input current and low total harmonic distortion (THD). The developed prototype-embedded system has high pragmatic deployment potential owing to its cost effectiveness using Arduino mega 2560 and high voltage/current as well as low switching time IXRH40N120 insulated-gate bipolar transistor (IGBT). Different results of the prototype-embedded system for IH application have been verified using Matlab Simulink environment to corroborate its efficacy. Keywords: Arduino 2560; bi-directional switches; induction heating; resonant converter; resonant frequency and single-phase matrix converter

1. Introduction The recent trend shows that the industrial as well as domestic induction heating (IH) has become extremely popular because of its unique advantages such as higher efficiency, reduced heating time and environmental friendliness. To implement the IH for different appliances, a high-frequency (HF) alternating electromotive force (e.m.f.) is required that typically lies between 20 KHz to 100 KHz depending on the type of applications such as brazing, melting processes and for domestic cooking [1–4]. In the last few decades, various new topologies of HF resonant inverter have been proposed to generate H.F alternating e.m.f. [5]. However, ongoing research and development are entering into a new phase ensuring cost-effectiveness [6,7], increased cooling capabilities [8] and high efficiency [9,10] within the field of electrical power conversion and process. The conventional IH system follows two stages: (a) rectification [11,12] and (b) HF resonant inverter operation [13–15]. In the first stage, DC power is obtained using a full bridge diode rectifier. After rectification, a small value of inductor and capacitor is connected to obtain DC with ripple content ensuring unity input power factor [12]. This high ripple DC link voltage acts as a power supply for the HF resonant inverter (Figure 1a). This is also an indirect method for the conversion of supply/grid frequency to HFAC. Electronics 2018, 7, 149; doi:10.3390/electronics7080149

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Various topologies ofof HF resonant inverters have been developed such asas the half-bridge series Various topologies HF resonant inverters have been developed such the half-bridge series resonant inverter (HB-SRI) [16], full bridge series resonant inverter (FB-SRI) [17], single switch resonant inverter (HB-SRI) [16], full bridge series resonant inverter (FB-SRI) [17], single switch topology topology[18] [18]etc. etc.Although, Although,these theseconverters convertershave havebeen beendesigned designedusing usinginsulated-gate insulated-gatebipolar bipolar transistor (IGBT) because of its higher current/voltage handling capability, reduced control complexity transistor (IGBT) because of its higher current/voltage handling capability, reduced control and less cost. In addition, IGBTs have low reverse time and high switching complexity and less cost. In should addition, IGBTs shouldrecovery have low reverse recovery timefrequency. and high It switching can be seenfrequency. that owingIttocan different stages the conventional IH system, itsconventional efficiency is automatically be seen that in owing to different stages in the IH system, its reduced. indirectreduced. method Moreover, of conversion uses method reactiveofenergy storage elements. efficiencyMoreover, is automatically indirect conversion uses reactive Thus, energy this method makes the converter bulkymakes and unnecessary losses occur the diode. Additionally, storage elements. Thus, this method the converter bulky and across unnecessary losses occur across two-stage conversion of ACtwo-stage to HFAC conversion number of components used withof the diode. Additionally, conversionincreases of AC tothe HFAC conversion increases thealong number complex control algorithms (such as Phase Locked Loop (PLL), Proportional Integral Derivative (PID) components used along with complex control algorithms (such as Phase Locked Loop (PLL), and Fuzzy logicIntegral controller) for obtaining low total harmonic distortion the Proportional Derivative (PID)high and power Fuzzy factor, logic controller) for obtaining high(THD) poweratfactor, input side and good power quality [19,20]. Overall, these existing topologies increase the cost as well low total harmonic distortion (THD) at the input side and good power quality [19,20]. Overall, these asexisting complexity of the controller. topologies increase the cost as well as complexity of the controller.

POT IH coil Iac

Idc

Idc

Iac R0,L0

1 − φ AC

Cr

50HZ

V0 Vdc

Vm t

t

t

(a) Iac

Iac

Cr 230Vr.m.s 50Hz

L0 R0

BIDIRECTIONAL SWITCH (S1,S2,S3,S4)

(b) Figure1.1.(a)(a)Conventional ConventionalIHIHTopology Topology and Block diagram proposed topology. Figure and (b)(b) Block diagram ofof proposed topology. I0 an indirect method started decreasing Because of some preceding demerits, the popularity of and therefore, researchers started focussing on a direct methodR0of AC conversion [21]. However, L0 Power Circuit of 230V a lot of work50Hz has been done in this fieldSPMC and has been widely used in several applications [22,23]. Cr By employing direct AC–AC converters, reductions in both component count, as well as intermediate DC link reactive element, have been accomplished [24,25]. Matrix converters, Cycloconverter and AC voltage controllers are examples of direct AC–AC conversion. Recent research shows that with 230V the evolution of these direct AC–AC converters and their various advanced control techniques, it is Proposed Controller possible to avail it in many applications such as traction system, industrial as well as domestic IH. Vg1 12V S1a,S4a,S3a,S2a The matrix converters are newly advanced converters (AC–AC) that enables high power density and uC Isolation ZCD INT0 Circuit Vg eliminates DC link components with improved operational life [26]. Vg2 INT1 TLP250 S2b,S3b,S4b,S1b Currently, direct AC–AC conversion is being applied for IH applications [27–29]. All these converters use HB–SRI, which relies on four-quadrant equivalent switching devices that are combination of two anti-series IGBTs. Diode In [30], a SiC based AC to AC converter for domestic IH Rectifier

12Vdc

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has been proposed, which uses solely four switches and only single stage energy conversion has been achieved. Moreover, single-phase matrix converter (SPMC) (which is the part of Matrix Converter) may also be used for IH applications [31]. Numerous studies have been done related to SPMC and its switching algorithm but because of its complicacy, less use of SPMC has been seen for IH application till date [21,32]. However, some authors have proposed a suitable switching algorithm ensuring unity power factor, commutation strategy and low THD for SPMC in IH applications [33,34]. But these switching algorithms seem too complicated. Therefore, in this article, to enhance potency and eliminate DC link components, a SPMC (direct AC–AC converter) is proposed using modified technique to make it appropriate for IH applications (Figure 1b). This modified switching algorithm/technique requires only two pulse width modulation (PWM) signal to operate SPMC as a frequency changer or as resonant converter for IH applications and these pulses has been generated through embedded system. Due to requirement of less number of PWM signals, the overall cost and complexity of the controller reduces. The major contribution of this research is to develop an effective switching pattern such that SPMC works as a resonant converter and hence, can be applied for IH applications. In pursuance of this goal, switching frequency is kept higher than the resonant frequency so as to ensure zero voltage switching (ZVS). The high power factor, sinusoidal input current and low THD have been major achievements for improving its efficacy considerably. The proposed prototype system is in full agreement with recent developments in embedded technology Arduino mega 2560 and high voltage/current as well as low switching time IXRH40N120 IGBT (Appendix A, IXYS Corporation, Santa Clara, CA, USA). Another unique feature of the proposed technique based on embedded system is that it utilizes a single stage conversion of 50–60 Hz AC power to HFAC directly (i.e., as a frequency changer) without any intermediate DC link element using proposed switching algorithm and it has been congruous with simulated results. Using this technique, a higher frequency can be generated to meet the criteria of IH system. The rest of the article is divided into five sections. In Section 2, the modified switching algorithm for SPMC as a resonant converter for IH application is extensively explained. Simulation results using modified switching algorithm for SPMC as a resonant converter for IH application has been done in MATLAB Simulink environment and is presented in Section 3 for validation. Finally, the hardware/experimental results have been shown in Section 4 which validates the simulation results and the main conclusion of the proposed article is given in Section 5. 2. Single-Phase Matrix Converter and Its Modified Switching Technique for Induction Heating (IH) Applications 2.1. Single-Phase Matrix Converter (SPMC) In this presented work, modified switching technique has been developed for SPMC topology to generate high frequency directly from grid/supply frequency. SPMC topology was first invented by Zuckerberger in 1997. It consists of a matrix of input and output lines with four bidirectional switches which connect the 1-ø input to 1-ø output (Figure 2a,b). Each bidirectional switch has the capability of conducting current as well as blocking voltage of both polarities simultaneously depending on the control signal. Generally, common emitter configuration is used for making bi-directional switches for SPMC. It is also referred to as 2 × 2 order matrix converter. Actually, SPMC can be operated in many types of converters such as controlled rectifier (AC–DC), inverter (DC–AC), a boost converter (DC–DC) and as a cycloconverter (AC–AC) [35]. However, in this article, only SPMC as a frequency changer or as resonant converter is discussed, which is appropriate for the IH applications. This section discusses how input frequency can be synthesized with the help of this SPMC configuration using modified switching technique and makes it essential for IH applications.

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Load(R,RL,RLC)

1-ø AC Supply,50Hz

Various topologies of HF resonant inverters have been developed such as the half-bridge series resonant inverter (HB-SRI) [16], full bridge series resonant inverter (FB-SRI) [17], single switch topology [18]7,etc. Electronics 2018, 149 Although, these converters have been designed using insulated-gate bipolar 4 of 17 Electronics(IGBT) 2018, 7, x because FOR PEER REVIEW 4 of 19 transistor of its higher current/voltage handling capability, reduced control complexity and less cost. In addition, IGBTs should have low reverse recovery time and high switching frequency. It can be seen that owing to different stages IH system, its Siain the conventional Sib efficiency is automatically reduced. Moreover, indirect method of conversion uses reactive energy 2 storage elements. Thus, thisS1method Smakes the converter bulkyIGBT and unnecessary losses occur across Diode the diode. Additionally, two-stage conversion of AC to HFAC conversion increases the number of components used along with complex control algorithms (such as Phase Locked Loop (PLL), S3 IGBT S4 and Fuzzy logic controller) Proportional Integral Derivative (PID) high power factor, Diode for obtaining low total harmonic distortion (THD) at the input side and good power quality [19,20]. Overall, these i=1,2,3,4 existing topologies increase the cost as well as complexity of the controller. (a)

(b)

POT Figure (a)1-ø 1-ømatrix matrixconverter convertertopology topologyand and(b)(b)bi-directional bi-directionalswitch switch(common (commonemitter emitter Figure 2. 2. (a) configuration mode). IH coil configuration mode). Iac

Idc

Idc

Proposed Switching Technique SPMC in IH Applications R0,L0 2.2.2.2. Proposed Switching Technique for for SPMC in IH Applications 1 − φ AC Cr In the50HZ proposed switching technique, only two PWM signal (i.e., Vg1 and Vg2) is required to In the proposed switching technique, only two PWM signal (i.e., Vg1 and Vg2 ) is required to operate SPMC as a resonant converter for IH applications. Regarding the generation of these pulses, operate SPMC as a resonant converter for IH applications. Regarding the generation of these pulses, V0 a controller has been designed which is based on embedded system. The IH system based on SPMC Vdc which is based on embedded system. The IH system based on SPMC a controller has been designed Vm topology using proposed controller which generates pulses Vg1 and Vg2 is shown in Figure 3. In this topology using proposed generates pulses Vg1 and Vg2 is shown int Figure 3. In this t controller which t figure, the proposed controller comprises of zero crossing detector (ZCD), microcontroller unit and figure, the proposed controller comprises of zero crossing detector (ZCD), microcontroller unit and isolation circuit. For generation of pulses, the AC voltage (230 Vr.m.s) is stepped down to 12 Vr.m.s. isolation circuit. For generation of pulses, the AC (a) voltage (230 Vr.m.s ) is stepped down to 12 Vr.m.s . Subsequently, this stepped down AC is given to ZCD block that is used to synchronize the pulses Subsequently, this stepped down AC is given to ZCD block that is used to synchronize the pulses (Vg1 (Vg1 and Vg2) with the input AC supply. Now this output ofacZCD is fed to the microcontroller Atmega ac and Vg2 ) with the input AC supply. INow this output of ZCD Iis fed to the microcontroller Atmega 2560, 2560, which detects the rising and falling edge of the pulse, i.e., Vg (generated from the ZCD). which detects the rising and falling edge of the pulse, i.e., Vg (generated from the ZCD). According to L0 Cr According to the program fed to the microcontroller, when it detects the rising edge of the pulse (Vg), the program fed to the 230V microcontroller, when it detects the rising edge of the pulse (Vg ), it generates r.m.s R0 it generates the pulse (V g1) of 10 ms (if the 100 Hz output of the converter is required). When it detects 50Hz the pulse (Vg1 ) of 10 ms (if the 100 Hz output of the converter is required). When it detects the falling the falling edge, again it generates a pulse (Vg2) of 10 ms, but this pulse is in complete phase opposition edge, again it generates a pulse (Vg2 ) of 10BIDIRECTIONAL ms, but this pulse is in complete phase opposition from from previous pulses, shown in Figure 4b. For generating a higher frequency of the pulse, the time SWITCH previous pulses, shown in Figure 4b. For generating a higher frequency of the pulse, the time period (S1,S 2,S3,S4) period of the pulses should be considered less during programming. The detailed explanation of of the pulses should be considered less during programming. The detailed explanation of prototype prototype implementation and the experimental results of this proposed controller regarding (b)proposed implementation and the experimental results of this controller regarding generation of pulses generation of pulses (Vg1 and Vg2) have been well explained in section 4. (Vg1 and Vg2 ) have been well explained in Section 4. Figure 1. (a) Conventional IH Topology and (b) Block diagram of proposed topology. Iac

I0 I0

Power Circuit of Power Circuit SPMCof SPMC

230V 230V 50Hz 50Hz

230V 230V

L0

Cr Cr

Proposed Controller Proposed Controller Vg1

12V 12V

L0

R0 R0

ZCD ZCD

Vg

uC Vg uC INT0 INT0INT1 INT1

Diode Diode Rectifier Rectifier

Isolation Vg1 Isolation Circuit Circuit TLP250 Vg2 TLP250

Vg2

S1a,S4a,S3a,S2a S1a,S4a,S3a,S2a S2b,S3b,S4b,S1b S2b,S3b,S4b,S1b

12Vdc 12Vdc

Figure 3. Proposed IH system using SPMC topology incorporated with proposed controller. Figure 3. Proposed IH system using SPMC topology incorporated with proposed controller.

Now, with the help of these two pulses (Vg1 and Vg2), frequency synthesization has been well presented. The proposed configuration (power circuit of SPMC as in Figure 3) of SPMC as a frequency changer/resonant converter for IH applications is shown in Figure 4a–c which shows the waveform

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Now, with the help of these two pulses (Vg1 and Vg2 ), frequency synthesization has been well presented. The proposed configuration (power circuit of SPMC as in Figure 3) of SPMC as a frequency Electronics 2018, 7, x FOR PEER REVIEW 5 of 19 of changer/resonant converter for IH applications is shown in Figure 4a–c which shows the waveform SPMC as a frequency changer (i.e., at 100 Hz output) and as a resonant converter (i.e., at high frequency of SPMC as a frequency changer (i.e., at 100 Hz output) and as a resonant converter (i.e., at high of output) using proposed control technique. In Figure 4a, Vi is the input supply voltage, Ls and Cf frequency of output) using proposed control technique. In Figure 4a, Vi is the input supply voltage, are the input inductor and filter capacitor respectively, that are used to reduce the electromagnetic Ls and Cf are the input inductor and filter capacitor respectively, that are used to reduce the interference (EMI) effect and also prevent the HF component of voltage/current (generated from the electromagnetic interference (EMI) effect and also prevent the HF component of voltage/current load side). Four bidirectional switches are used and each of them is a combination of two IGBTs and (generated from the load side). Four bidirectional switches are used and each of them is a combination two diodes. It is already known that the resonant inverter works at a resonant frequency (Equation (1)). of two IGBTs and two diodes. It is already known that the resonant inverter works at a resonant However, the IH application, the switching of the should be resonant kept higher frequencyfor (Equation (1)). However, for the IHfrequency application, the resonant switchinginverter frequency of the or lower than theberesonant frequency to than ensure voltage switching (ZVS) or zero current switching inverter should kept higher or lower thezero resonant frequency to ensure zero voltage switching (ZCS) conditions for reducing the switching losses across switches [36]. In this work, ZVS condition (ZVS) or zero current switching (ZCS) conditions for reducing the switching losses across switcheshas been by maintaining the has switching frequency than the frequency. analyze [36]. achieved In this work, ZVS condition been achieved by higher maintaining theresonant switching frequencyTohigher the system behaviour, IH coil its load can be behaviour, modelled as R0 and L0 , than the resonant frequency. Toand analyze the system IH the coil series and itsequivalent load can beofmodelled which is already shown in Figure 4a. In addition, the resonating capacitor (C ) is connected in series r as the series equivalent of R0 and L0, which is already shown in Figure 4a. In addition, the resonating with R0 and create theinseries condition. capacitor (CrL) 0istoconnected seriesresonance with R0 and L0 to create the series resonance condition.

S1a

Vi=VmSinωt

Ls

D1

D2

S2b

D4

D3

S1b

Vin t

S2a

Vout IH LOAD

Cf

t R0

S3b

D5

D6

S3a

L0

Cr

Vg1

S4a

(S1a,S4a,S3a,S2a)

D8 S4b

D7

t

Vg2 (S2b,S3b,S4b,S1b) 0

t t1

t2

(a)

t3

t4

(b)

Vin t Vout t Vg1 (S1a,S4a,S3a,S2a)

t

Vg2 (S2b,S3b,S4b,S1b) t

0

(c) Figure 4. Power circuit of SPMC and its output voltage waveform (a) SPMC as a resonant converter Figure 4. Power circuit of SPMC and its output voltage waveform (a) SPMC as a resonant converter for (IH) application; (b) Output voltage waveform of SPMC as frequency changer operation (at 100 for (IH) application; (b) Output voltage waveform of SPMC as frequency changer operation (at 100 Hz Hz output) and (c) Output voltage waveform of SPMC as resonant converter (at HF output) using output) and (c) Output voltage waveform of SPMC as resonant converter (at HF output) using modified modified switching technique. switching technique.

The operation of the SPMC using modified switching technique for IH application can be understood by using 4 modes of operation according to the polarity of the input voltage. Modes 1

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and 2 are explained for the positive half cycle and Modes 3 and 4 are explained for the negative half cycle. Electronics 2018, 7, 149 6 ofS17 Mode 1 (0 < t < t1): In the positive half cycle, switches S1a, S4a, S2b, S3b are forward biased and 3a, S2a, S4b, S1b are reverse biased. Forward biased switches can be turned ON at any time between 0 to t1 by applying the pulses (Vg1 and Vg2). During this time 0 < t < t1, among the forward biased switches The operation of the SPMC using modified switching technique for IH application can be only two switches (i.e., S1a and S4a) are receiving PWM signal (Vg1) shown in Figure 4b. Owing to this, understood by using 4 modes of operation according to the polarity of the input voltage. Modes 1 and only S1a and S4a will be turned ON to create a path for the load current that is, 2 are explained for the positive half cycle and Modes 3 and 4 are explained for the negative half cycle. S1a → D1 → load → S 4a → D7 shown in Figure 5a. Mode 1 (0 < t < t1 ): In the positive half cycle, switches S1a , S4a , S2b , S3b are forward biased and 1 0

Mode Mode 1 Mode 2

Vin < 0

Mode 3 Mode 4

Switches Status (S1a /S4a ) ON (S2b /S3b ) OFF (S1a /S4a ) OFF (S2b /S3b ) ON (S3a /S2a ) ON (S4b /S1b ) OFF (S3a /S2a ) OFF (S4b /S1b ) ON

Time Interval

Output Voltage (Vout )

0 to t1

Vout > 0

t1 to t2

Vout < 0

t2 to t3

Vout > 0

t3 to t4

Vout < 0

There are several merits of the proposed switching strategy over conventional techniques [21]. Some of them are:









Compared to a previous switching strategy, the modified switching strategy has a simple but unique generation capability of resonant frequency or switching frequency which is the basic need of SPMC as a resonant converter for IH application. Using this modified/proposed switching technique, SPMC can achieve a high frequency current very easily but using traditional/conventional switching technique, SPMC can generate only integral multiple of input supply frequency i.e., 50 Hz, 100 Hz, 150 Hz and so on. That is why previous switching topology cannot be applied in the field of IH applications. Also, the design of the controller for the proposed technique is quite simple because it needs to generate only two pulses as compared to previously developed switching techniques in which four pulses are needed for synthesization of frequency. Owing to this, the proposed technique reduces the design complexity of the controller. The proposed switching technique can be applied for both operation of SPMC i.e., as a frequency changer or as resonant converter.

Consequently, the proposed configuration of SPMC for IH applications shown in Figure 4a has been modelled as an RLC circuit, which consists of a resistor (Ro ), an inductor (Lo ) and a capacitor (Cr ) can be used to analyze the system behavior. It should also be noted that, at the resonant frequency, maximum output power is transferred to the load. Owing to this, a practical converter for IH applications always works at equal to or greater than the resonant frequency. For analyzing the circuit of SPMC as a resonant converter for IH applications, the following equations have been applied:

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2.2.1. Resonant Frequency fr =

1 √ 2π L0 Cr

(1)

In terms of angular resonant frequency: 1 L0 Cr

(2)

L0 1 = = 2π f r L0 Cr 2π f r Cr

(3)

ωr = √ 2.2.2. Characteristics Impedances s Zeq = In terms of angular frequency: s Zeq =

L0 1 = = ωr L 0 Cr ωr Cr

(4)

2.2.3. Load Quality Factor Q=

Zeq 2π f r L0 1 = = R0 R0 2π f r R0 Cr

(5)

Zeq ωr L 0 1 = = R0 R0 ωr R0 Cr

(6)

In terms of angular frequency: Q=

2.2.4. Output Impedance of Equivalent Circuit (Figure 4a) 

Zeq

1 = R0 + j 2π f r − 2π f r Cr s





= R0



1 1 + jQ 2π f n − 2π f n

2 1 2π f n n  o 2π f where 2π f n = 2π f r , ϕ = arg{ Z (2π f )} = arctan Q 2π f n − 2π1f n ≥ 0.  1 + Q2 2π f n −

Zeq = R0

 (7)

(8)

2.2.5. Fundamental Output Voltage ( V0 =

Vd , 0 < 2π f s t < π −Vd , π < 2π f s t < 2π Vm =

) (9)

2Vd π

2.2.6. Ieq , That Is, Load Current Flowing Through Tank i Lo = Im sin(ωt − ϕ) where Im =

Vm

| Zeq |

=

2Vd π | Zeq |

=

2Vd cos ϕ πRo

=

r πRo

2Vd  . 2π f n − 2π1f

1+ Q2

n

(10)

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2.2.7. The Output Power 2 Pout = Im

R0 = 2

 πRo

2Vd2  1 + Q2 2π f n −

1 2π f n

(11)

2 

In Equation (11), at ωn = 2π f n = 1, the circuit becomes resonant, therefore, maximum power is transferred to the load. Moreover, output power could be varied with the help of a different value of quality factor (Q). Electronics 2018, 7, x FOR PEER REVIEW

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3. Simulation Results and Its Discussion

Table 2. Parameters used for the simulation.

To validate the modified proposed technique, simulation has been done in MATLAB/SIMULINK Symbol Value given in Table 2. Firstly, Parameters (R2012a, Dhanbad, Jharkhand, India) environment by using parameters in Input Voltage 230 load Vr.m.s to create different output simulation has beenVdone for the general SPMC under R (100 Ω) L s Filter inductance 20 mH frequencies, that is, 100 Hz, 150 Hz and 200 Hz, by using the modified proposed technique with Cf Subsequently, Filtersimulation Capacitance uFSPMC as a resonant converter, experimental validation. has been done for 3the f Fundamental Frequency 50 Hz which works at a switching frequency of 25 kHz (Table 2) in order to validate the modified technique. Cr Resonant Capacitor 0.8 uF Various results and waveforms of voltage and current have been taken along with THD of the input L0 Coil Inductance 52.7 uH current through the simulation. Figure 7a shows the PWM controller that generates pulses (Vg1 R0 Coil Equivalent Resistance 5Ω and Vg2 ) of different frequencies. Figure 7b depicts the simulation results of pulses waveform (Vg1 P0 Output Power for heating 1100 W and Vg2 ), generated by controllerFrequency are given to the switches of SPMC converter to generate fs the PWM Resonance 25 kHzand duty cycle of this pulse output voltage/current of a different step Frequency) up frequency. The frequency (Switching is maintained at 25 kHz the andwaveforms 50% respectively. By changing theVtime period of this PWM controller, Figure 8a,b shows of the input voltage (230 r.m.s) and input current. Figure 8c the desired can be achieved. Basically, in this study, SPMC as a resonant shows the output value offrequency THD in input current which was found to be 2.60%. To achieve this lowconverter THD for IH application is focused upon. This direct AC–AC converter has been designed to operate value, a passive filter has been used which is an essential part of SPMC when it needs to operate as at a resonant resonantconverter frequency of 25 kHz, which greater than theharmonics frequencythat as per for(switching IH system.frequency) The HF switching results in theisgeneration of HF − 6 − 6 calculation from equation withflow the parameters L0 = 52.7 10deteriorate and Cr =the 0.8power × 10 quality, to satisfy has an inherent tendency (1), to back towards the of supply side × and the criteriain ofaZVS. resulting wide variety of problem like distortion in the grid voltage/current. Thus, the low value of THD of 2.60% in input current ensures the attenuation of HF harmonics and makes the power supply 2. Parameters used for the simulation. of IH system practically viable. Table As aforementioned, first simulation has been done for generating 100 Hz output using proposed switching technique which is shown in Figure 9a,b. Figure 10 shows the typical Symbol Parameters Value simulated results of output voltage and load current for SPMC as a resonant converter in IH applications. Input Voltage Vr.m.s The root mean V square (RMS) value of output voltage and load current are 225.2 230 V and 5.162 A, which in Ls FilterRMS inductance 20 mHpower can be have been calculated from the continuous block. Therefore, average output Cf Filter Capacitance 3 uF calculated by using the product of these two RMS values. Here, for the calculation of maximum f Fundamental Frequency 50 Hz output averageCpower, ideally cos φ (power is taken as unity because 0.8 it is Resonantfactor) Capacitor uFknown that at r L0 capacitive reactance and Coil inductive Inductancereactance becomes equal,52.7 resonant frequency, butuH it is not the case R0 Coil Equivalent Resistance 5Ω for practical purposes. P0 fs

Output cos φ ≈ 1 = PPower VI cosfor φ; heating Resonance Frequency (Switching Frequency)

1100 W 25 kHz

= P 225.2× 5.162×=1 1162 W

PWM Generator S1a,S4a,S3a,S2a

NOT Gate S2b,S3b,S4b,S1b

(a)

(b)

Figure 7. (a) PWM Controller; (b) Simulation results of pulses i.e., Vg1 and Vg2 (180° out of phase). Figure 7. (a) PWM Controller; (b) Simulation results of pulses i.e., Vg1 and Vg2 (180◦ out of phase).

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Figure 8a,b shows the waveforms of the input voltage (230 Vr.m.s ) and input current. Figure 8c shows the value of THD in input current which was found to be 2.60%. To achieve this low THD value, a passive filter has been used which is an essential part of SPMC when it needs to operate as resonant converter for IH system. The HF switching results in the generation of HF harmonics that has an inherent tendency to back flow towards the supply side and deteriorate the power quality, resulting in a wide variety of problem like distortion in the grid voltage/current. Thus, the low value of THD of 2.60% in input current ensures the attenuation of HF harmonics and makes the power supply of IH system practically viable. As aforementioned, first simulation has been done for generating 100 Hz output using proposed switching technique which is shown in Figure 9a,b. Figure 10 shows the typical simulated results of output voltage and load current for SPMC as a resonant converter in IH applications. The root mean square (RMS) value of output voltage and load current are 225.2 V and 5.162 A, which have been calculated from the continuous RMS block. Therefore, average output power can be calculated by using the product of these two RMS values. Here, for the calculation of maximum output average power, ideally cos φ (power factor) is taken as unity because it is known that at resonant frequency, capacitive reactance and inductive reactance becomes equal, but it is not the case for practical purposes. P = V I cos φ; cos φ ≈ 1 Electronics 2018, 7, x FOR PEER REVIEW

P = 225.2 × 5.162 × 1 = 1162 W

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(a)

(b)

(c) Figure8.8.Simulated Simulatedwaveforms waveformsofof(a) (a)input inputvoltage voltage(V(V)in)(b) (b)input inputcurrent current(I (I)in)and and(c)(c)THD THDanalysis analysisof Figure in in in). of input current (I input current (Iin ).

(c) (c)

Electronics 2018, 7, 8. 149 Figure Simulated waveforms of (a) input voltage (Vin) (b) input current (Iin) and (c) THD analysis Figure 8. Simulated of input current (Iin). waveforms of (a) input voltage (Vin) (b) input current (Iin) and (c) THD analysis of input current (Iin).

(a) (a)

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(b) (b)

Figure 9. Simulated waveforms of (a) Output voltage (Vout) and (b) Output current (Iout) at 100 Hz.

Figure 9. Simulated waveforms (Voutout ) and Output current ) at 100 Hz. Figure 9. Simulated waveformsofof(a) (a)Output Output voltage voltage (V ) and (b)(b) Output current (Iout) (I atout 100 Hz.

(a) (a)

(b) (b)

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of output voltage (Vout ) and (b) simulated waveform of12output of 19 current (Iout10. ) as(a) a resonant application. Figure Simulatedconverter waveformfor of IH output voltage (Vout) and (b) simulated waveform of output Figure voltage (Vout) and (b) simulated waveform of output ) asSimulated a resonantwaveform converter of foroutput IH application. current10. (Iout(a) current (Iout) as a resonant converter for IH application.

Figure 11 depicts the simulated result of the output average power. In this study, the passive filter 11 depicts the simulated of the output average power. this study, has been Figure designed to protect from the result high-frequency component at theIninput side. the Thepassive equivalent 11 depicts the simulated output averagecomponent power. In this study, theside. passive filterFigure has been designed to protect result from of thethe high-frequency at the input The circuit of the passive filter is shown in Figure 12a. From this figure, it can be observed that Zeq is too filter has been designed to protect the in high-frequency component atitthe side. The equivalent circuit of the passive filter from is shown Figure 12a. From this figure, can input be observed that highequivalent at a higher resonant (switching frequency), which prevents the flow of HF component circuit thefrequency passive filter is shown in Figure 12a. From this figure,prevents it can bethe observed Zeq is too high at aofhigher resonant frequency (switching frequency), which flow ofthat HF current the grid side. The simulated voltage waveform across the filter capacitor isofshown in Zcomponent eq isat too high at a higher resonant frequency (switching frequency), which prevents the flow HFis current at the grid side. The simulated voltage waveform across the filter capacitor component current at the grid side. The simulated voltage waveform across the filter capacitor is Figure 12b. in This figure how shows the HFhow component has beenhas blocked at the input shown Figure 12b.shows This figure the HF component been blocked at the side. input side. shown in Figure 12b. This figure shows how the HF component has been blocked at the input side.

Figure 11. Simulation results of output average power (P).

Ls Ls Zeq Zeq

Cf Cf

Passive Filter Passive Filter (a) (a)

IHIH Load Load

Input Voltage (V(V in)in) Input Voltage

Figure resultsofofoutput output average power Figure11. 11.Simulation Simulation results average power (P). (P).

(b) (b)

Figure 12. (a) Passive filter and (b) voltage across capacitive filter. Figure 12. (a) Passive filter and (b) voltage across capacitive filter.

Figure 12. (a) Passive filter and (b) voltage across capacitive filter. In this section, various simulation results of the proposed SPMC as a resonant converter for IH In this section, various simulation results of the proposed SPMC as a resonant converter for IH application using the modified switching technique and its performance analysis have been application using the modified switching technique and its performance analysis have been provided. As aforementioned, the RLC circuit, which is modeled as an IH load, has been used for provided. As aforementioned, the RLC circuit, which is modeled as an IH load, has been used for analysis. In the next section, prototype implementation of SPMC as a resonant inverter and its results analysis. In the next section, prototype implementation of SPMC as a resonant inverter and its results has been discussed. has been discussed.

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In this section, various simulation results of the proposed SPMC as a resonant converter for IH application using the modified switching technique and its performance analysis have been provided. As aforementioned, the RLC circuit, which is modeled as an IH load, has been used for analysis. In the next section, prototype implementation of SPMC as a resonant inverter and its results has Electronics 2018, 7, x FOR PEER REVIEW 13 of 19 been discussed. 4. Prototype Implementation Implementation and 4. Prototype and Its Its Results Results To proposed To verify verify the the converter converter performance performance followed followed by by simulation simulation result result of of SPMC, SPMC, based based on on proposed switching application, a prototype laboratory set upset hasup been with resistive switching technique techniquefor forIHIH application, a prototype laboratory hasdeveloped been developed with load which is shown When this to be operated as aoperated resonantas converter for resistive load which in is Figure shown13. in Figure 13. converter When thisneeds converter needs to be a resonant IH application, IHapplication, coil could beIH connected instead of resistive load. of Anresistive embedded technology-based converter for IH coil could be connected instead load. An embedded Arduino mega 2560Arduino (Mousermega electronics, Banglore, India) is used for generating for generating the gate of technology-based 2560 (Mouser electronics, Banglore, India) is PWM used for the switches. thisofstudy, firstly, a In prototype of the SPMC has been tested 100 Hz (i.e., as a PWM for the In gate the switches. this study, firstly, a prototype of thefor SPMC hasoutput been tested for frequency changer operation) using the modified technique. For this, only the resistive load is assumed. 100 Hz output (i.e., as a frequency changer operation) using the modified technique. For this, only Subsequently, thisisconverter been tested as a resonant fortested IH application using the same the resistive load assumed.has Subsequently, this converterinverter has been as a resonant inverter for modified technique show themodified uniqueness of developed IH application usingtothe same technique to showtechnique. the uniqueness of developed technique.

Bi-directional Switch

(a)

(b)

Figure its (b) (b) bi-directional bi-directional switch. switch. Figure 13. 13. Experimental Experimental setup setup of of (a) (a) SPMC SPMC and and its

The implementation of the hardware circuit is divided into four parts: (a) designing of Power The implementation of the hardware circuit is divided into four parts: (a) designing of Power circuit; (b) ZCD circuit; (c) controller; (d) isolation and protection circuit. For designing of the power circuit; (b) ZCD circuit; (c) controller; (d) isolation and protection circuit. For designing of the power circuit, eight IGBTs and eight diodes have been used. Two IGBTs and two diodes have been used for circuit, eight IGBTs and eight diodes have been used. Two IGBTs and two diodes have been used making one bidirectional switch. In this study, four bidirectional switches have been used for a for making one bidirectional switch. In this study, four bidirectional switches have been used for a prototype implementation of the power circuit of SPMC, which has been shown in the Figure 13b. It prototype implementation of the power circuit of SPMC, which has been shown in the Figure 13b. is known that ZCD is used to detect every zero crossing of input AC voltage for synchronization of It is known that ZCD is used to detect every zero crossing of input AC voltage for synchronization of pulses. ZCD has been implemented with the help of Opamp IC741 (Fairchild semiconductor, San pulses. ZCD has been implemented with the help of Opamp IC741 (Fairchild semiconductor, San Jose, Jose, CA, United States), which works as a voltage amplifier. A synchronized pulse (Vg) generated CA, United States), which works as a voltage amplifier. A synchronized pulse (Vg ) generated from from the ZCD is given to interrupt pin of Atmega 2560 (Mouser electronics, Banglore, India) (i.e., the ZCD is given to interrupt pin of Atmega 2560 (Mouser electronics, Banglore, India) (i.e., digital digital pin 2 and digital pin 3) which is assigned as INT0 and INT1, detects the rising and falling edge pin 2 and digital pin 3) which is assigned as INT0 and INT1, detects the rising and falling edge of the of the pulse i.e., Vg (generated from the ZCD). As explained in section 2.2, that according to program pulse i.e., Vg (generated from the ZCD). As explained in Section 2.2, that according to program fed fed to the microcontroller, when it detects the rising edge of the pulse (Vg), it generates the pulse (Vg1) to the microcontroller, when it detects the rising edge of the pulse (Vg ), it generates the pulse (Vg1 ) of 10 ms (if the 100 Hz output of the converter is needed). Similarly, when it detects the falling edge, of 10 ms (if the 100 Hz output of the converter is needed). Similarly, when it detects the falling edge, again microcontroller generates a pulse (Vg2) of 10 ms, but this pulse is in complete phase opposition again microcontroller generates a pulse (Vg2 ) of 10 ms, but this pulse is in complete phase opposition from previous pulse. The experimental validation of synchronized pulse is shown in Figure 14a,b from previous pulse. The experimental validation of synchronized pulse is shown in Figure 14a,b shows the validity of synchronization of output voltage with respect to pulses (Vg1 and Vg2). shows the validity of synchronization of output voltage with respect to pulses (Vg1 and Vg2 ).

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Pulses generated from µC

µC Output(Vg1 & Vg2) µC Output(Vg1 & Vg2)

225.8Vr.m.s

ZCD Output(Vg)

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Pulses generated from µC

225.8Vr.m.s

Electronics 2018, 7, x FOR PEER REVIEW ZCD Output(Vg)

Output Voltage Output Voltage

(a)

(b)

(a) (b) (Scale: 5 V/div) and (b) Figure 14. 14. (a) (a) Experimental Experimental results of of ZCD ZCD and andmicrocontroller microcontrolleroutput. output. Figure results (Scale: 5 V/div) and (b) experimental validation of synchronized synchronized output w.r.t. pulses. (Scale: (Scale: output voltage, 75V/div V/div and Figure 14. validation (a) Experimental results of ZCD and microcontroller output. (Scale: 5 V/div) and (b) experimental of output w.r.t. pulses. output voltage, 75 and Time, 10 ms/div). experimental validation of synchronized output w.r.t. pulses. (Scale: output voltage, 75 V/div and Time, 10 ms/div). Time, 10 ms/div).

After the synchronized pulses (Vg1 and Vg2) generation, it is given to the isolation circuit which After the synchronized pulses (Vg1 and Vg2 ) generation, it is given to the isolation circuit which isolatesAfter the converter (higher power andVg2 controller partit(lower power Thecircuit supplywhich for the the synchronized pulses level) (Vg1 and ) generation, is given to thelevel). isolation isolates the converter (higher power level) and controller part (lower power level). The supply for the isolates the converter (highercircuit power is level) andthrough controller part (lower power level). supply for block the microcontroller and isolation given a diode rectifier, which is The shown in the microcontroller and isolation is given aa diode rectifier, which whichisisshown shownininthe theblock block microcontroller isolationcircuit circuit giventhrough through diode diagram of Figure and 3. Subsequently, an is isolation circuit has beenrectifier, prepared which is also called the gate diagram of of Figure 3.3.Subsequently, anisolation isolationcircuit circuit been prepared which iscalled also called the diagram Figure Subsequently, an hashas been prepared which is also the gate driver circuit. For this, TLP250 optocoupler has been used. The circuit diagram and prototype gate driver circuit.For For this,TLP250 TLP250 optocoupler has beenused. used.The Thecircuit circuitdiagram diagramand andprototype prototype driver circuit. implementation of thethis, isolation or optocoupler driver circuithas arebeen shown in Figure 15a,b, respectively. The output implementation of the isolation or driver circuit are shown in Figure 15a,b, respectively. The output implementation the isolation or driver circuit are shown Figure 15a,b, respectively. The output pulses (Vg1 and Vg2)offrom the isolation circuit are given to theinswitches of SPMC power circuit. pulses (Vg1 Vg2 ) )from given to tothe theswitches switchesofofSPMC SPMCpower power circuit. pulses (Vand g1 and Vg2 fromthe theisolation isolation circuit circuit are given circuit. Vcc(9V) Vcc(9V)

AC 12VAC 12V

470uF 470uF

1 1

I/P from I/PuC from uC 100ohm 100ohm

2 2 TLP250 TLP250

8 8

7

3 3

6

4 4

5

G1 G1

(a) (a)

1K 1K

6

O/P to Gate O/P to Gate of terminals terminals of MOSFETs MOSFETs

7

44K 44K

5

G2

G2

Zero Zero Crossing Crossing Detector Circuit Detector Circuit

Isolationor orDriver Driver Circuit Circuit Isolation

(b) (b) Figure 15. (a) Circuit diagram and its (b) experimental setup of isolation or driver circuit. Figure Figure 15. 15. (a) (a) Circuit Circuit diagram diagram and and its its (b) (b) experimental experimental setup setup of of isolation isolation or or driver driver circuit. circuit.

As discussed in section 2.2, proposed controller comprises of three main units i.e., ZCD unit, As discussed discussed in in section 2.2, 2.2, proposed proposed controller controller comprises comprises of three main main units i.e., i.e., ZCD ZCD unit, unit, As three microcontroller unitSection and isolation circuit unit. On combining theseof three units, theunits detailed hardware microcontroller unit and isolation circuit unit. On combining these three units, the detailed hardware microcontroller unit isolation circuit unit. OnFigure combining circuit diagram of and the controller is shown in the 16. these three units, the detailed hardware circuit diagram diagram of of the the controller controllerisisshown shownin inthe theFigure Figure16. 16. circuit

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14 of 17 15 of 19 15 of 19 1K 1K 12V 12V

AC AC

230V 230V

12V 12V

1K 1K

Vcc(9V) Vcc(9V)

12V 12V uC uC ATMEGA8 ATMEGA8 INT0 INT0

12V 12K 12V 12K

INT1 INT1 GND GND

1 100ohm 1 100ohm 2 TLP250 2TLP250 3 3 4 4 G1 G1

8 8 7 7 6 6 5 5

1 100ohm 1 100ohm 2 TLP250 2 TLP250 3 3 4 4 G1 G1

8 8 7 7 6 6 5 5

1K 1K 44K 44K

S1a,S4a,S3a,S2a 1a,S4a,S3a,S2a SO/P to Gate terminals of O/P to Gate IGBTs of terminals IGBTs

G2 Vcc(9V) G2 Vcc(9V) 1K 1K 44K 44K

S2b,S3b,S4b,S1b 4b,S1b 3b,S 2b,Sto SO/P Gate terminals of O/P to Gate IGBTs of terminals IGBTs

G2 G2

Figure 16. forfor SPMC as as a resonant converter for for IH Figure 16. Circuit Circuitimplementation implementationofofproposed proposedcontroller controller SPMC a resonant converter Figure 16. Circuit implementation of proposed controller for SPMC as a resonant converter for IH applications. IH applications. applications.

As aforementioned, using the modified technique, SPMC is operated first as a frequency changer As As aforementioned, aforementioned,using usingthe the modified modifiedtechnique, technique,SPMC SPMCis is operated operated first first as as aa frequency frequency changer changer (which converts 50 Hz grid frequency to 100 Hz with the input of 230 Vr.m.s) with a resistive load and (which 50 Hz Hz grid gridfrequency frequencytoto100 100Hz Hzwith withthe the input 230 Vr.m.s ) with a resistive (which converts converts 50 input of of 230 Vr.m.s ) with a resistive loadload and later, it is tested as a resonant converter for IH application. Figure 17a,b shows the experimental and later, it is tested as a resonant converter for IH application. Figure 17a,b shows the experimental later, it is tested as a resonant converter for IH application. Figure 17a,b shows the experimental results of SPMC as a frequency changer (at 100 Hz output voltage/current) and SPMC as a resonant results results of of SPMC SPMC as as aafrequency frequencychanger changer(at (at100 100Hz Hzoutput outputvoltage/current) voltage/current) and and SPMC SPMC as as aa resonant resonant converter for IH applications at a frequency of 25 kHz which validate simulation results. As seen converter a frequency of 25 which validate simulation results. As seen converterfor forIH IHapplications applicationsatat a frequency of kHz 25 kHz which validate simulation results. As from seen from the Figure 17a,b, current and voltage are almost in the same phase. So experimentally, the load the Figure 17a,b, 17a,b, currentcurrent and voltage are almost in the same So experimentally, the loadthe power from the Figure and voltage are almost in thephase. same phase. So experimentally, load power factor in case of when SPMC has operated as a frequency changer (i.e., at 100 Hz output on factor case of operated as a frequency changer changer (i.e., at 100 Hzatoutput resistive powerinfactor in when case ofSPMC whenhas SPMC has operated as a frequency (i.e., 100 Hzonoutput on resistive load) was found to be 0.98 which is quite close to unity. In the case of when SPMC has operated load) was found to be 0.98 which is quite close to unity. In the case of when SPMC has operated as resistive load) was found to be 0.98 which is quite close to unity. In the case of when SPMC has operated as resonant converter for IH applications was found to be 0.91. Figure 18 shows the experimental result of resonant converter forfor IHIH applications was found toto bebe0.91. as resonant converter applications was found 0.91.Figure Figure1818shows showsthe theexperimental experimentalresult resultof of output voltage with respect to input current which validate that output is perfectly synchronized with output output voltage voltage with with respect respect to to input input current current which which validate validate that that output output isisperfectly perfectly synchronized synchronized with with input supply. The value of THD for the input current is experimentally found to be 3.91% which is quite input supply. The Thevalue valueofofTHD THD input current is experimentally found be 3.91% which is input supply. forfor thethe input current is experimentally found to beto 3.91% which is quite low. Various experimental results of voltage and current waveform under R load or IH coil have been quite low. Various experimental results of voltage and current waveform under R load IHhave coil have low. Various experimental results of voltage and current waveform under R load or IHor coil been taken in a 200 MHz digital signal oscilloscope (DSO) using a current sensor probe to verify the been MHz digital signal oscilloscope (DSO) using currentsensor sensorprobe probe to to verify takentaken in a in 200a 200 MHz digital signal oscilloscope (DSO) using a acurrent verify the the validity of proposed/modified switching algorithm. It has been found that, the proposed technique validity switching algorithm. algorithm. It It has has been validity of of proposed/modified proposed/modified switching been found found that, that, the the proposed proposed technique technique can be used in the field of IH applications. can can be be used used in in the the field field of of IH IH applications. applications. Output Voltage Output (220VVoltage r.m.s) (220Vr.m.s)

225.8V 225.8V r.m.sr.m.s

2A2A

Output Current(100Hz) Output Current(100Hz)

Output Voltage(100Hz) Output Voltage(100Hz)

(a) (a)

Output Current (6A) Output Current (6A)

(b) (b)

Figure 17. (a) Experimental verification of simulated output voltage and current at 100 Hz i.e., as a Figure 17. 17. (a) (a) Experimental Experimental verification verification of of simulated simulated output output voltage voltage and and current current at at 100 Hz Hz i.e., i.e., as as aa Figure frequency changer. (Scale: output voltage, 75 V/div; output current, 1 A/div and time,100 10 ms/div) and frequency changer. changer. (Scale: voltage, 75 output current, 1 A/div andand time, 10 ms/div) and frequency (Scale: output output voltage, 75V/div; V/div; output 1 A/div time, 10 ms/div) (b) experimental validation of output voltage and current ofcurrent, SPMC as a resonant converter for IH (b) experimental validation of output voltage and current of SPMC as a resonant converter for IH and (b) experimental validation of output voltage current of current, SPMC as2aA/div). resonant converter for IH applications at 25 KHz. (Scale: Output voltage, 35 and V/div; output applications at 25 KHz. (Scale: Output voltage, 35 V/div; output current, 2 A/div). applications at 25 KHz. (Scale: Output voltage, 35 V/div; output current, 2 A/div).

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Input Current (50Hz)

225.8Vr.m.s

2.1A

THD=3.91%

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Output Voltage (100Hz) Figure 18. Experimental results outputvoltage voltagew.r.t. w.r.t. input input current Output voltage, 75 V/div; input Figure 18. Experimental results ofof output current(Scale: (Scale: Output voltage, 75 V/div; current, 1 A/div; and Time, 10 ms/div). input current, 1 A/div; and Time, 10 ms/div).

5. Conclusion 5. Conclusions In this proposed work, a cogent switching algorithm has been employed for direct conversion of In this proposed work, a cogent switching algorithm has been employed for direct conversion utility frequency to HFAC through SPMC topology for IH applications. The algorithm requires less of utility frequency to HFAC through SPMC topology for IH applications. The algorithm requires number of components along with fewer PWM signals as compared to the conventional IH system, thus less number of components along with fewer PWM signals as compared to the conventional IH leading to reduction in the cost and complexity of the controller. This direct AC to high frequency AC system, thus leading the cost algorithm and complexity of the This direct high conversion based to onreduction proposed in switching enhances the controller. overall efficiency of theAC IHto system. frequency AC conversion based on proposed switching algorithm enhances the overall efficiency Various simulation and experimental results corroborate the potential pragmatic applications of the of the IH system. Various simulation andproposed experimental results corroborate the 25 potential pragmatic SPMC as a resonant converter using the switching technique to generate kHz current/voltage applications of thethe SPMC as agrid resonant converter the proposed switching technique to generate directly from 50 Hz frequency. It hasusing the additional ability of reducing switching losses by 25 kHz current/voltage directly from the 50 Hz grid frequency. It has the additional ability of reducing incorporating a ZVS condition, high power factor and low input THD which improve the power quality switching lossesside. by incorporating a ZVS condition, high power factor and low input THD which at the input improve the power quality at the input side.

Author Contributions: A.K. and P.K.S. developed the concept and also wrote this research article. A.K. designed Author and P.K.S. developed theM.J.B. concept and also wrote thisthe research A.K.results designed andContributions: performed all A.K. the experiment. D.K.M. and thoroughly analyzed data, article. simulation and and performed all the experiment. D.K.M. and M.J.B.R. thoroughly analyzed the data, simulation results and experimental results. All authors in this paper contributed equally. experimental results. All authors in this paper contributed equally. Funding: This research received no external funding. Funding: This research received no external funding. Acknowledgments: Authors acknowledges the “Indian Institute of Technology (Indian School of Mines), Acknowledgments: Authors acknowledges the “Indian Institute of Technology (Indian School of Mines), Dhanbad, India” for providing infrastructure support. Dhanbad, India” for providing infrastructure support. Conflicts of Interest: The authors declare no conflict of interest. Conflicts of Interest: The authors declare no conflict of interest.

Appendix A Table A1. List of components used for experimental design and their specification. Components

Specification/Ratings

GBT (IXRH40N120) diode (10A7) microcontroller op-amp diode (1N4007) centre taped transformer TLP250 IC Socket base heat sink resistance capacitor IH coil

(1200 V, 55 A) (700 V, 10 A) Atmega 2560 IC741 (1000 V, 1 A) (12–0–12) V, 2 A 25 kHz 8 pin DIP for IGBT 1 K, 12 K, 100 Ω, 44 K 470 µF Litz wire based

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