An extensible software router data-path for dynamic low-level service deployment Ines Houidi, Wajdi Louati and Djamal Zeghlache
Abstract—This paper presents the design, implementation and evaluation of an extensible software data path for a programmable router. The objective is to provide a configurable, dynamic and flexible software router architecture to enable service deployment at run time. The router forwarding plane uses the Forwarding Element (FE) model provided by the Forwarding and Control Element Separation (ForCES) architecture. The design relies on distributed software components to implement the modular router data path related to the FE model. The proposed architecture ensures dynamic reconfiguration of the data path topology needed for low-level service deployment. Results on achievable performance using the proposed extensible forwarding plane to achieve dynamic deployment of service components are reported. Index Terms—Software data path based router, dynamic service deployment, ForCES Forwarding Element model, component software, data path topology reconfiguration.
I. INTRODUCTION
T
he need and demand for deploying new IP based services in wireless and wired networks with traditional router architectures remains a challenge for service providers. Deploying new services within an edge router in a dynamic and flexible manner requires open architectures and standard interfaces capable of supporting and controlling new components and packet processing functionality at run time. These features are not readily available in commercial routers despite considerable advances in network processor based router technologies. Software routers have not evolved sufficiently either and are unable of transparent component deployment and service composition at run time. Interruptions during component deployment and adaptations would cause unacceptable breaks in data flows and packet losses. This paper explores how to achieve such dynamic service deployment more transparently. Network processors, composed of multiple engines running simultaneously in parallel to perform per-packet processing at high rates, are the only designs that can offer efficient dynamic low-level service deployment. This work adopts the same notions for the software routers running at the user level by using a multi-thread approach for the packet processing components implementation. This approach can improve router performance compared to existing software routers that
Ines Houidi (
[email protected]), Wajdi Louati (
[email protected]) and Djamal Zeghlache (
[email protected]) are with the Institut National des Télécommunications, 9 rue Charles Fourier 91011 EVRY Cedex, France.
use only a programming language based on the mono-thread approach. Designers and developers of current software routers are focusing on running the router at the kernel level rather than the user level to improve the router performance. The routers running at user-level are unable to achieve acceptable delays and packet losses during dynamic deployment of services in the forwarding path. This paper develops a user level framework for software routers to enable such dynamic deployment and provide a research environment for component based designs. Most current routers rely on the next generation buildingblock model that splits the traditional monolithic router architecture into three interdependent functional planes connected by standard interfaces. These planes are the management plane (including network management applications), the control plane (including routing and signalling protocols) and the forwarding plane (which implements the data path with programmable packet processing units). Currently, the IETF ForCES (Forwarding and Control Element Separation) [1] working group is defining a framework and protocols to standardise mechanisms and information exchange between the control and forwarding plane. The aim of ForCES is to replace proprietary interfaces with a standard protocol and programmable API. This will enable rapid innovation in both the control and forwarding planes while maintaining interoperability between standard components from different suppliers. The ForCES architecture provides an appropriate framework for deploying and controlling standard services in programmable and extensible routers [2]. The deployment of network services (e.g. Overlay Networks, QoS) has to be performed, across the defined three planes, in a standard, automatic and dynamic manner. A network service can be considered as an assembly of components that can be inserted and integrated appropriately in the router architecture. Two main operations are required [3]: - Service composition operation: that identifies the components required by the service (based on the service description) and defines the manner in which these components are composed. - Service deployment operation: that performs the mapping of service components into the network elements. In this paper, two service deployment levels are in addition distinguished: - High-level service deployment: performed at the network level and typically related to the router management plane (corresponding to Service policy).
c 0-7803-9569-7/06/$20.00 2006 IEEE 161
Low-level service deployment: performed at the router node level and concerns upgrade of the router forwarding plane data path. This deployment operation is handled by the control plane. The challenge is that current software based router architectures [4, 5, 6], in particular their data path structures, do not provide the flexibility and re-configurability needed by the dynamic low level service deployment. Especially for software routers running at the user level, it is quite difficult to reconfigure the data path topology installed in the operating system of a router. This is due to the programming language (for object oriented data path architectures) used to execute the router data path. Software routers running at the kernel level can achieve the desired data path reconfiguration at run time with an acceptable performance, but still depend upon the operating system kernel version and card drivers. This hardware dependence is a real hurdle for portability and flexibility. Here we seek alternatives that decouple completely service deployment from the underlying router hardware and operating system. The proposal consists of providing an extensible software architecture running at the user level that is capable of configuring and upgrading at run time the router data path to achieve the low-level service deployment operation. In addition, this work targets a new direction in designing and developing the extensible software data path by relying on the ForCES Forwarding Element (FE) model [7] to provide the desired automatic data path reconfiguration. A component based software technology is used to design and implement the desired modular forwarding path. Results on achievable performance using the proposed component and software based forwarding plane for dynamic service components deployment are reported. Section 2 presents the ForCES Forwarding Element model. Sections 3 and 4 describe respectively the design and the implementation of the proposed software data path model. Section 5 presents the relation between the low-level service deployment and the data path topology reconfiguration. Performance results to assess the impact of the dynamic service deployment in terms of delay and packet loss are reported in section 6. -
II. FORCES FORWARDING ELEMENT MODEL Since the design of the extensible software forwarding plane to provide dynamic data path configuration is based on the ForCES Forwarding Element model, this section gives a brief overview of the ForCES architecture and model,. The section also describes the forwarding topology configuration needed for the dynamic low level service deployment. A. ForCES architecture overview The IETF has defined a new architecture called ForCES (Forwarding and Control Element Separation) [1] to standardise the required interfaces, protocols and the exchange of information between the management, control and data planes. This standard separation mechanism allows each plane to evolve independently in a scalable and interoperable manner. Two types of logical entities define a Network Element
(NE) : control elements (CE) which operate in the control plane and forwarding elements (FE) which operate in the forwarding plane. CEs include control functionality like routing and signalling protocols (BGP, RSVP, etc) typically performed on general-purpose CPUs. FEs integrate packet processing functionality such as metering, classifying, scheduling, etc. FEs can be implemented on FPGAs, ASICs, network-processors, or general-purpose CPUs capable of running and supporting the data path operations for each packet. CEs control the behaviour of FEs in a master/slave mode. As shown in figure 1, communication between CEs and FEs is achieved via the ForCES protocol [8]. B. ForCES FE model The FE model [7], proposed by the IETF, provides the basis to define the information elements exchanged between the CE and the FE in the ForCES protocol. The FE model is designed to describe the logical processing functions of an FE, called LFBs (Logical Function Block). (See figure 1). Each NE (e.g. router) is defined as a set of logical entities: the CEs and FEs. The
LFBs represent basic building blocks in an FE. The LFB topology is the logical interconnection between LFBs. Control Plane
CE entity ForCES Protocol FE entity
Inputs
LFB Topolgy
LFB1
LFB2
Attributes
Attributes
Outputs
Forwarding Plane
Fig.1. ForCES Architectural Representation of a Network Element (NE).
The LFB class, which is the basic building blocks of the FE model, defines packet processing operations in the router data path. As a packet flows through an FE along a datapath, which is a conceptual path taken by packets within the forwarding plane inside an FE, it flows through one or multiple LFB instances, where each LFB is an instance of a specific LFB class. The FE model includes three components: - Logical Function Block (LFB) model: is the central component of the proposed FE model, which provides the content and data structures to define each individual LFB class. - LFB topology: expresses the logical inter-connection between the LFB instances along the data path(s) within the FE. - FE level attributes: provide information about the FE capabilities. These attributes support flexible implementations by allowing an FE to specify which optional features are supported. By using the FE model, it is possible to configure the attributes of each LFB and influence the router data path behaviour through dynamic extensions.
162
C. LFB topology reconfiguration The LFB topology is defined in the FE model as the graph representation of the data paths within an FE (figure 1). Data path changes for dynamic low-level service deployment can hence be ensured by LFB topology reconfigurations. These operations include creating, instantiating or deleting LFBs and automatically removing or setting up the inter-LFB interconnections. In order to ensure the mapping from the high level service policy to a specific low level LFB topology, a Forwarding Path Configuration Manager Entity (FPCME) [9] is used to translate management plane service composition to data plane service components and orchestration. As depicted in figure 2, the FPMCE interacts with the CE (which knows the initial LFB topology configuration and capabilities) to communicate the appropriate mapping of services. Once the CE understands the mapping, it controls and configures the LFB topology in the FE via the ForCES protocol. Thus, the CE is responsible for reconfiguring the data paths to adapt at run time the network services when the service requirements change. In summary, the mapping between the high level service policies to a specific low level LFB topology is performed via the FPCME interface. The FPCME asks the CE to configure the LFB topology. The CE achieves the adaptation using the ForCES protocol. Sevice composition (e.g. QoS, VPN..) Network Service
...
Network Service
... ...
Manangment plane
based on the FE model and on dynamic adaptation of router functionalities. The design requires first a programming model suitable for the FE model concepts and the requirements for LFB topology reconfiguration. The programming model should provide the required extensibility and flexibility to the forwarding plane. Most of the current software data plane developments (such as Click and Vera) are based on the object oriented model. Adapting a router functionality based on object-oriented model consists unfortunately in stopping the basic configuration, recompiling the new configuration and starting it again after the adaptation. Each time a new element is added, the entire configuration must be reinitialised, even if the object code for the element is already in the kernel. This can cause packet losses and considerable latency which is in contradiction with the main goal of dynamically deploying at run time new services in software routers. The concept of composition with software components can overcome the drawbacks mentioned above. Component-based middleware, emerging as an extension to object-based middleware, relies on the abstraction of components as reusable software that can be easily configured, assembled, deployed, and updated. The CORBA Component Model [10], an OMG extension to CORBA 2.0, is adopted to design the proposed component based data path. The CCM specification provides a standard way of designing components, configuring the connections of these components and their default attributes, packaging these components as distributable units, and deploying them over the network.
High-level Service Deployment
FPCME
FE CE
Inputs
CE
Control plane
Low-level Service Deployment
LFB1
LFB2
ForCES protocol
LFB1
LFB2
Attributes
Attributes
FE Model
Outputs
Mapping
CCM Model
LFB3
FE LFB5 LFB6
Data plane
LFB4
Inputs
FE
.
Fig. 2. High-level and low-level service deployment.
Based on the FE model, the next sections present the proposed design and implementation of the router forwarding plane using a component based software technology. The objective is to provide an extensible architecture capable of configuring and upgrading at run time the router data path during the low-level service deployment operation. Section 5 describes in details the mechanism and operations of the LFB topology reconfiguration using CORBA Component Model (CCM) tools. III. FORWARDING PLANE DESIGN This section presents the data plane design to provide flexibility and re-configurability of the LFB topology for lowlevel service deployment. The forwarding plane design is
CCM Component (LFB1) Attributes
CCM Component (LFB2)
Outputs
Attributes
Fig. 3. Forwarding plane design using CCM as a mapping between the FE and CCM models.
The resemblance between the CCM abstract model and the FE model, led us to a mapping between these two models by considering the data plane forwarding elements as a collection of interconnected software CCM components (figure 3). As mentioned in section 2, the FE model proposed in the ForCES architecture draft is composed of three concepts: the LFB model, the FE level attributes and the LFB topology. The design of the software data plane using the CCM component model is based on these main concepts: - The LFB model is implemented using a CCM component acting as a basic element for the data path construction. The CCM component offers the means to
163
design all the characteristic of an LFB. Like a CCM component an LFB has inputs and outputs for receiving and sending packets. - The FE level attributes are represented by the CCM component attributes. There is a one to one mapping between the LFB concept and the CCM component concept. - The LFB topology can be considered as an assembly of components which represents a graph between CCM components representing the LFB elements.
These descriptors can contain all the LFB components information and topologies required for the CEs to control and modify the data plane behaviour. Once the FE reports its capabilities and capacity limits, presented in a (.cpf) descriptor file, to the CE in a ForCES protocol message, the CE translates the service policy into a desirable data path configuration for the FE.
LFB3
IV. FORWARDING PLANE IMPLEMENTATION:
CCM Component
This section presents the implementation of the component based forwarding plane using CCM tools. This implementation focuses on packet and LFB aspects: A. Packet implementation Since an asynchronous communication is used to exchange packets between LFBs, the packet is considered as a CCM framework event that must be sent from an event source to an event sink. The packet definition represented in IDL with respect to the mapping with CCM gives: eventtype PacketEvent { public sniff_ethernet eth_pac; public sniff_ip ip_pac; public sniff_tcp tcp_pac; public char payload [MAX]; }; B. LFB implementation In the forwarding plane, packets flow from an input port to an output port. The IDL definition of the implemented LFB component includes input and output parameters related to the “PacketEvent” structure. That is: component LFB { attribute string name; publishes PacketEvent output_port; consumes PacketEvent input_port; }; The implementation of the LFB components includes the implementation of the interfaces and events described in the IDL file as well as functions performed by each LFB.
Input Packet
LFB1
CCM Component
CCM Component
LFB2
CCM Component
LFB To Device
Output Packet
CCM Component
Extensible Component Based Forwarding Plane
Fig.4. LFB topology reconfiguration: insertion of new component into the datapath needed for the low-level service deployment.
As depicted in figure 4, the operations needed to reconfigure LFB topologies are: 1. Creation of a new LFB instance of a given LFB (LFB3) in a FE 2. Disconnection and removal of the existing link between a given LFB (LFB1) output and another LFB (LFB2) input. 3. Insertion, meaning connection, of new LFB to previously disconnected LFBs (Connect LFB1 to LFB3 and Connect LFB3 to LFB2). Other LFB topology reconfiguration consists in deleting a given LFB (automatically removing all interconnects to/from the LFB) after reception of a tear down message from the CE. Based on these operations, the XML assembly descriptor will be updated. A sample of the component assembly descriptor (.cad) file that presents the LFB topology of the data plane after dynamic deployment of LFB3 for figure 4 is provided below: output_port input_port output_port intput_port
V. LFB TOPOLOGY ADAPTATION NEEDED FOR THE LOW-LEVEL SERVICE DEPLOYMENT
This section addresses the dynamic service deployment and operations, performed during the low-level deployment in the forwarding plane, using the CCM tools. As mentioned in section 2, a packet flows through an FE along a data path within one or multiple LFB instances. The LFB topology is defined as the graphic representation of the datapaths within an FE. All these elements (LFB instances, LFB topology…) can be presented by the CCM deployment model. The CCM model defines different component descriptors in XML (e.g. ccd, cad, cpf files) [10]. A CORBA component Descriptor (.ccd) file contains information about the component implementation, whereas a Component Assembly Descriptor (.cad) file contains initial configuration of components interconnection. Configuration of various component instances attributes and capabilities is defined by a Component property file (.cpf).
LFB From Device
The insertion of this new component in the data plane corresponds to a service addition in the management plane.
164
Push() Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
LFBn
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
LFB j
Ttot
Disconnection
Push() Push()
LFBj
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Push()
Connection
Push() Push()
Push()
Push()
Push()
Push()
Fig.6. Mono-thread approach using successive push calls to send packets from one component to another.
The drawback of this approach is related to the deployment of new components in the router data path (the dynamic deployment part of figure 6). The disconnection between components LFBi and LFBk in the LFB topology graph causes packet loss. The first experiment concerns the effect of deploying new component on the packet loss for both the mono-thread and the multi-thread based data plane approaches. A testbed composed of a mono-processor PC (Intel XEON Processor MP, 2.4 GHz) deploying initially three components that forward a UDP flow of 64 bytes packet size is used (e.g. LFBi, LFBk and LFBn). A fourth component (e.g. LFBj) is deployed at run time to test the dynamic configuration of the data path. The delay experienced during component deployment is 3.5 ms (this includes time for disconnection of link between existing LFBs, insertion and connection of the new component LFBj). 64 bytes (mono-thread)
Fig.5. Multi-thread approach. (Parallel execution of thread components with queues).
The mono-thread approach is currently the only one that can be used to implement the packet processing units of the data plane [12]. As depicted in figure 6, the mono-thread approach consists of using successive push calls to send packets from one component to another.
After deployment
Connection
Connection
Push()
Dynamic deployment
Push()
After deployment
Connection
Queue
Push() Push()
Dynamic deployment
Disconnection Push()
Push() Push()
Number of lost Packets
Queue
Before deployment
T’tot T’
LFBk
Queue
LFB i
LFBn
LFBk
T
LFBi
Before deployment
VI. PERFORMANCE E VALUATION This section illustrates the impact of the dynamic data path topology configuration on the data plane performance in terms of delay and packet loss. The aim is to reduce packet loss and packet processing delay during dynamic LFB topology reconfiguration. Since, the design proposed in this work can benefit from multithreading compared to other programmable routers that can only use mono-threading, a multi-threads approach for the LFB component implementation is adopted. The multithreading approach is based on using multiple thread components executed in parallel. A component integrates queues to preserve packets by accepting data even when the thread is not active. The component based software router implementation proposed in this work can benefit from multithreading compared to object oriented software router architectures that can only use the mono-thread method. The object oriented routers experience consequently more packet losses and packet processing delays. The advantage of the multi-threading approach is that the deployment of new components does not cause packet loss during the dynamic LFB topology reconfiguration. As depicted in figure 5, four components, LFBi, LFBj, LFBk and LFBn integrating queues are considered. The first interactions in figure 5 concern the steps before the deployment of the component LFBj to be inserted between LFBi and LFBk. Successive push calls are used. During the dynamic deployment of component LFBj, disconnection between LFBi and LFBk deactivates the push calls. There are however no dropped packets since all packets are held in queues. After the deployment of LFBj, all packets preserved in the queue of LFBi will be sent to LFBj.
64 bytes(multi-threads)
80 70 60 50 40 30 20 10 0 100
200
300
400
1000 2000 3000 5000 10000 20000
Rate (packets/s)
Fig. 7. Impact of queuing approach on packets lost
Figure 7 depicts the effect of dynamic component deployment on UDP traffic packet loss. In the mono-thread approach, packet loss starts at a rate of 285 packets/s. As all packets sent during the 3.5 ms deployment delay are dropped,
165
the number of lost packets increases drastically with increasing rate. The second curve illustrates the advantage of using the multi-thread approach with queues integrated in components. The queues store pending packets during dynamic deployment of components and maintain packet loss to a minimum as low as 0.015%. The second experiment (using the same testbed) concerns the effect of deploying new components on the packet delay in both mono-thread and multi-thread approaches using the push invocation method. The parameters used are as follows: - Parameters related to the mono-thread approach: - N: Number of packets in a flow. - T: Processing delay of one packet between the ingress and egress LFBs. - Ttot: Processing delay of a flow (N packets) between the ingress and egress LFBs. - Parameters related to the multi-thread approach: - T’: Processing delay of one packet between the ingress and egress LFBs. - Ttot’: Processing delay of a flow (N packets) between the ingress and egress LFBs In the multi-threads approach, as depicted in figure 5, the parallel execution of thread components to forward simultaneously N packets shows that Ttot’ is approximately equivalent to T’; the time needed to process one packet in the data path between the ingress and egress LFBs augmented by the time needed to dynamically insert, remove and connect components. This result improves and reduces the processing delay of N packets (Ttot) compared to the mono-thread approach. The simple scenario used in this paper, which consist of inserting one LFB component dynamically in the data path, already reveals large differences in delay and packet loss performance. As the number of configurations for dynamic service deployment in forwarding path is expected to be much higher in practice, the performance of the monothread approach will further degrade and the gap with the multi-thread approach will become more significant.
router data path to improve the performance in terms of packet processing delay. The component based software router presented in this paper can be a potential starting point for standardization of software based routers and certainly a framework for further investigation. REFERENCES [1]
Yang, L., et al., "Forwarding and Control Element Separation (ForCES) Framework", RFC 3746, April 2004. [2] L. Gottlieb and L. Peterson, “A Comparative Study of Extensible Routers”, Proc. of Open Architectures and Network Programming, New York, NY, 2002. [3] Robert Haas, et al., "Autonomic Service Deployment in Networks", IBM Systems Journal, Vol. 42, No. 1, January 2003. [4] D. Decasper, Z et al., “Router plugins: A software architecture for next generation routers”. IEEE/ACM Transactions on Networking, 8(1):2–15, Feb. 2000. [5] E. Kohler, R et al., The Click modular router. ACM Transactions on Computer Systems, 18(3):263–297, Aug. 2000 [6] D. Mosberger and L. L. Peterson. “Making paths explicit in the Scout operating system”. In Proceedings of the Second USENIX Symposium on Operating System Design and Implementation (OSDI), pages 153– 167, Seattle, WA USA, Oct. 1996 [7] L.Yang, et al.,”ForCES Forwarding Element Model”,. Internet Draft, August 2005. [8] A. Doria, et al., ”ForCES protocol specification”,. Internet Draft, August 2005. [9] Wajdi Louati, Badii Jouaber, Djamal Zeghlache ”Configurable software based edge router architecture”, Elsevier Computer Communications, Volume 28, Issue 14, September 2005, Pages 1692-1699. [10] The Object Management Group (OMG). “Corba components” - version 3.0. formal/02-06-65, June 2002. [11] David Clark. The structuring of systems using upcalls. In Proc. of the 10th ACM Symposium on Operating Systems Principles (SOSP), pages 171-180, December 1985.
VII. CONCLUSION AND FUTURE WORK This paper presented a component based framework for programmable software routers operating in user space to enable efficient and low latency dynamic service deployment in the forwarding plane. This proposal is an alternative to software routers with object oriented data path architectures. Since these routers use mono-threading approaches they experience larger packet processing delays and losses. The component based paradigm on the contrary can benefit from multi-threading to contain packet loss and latency. The specific work reported in this paper presents an extensible software architecture capable of configuring and upgrading at run time LFB topologies in Forwarding Elements (FEs). The adaptation is achieved by Control Elements (CE) relying on ForCES as advocated by IETF and the CCM used as middleware between the FE components to upgrade and modify the router data path. The proposed implementation and paradigm provide a way forward in the design of extensible software routers capable of dynamic low-level service deployment. A distributed approach is also envisaged in the
166
Table of Contents
Technical Session 1 A – Router and Switch Architectures I ◦ Forwarding model of backplane Ethernet for open architecture router . . . . . . . . . .
3
Takafumi Hamano, Masaaki Inami, Michihiro Aoki, Keishi Habara and Shinichiro Chaki (NTT Network Service Systems Laboratories, Japan)
◦ RFC 2544 Performance Evaluation and Internal Measurements for a Linux Based Open Router . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
Roberto Bruschi and Raffaele Bolla (University of Genoa, Italy)
◦ Resource Virtualisation of Network Routers . . . . . . . . . . . . . . . . . . . . . . .
15
Ross McIlroy and Joseph Sventek (University of Glasgow, United Kingdom)
◦ Retransmission in Slotted Optical Networks . . . . . . . . . . . . . . . . . . . . . . .
21
Akbar Ghaffar Pour Rahbar and Oliver Yang (University of Ottawa, Canada)
B – Network Processors, IP Table Lookup and Packet Classification ◦ Performance Evaluation and Cache Behavior of LC-Trie for IP-Address Lookup . . . .
29
Jing Fu, Olof Hagsand and Gunnar Karlsson (KTH, Royal Institute of Technology, Sweden)
◦ Divide-and-Conquer: A Scheme for IPv6 Address Longest Prefix Matching . . . . . .
37
Zhenqiang Li, Xiaohong Deng, Hongxiao Ma and Yan Ma (Beijing University of Posts and Telecommunications, P.R. China)
◦ Markers-based Space Decomposition Algorithm: A new algorithm for multi-fields packet classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
43
Ons Jelassi and Olivier Paul (National Institute of Telecommunication Evry, France)
◦ Evaluation of Cache Base Network Processor by Using Real Backbone Network Trace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
49
Shinichi Ishida, Hiroaki Nishi (Keio University, Japan) and Michitaka Okuno (Central Reserach Lab., Hitachi, Ltd., Japan)
Technical Session 2 A – Router and Switch Architectures II ◦ Scalable Router Memory Architecture Based on Interleaved DRAM . . . . . . . . . . Feng Wang and Mounir Hamdi (The Hong Kong University of Science and Technology, Hong Kong)
xi
57
◦ Design issues for edge nodes in agile all-photonic networks . . . . . . . . . . . . . . .
63
Robert Radziwilowicz, Mazen Khair, Sofia A. Paredes and Trevor Hall (University of Ottawa, Canada)
◦ Architecture of an Integrated Router Interconnected Spectrally (IRIS) . . . . . . . . .
71
Anujan Varma (University of California at Santa Cruz, USA), Dimitrios Stiliadis, Pietro Bernasconi, Jurgen Gripp, John Simsarian, David Neilson and Martin Zirngibl (Bell Labs, Lucent Technologies, USA)
◦ Performance Analysis of a Practical Load Balanced Switch . . . . . . . . . . . . . . .
79
Yanming Shen, Shivendra S. Panwar and H. Jonathan Chao (Polytechnic University Brooklyn, USA)
B – Switch Scheduling I ◦ An Efficient Packet Scheduler for Modern Network Processors: Guarantee Load Balancing and Packet Ordering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
87
MinXuan Zhang, ZhiGang Sun and XiaoMing Zhang (National University of Defense Technology,China)
◦ Distributed Crossbar Schedulers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
93
Cyriel Minkenberg, Francois Abel (IBM Zurich Research Laboratory, Switzerland) and Enrico Schiattarella (Politecnico di Torino, Italy)
◦ Integrating Uni- and Multicast Scheduling in Buffered Crossbar Switches . . . . . . .
99
Lotfi Mhamdi and Stamatis Vassiliadis (Delft University of Technology, Netherlands)
◦ Packet Mode Scheduling in Buffered Crossbar (CICQ) Switches . . . . . . . . . . . . 105 Georgios Passas and Manolis Katevenis (ICS-FORTH and University of Crete, Greece)
C – General Topics ◦ Pricing for Quality of Service in High Speed Packet Switched Networks . . . . . . . . 115 Pramode Verma and Mostafa Dahshan (The University of Oklahoma, USA)
◦ Boosting the Performance of PC-based Software Routers with FPGA-enhanced Network Interface Cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Andrea Bianco, Robert Birke, Gianluca Botto, Marcello Chiaberge, Jorge Finochietto, Marco Mellia, Fabio Neri, Michele Petracca (Politecnico di Torino, Italy) and Giulio Galante (Istituto Superiore Mario Boella, Italy)
◦
Linear Complexity Algorithms for Maximum Advance Deflection Routing in Some Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 Saad Mneimneh (Hunter College of CUNY, USA) and Franck Quessette (Universite de Versaille, France)
◦ Ethernet in Core Networks: A Technical and Economical Analysis . . . . . . . . . . . 135 Arno Schmid-Egger (Technical University Munich, Germany) and Andreas Kirstaedter (Siemens Corporate Technology, Germany)
◦ Synchronizing Routing Information of Control Plane and Forwarding Plane Gracefully 141 Feng Zhao, Xicheng Lu, Baosheng Wang and Jinjing Zhao (National University of Defense Technology, P.R. China)
xii
◦ High Performance String Matching Algorithm for a Network Intrusion Prevention System (NIPS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 Yaron Weinsberg, Shimrit Tzur-David, Danny Dolev (The Hebrew University of Jerusalem, Israel) and Tal Anker (Radlan - a Marvell Company, Israel)
◦ Maximum Lifetime Routing in Wireless Sensor Network using Realistic Battery Model 155 Kumar Padmanabh and Rajarshi Roy (Indian Institute of Technology, Kharagpur, India)
◦ An extensible software router data-path for dynamic low-level service deployment . . . 161 Ines Houidi, Wajdi Louati and Djamal Zeghlache (Institut National des Télécommunications, France)
◦ Hierarchical Interworking of Draft Kompella and Draft Lasserre Approaches for VPLS 167 Chih-Wei Hsu, Fan-San Choi, Wai-Sheng Lai, Ting-Chao Hou (National Chung Cheng University, Taiwan) and Woei-Luen Shyu (Industrial Technology Research Institute, Taiwan)
Technical Session 3 A – Switch Scheduling II ◦ Multi-hop scheduling algorithms in switches with reconfiguration latency . . . . . . . 175 Valentina Alaria (Cisco Systems, USA), Andrea Bianco, Paolo Giaccone, Emilio Leonardi and Fabio Neri (Politecnico di Torino, Italy)
◦ Can We Schedule Traffic More Efficiently in Optical Packet Switches? . . . . . . . . . 181 Bin Wu, Xin Wang and Kwan L. Yeung (The University of Hong Kong, Hong Kong)
◦ Practical Algorithms for Multicast Support in Input Queued Switches . . . . . . . . . . 187 Andrea Bianco, Paolo Giaccone, Chiara Piglione and Sonia Sessa (Politecnico di Torino, Italy)
◦ Load Balancing in a Switch Without Buffers . . . . . . . . . . . . . . . . . . . . . . . 193 Saad Mneimneh (Hunter College of CUNY, USA)
B – Optical Packet Switches ◦ Sharing Wavelength Converters in Multistage Optical Packet Switches . . . . . . . . . 203 Carla Raffaelli, Michele Savi (University of Bologna, Italy) and Alexandros Stavdas (University of Peloponnese, Greece)
◦ Performance Study of Various Packet Scheduling Algorithms for Variable-Packet-Length Feedback Type WDM Optical Packet Switches . . . . . . . . . . . . . . . . . . . . 209 Chih-How Chang, Malla Reddy Perati, Jingshown Wu (National Taiwan University, Taiwan) and Shou-Kuo Shao (Chunghwa Telecommunication Laboratories, Chunghwa Telecom Co., Taiwan)
◦ Greedy Maximal Weighted Scheduling for Optical Packet Switches . . . . . . . . . . . 215 Zhen Zhou and Mounir Hamdi (Hong Kong University of Science & Technology, Hong Kong)
◦ Packetisation in Optical Packet Switch Fabrics using adaptive timeout values . . . . . . 221 Brian Mortensen (Technical University of Denmark, Denmark)
xiii
C – Routing ◦ Routing with Deceptive Information . . . . . . . . . . . . . . . . . . . . . . . . . . . 229 Claudio Casetti, Marco Mellia, Maurizio Munafò, and Christian Racca (Politecnico di Torino, Italy)
◦ A Distributed Algorithm for Unicast QoS-Routing using Path Feasibility Prediction . . 235 Azizul Rahman Mohd Shariff and M. E. Woodward (University of Bradford, United Kingdom)
◦ Performance of NACK-Oriented Reliable Multicast in Distributed Routers . . . . . . . 241 Markus Hidell and Peter Sjödin (KTH - Royal Institute of Technology, Sweden)
◦ MET: an Efficient Static Routing Algorithm for WDM Networks with Full Wavelength Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249 Bin Wu and Kwan Yeung (The University of Hong Kong, Hong Kong)
Technical Session 4 A – Optical Switches ◦ Design of OXC Architectures based on Arrayed Waveguide Gratings: Topological Properties and Physical Performance . . . . . . . . . . . . . . . . . . . . . . . . . . 257 Chris Matrakidis, Stelios Sygletos (National Technical University of Athens, Greece), Achille Pattavina, Riccardo Zanzottera (Politecnico di Milano, Italy) and Alexandros Stavdas (Universitry of Peloponnese, Greece)
◦ Optical-Switch Benes Architecture based on 2-D MEMS . . . . . . . . . . . . . . . . 265 Guido Maier (CoreCom, Italy), Luigi Savastano (DVT Pirelli Broadband Solutions, Italy), Stefano Bregni, Achille Pattavina and Mario Martinelli (Politecnico di Milano, Italy)
◦
Effects of Link Failures on the Overall Blocking Behavior of Banyan-based Optical Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271 Xiaohong Jiang, Md. M.R. Khandker, Susumu Horiguchi (University of Tohoku, Japan), Pin–Han Ho (University of Waterloo, Canada), Minyi Guo (University of Aizu, Japan) and Hussein T. Mouftah (University of Ottawa, Canada)
B – Protection and Restoration ◦ RTF_TIE: A Tunable Interdomain Egress Selection Algorithm Robust to Transient Link Failures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279 Yaping Liu, Zhenghu Gong and Feng Zhao (National University of Defense Technology, P.R. China)
◦ Comparison of Protection Capacity Cost at IP or WDM Layer . . . . . . . . . . . . . 287 Marco Mellia and Mauro Cuna (Politecnico di Torino, Italy)
◦ Integrated Multi-Layer Bandwidth Recovery for Multimedia Communications . . . . . 295 Piero Castoldi, Francesco Paolucci, Lorenzo, RossiLuca Valcarenghi (Scuola Superiore Sant’Anna, Italy) and Filippo Cugini (CNIT National Laboratory of Photonic Networks, Italy)
xiv
C – Switch Scheduling III ◦ Scalable Two-Stage Clos-Network Switch and Module-First Matching . . . . . . . . . 303 Roberto Rojas-Cessa and Chuan-Bi Lin (New Jersey Institute of Technology, USA)
◦ Scalable Central-stage Buffered Clos-network Packet Switches with QoS . . . . . . . . 309 Feng Wang and Mounir Hamdi (The Hong Kong University of Science and Technology, Hong Kong)
◦ CRRD-OG: A Packet Dispatching Algorithm with Open Grants for Three-Stage Buffered Clos-Network Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315 Janusz Kleban (Poznan University of Technology, Poland) and Adrian Wieczorek (Payback Sp z o.o., Poland)
Technical Session 5 A – MPLS / GMPLS ◦ Dynamic Routing and Traffic Engineering in Survivable MPLS Networks . . . . . . . 323 Krzysztof Walkowiak (Wroclaw University of Technology, Poland)
◦ Capacity Requirements for the Facility Backup Option in MPLS Fast Reroute . . . . . 329 Ruediger Martin, Michael Menth and Korhan Canbolat (University of Wuerzburg, Germany)
◦ A New Heuristic Algorithm for Effective Preemption in MPLS Networks . . . . . . . 337 Krzysztof Nowak (Siemens Communications, Poland) and Sylwester Kaczmarek (Gdansk University of Technology, Poland)
◦ Traffic-Driven Virtual Network Topology Reconfiguration for GMPLS Network . . . . 343 Daisaku Shimazaki, Eiji Oki, Kohei Shiomoto, Shigeo Urushidani (NTT Network Innovation Laboratories, Japan)
◦
Signaling protocol extensions for converter-saving wavelength assignment in GMPLS optical networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349 Nicola Andriolli, Luca Valcarenghi, Piero Castoldi (Scuola Superiore Sant Anna di Studi Universitari e di Perfezionamento, Italy), Jakob Buron, Sarah Ruepp (DTU - Technical University of Denmark, Denmark) and Filippo Cugini (National Laboratory of Photonic Networks, Italy)
B – Optical Burst Switching ◦ Route Optimization for Efficient Failure Recovery in Optical Burst Switched Networks 359 Qian Chen, Gurusamy Mohan and Kee Chaing Chua (National University of Singapore, Singapore)
◦ An Analysis of Time-Synchronized Optical Burst Switching . . . . . . . . . . . . . . 365 Artprecha Rugsachart and Richard Thompson (University of Pittsburgh, USA)
◦ Effective Burst Preemption in OBS Network . . . . . . . . . . . . . . . . . . . . . . . 371 Miroslaw Klinkowski, Davide Careglio, Josep Solé-Pareta (Universitat Politecnica de Catalunya, Spain) and Daniel Moratò (Public University of Navarra, Spain)
xv
◦
Gradient Projection based Multi-path Traffic Routing in Optical Burst Switching Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 379 Jia Lu, Yong Liu, Mohan Gurusamy and Kee Chaing Chua (National University of Singapore, Singapore)
◦ Hybrid Deflection and Retransmission Routing Schemes for OBS Networks . . . . . . 385 Son-Hong Ngo (Japan Advanced Institute of Science and Technology, Japan), Xiaohong Jiang and Susumu Horiguchi (University of Tohoku, Japan)
C – Switch Scheduling IV ◦ A Self-adaptive Threshold Based Scheduling Algorithm for Input-Queued Switches . . 393 Yuan Sun, Qingsheng Hu, Jiangtao Han and Zhigong Wang (Southeast University in China, P.R. China)
◦ Design of the Scheduler for the High-Capacity Non-Blocking Packet Switch . . . . . . 397 Milos Petrovic (Belgrade University, Serbia and Montenegro) and Aleksandra Smiljanic (Belgrade University, Serbia and Montenegro and Stony Brook University, USA)
◦ Delivering 100% throughput in a Buffered Crossbar with Round Robin scheduling . . . 403 Michael Berger (Technical University of Denmark, Denmark)
◦ Preventing Buffer-Credit Accumulations in Switches with Shared Small Output Queues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 409 Nikolaos Chrysos and Manolis Katevenis (ICS FORTH and University of Crete, Greece)
◦ A QOS Scheduling Algorithm based on Recursive Fair Stochastic Matrix Decomposition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 417 Ted Szymanski (Mcmaster University, Canada)
Author Index
425
xvi
