An FPGA-based Prototyping Platform for Research in ... - Google Sites
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An FPGA-based Prototyping Platform for Research in ... - Google Sites
written into memory. â headers wait in resequ. Q's ... (fast, on-chip, up to. 306 KB). Next Generation (2007) Node: Bl
An FPGA-based Prototyping Platform for Research in High-Speed Interprocessor Communication V. Papaefstathiou, G.Kalokairinos, A.Ioannou, M.Papamichael, G.Mihelogiannakis, S.Kavadias, E.Vlahos, D.Pnevmatikatos and M.Katevenis
Inst. of Computer Sci. (ICS) – FORTH – Crete, Greece
1
Key Features (First System) • • • • • • •
Remote DMA (RDMA) based operation Notifications: departure and/or arrival, interrupt or enqueue Remote Enqueue for short messages, multiple senders Credit-based flow control: lossless communication Per-destination Virtual Output Queues (VOQ’s): flow isolation Extensive event logging, debugging & performance counters Switch: – 8x8 implemention – 32-bit datapath @78.125 MHz – achieved up to 16x16 – 16-bit dpth @156.25MHz to fit in FPGA
• Linux already adapted for this platform (kernel-mode comm.) • MPI port for this platform under way 2
Photograph of First System (8 nodes)
3
Hardware Development Cost (1st System, 2 versions)
RocketIO Links (10pm)
First Version ( plain PCI ) (20pm)
2004
2005
Multipath Routing (10pm)
Second Version PCI-X (12pm) Multiple VOQs (6pm)
Demo Evaluation
Buf. Crossbar Switch (6pm)
Future System
2006
pm = person-months 4
NI Photo, with 4 RocketIO links
5
NI Architecture
PCI-X
100MHz
PCI-X PHY
64-bit PCI-X @100MHz to Host Per-dest. DMA request Q’s Per-destination VOQ’s DMA segementation into packets Link bundling: 4×2.5 = 10 Gb/s DMA Request Queues – inverse multiplexing multipath routing • Out-of-order packet arrivals: – DMA body immediately written into memory – headers wait in resequ. Q’s – nxt sys: just count # bytes – notify completion after resequ. / count complete – resequ. tolerates 1-pck loss
Target PCI-X I/F
Perf. & Debug Counters
Initiator PCI-X I/F
DMA Engine
VOQs
body
• • • • •
Completion Notification headers Reseque.
MultiPath
Link Interface Link PHY
RocketIO 6
Next Generation (2007) Node: Block Diagram
On-chip, @ 266MHz
PowerPC
NI must be simple and small compared to CPU and its local memory
