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ECS Journal of Solid State Science and Technology, 3 (4) P82-P85 (2014) 2162-8769/2014/3(4)/P82/4/$31.00 © The Electrochemical Society
Application of Atomic Layer Deposition Tungsten (ALD W) as Gate Filling Metal for 22 nm and Beyond Nodes CMOS Technology Guilei Wang,∗,z Qiang Xu, Tao Yang, Jinjuan Xiang, Jing Xu, Jianfeng Gao, Chunlong Li, Junfeng Li, Jiang Yan, Dapeng Chen, Tianchun Ye, Chao Zhao, and Jun Luoz Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing 10029, China By using two different precursors i.e. SiH4 and B2 H6 , atomic layer deposition (ALD) Tungsten (W) as gate filling metal for 22 nm and beyond nodes CMOS technology were investigated in this work. In order to evaluate the applications of two kinds of ALD W in real devices, their properties were extensively characterized by means of X-ray Reflectivity (XRR), scanning electron microscopy (SEM), X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS) and electrical capacitance-voltage (C-V) and current-voltage (I-V) methods. It is revealed that the amorphous ALD W using B2 H6 and WF6 shows lower growth rate, lower resistivity and better gap filling capability in gate trench of pretty high aspect-ratio, in contrast to the polycrystalline ALD W using SiH4 and WF6 . It is further evidenced that the doping of boron (B) in ALD W does not affect the C-V and I-V characteristics of as-prepared capacitors, demonstrating that the ALD W using B2 H6 and WF6 is a good gate filling metal which can be widely used in advanced devices. © 2014 The Electrochemical Society. [DOI: 10.1149/2.015404jss] All rights reserved. Manuscript submitted December 4, 2013; revised manuscript received February 3, 2014. Published February 12, 2014. This was Paper 1890 from the San Francisco, California, Meeting of the Society, October 27–November 1, 2013.
As CMOS downscaling has progressed along the Moore’s Law for decades, further improving the device performance year over year is becoming more and more difficult. For the state-of-the-art devices, high-K & metal gate (HKMG) technology has become the mainstream in order to reduce leakage as well as to improve device performance. Two different HKMG integration schemes, i.e., gate-first and gate-last (replacement gate) process,1,2 are usually adopted in the mass production. In the replacement gate process, one of the biggest challenges is to fill gate trench of high aspect ratio (AR) with conducting metals, such as Al3 or W.4 The common Al gate metal sputtered using physical vapor deposition (PVD) is firstly used by Intel, but this new process brings lots of challenges for Al filling and Chemical Mechanical Polishing (CMP) process.5 Even with the help of Al reflow process at ∼ 425◦ C, voids in filling Al gate occasionally occurs due to the overhang at two top corners during PVD. In addition, it is known that Al CMP is also tough since surface Al2 O3 is hard to be removed. Hence, filling the gate trench with Al metal is no longer a better choice for extremely downscaled devices. Because of the good step coverage and conformity of deposited thin films, ALD W technology gradually finds its position in the filling of contact holes with high AR. The first ALD W was deposited by alternately exposing Si2 H6 and WF6 at ∼ 325◦ C.6 Later on ALD W using diboron (B2 H6 ) and silane (SiH4 ) precursors at ∼300◦ C were developed and investigated.7–9 These ALD W, however, were widely used as the nucleation layers for W plugs in contact holes of high AR.10 In this work, instead of the usual application of ALD W in contact holes, we propose to fill gate trench of high AR with ALD W. Because of the excellent filling capability of ALD as well as the mature W CMP process, an investigation of ALD W as the gate filling metal in the replacement gate process is, therefore, of great significance. Experimental Deposition of ALD W.— ALD W were grown in Applied Centura iSPIRIT tungsten WxZ chamber, which is designed for 200 mm size single wafer using two different precursors (SiH4 and B2 H6 mixed with H2 ) and reduction gas WF6 .The growth temperature and pressure were 300◦ C and 5 Torrent respectively. In order to avoid the peeling, all ALD W were deposited on top of TiN (10 nm)/SiO2 (300 nm)/Si substrate. Material characterizations of ALD W.— X-ray Reflectivity (XRR) and scanning electron microscopy (SEM Hitachi-S5500) analysis ∗ z
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were performed to determine the thicknesses of ALD W. 4-point probe was used to measure sheet resistance (Rsh ). In order to analyze the composition and impurity of as-prepared ALD W, X-ray photoelectron spectroscopy (XPS) was carried out using ThermoFisher Scientific ESCALAB 250 system with a monochromatic X-ray source. X-ray diffraction (XRD) was utilized to characterize the microstructure phase of ALD W using Jordan Valley Delta-X with X-ray source Cu (Kα;λ = 0.154 nm).
Evaluation of the gap filling capability of ALD W.— In order to evaluate the step coverage and gap filling capability of ALD W, we followed a routine replacement gate process flow as shown in Fig. 1 to fabricate gate trench with aspect ratio ∼ 2.5, i.e., gate length ∼22 nm and height ∼55 nm. After the removal of dummy gate and oxide, an 8 Å interfacial layer oxide was grown in diluted O3 -DIW. After the deposition of 2 nm HfO2 high-k dielectric and 3 nm workfunction (WF) metals, a 5 nm-thick TiN barrier layer was deposited to improve the adhesion of subsequent ALD W as well as to prevent W from reacting with WF metals. The evaluation of gap filling was finished with ALD W using B2 H6 and SiH4 precursors.
Electrical characterizations of ALD W in MOS-capacitors.— The effects of ALD W as gate filling metal on both Capacitance-Voltage (C-V) and Current-Voltage (I-V) characteristics were studied using MOS-capacitors. The MOS-capacitors were fabricated on p-type substrate for nMOS-capacitors and on n-type substrate for pMOScapacitors. After the active area definition and standard clean, the wafers were then treated in O3 -DIW to grow an 8 Å interfacial layer oxide.11 It was followed by the deposition of amorphous HfO2 film by ALD.12 A post-deposition annealing (PDA) was performed at 500◦ C for 15 s to improve the interfacial properties. Then a 2 nm ALD TiN was deposited as the barrier layer. For nMOS-capacitors, PVD TiAl and TiN were deposited as workfunction (WF) metals. For pMOScapacitors, Physical Vapor Deposition (PVD) Ti and Chemical Vapor Deposition (CVD) TiN were utilized as WF metals. Afterwards, aforementioned two kinds of ALD W were filled in as conducting electrodes. The fabrication of MOS-capacitors was finished with the back side Al sputtering and forming gas annealing at 400◦ C for 30 min in N2 /H2 . Electrical characteristics including C-V and IV were measured by Keithley 4200 system. The flatband voltage (VFB ) and EOT were extracted by fitting the measured C-V data to simulation software developed by the Device group at UC Berkeley.
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ECS Journal of Solid State Science and Technology, 3 (4) P82-P85 (2014)
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Figure 4. The SIMS profiling of Fluoride in ALD W using SiH4 and B2 H6 .
Figure 1. A routine replacement gate process flow used to fabricate gate trench for the evaluation of the gap filling capability of ALD W.
Figure 5. Rsh −1 vs. thicknesss plots.
Figure 2. Growth rate of ALD W using SiH4 and B2 H6 at 300◦ C.
Results and Discussion Properties of ALD W.— As it is well known, ALD process is characterized by a self-terminated surface reaction. The reaction gases are alternately introduced into the chamber and separated by an evacuation or purge period. The growth rate was usually characterized by ALD cycle.13 In Figure 2, the growth rate of ALD W using both SiH4 and B2 H6 precursors is shown. As seen, thicknesses of ALD W increase linearly with the growth cycle, indicating constant growth rates for SiH4 and B2 H6 precursors. The growth rate of ALD W using SiH4 0.67 nm/cycle is larger than that using B2 H6 0.31 nm/cycle. Compared to B2 H6 precursor, the pre-exposure of SiH4 precursor on TiN may enhance the nucleation of W during the exposure of wafers to WF6 reduction gas.14 As a result, the growth rate of ALD W using SiH4 is faster than that using B2 H6 . In Figure 3, XPS spectra of as-grown ALD W using SiH4 and B2 H6 precursors are shown. For these two ALD W, the oxygen signal
Figure 3. XPS spectra of ALD W.
should originate from the top tungsten oxide (∼3 nm). The small carbon signal could be attributed to little CO2 in the test environment. For the Si signal in the ALD W using SiH4 , it should result from the decomposition of SiH4 during the pulsing step in growth.14 From the B signal in the ALD W using B2 H6 , approximately 17% B atomic content is extracted. It is worth noting that a portion of B2 H6 precursor may decompose and enter into the growing ALD W. Surprisingly, it is failed to detect any F element in both ALD W films because of the low sensitivity of XPS to F element. As a necessary supplement, a Secondary Ion Mass spectrometry (SIMS) analysis of ALD W was carried out and the results are shown in Figure 4. The ALD W using B2 H6 possesses much lower F content than that using SiH4 . The less WF6 residue on reaction surface for ALD W using B2 H6 should account for lower F content thus more W content.10 In Figure 5, the plot of Rsh −1 vs. thickness of ALD W is displayed. The ALD W using B2 H6 has lower resistivity compared to that using SiH4 . The variation in resistivity for two kinds of ALD W can be ascribed to some reasons such as film doping, phase and crystallinity. The XRD diffractograms of ALD W using SiH4 and B2 H6 are shown in Figure 6. The ALD W using SiH4 is polycrystalline whereas it
Figure 6. XRD spectra of ALD W using SiH4 and B2 H6 .
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ECS Journal of Solid State Science and Technology, 3 (4) P82-P85 (2014)
Figure 7. Gap filling capability of ALD W using (a) B2 H6 , (b) SiH4 , (c) traditional CVD W and (d) traditional PVD AL tested on gate trench of 22 nm gate length and 50 nm heights.
is amorphous when using B2 H6 . In detail, both α-phase W (PDF Card No. W-01–1203) and β-phase W (PDF Card No.W-47–1319) are evident in the XRD spectrum of ALD W using SiH4 . It was reported that the β-phase W had a large resistivity about 100–300 μ-cm.15 In contrast, α-phase W was thermodynamically stable which had a significantly low resistivity (about 5 μ-cm).6 As a consequence, the high resistivity of ALD W using SiH4 in Figure 5 can be understood because of the formed β-phase W of high resistivity. For ALD W using B2 H6 , no obvious sharp peak appears which demonstrates formation of amorphous W. This amorphous W is very stable because it can preserve the amorphous morphology till high annealing temperature as 900◦ C.10 A large resistivity of ∼160 μ-cm was reported for an amorphous W.16 Compared to normal W prepared by CVD, the resistivity of ALD W using B2 H6 is, however, larger due to both the amorphous morphology and B doping.17 Evaluation of the gap filling capability of ALD W.— As the continuous shrinkage of critical dimension in the 22 nm and beyond nodes
Figure 8. C-V curves of (a) nMOS-capacitors and (b) pMOS-capacitors filled by ALD W using SiH4 and B2 H6 as filling metal.
CMOS technology, it is known that the metal gate filling in the replacement gate process becomes more and more challenging because the aspect ratio (AR) of gate trench is ever increasing. Since traditional CVD technology no longer fulfills the requirement of filling gate trench with high AR, ALD technology is then becoming more and more popular in such applications for its good step coverage and conformity of deposited thin films.18 In Figure 7, the comparison of the gate trench filling capability by means of ALD W (SiH4 and B2 H6 ) as well as traditional CVD W is displayed. It can be seen that the filling capability of ALD W using B2 H6 (Figure 7a) is superior among four filling treatments, since the gate trench of high AR is completely filled without voids. For those filled by means of ALD W using SiH4 , traditional CVD W and normal low deposition rate PVD Al, obvious voids occurs. This should be attributed to the rapid growth of W and Al especially on two top corners (or called “overhang”), which leads to the early close of gate trench, thus preventing the reaction gas from reaching the bottom of the trench. Electrical characterization of ALD W in MOS-capacitors.— The effects of ALD W as gate filling metal on the electrical characteristics are shown in Figure 8 (C-V) and Figure 9 (I-V). From the C-V characteristics in Figure 8a, VFB values of nMOS-capacitors filled by ALD W using SiH4 and B2 H6 are −0.71 V and −0.7 V respectively. Almost no VFB (0.01 V) shift is observed. Meanwhile, for the nMOS-capacitors filled by ALD W using SiH4 and B2 H6 , the EOT values are 8.8 and 7.8 Å respectively. Despite the difference in EOT, the leakage currents as shown in Figure 9a do not show large variation, which are 1.84 A/cm2 and 2.03 A/cm2 at VFB -1 V respectively. From the C-V characteristics in Figure 8b, the VFB values of pMOS-capacitors filled by ALD W using SiH4 and B2 H6 are 0.61 V and 0.63 V respectively. Like their nMOS-capacitor counterparts, almost no VFB (0.02 V) shift is observed. Meanwhile, for the pMOS-capacitors filled by ALD W using SiH4 and B2 H6 , the EOT values are 9.7 and 8.4 Å respectively, which is an appreciable
Figure 9. I-V curves (a) nMOS-capacitors and (b) pMOS-capacitors filled by ALD W using SiH4 and B2 H6 as filling metal.
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ECS Journal of Solid State Science and Technology, 3 (4) P82-P85 (2014)
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Table I. Summary of nMOS- and pMOS-capacitors. Composition
nMOS EOT(Å)
nMOS VFB (V)
nMOS Ig (A/cm2 )
pMOS EOT(Å)
pMOS VFB (V)
pMOS Ig (A/cm2 )
W (SiH4 ) W (B2 H6 )
8.8 7.8
−0.71 −0.70
1.84 2.03
9.7 8.4
0.61 0.63
0.43 1.32
variation. In Figure 9b, the leakage currents shows large variation for pMOS-capacitors filled by ALD W using SiH4 and B2 H6 , which are 0.43 and 1.32 A/cm2 at VFB +1 V respectively. For pMOS-capacitor filled by ALD W using B2 H6 , the leakage is approximately 3 times of that for pMOS-capacitor filled by ALD W using SiH4 , but still this leakage current can be tolerated in practice. The smaller EOT should account for the large leakage of pMOS-capacitor filled by ALD W using B2 H6 . From the comparison of C-V and I-V characteristics of both nand p-MOS capacitors filled by ALD W using SiH4 and B2 H6 in summary Table I, no significant difference is found. However, EOTs for both pMOS and nMOS capacitors filled by ALD W using B2 H6 are about 1 Å smaller than those filled by ALD W using SiH4 . It may be indicated that little B diffuses through gate stacks into highk dielectric thus changes the dielectric constant of high-k materials, resulting in different EOTs. It may be further assumed that the little diffused B atoms would induce acceptor gap states in the vicinity of conduction band of high-k dielectric. These acceptor gap states would assist the leakage for pMOS capacitors via the defect-assisted leakage mechanism (electron transfer in this case), and these gap states does not affect the leakage for nMOS capacitors. This should not be a big problem for pMOS capacitors since the diffusion of most B is effectively restrained by TiN barrier layer in real application. Conclusions In conclusion, ALD W using SiH4 and B2 H6 precursors were investigated in this study. In contrast to ALD W using SiH4 and traditional CVD W, ALD W using B2 H6 shows lower growth rate, resistivity and better gap filling capability. Moreover, the doping of B in ALD W does not impact significantly the C-V characteristics. Therefore, ALD W using B2 H6 is a good gate filling metal which can be widely used in advanced devices. Acknowledgments This work was supported by Beijing Natural Science Foundation (Grant No. 4123106) and “National S&T Major Project 02” (Project
No. 2009ZX02035–007) and the opening project of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, which are all acknowledged. References 1. S. K. Han, H.-S. Jung, H. Lim, M. J. Kim, C.-k. Lee, M. sub Lee, Y.-s. You, H. S. Baik, Y. S. Chung, and E. Lee, in Electron Devices Meeting, 2006. IEDM’06. International, p. 1 (2006). 2. M. M. Frank, in ESSCIRC (ESSCIRC ), 2011 Proceedings of the, p. 50 (2011). 3. Y. Tateshita, J. Wang, K. Nagano, T. Hirano, Y. Miyanami, T. Ikuta, T. Kataoka, Y. Kikuchi, S. Yamaguchi, and T. Ando, in Electron Devices Meeting, 2006. IEDM’06. International, p. 1 (2006). 4. K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, M. Brazier, M. Buehler, A. Cappellani, and R. Chau, in Electron Devices Meeting, 2007. IEDM 2007. IEEE International, p. 247 (2007). 5. J. M. Steigerwald, in Electron Devices Meeting, 2008. IEDM 2008. IEEE International, p. 1 (2008). 6. J. Klaus, S. Ferro, and S. George, Thin Solid Films, 360, 145 (2000). 7. S.-H. Lee, L. Gonzalez, J. Collins, K. Ashtiani, and K. Levy, in Advanced Metallization(AMC) Conference 2001 and the Advanced Metallization ConferenceAsia(ADMETA) 2001, p. 649 (2001). 8. M. Yang, H. Chung, A. Yoon, H. Fang, A. Zhang, C. Knepfler, R. Jackson, J. Byun, A. Mak, M. Eizenberg, M. Xi, M. Kori, and A. Sinha, in Conference Proceedings ULSI, p. 655, Materials Research Society, Warrendale (2002). 9. T. Luoh, C.-T. Su, T.-H. Yang, K.-C. Chen, and C.-Y. Lu, Microelectronic Engineering, 85, 1739 (2008). 10. S.-H. Kim, N. Kwak, J. Kim, and H. Sohn, Journal of the Electrochemical Society, 153, G887 (2006). 11. M. Meuris, P. Mertens, A. Opdebeeck, H. Schmidt, M. Depas, G. Vereecke, M. Heyns, and A. Philipossian, Solid State Technology, 38, 109 (1995). 12. J. Xiang, X. Wang, T. Li, C. Zhao, W. Wang, J. Li, Q. Liang, D. Chen, and T. Ye, ECS Transactions, 50, 293 (2013). 13. O. Sneh, R. B. Clark-Phelps, A. R. Londergan, J. Winkler, and T. E. Seidel, Thin Solid Films, 402, 248 (2002). 14. S. Herner, S. Desai, A. Mak, and S. Ghanayem, Electrochemical and solid-state letters, 2, 398 (1999). 15. P. Petroff, T. Sheng, A. Sinha, G. Rozgonyi, and F. Alexander, Journal of Applied Physics, 44, 2545 (1973). 16. K. M. Chang, I. C. Deng, and H. Y. Lin, Journal of The Electrochemical Society, 146, 3092 (1999). 17. S. Rossnagel, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 20, 2328 (2002). 18. D. Vogler and P. Doe, Solid State Technology, 46, 35 (2003).
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