Approaches to investigate complex grid scenarios by means of ...

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Safety standards: DIN VDE V 0124-100 (LV), FGW TR3 Rev. 23 (MV). ▫ Quality standards: VDE-AR-N4105:2011-08 (LV), FGW TR3 Rev. 22 (MV). Profound ...
Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

Approaches to investigate complex grid scenarios by means of novel PHIL methods’

Georg Lauss EES-Energy Department, AIT Austrian Institute of Technology, Vienna, Austria;

IEEE PES ISGT Innovative Smart Grid Technologies; October 17, 2012; Berlin; Germany;

Contents

§ § § § §

Intro Topologies of LV Grids Interfacing Algorithms for PHIL Complex Real-Time System Approach Conclusions - Outlook

Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

Contents

§ § § § §

Intro Topologies of LV Grids Interfacing Algorithms for PHIL Complex real-time System Approach Conclusions - Outlook

Introduction This work is a motivated by real problems arising from industry projects and on-going cooperation with PV inverter manufacturer as well as distribution network operators (DNOs) on a national and international level. Target: Determination / enactment to integrate more renewable energy strategies from a technological, economical and not least political point of view. Various scenarios are of interest and underlie certain applicable safety and quality standards, respectively (LV, MV). § §

Safety standards: DIN VDE V 0124-100 (LV), FGW TR3 Rev. 23 (MV) Quality standards: VDE-AR-N4105:2011-08 (LV), FGW TR3 Rev. 22 (MV)

Profound knowledge and actual discussions in optimization or prototyping projects of PV inverters referred to state-of-the-art problems are adducted for an expanding range of application of possible PHIL tests .

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Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

Contents

Intro Topologies of LV Grids Interfacing Algorithms for PHIL Complex Real-Time System Approach Conclusions - Outlook

§ § § § §

Topologies of LV Grids D/A

Power Amplific ation

A/D

Measur ement

The implementation of PHIL tests environment enforces the use of a dedicated power amplifation units (PA).

Simulated System

Real Time Simulator

Power Interface

§ § §

R2

software

u

§

Consequences: § § §

R2 i

u’’

power inter- face(PI)

Stability considerations (Nyquist criterion) Choice of IA (accuracy, stability, …) Choice of PA (availability, use case, costs, …)

hardware

Simple test setup for a PHIL simulation – including dedicated Power interface (PI) 18.10.2012

Time delay introduced by real-time system (RTS) Dynamic behaviour of the PA Choice of interface algorithm (IA) Measurement equipment used (I/O, transducers)

hardware

i

software

Inherent ‘closed-loop originality‘ of PHIL simulation characterised by:

i

U0

U0

§

§

R1

R1

HuT

§

Power Interfaces (PIs) have to chosen according to the application in PHIL 6

Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

Topologies of LV Grids Reference impedance

a

b

ZaL1

Low voltage grid topology translated into PHIL simulation system: § MIMO ITM PIs (ITM)

ZbL1

ZaL2 AC Sim ZaL3 Z1N

ZbN Inv 1

§

Inv 2

3-ph grid simulation

Grid impedances (Node a/b)

§

§

§

Neutral impedances in hardware (air coils and resistances) Line impedances in PHIL (VROPS)

PV inverters

§

§ § §

Single phase units (4kW, 230V/50Hz) PQ control method implemented: Q(U) Sourced by PV array simulators (PVAS3) in hardware

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Modelling of Components Modelling different filter designs: § Signal Filters: § § §

§

TLP ,O1 ( s ) =

K1 . K2s +1

TBP ,O 2 ( s) =

K1 s . s 2 + K 2 s + K3

AC Grid Filters: § § §

§

Used for feedback current/voltage filtering By default in the system control loop Examples: typically LP and BP filters Different Topologies used (standard literature) By default connected to PHIL simulation Examples: typ. Pi- or T section filters implemented

Power Output Filters: § § §

Output filter of the bridge (depending on topology) Get activated during simulation (relais) Examples: typ. LC or LCL filters

TLC ( s) =

K1 . K 2 s 2 LC + sLK3 + K 4

Important for stability and accuracy evaluations (Nyquist) → see Viehweider A, Lauss G, Lehfuss F. System Theoretic Aspects of Stability Determination on Linear Power Hardware-in-the-Loop Simulations. Elsevier IJEPES-S-10-00636.

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Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

Modelling of Components PQ control parameter for the Q(U)method implemented:

Modelling of the different PQ control methods of PV inverters:

§

Fixed power factor (absolute, relative set-value) Cosφ(P) control Cosφ(U) control Q(U), Q(P) Dynamic control (free programmable)

§ § § § §

§

Averaging time (grid cycles): [1; 64] Reactive gradient (ΔQ / Δt) [5; 200]

Block diagram of PQ control implementation

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PQ Control Results Reference impedance

Use case: instabilities of PQ control (uncontrolled states)

a

b

ZaL1

ZbL1

ZaL2 AC Sim ZaL3

Inverter and Grid Voltage (EuT: Inv L1b, Phase L1-N / Node b) Control: Avg. Time=32 cyc., D Q/D t=200% / s

Z1N

1.15

ZbN Inv 2

Inv 1

Voltage (p.u.)

1.1

1.05

Q(U) Diagram (EuT: Inv L1b, Phase L1-N / Node b) Control: Avg. Time=32 cyc., D Q/D t=200% / s 1

ULN |UMAX| |UDB|

1

0.8 0.95

0.9

0

5

10

15 20 Inverter Active and Reactive Power

25

30

1

Active and Reactive Power (p.u.)

0.8 0.6 0.4 P Q S |QMAX|

0.2 0 -0.2

|QMAX(t)|

Reactive Power (p.u.)

0.6 0.4 0.2

Q(U) Trajectory Q(U) Characteristic UMAX [1.09 0.91]

0

UDB [1.07 0.93]

-0.2 -0.4 -0.6

-0.4

-0.8

-0.6 -0.8

-1 0.85

-1 0

5

10

15

20

25

30

0.9

0.95 1 1.05 Voltage (p.u.)

1.1

Time (s)

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Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

Contents

§ § § § §

Intro Topologies of LV Grids Interfacing Algorithms for PHIL Complex Real-Time System Approach Conclusions - Outlook

Interfacing Algorithms for PHIL

SISO interface algorithms -Voltage & Current (DIA) Type §

ITM … current controlled voltage source (driven by the measured current at HuT)

§

PCD … characterized by considering an impedance that exists on the software as well as on the hardware side of the simulation

§

DIM … insertion of an additional impedance on the software side only (damping impedance)

Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

Interfacing Algorithms for PHIL

Contents

§ § § § §

Intro Topologies of LV Grids Interfacing Algorithms for PHIL Complex Real-Time System Approach Conclusions - Outlook

MIMO interface algorithms -Voltage & Current Type §

ITM → robust method, easy to implement (reduced accuracy)

§

PCD → additional hardware necessary

§

DIM → equal damping impedance on soft- and hardware side; not realistic assumption

Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

System Overview Implemented Components

Modelled Components

Controller

Grid Controller

Data concentrator

Powerline-communication

Communication Simulator

Low-voltage Grid Power Grid Simulator

Simulation Message Bus (SMB)

Substation Automation Model

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UseCase – Controller in LV Grids Open Loop controller testing

Delay / packet losses (stochastic)

Grid data, measured load and generators profiles

Communication Simulator

Power Grid Simulator

Simulation Message Bus (SMB)

Substation Automation Model

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Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

UseCase – Grid Controller Grid Controller

Manual evaluation of the controller output

Simulation Message Bus (SMB)

Development and verification of grid controller

Real grid, real communication (from data concentrator) 17

System-Overview Real Components

Modelled Componenets

DataConcentrator

EGDA Client

Com Sim (+ Queue)

Powerline Communication

Grid Sim (PowerFactory) . Loads

Feeders

. Chargers

Simulation Message Bus (SMB)

Grid Control (CVCU)

Controller

Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

UseCase – (P)HIL PHIL / CHIL In-the-loop testing of the parameter setup (Q/P control) for small-scale grid-tie generators (PV inverters) Grid Controller

Powerline

Modbus

Communication Simulator

230 V

(Power) Hardware-inthe-Loop-Test Stand P/CHIL

Simulation Message Bus (SMB)

Substation Automation Model

Power Grid Simulator

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SIMTECH laboratory - concept The new AIT SimTech Laboratory offers an excellent environment for testing, verification and R&D in the field of large scale DG/RES integration, and Smart Grids applications. §

§

§

§ §

§

DR component and systems testing with highly flexible grid and primary energy source (e.g. PV) emulation Electrical interconnection, functionality and performance testing according to standards Simultaneous testing of power and communication interfaces of DR components Power-Hardware-in-the-loop (PHIL) environment Simulation and testing of single components and whole generation systems / plants Emulating smart grids scenarios

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AIT SimTech Laboratory (to be inaugurated end 2012)

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Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

SIMTECH laboratory – electrical §

Grid simulation § § § §

§

2 independent high bandwidth Grid Simulation Units: 0..480 V ; 3~, 800 kVA 3 independent laboratory grids, which can be operated in grounded/isolated mode 3-phase balanced or unbalanced operation Capabilities to perform LVRT and FRT testing

Adjustable loads for active and reactive power § §

§

§

DC Sources §

§

Freely adjustable RLC loads up to 1MW, 1MVAr (cap. and ind.) component laboratory with highly flexible grid and primary energy source (e.g. PV) emulation (LV up to 800 kVA) Parallel & serial components

5 independent dynamic PV-Array Simulators: 1500 V, 1500 A, 960 kVA

Line impedance emulation §

Adjustable line impedances for various LV network topologies: meshed, radial or ring network configuration

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SIMTECH laboratory – mechanical §

Environmental simulation § § § § §

Test chamber for performance and accelerated lifetime testing Full power operation of equipment under test inside chamber Max. footprint of equipment under test: 3,60 x 2,60 x 2,80 m LxWxH Temperature range -40㼻C..+120㼻C Humidity range: 10%..98 % r.H.

§

Power Hardware-in-the-loop (PHIL) environment § §

§

DAQ and Measurement §

§

§

General Specification § §

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Floor space: 400 m² Indoor and Outdoor test areas suitable for ISO containers

Multicore Opal-RT Real-Time Simulator P-HIL and C-HIL experiments at full power in a closed control loop

Multiple high precision Power Analyzers with high acquisition rate Simultaneous sampling of asynchronous multi-domain data input

AIT SimTech

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Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

Contents

§ § § § §

Intro Topologies of LV Grids Interfacing Algorithms for PHIL Complex Real-Time System Approach Conclusions - Outlook

Conclusions §

Different components in single and three phase lv grids are under investigation; focus is on stability issues for active / reactive power control issues

§

Nowadays, not all LV topologies can be run/translated into PHIL simulation setup; complexity of MIMO systems are challenging (stability).

§

In Future, more complex lv grid scenarios should be able to be modeled and run in PHIL simulation (MIMO, advanded IA)

Q(U) Diagram (EuT: Inv L1b, Phase L1-N / Node b) Control: Avg. Time=32 cyc., D Q/D t=200% / s 1

0.8 0.6

a

b

ZaL1

Reactive Power (p.u.)

Reference impedance

ZbL1

ZaL2 AC Sim ZaL3 Z1N

ZbN Inv 1

Inv 2

0.4 0.2 0 -0.2 -0.4 -0.6 -0.8

Outlook: § More detailled investigations on PHIL test components (modeling) will be done in order to optimize simulation characteristics (stability, accuracy, BW, …) §

-1 0.85

0.9

0.95 1 1.05 Voltage (p.u.)

Comparison with real tests (lab, field) will give a better understanding and represents a verification.

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1.1

Presented at 2012 3rd IEEE PES ISGT Europe, Berlin, Germany, October 14 -17, 2012

Thank you very much for your attention!

Georg Lauss AIT Austrian Institute of Technology EES-Energy Department Vienna, Austria [email protected]

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