Combination voltage-controlled and current-controlled PWM inverters ...

541

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 10, NO. 5, SEPTEMBER 1995

Combination Voltage-Controlled and Current-Controlled PWM Inverters for UPS Parallel Operation Jiann-Fuh Chen, Member, ZEEE, and Ching-Lung Chu

Abstruct- In this paper the scheme of combination VoltageControlled and Current-Controlled PWM inverters for parallel operation of single-phase uninterruptible power supply (UPS) is proposed. The Voltage-Controlled PWM Inverter (VCPI) unit as a master is developed to keep a constant sinusoidal wave output voltage. The Current-Controlled PWM Inverter (CCPI) units are operated as slave controlled to track the distributive current. The power distribution center (PDC) performs the function of distributing the output current of each active unit. In this proposed scheme of parallel operation, each of the units can be designed nearly independent, and the CCPI units do not need a PLL circuit for synchronization. As a result, the parallel operation of U P S is easy to implement and to expand system capacity. For the purpose of illustration, the system, including three single-phase units which operate in parallel, is analyzed and experimental results are given.

I. INTRODUCTION

U

NINTERRUPTIBLE power supply (UPS) systems have been widely used for critical loads such as computer systems, instrumentation plants, communication systems, and hospital equipment to supply constant voltage and constant frequency power [ll, [2]. With the rapid advances of the information society, UPS’S are becoming ubiquitous in supplying ever increasing critical loads. For expanding system capacity, either a large UPS unit or a multi-unit modular system operated in parallel connection is conceivable. The former approach may not be practical because of high initial cost, site installation difficulties, (e.g., size, weight, system reliability, [e.g.. single point of failure.]) By contrast, the latter approach facilitates system expansion and redundancy. The method of parallel operation to increase the UPS rated capacity is implemented by synchronizing each of the units of output voltage frequency and utilizing their voltage magnitude and phase angle through a series inductor to control the power distribution of each unit [3]-[8]. The function of synchronization is performed by a PLL circuit [9]. The PLL circuit is adopted to control the phase angle among the inverters and ac power source. It is difficult to obtain a fast response of power distribution control because of the inherently slow response of the PLL circuit. Also, when the parallel units are different in output voltage, resultant circulating current can result in malfunction and destruction Manuscript received March 18, 1993; revised April 12, 1995. The authors are with the Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan, R.O.C. IEEE Log Number 9413546.

of the UPS system. This is especially so if the load is light [lo]. Thus, the above scheme of parallel operation is difficult to implement and to provide for expansion of system. The types of PWM inverters considered are VoltageControlled (VCPI) or Current-Controlled (CCPI) with voltage source [ll]. The scheme of parallel operation combining VCPI and CCPI is proposed in this paper. The parallel system consists of a single master VCPI unit, n sets of slave CCPI units, and a power distribution center (PDC) [12]. The VCPI, as the master, is controlled to provide a constant sinusoidal wave output voltage, and the CCPI’s, as slaves, are controlled to monitor the reference current which is distributed from the PDC. The current control loop of the CCPI contains output voltage feedforward to avoid output voltage disturbance and reference current feedforward for fast current response. The CCPI can closely track the reference current obtained from the load current through the PDC. Since the reference current follows the load current, the CCPI can track the load current at the voltage output frequency which is controlled by the VCPI; therefore, the CCPI units do not require PLL circuits for the synchronized operation. Thus, the CCPI provides a means for easy expansion of this type of parallel UPS system. For increasing overall system efficiency of UPS operation, the outputs of parallel CCPI units are determined by the load power requirements and the quality of the utility system, faulty or not, which establishes the battery capacities of the units. Each of the active units that distribute output power and the distributive output power of each active unit depends on the rated capacity of the active units. The PDC performs the function of distributing the output power of each unit. The proposed method for combination of the VCPI and CCPI’s for parallel operation of UPS’S is simple to implement, and provides the flexibility to expand system capacity. Three single-phase units (one VCPI and two CCPI’s) are used to experimentally verify parallel system operation. They all have a full bridge inverter, using IGBT’s as switches. 11. CONFIGURATION

Fig. 1 shows the basic diagram for parallel operation of a UPS combination with a VCPI and n CCPI’s. This includes 1) one VCPI unit as a master, which provides a constant voltage, constant frequency output; 2) n CCPI units as slaves, which track the current reference distributed by the power distribution center; and 3) the PDC. With this scheme, the VCPI can be

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548

Utility

U

Fig. 4. Basic control block of VCPI.

CCPI-n

AC-DC

tLt

e-T

Fig. 1. The basic diagram of parallel operation of

I

Current Limit

UPS.

Fig. 5.

I

Basic control block of CCPI.

I.

4 -

S.WI

g,,pi*wi

R*W,

I-+

I ;L

+-

1.:

..... Fig. 2. Equivalent circuit of the parallel UPS.

A power from the VCPI to track the distributed load current. In this parallel system, the output current of the CCPI tracks the current reference, which is synthesized, from the system vow output current, to the output current by the PDC. Therefore, the CCPI units do not use the PLL circuit for synchronization in this parallel system and the CCPI’s have a fast response to track the output current reference. The function of the PDC is to provide the output current Io reference to each CCPI, and to determine the necessary number of CCPI units. From Fig. 1, and as mentioned in the above Fig. 3 . Phasor diagram. description, each unit has an independent control loop. Thus, the VCPI, the CCPI’s, and the PDC can be designed so that the scheme of parallel operation is easy to implement and the replaced by the utility system and, given proper configuration system capacity can be expanded as needed. of the total system, can be operated in parallel with the utility system with only CCPI’s. 111. EQUIVALENT C~curr With the configuration of a VCPI and CCPI’s in parallel, it is convenient to design and expand system capacity. The VCPI Fig. 2 shows the equivalent circuit of the parallel UPS. provides a constant sinusoidal output voltage, like an UPS unit The VCPI unit is represented as a constant sinusoidal voltage or generator. The CCPI units depend on the quality of output source with an inductor Lf and capacitor Cf as a output


549

CHEN AND CHU: PWM INVERTERS FOR UPS PARALLEL OPERATION

A

D3

k-

fS

Vtri

+

IC,,, i

I si

D4

Fig. 7. Single-phase full bridge inverter.

filter. The CCPI units are represented as current-controlled sources with inductors L1 . . . L, as current suppressors to smooth their output currents, which are determined by the PDC. The current reference of each CCPI unit is obtained from the PDC which follows the total load current I,. Thus, the reference current is synthesized from the load current. Although the CCPI units have a fast current response to track the reference current, there is some time delay or a phase angle difference between the output current of each slave unit and load current. From the phasor diagram of Fig. 3, the output current of the master unit (VCPI) will lead the slave units (CCPI), but this does not effect the parallel operation because the time delay is very small due to fast current response. IV. CONTROL STRATEGY

In Fig. 1, the parallel of UPS's has one VCPI unit, n sets of CCPI units, and PDC which is designed as a system. These are described in detail below. A. Voltage-ControlledPWM Inverter (VCPI)

The VCPI is one unit of UPS [l], [2]. The basic control block is shown in Fig. 4. Here, G,,(s) is a phase-lag compensator, G,h (s) is a phase-lead compensator, and the transfer function of Fig. 4 is represented as follows:

J

T, -

PWM

pa

t

tt7

p

Fig. 8. PWM switching pattem.

B. Current-Controlled PWM Inverter (CCPI)

Ed0 K,,(s) = -

vtri

where K,, is the gain of the PWM modulator [131. In this VCPI unit, the output sinusoidal voltage is synchronized to the utility system, or its own crystal reference, through a phaselocked loop (PLL) circuit. The function of the VCPI is to provide a constant sinusoidal output voltage; therefore, the controller of the VCPI can use any control scheme [ 141-[ 161. Many kinds of UPS's which have been installed can be used for this parallel operation, provided their interfaces are compatible with this system.

Current-control has been widely used in AC drives and reactive power compensating systems. Typically, currentcontrolled inverters reported in the literature have hysteresis controllers, sinusoidal PWM controllers, predictive current controllers and adjacent state controllers [ 171-[ 191. This parallel operation system has n sets of CCPI units that track the current reference to distribute the load current. This current controller needs fast response to track the distributed load currents [20]-[22], and does not need a PLL circuit to synchronize the parallel operation. Thus, CCPI units can be operated in parallel with a variable frequency of VCPI unit. The basic control block is shown in Fig. 5. The controller is designed with reference current feedforward for fast current response. The output voltage is considered to be a disturbance to the CCPI, and is compensated by using feedforward. The



550

transfer function in Fig. 5 is represented as follows

The CCPI can also be designed with any controller that provides a fast current response.

C. Power Distribution Center (PDC) The function of PDC as shown in Fig. 6 distributes the power from each unit which is activated. In this parallel operation system, the master unit is voltage-controlled to provide a constant voltage and its output current depends on the load characteristics. The slave units are current-controlled and the output current of slave units tracks the current reference distributed by the PDC. The PDC determines the necessary number of slave units activated for the load conditions and distributes power supplied by the active slave units. The PDC has two conditions to enable the slave units 1) when the utility system is normal and 2) when the utility system is faulty. These are described below. I) Utility System Normal: To improve the efficiency of the overall system, especially under light load conditions, the PDC detects the total power of load, enables the necessary number of slave units, and distributes the reference current of active slave units while the utility system is in normal operation. The distributed power depends on the rated capacity of each active unit that includes master and slave units; this distributive current can be expressd as

Edi

Edi

(St x Wi) i=O

where Si is the rated capacity (VA) of each unit, Wi is 1 or 0, which represents the active and inactive slave units, respectively. ISo is equal to I,, which is the output current of the master unit. The weight W; that is enabled 1 or 0 depends on the output power conditions, and WOrepresents the VCPI unit and is always given 1. The weight W; is decided by specified value of total output power; the specified value is also determined with the rated capacity of each active unit. When the output load increases to a specified value, additional units are activated to share the output current; when the output power drops below a specified value, the active units can be turned off. The tuming on of an inactive unit, or the turning off of an existing active unit is based on a specified output current level, which is determined from the number of units

in the active state. The specified value of current to enable or disable the number of i slave units is expressed when

x [specified value of enable/100]

i = 0, 1, . . . , j , “ ’ 1 n


(2)


55 1

390 V

I

(a) Vin -390 v 390 V

(b) vo -390 V

i

0.0

200 A

(4

t000.0.r

I

I

Io

-200 A 4000.0..

0.0

200 A

(4

1,

-200 A

s .000.01.

200 A Fig. IO. track.

The relationship of DC voltage and switching pattem for the current

(e)

IS;

then

-+

wz = Wj+l= 1.

Tci

+

-200 A 200 A

And, when j-1

x [specified value of disable/100]

i = o , 1, ... , j , . ' . , n

(f)

Is2

4 T ac

(3) -200 A

and add a delay time Tc; for affirming the disable level in steady state, then

wa = wj= 0 where Ii is the rated current of each unit, j is the number of the active slave units, the specified value of enable is given about 80-100, and the specified value of disable is given about 60-80. The (3) for turning off an existing active unit does not disable Wj immediately; it is designed to add a delay time Tci to affirm that the disable level is in the steady state, and then turns off this unit. The value of the delay time designed by R-C circuit is based on the step change of the output current I,. Using this scheme, the overall efficiency of the parallel system is maintained high even when it operates at light load.

I0 . 0

I 4000.0..

Fig. 11. The waveforms of voltages and currents with resistance load: (a) (b) UPS output voltage V,. (c) load output current I,. utility input voltage Qn, (d) VCPI output current I,, ( e ) CCPI-1 output current Isl,and (f) CCPI-2 output current 192.

2 ) Utility System Faulty: When the utility system is faulty, energy is supplied by the battery of the respective units. To equally consume the battery energy of each unit, all the units must be activated. The enable controller (EC) performs this function as shown in Fig. 6, and the distributed power is the same as (l), where all the weighted Wi's are enabled 1 . When the utility system recovers to a normal condition, there is a delay time T, to affirm that the utility system is in the steady


552

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 10, NO. 5 , SEPTEMBER 1995

390 V

390

V

Vi"

-390 \' 390

V

[I

r60.5

G I0 .

360.5

G 10.s.c

s..-

I

-39ov 390

V

1

[

,

,

,

J

, 1159.0..

VO

390v

1- r -390

200 A

IO

v

200 A

1159.0r.

Io

-200 A

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61 0 . 5 - 8

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,

,

,

200 A

I

, I 159.0.8

909.0

I. -200 A

-200A 360.5

I

,

,

,

I

,

909.0

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I 119.0..

200 A

Is1 -200 A

1

-200 A 81 0 . 5.

380.5

200 A

Is2

752

-200 A

300A

I

,

,

,

909.0

1

, I1

59.0..

(b)

Fig. 12. The expanded scale of Fig. 11, (a) in point A, (b) in point B,

state; the control conditions of power distribution are covered in Section IV-C-1.

v.

THE DC VOLTAGE OF CCPI

The dc bus voltage and the effect of the switching delay time for safe operation in the VCPI unit are described in the [23]. The dc voltage of CCPI for the parallel operation is discussed here. The output current of CCPI utilizes the inductor to suppress the higher harmonic current. In this parallel operation,

the CCPI must be connected through its inductor to the output voltage terminals of the VCPI unit. To understand the principle of operation, the full bridge CCPI is shown in Fig. 7, and the operation of sequence of PWM for the power switches is shown in Fig. 8. In Fig. 9(a) and (c), the T1 and T4 are turned on during tl to t 2 and t 3 to t 4 , or during t l , d to t 2 and t 3 , d to t 4 with the delay time T d , the inductor current in the AT,, or AT,,, d time is given by di,i- -

dt

Edi -

v,, sin w t Li


(4)


553

-390 v

-390 V

-39ov 390v

I ono.^^.

f.0

,

, I

I

I

I

-390 v

I 9 11 .o.e

166a.O

~000.0..

0.0

200 A

2oo A

D

I

-200 A

-200 A

I91 4 .Oms

1661.0

200 A 2oo A

1, -200A

I

,

.

,

I

,

-200 A

191 4 .Om.

166+.0

I 200 A

200A Is1

A

-200 A

Is1

-200 A 200 A

IS2

-200A

1

,

,

.

I

, 191 4 .Om.

1664.0

(C)

-200 A 0.0

1ooo.om=

Fig. 13. Step change with resistance load.

Fig. 12. (c) Expanded scale of Fig. 1 1 , in point C.

When the next absolute value of reference current is larger than the real-time reference current, the current AI,, during turn-on time must be larger than the current AI,,, during turnoff time, as shown in Fig. 10; otherwise the output current di,i- -V, sin wt of CCPI is insufficient to track the reference current. The (5) relationship can be examined by considering dc voltage Edi, dt Li carrier wave GTi,modulation wave I C ,and delay time Td of and in Fig. 9(d), T4 and D2 are turned on during t 4 to t5, the switch, which influence the current track. From Figs. 8 or during t4 to t5,d, the inductor current in the AT,,, or and 10, the instantaneous voltage of V,, sin wt is constant AT,ff,d time is the same as (5). during the period of turn-on and turn-off, since the frequency In Fig. 9(b), TI and D3 are turned on during t2 to t3, or during t2 to t3,d with Td,; now the inductor current in the AT,,, or AT,,,,, time is given by


IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 10, NO. 5, SE-MBER

554

vopsin w >

1995

(T) x

Li

(t3

-t2)

(7)

390v 1018.0

390 V

1329.01s

I

I

v,, sin w ( t4 +t57 ) >

-390 V 1323.0.~

1018.0

200 A

I

I

x

Li

(t5

-t4).

(8)

The above equations can be expressed repeatedly by

1 where

-200A

I

,

,

,

I

, 1328.0.~

1018.0

Then, let

ATon = KAT,,,. I.

(9) can be rewritten as (Edi -

200 A

(10)

.

v,, sin w t ) x

K >

vo,sin wt

(1 1)

and

K=

V,, sin-wt V,, sin wt

Edi -

For finding the maximum condition of K , (13) is obtained as

From (13), the worst condition happens when V,, sin wt = lVopl,to minimize flat-topping of the CCPI’s output current, so the minimum value of Edi is obtained 162

-200A

I

,

,

,

I

, 1328.0..

1078.0

Fig. 14. The expanding scale of Fig. 13 in point D.

of output voltage V, is much less than that of the equation can be expressed as

fs

IAIonl > IAIoffI. Then, from (4) and (3,(7) and (8) are obtained

where AT,, and AT,ff time are calculated for this condition of maximum value of carrier wave IC,sat (saturation value) as shown in Fig. 8. Then, K is obtained as

switch. So,

(6) where



555

m

I

390 V

390

-390

v

E

-390 v 0.0

4000 .O.t

390 V

F

I

I

10 . 0

I

390 V

VO

vo

v

-390

I

~

I 4000.0..

200 A

4000.0..

200 A

Io

IO

-200 A

-200 A

200 A

200 A

d

I,

I.

s

4000.0..

4

-200 A

*ooo .oms

200 A

I

7-

-390 v

-200 A

I

4OOO.O.s

Is1

4000. O m s

200 A

IS1

-200 A

-200 A

i

200 A

200 A

Is2

IS3 4

T,

-200 A

-200 A 0.0

6000.0n.

Fig. 15. The condition of utility faulty with resistance load.

Considering the delay time then K d

Td

=

of switch for safe operation,

~

10 . 0

4000.0m.

I

Fig. 16. The condition of utility faulty with rectifier load.

The relationship between and f i r i must be considered for calculating the dc voltage E d i , and the amplitude modulation ratio ma is defined as

f ,d Toff,d=Toff Ton,d

and

+Td

= T - T o f f ,d

IC,sat

ma = %Ti

when the ma 2 1, the dc voltage is properly determined with K = K d % CO, and when the ma < 1, the dc voltage can be determined (14) without considering delay time T d and by (16) when considering T d . For example, with ma < 1,


556

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 10, NO. 5, SEYEMBER 1995

7 1 I 390 V

390

Vi" ,

-39OVl

,

,

1

,

VO -39ov

VO

I

I

1884.0

200A

I

-390 V

2134.0..

1884.0

I

-39ov

2134.0..

I

1

I

2756.0

1006.0..

2756.0

3006.0..

8 Io

IO

-200 A

-200 A

I 1 -200A

2134.0..

1884.0

,

,

,

1

, 3006.0.~

1756.0

200 A

Is2

-

-200 A -200 IS2 A

k 3006.0.~

2756.0

(b)

switch frequency f s = 15 kHz, T = 1/2fS,Gri = 12 V, I s , s a t = 11.5 V, AT,, = 3.19.10-5 S, AT,,, = 1.389.10-6 S , K = 23, and E d > (1 1/23)IVop).With the delay time Td,Td = 3 . s, AT,, = 2.874 . S , AT,,, = 4.389. s, Kd = 6.6, and E d > (1 1/6.6)JVopJ. From Fig. 10, if the dc voltage Eii does not correspond to (16) with ma < 1, and the output current of CCPI can not successfully track the reference current I:i, and the VCPI unit will be added to supply the output current which is not supplied enough by the CCPI's, output voltage distortion will result.

+

+

VI. EXPERIMENTAL RESULTS

A single-phase 9 KVA experimental model including one VCPI and two sets of CCPI units was developed and tested. Experimental conditions are as follows: 1) Utility system input voltage V,, is 110 V 60 Hz, 2) VCPI output voltage V, is 110 V 60 Hz, 3) VCPI rated capacity is 3 KVA [one unit], 4) CCPI rated capacity is 3 KVA [two units], 5) dc voltage of VCPI is 200 V, 6) dc voltage of CCPI is 200 V,


~


557

Vin

390 v 0.0

250.0..

0.0

150.0..

390 V

VO

-390

v

200 A

I

I

IO

-200 A

I

250.0..

1

200 A

1, -200 A

200 A

IS1

I

J

17) Kcp = 40, 18) K,, = 7.556, 19) ~~~l = 0.0102, 20) ~~~2 = 1.1029, 21) ~~~2 = 0.068, 22) Tcz3 = 1.2132, 23) rCp3 = 0.068, 24) Inverter switching frequency is 15 kHz. The waveforms of voltages and output currents with the resistance load change is shown in Fig. 11, where Tcl and T,z are the turn-off delay times of CCPI-1 and CCPI-2, respectively. The CCPI-1 is turned on when the total current I, increases to the enable level of W I ,and the CCPI-2 is turned on when I, increases to enable level of W2. And, when the total current decreases to the disable level of Wz, the CCPI-2 is delayed a Tc2 time and is then turned off; the condition of turn-off is the same in the CCPI-1 with the delay time T,1. Fig. 12 shows the expanding scale of Fig. 1 1 in points A, B, and C. The step change of resistance load is shown in Fig. 13. Fig. 14 shows the expanding scale of Fig. 13 in point D. The condition of utility fault with resistance load is shown in Fig. 15, where T, is the delay time when the utility recovers. All the units are turned on when the utility system is faulty, and when the utility recovers, there is a delay time T, to affirm the utility system in the steady state; then, the control of the current distribution is recovered to the condition of the utility normal. The condition of utility faulty with rectifier load is shown in Fig. 16. Fig. 17 shows the expanding scale of Fig. 16 in points E and F. Fig. 18 shows each of the output currents when the dc voltage of CCPI is insufficient, and the output current of CCPI cannot track sufficiently.

s 150.0..

VII. CONCLUSIONS

The parallel operation of UPS for expanding its rated capacity by combining VCPI with CCPI is proposed. The VCPI unit is developed to obtain a constant output voltage, the CCPI units are used to trace the distributive current. In this scheme of combination VCPI and CCPI, the parallel operation can easily be expanded and implemented. The PLL circuit was not used in the CCPI units for synchronization; the CCPI can be operated in parallel following the frequency change of VCPI.

-200 A

200 A

Is2

-200 A 0.0

150.019

Fig. 18. The current track of CCPI in dc voltage insufficient condition,

7) L f = 2 mH, 8) C f = 14 uF, 9) L1 = 1.98 mH, 10) L2 = 1.98 mH, 11) K,, = 22, 12) Kuh = 0.095, 13) ~,,1 = 0.47 x lop3, 14) TVpl= 2.1 x 10-3, 15) ~ , , 2 = 2.42 x 16) r V p 2 = 3.267 x

REFERENCES [ 11 R. Chauprade, “Inverters for uninterruptible power supplies,” IEEE

Trans. Ind. Applicat., vol. IA-13, pp. 281-295, July/Aug. 1977. [2] T. Mizutani, T. Shimizu, K. Kuroki, and T. Hoshi, “Power transistorized unintermptible power supply,” IEEE Trans. Ind. Applicat., vol. IA-20, no. 4, July/Aug. 1984. [3] T. Kawabata and S. Higashino, “Parallel operation of voltage source inverters,” IEEE Trans. Ind. Applicat., vol. 24, no. 2, Mar./Apr. 1988. [4] J. Holtz, W. Lotzkat, and K. H. Werner, “A high-power multi transistorinverter unintermptible power supply system,” IEEE Trans. Power Electron., vol. 3, pp. 278-285, 1988. [5] S. Tamai and M. Kinoshita, “Parallel operation of digital controlled UPS system,” in IEEE IECON’91, pp. 326331. [6] K. Harada, “On the parallel operation of triport UPS system,” in Proc. INTELEC’M, Oct. 1985, pp. 11 1. [7] J. Reed and N. Sharma, “Large parallel UPS system utilizing PWM technology,” in Proc. Intelec Int. Telecommun. Energy Conj, New Orleans, 1984, pp. 282-289.


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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 10, NO, 5, SEPTEMBER 1995

[SI J. Holtz and K. H. Werner, “Multi-inverter UPS system with redundant load sharing control,” IEEE Trans. Ind. Electron., vol. 37, no. 6, pp. 506-513, Dec. 1990. [9] P. Dobrorolny, J. Woods, and P. D. Ziogas, “A phase-locked-loop synchronization scheme for parallel operation of modular power supplies,” in IEEE PESC, Conf Rec., 1989, pp. 861-869. [IO] J. F. Chen, C. L. Chu, and C. L. Huang, “The parallel operation of two UPS by the coupled-inductor method,” in ZEEE IE Conf: Rec., 1992, pp. 733-736. [ l l ] T. Kawabata, N. Sashida, and Y. Yamamoto, “Parallel processing inverter system,”IEEE Trans. Power Electron., vol. 6, no. 3, July 1991. (121 K. Sin and C. Q. Lee, “Current distribution control of converter connected in parallel,’’ in IEEE IAS Conf Rec., 1990, pp. 1274-1280. [13] D. M. Brod and D. W. Novotny, “Current control of VSJ-PWM inverters, ” in IEEE IAS Cons Rec., 1984, pp. 418-425. [141 D. M. Divan, “Inverter topologies and control techniques for sinusoidal output power supply,” in IEEE APEC’91, pp. 81-87. [15] -, “A new topology for single phase UPS systems,” in IEEE IAS Con$ Rec., 1989, pp. 931-936. [I61 P. D. Ziogas, S. Manias, and E. P. Wiechmann, “Application of current source inverters in UPS systems,” IEEE Trans. Ind. Applicat., vol. IA-20, no. 4, pp. 742-752, July/Aug. 1984. [17] D. M. Divan, T. G. Habetler, and T. A. Lipo, “PWM techniques for voltage source inverters,” IEEE PESC 1990, tutorial notes. [18] J. Holtz and S. Stadtfeld, “A predictive controller for the stator current vector of Ac machines fed from switched voltage source,” in JIEE IPEC-Tokyo Conf Rec., 1983, pp. 1665-1675. [I91 L. Malesani and P. Tenti, “A novel hysteresis control method for currentcontrolled voltage-source P W M inverters with constant modulation frequency,” IEEE Trans. Ind. Applicat., vol. 26, no. 1, Jan./Feb. 1990. [20] A. B. Plunkett, “A current controlled PWM transistor drive,” in IEEE IAS Conf Rec., 1979, pp. 785-792. [21] A. Nabas, S. Ogasawara, and H. Akagi, “A novel control scheme for current-controlled PWM inverters,” IEEE Trans. Ind. Appl., vol. IA-22, no. 4, 1986.

[22] P. Enjeti, P. D. Ziogas, J. F. Lindsay, and M. H. Rashid, “A novel current controlled PWM inverter for variable speed AC drives,” in IEEE IAS Con$ Rec., 1986, pp. 235-243. [23] Mohan, Underland, and Robbins, Power Electronics. New York: Wiley, 1990.

Jiann-Fuh Chen (S’79-M’8&S’8O-M’86)

was born in Chung-hua, Taiwan in 1955. He received the B.S., M.S., and Ph.D. degrees in electrical engineering in 1978, 1980, and 1985, respectively, all from National Cheng Kung University, Tainan, Taiwan. Since 1980, he has been with the Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan. His major interests are in power electronics and energy conversion. Dr. Chen is a member of the IEEE Power Electronics Society.

Chig-Lung Chu was born in Tainan, Taiwan in 1963. He received the B.S. in electrical engineering from the National Taiwan Institute of Technology in 1989. He received the M.S. degree from National Cheng Kung University, Tainan, Taiwan, in 1991 and is presently in the Ph.D. program. His major interests are in power electronics and power converters.


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