DEMUX - IEEE Xplore

On-Chip Dual-Stream DWDM Eight-Channel-Capable SOI-Based MUXs/DEMUXs With 40-GHz Channel Bandwidth Volume 7, Number 1, February 2015 S. Papaioannou D. Fitsios G. Dabos K. Vyrsokinos G. Giannoulis A. Prinzen C. Porschatis M. Waldow D. Apostolopoulos H. Avramopoulos N. Pleros

DOI: 10.1109/JPHOT.2014.2381639 1943-0655 Ó 2014 IEEE

IEEE Photonics Journal

MUXs/DEMUXs With 40-GHz Channel Bandwidth

On-Chip Dual-Stream DWDM Eight-Channel-Capable SOI-Based MUXs/DEMUXs With 40-GHz Channel Bandwidth S. Papaioannou,1,2 D. Fitsios,1,2 G. Dabos,1,2 K. Vyrsokinos,3 G. Giannoulis,4 A. Prinzen,5 C. Porschatis,5 M. Waldow,5 D. Apostolopoulos,4 H. Avramopoulos,4 and N. Pleros1,2 1

Department of Informatics, Aristotle University of Thessaloniki, 54124 Thessaloniki, Greece 2 Information Technologies Institute, Center for Research and Technology Hellas, 57001 Thessaloniki, Greece 3 Physics Department, Aristotle University of Thessaloniki, 54124 Thessaloniki, Greece 4 School of Electrical and Computer Engineering, National Technical University of Athens, 15780 Athens, Greece 5 Automatisierung Messtechnik Optik (AMO) GmbH, 52074 Aachen, Germany

DOI: 10.1109/JPHOT.2014.2381639 1943-0655 Ó 2014 IEEE. Translations and content mining are permitted for academic research only. Personal use is also permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

Manuscript received October 3, 2014; revised November 29, 2014; accepted December 5, 2014. Date of publication December 18, 2014; date of current version January 6, 2015. This work was supported in part by the European FP7 ICT projects PLATON and PHOXTROT under Contract 249135 and Contract 318240, respectively. Corresponding author: S. Papaioannou (e-mail: [email protected]).

Abstract: We demonstrate two 8
1 silicon ring resonator (RR)-based multiplexers (MUXs) integrated on the same chip for dual-stream 16-channel multiplexing/ demultiplexing applications. Cascaded second-order RRs equipped with microheaters were integrated on a silicon-on-insulator platform with the radii of MUX1 and MUX2 being 12 and 9
m, respectively. The resonances of the two MUXs were thermooptically tuned in order to achieve 100-GHz channel spacing, revealing a tuning efficiency of 43 and 36
W/GHz/RR for MUX1 and MUX2, respectively, and 352 mW total power consumption. Lower than 18 dB crosstalk and higher than 40-GHz 3-dB bandwidth was obtained for the tuned channels of the MUXs. The signal integrity when using these devices in multiplexing and demultiplexing operations was evaluated for a 4
10 Gb/s non-return-to-zero data stream (i.e., 10 Gb/s line rate) via bit-error-rate measurements, yielding error-free performance with up to 0.2 dB power penalty for all channels. Proofof-concept demonstration for supporting higher data rates was also realized by using three 100-GHz-spaced 25-Gb/s return-to-zero data signals (i.e., 25 Gb/s line rate) for multiplexing and demultiplexing via MUX2, resulting in error-free operation for all channels with lower than 0.3 dB power penalties. Index Terms: Dense wavelength-division multiplexing (DWDM), microring resonators, optical interconnects, silicon multiplexer, silicon-on-insulator (SOI).

1. Introduction Over the last several years, the growing need for high-speed data exchange between telecom networks has inevitably led to the use of long-haul optical communications [1] to overcome the limitations imposed by the electrical wires [2]. More recently, the ever-increasing demands for

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MUXs/DEMUXs With 40-GHz Channel Bandwidth

ultra-high aggregate bandwidth in data centers, as well as in high-performance computing systems toward reaching exascale computing by this decade's end have put the short-reach optical communications in the spotlight [3]–[5]. In order to harvest the advantages of optical interconnects in bandwidth capacity, crosstalk, latency and electromagnetic interference in all hierarchy levels [6], the optical technology has started to be introduced at shorter and shorter distances [7]–[10], starting from rack-to-rack [11], [12], and concluding to on-chip interconnections [13], [14]. Even at chip-scale optical interconnects and networks, the need for higher integration density and therefore higher data transmission capacity leads to the exploitation of the Wavelength Division Multiplexing (WDM) technique that is supported inherently by the optical technology [15], [16]. To this end, multiplexing (MUX)/demultiplexing (DEMUX) structures featuring low-cost integration, compactness, high throughput (via the number of channels and their pass band bandwidths), low crosstalk and low power consumption appear as an essential building block toward the implementation of high-performance on-chip optical interconnects. In this perspective, silicon photonics, as a well-matured, CMOS-compatible, cost-effective and chip-level interconnect technology platform, holds the credentials to meet these requirements [17]–[20]. Within this framework, various compact WDM MUX/DEMUX devices integrated on silicon-oninsulator (SOI) platform have been demonstrated during the last years, relying on different configurations. In particular, echelle gratings [21], [22] and arrayed waveguide gratings (AWGs) [22]–[24] have been fabricated exhibiting remarkable specifications in C and L bands with up to 32 channels, 200 GHz spacing and sub-mm2 footprint [24], even though such multiplexing structures typically tended to occupy large area to support many channels with dense spacing. Cascaded asymmetric Mach–Zehnder Interferometers (A-MZIs) serving as interleavers have been also presented, relying however on a full binary tree architecture with N stages for full demultiplexing of 2N channels [25], [26] that leads to subordinate scalability compared to other type of MUX devices (e.g., AWGs) [27]. Moreover, the realization of dense channel spacing comes at the expense of the device footprint, since the channel spacing is inversely proportional to the MZI length asymmetry [25]. On the other hand, wavelength-selective add/drop ring resonators (RRs) with a few
m bending radius [28], [29] can potentially provide improvements in the integration density and consequently appear as promising building blocks toward realizing ultracompact and high-performance MUXs/DEMUXs for chip-scale interconnects. Toward this direction, various cascaded silicon RR-based configurations have been proposed as MUXs/ DEMUXs for on-chip WDM applications [30]–[36]. In most cases, thermal tuning, which enables reconfigurability in center wavelength and channel spacing, is adopted as a simple and efficient way to deal with possible deviations in the effective refractive index of the Si waveguides that are caused by fabrication imperfections and environmental temperature changes. The power consumption required for thermal tuning is minimized by keeping the device footprint small. Following this rationale, four-channel MUX/DEMUX implementations based on cascaded singleRRs (1st order) have been demonstrated [30], [31], [35], [36] exploiting integrated micro-heaters for desired channel spacing down to 50 GHz but at the expense of relatively high optical crosstalk [31]. Lower crosstalk values in conjunction with dense channel spacing can be obtained by employing higher-order multiple-RRs that offer improvements in pass band or/and channel isolation [37], as presented in 2nd order RR-based filterbanks [32], [33]. However, in all these implementations, only one MUX/DEMUX device integrated on chip has been presented, being thereby capable of exporting/importing only one WDM stream and consequently offering operation at a single wavelength band, whereas the ratio of channel bandwidth to channel spacing has never been demonstrated to exceed 30% when dense channel spacing up to 100 GHz is required. Channels spaced by 100 GHz with higher than 30% bandwidth-to-spacing ratio have been reported only by means of a 3rd order RR-based MUX/DEMUX [34], which, however, results to additional complexity in terms of resonance fine-tuning and to stringent requirements with respect to ring uniformity. In this paper we present two 100 GHz-spaced eight-channel MUXs based on cascaded 2nd order tunable RRs for dual-stream multiplexing of 8 channels/stream with a 40% bandwidth-tospacing ratio. The two MUXs, comprising 32 RRs in total, are integrated on the same SOI chip

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MUXs/DEMUXs With 40-GHz Channel Bandwidth

Fig. 1. (a) Schematic layout and (b) microscope images of the fabricated 8
1 second-order RR based SOI MUXs along with the Ti micro-heaters, as shown by clear views of the MUX1 and a single second-order ring.

and offer different spectral band performance with dense channel spacing to support two different DWDM streams at the same time that can be used as input signals in a 2
2 switch for chip-scale routing applications [38]. All MUX drop resonances were successfully tuned, consuming 352 mW in total and exhibiting dense channel spacing (100 GHz), high channel isolation (18 dB) and wide bandwidths (40 GHz) appropriate for high data rate signals. The multiplexing and the demultiplexing performance of the fabricated devices was evaluated each time for a four-channel (non-return-to-zero) NRZ data stream at 10 Gb/s line rate by means of bit error rate (BER) measurements, performing error-free with up to 0.2 dB power penalty at 109 BER value for all channels. A three-channel return-to-zero (RZ) data stream at 25 Gb/s line rate was also utilized in order to study the signal degradation caused by an integrated device in both multiplexing and demultiplexing operations when wide-bandwidth signals are employed. In both operations, all channels performed error-free with up to 0.3 dB power penalty. The use of 17 pswide RZ data pulses suggests that the fabricated devices are capable of supporting NRZ data channels at higher rates up to 40 Gb/s without introducing significant signal degradation.

2. SOI MUX Layout Design and Fabrication A schematic layout of each one of the proposed MUXs is illustrated in Fig. 1(a), while Fig. 1(b) shows both MUXs integrated on the same chip. Every MUX comprises eight consecutive double RRs (second-order) that are coupled to a common waveguide (Through port) as well as to individual waveguides (Drop ports) corresponding to each channel. The concept of the two parallel RRs per channel stage was adopted to attain wider bandwidth and lower near-channel crosstalk compared to single RRs [37]. In this way, however, misaligned drop resonances are likely to occur for each channel due to small deviations in waveguide characteristics during fabrication. For this reason, micro-heaters for each RR are included in the present implementations, providing individual thermal tuning of the rings and thereby enabling the formation of well-shaped resonances with the desired channel spacing. Considering the limitations dictated by the available fabrication resolution and the maximum possible thermo-optical (TO) wavelength tuning of a ring, the second-order RRs of each MUX were clustered in two groups with two slightly different radii (R1, R2), following the circuit-level modeling presented in [38]. The design values for the MUX1 were R1 ¼ 12
m, R2 ¼ 11:7
m for the radii and 1 ¼ 0:33 (bus-to-ring), 2 ¼ 0:01 (ring-to-ring) for the power coupling coefficients corresponding to gap dimensions of g1 ¼ 170 nm and g2 ¼ 300 nm, respectively. Indicatively, the fitting curve for a 2nd order ring test structure with 12
m radius and the aforementioned coupling coefficient and gap values is presented in [39]. The respective values for the MUX2 were R1 ¼ 9
m, R2 ¼ 9:2
m, 1 ¼ 0:17, 2 ¼ 0:007, g1 ¼ 190 nm, g2 ¼ 380 nm. Also, the spacing between adjacent second-order RRs was large enough ð100
mÞ to prevent thermal crosstalk.

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Fig. 2. Drop resonances of (a) MUX2 and (b) MUX1 as manufactured without thermal tuning. (c) MUX2 and (d) MUX1 with thermal tuning.

The devices were fabricated on a commercially available SOI substrate with a 340 nm thick top silicon layer and a 2
m thick buried oxide (BOX) layer. The photonic waveguides (400 nm
340 nm Si rib waveguides with 50 nm slab), were defined by electron beam lithography (EBL) in the electron sensitive resist hydrogen silsesquioxane (HSQ). The structures were then transferred into the top silicon layer by a reactive ion etching (RIE) process based on a hydrogen bromide (HBr) chemistry. The EBL and the RIE process were especially tuned to reduce the waveguide sidewall roughness to achieve a low linear propagation loss. In addition, the photonic waveguides were treated with a special cleaning procedure to achieve a linear propagation loss of 2.4 dB/cm. The waveguides were then covered with a spin-on glass (SOG) to provide an electrical and optical cladding layer. Afterward, the micro-heaters were fabricated on top of the RRs for the TO functionalization of the MUX/DEMUX devices [see Fig. 1(b)]. For this purpose a 100 nm thick titanium layer was deposited on the sample and structured using a RIE process based on a boron trichloride (BCI3 ) chemistry to accurately structure the micro-heaters with a critical dimension of 1
m. To finalize the fabrication a 500 nm thick aluminum layer was deposited and wet chemically structured to define the electrical wiring to contact the micro-heaters. The heater-resistance values were measured to be about 3.3 k for MUX1 and 2.6 k for MUX2.

3. SOI MUX Characterization and Thermo-Optic Tuning The spectral responses of the eight drop resonances (D1-D8) for the fabricated SOI MUX1 and MUX2 devices before and after performing thermal tuning are depicted in Fig. 2. In particular, Fig. 2(a) and (b) present the drop resonances of MUX2 and MUX1 that were received within the 1550–1552 nm and 1557–1560 nm spectral bands before TO tuning, respectively. The free spectral ranges of the resonances corresponding to the 9
m-=9:2
m-ðMUX2Þ and 12
m-= 11:7
m-ðMUX1Þ rings were measured to be about 9.4 nm/9.2 nm and 7 nm/7.2 nm, respectively. In both MUXs, almost half of their resonances were well-shaped, while the rest of them had a double-peak shape due to geometrical discrepancies during fabrication between the two rings composing a second-order RR structure. Additionally, small deviations ðG 25 nmÞ in the ring radii led to drop resonances lying within a range of 2 nm, instead of the desired design of two 4-group resonances spaced by 3.2 nm. By applying the appropriate voltage to each micro-heater, well-shaped and 100 GHz spaced resonances were successfully formed for both MUXs, as shown in the spectra received after the TO tuning of MUX2 (see Fig. 2(c)) and MUX1 [see Fig. 2(d)]. In the MUX2 case [see Fig. 2(c)], a channel spacing between 90 GHz and 100 GHz was obtained for its drop resonances via the thermal tuning, where the maximum wavelength

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Fig. 3. Experimental setup for four-channel demultiplexing (I)/multiplexing (II) at 10 Gb/s channel rate using the integrated SOI MUX devices.

shifting of 4 nm was attained for D3. The measured 3-dB bandwidths of the tuned resonances ranged between 40 GHz (D1) and 50 GHz (D8) and the near-channel optical crosstalk values were found to be between 20 dB (D4) and 21.8 dB (D1). The average TO efficiency was 36
W/GHz/RR, resulting in a total power consumption of 142 mW for the TO tuning of MUX2. Regarding the thermal tuning of MUX1 [see Fig. 2(d)], the obtained channel spacing between its tuned drop resonances was found to be between 96 GHz and 104 GHz, where the maximum wavelength shifting (4.8 nm) was attained for D5. Moreover, about 2 dB higher optical crosstalk values (within the range of 17.8 dB for D1 and 20 dB for D8) between adjacent channels were received in this case compared to MUX2, as a result of the wider 3-dB bandwidths of its tuned resonances that ranged between 48 GHz (D3) and 65 GHz (D4). Considering that MUX1's average TO efficiency was found to be 43
W/GHz/RR, 210 mW were consumed to tune this device. Compared to other TO MUX implementations, the tuning efficiency was found to be lower for the same ring radii values [30], [33], [35]. Nevertheless, ultra-low tuning powers can be achieved if special thermal treatment (e.g., trenches) is adopted [31]. It should be noted that additional off-chip losses stemming from the measurement setup that led to reduced measured power levels were also included in this type of measurement. Apart from this, the measured spectra in Fig. 2 depict the relative power levels of the Drop resonances.

4. Experimental Setup and Results With 4
10 Gb/s NRZ Data Streams Fig. 3 shows the experimental setup (10 Gb/s NRZ channel rate) used to evaluate the demultiplexing (I) and multiplexing (II) performance of the two MUX devices integrated on the same SOI platform chip. For this purpose, four continuous wave (CW) laser sources emitting light at different wavelengths within the 1549–1554 nm spectral window (9 dBm output power per wavelength) were used each time. In particular, MUX2 was evaluated utilizing the wavelengths 1550 nm ð1Þ, 1550.65 nm ð2Þ, 1551.45 nm ð3Þ, and 1552.2 nm ð4Þ. In MUX1 evaluation, the employed 14 wavelengths were 1551 nm, 1551.75 nm, 1552.55 nm, and 1553.35 nm, respectively. In both cases, the four wavelengths were multiplexed into a single fiber via an AWG. The WDM signal was then modulated by a Ti:LiNbO3 Mach–Zehnder modulator (MZM) driven by a 10 Gb/s 2151 pseudo-random binary sequence (PRBS), leading to a 4
10 Gb/s NRZ data signal at its output. A high-power erbium-doped fiber amplifier (EDFA) was employed in order to amplify the incoming WDM data signal, providing 27 dBm output power. For data demultiplexing (I), the amplified signal was injected straight to the common port of the MUX device, resulting in four demultiplexed data channels ð14Þ. During MUX1 evaluation, the demultiplexed data channels were exported from its D3, D4, D8, and D5 drop ports, having the D3, D4, D8 resonances non-tuned and the D5 resonance TO tuned at 1553.35 nm. In the MUX2 case, the 1  4 channels appeared at its D7, D8, D3, and D1 drop ports, respectively, where again only the resonance of the last drop port (D1) was TO tuned (1552.2 nm). This approach was followed, since only one second-order ring resonator stage could be tuned at a time due to the absence of external electrical interfaces (e.g., packaging or wire-bonded printed circuit board)

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Fig. 4. (a)–(e)/(f)–(j) Spectral responses at the common and four drop output ports of MUX1/MUX2 for four channels in MUX and DEMUX operations.

which would have allowed the simultaneous control of all the MUX rings. Therefore, the above three non-tuned drop resonances of each MUX were selected instead of the remaining ones due to their spectral shape and position, defining in this way the wavelength values of the laser sources ð14Þ. Each output data signal exiting the chip was then amplified in a low-noise EDFA chain and finally fed into a photo-receiver that was connected to a 10 Gb/s BER tester. In the four-channel multiplexing experiment (II), two additional AWGs were employed before and after the chip, with the first AWG feeding the utilized drop MUX ports with the corresponding data channels and the second providing individual channel isolation for the receiver. Polarization controllers were used for the employed data channels before launching at the chip to ensure TM polarization conditions for all input light streams. Moreover, the access to the input and output optical ports of the chip was realized through the corresponding TM grating couplers by means of a fiber array. The total fiber-to-fiber losses of the MUX devices (after excluding 10 dB due to an on-chip 10–90 monitoring coupler from which the measurements were received) were found to be 18 dB(MUX2)/20 dB(MUX1) per channel in the 1549–1554 nm region, which are analyzed into approximately 10 dB for the grating couplers, 3 dB for the silicon propagation losses and 5 dB (MUX2)/7 dB (MUX1) for the integrated MUXs. These insertion loss values are quite increased compared to eight-channel Echelle grating, AWG and MZI implementations [21], [22], [25]. However, in RR-based approaches, the employed ring cavity may lead to lower performance [32], [34], whereas additional losses can be induced as a result of waveguide deviations due to imperfect fabrication process. This fabrication issue that caused the increased insertion losses in our MUX devices can be addressed in future fabrication runs. Fig. 4(a)–(j) illustrates the spectra obtained at the desired output ports of the integrated MUX1 and MUX2 devices, respectively, for multiplexing and demultiplexing of the corresponding four ð1  4Þ 10 Gb/s NRZ data channels. In particular, Fig. 4(a) shows the WDM data stream that exited the MUX1's common output port after the multiplexing of the four data signals via its D3, D4, D8, and D5 input ports, where the unequal power level of the channels originated from the different insertion losses, as shown by the spectral response of the drop resonance that was dedicated to each channel [see Fig. 2(b)]. By operating this device as demultiplexer, each one of the four data channels was received at the respective drop ports, as depicted by the corresponding spectra in Fig. 4(b)–(e). High channel isolation with lower than 24 dB optical crosstalk values was obtained for the demultiplexed channels 1, 3, and 4 at the D3, D8, and D5 output ports, respectively. However, the channel 2 [see Fig. 4(c)] revealed higher crosstalk (13 dB) due to the adjacent channel 1, as a result of the lower channel isolation provided by the D4 resonance along with the slightly smaller channel spacing between the operating wavelengths 1 and 2 of the respective laser sources. Regarding MUX2, the spectrum of the multiplexed four-channel data stream is shown in Fig. 4(f), imprinting the spectral profile of the employed drop resonances [see Fig. 2(a)] and thereby leading to larger differences in the channels' power level compared to Fig. 4(a). By using this device in demultiplexing experiment, high channel isolation with lower than 20 dB optical crosstalk values was obtained for all data channels [see Fig. 4(g)–(j)] owing to the adequate channel spacing between the employing drop resonances.

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Fig. 5. BER curves for four 10 Gb/s NRZ data patterns after (a)/(c) multiplexing and (b)/(d) demultiplexing via the MUX1/MUX2 device.

Fig. 6. (a) Experimental setup for three-channel multiplexing/demultiplexing at 25 Gb/s channel rate using the integrated SOI MUX2. Inset depicts the 3
25 Gb/s RZ data signal exiting the doubler. Spectral responses at the output port(s) of MUX2 after (b) three-channel multiplexing and (c)–(e) channel 1–3 demultiplexing.

Fig. 5 presents the BER curves obtained for the four 10 Gb/s 215  1 PRBS NRZ data signals in order to evaluate the SOI MUXs' effect on the signal integrity. Fig. 5(a) and (b) depict the BER measurements for the MUX1 structure being used in a multiplexing and demultiplexing configuration, respectively. Regarding the multiplexing operation [see Fig. 5(a)], error-free performance with negligible power penalties up to 0.1 dB (at 109 BER value) against the back-to-back (BtB) measurements was attained for all data signals, maintaining the signal integrity, as illustrated by the obtained clearly open eye diagrams (e.g., channel 2). The BtB configuration was implemented by replacing the SOI MUX under investigation with an AWG with 50 GHz 3-dB bandwidth and 100 GHz channel spacing. Similar results in terms of BER measurements and eye diagrams were received when operating this structure as demultiplexer [see Fig. 5(b)], where channel 2 exhibited the maximum power penalty (0.2 dB) due to the higher crosstalk value (13 dB) experienced in comparison with the other channels. In the case of MUX2, error-free operation with small negative power penalties (up to 0.25 dB) was attained for all data channels in the multiplexing experiment, suggesting in this case more efficient MUX spectral separation between adjacent channels of this SOI MUX compared to the AWG used in the BtB implementation. In data demultiplexing approach, almost identical BER curves were obtained, with each data channel performing error-free and yielding negligible power penalty ðG 0:1 dBÞ. In both the multiplexing and demultiplexing operations via the MUX2, open eye diagrams were also received for all data channels, as indicatively shown for channel 3 in the insets of Fig. 5(c) and (d).

5. Experimental Setup and Results With 25 Gb/s RZ Data Channels Apart from 10 Gb/s NRZ data signals, 25 Gb/s RZ data patterns were also utilized as input streams of an integrated SOI MUX, in order to assess its multiplexing/demultiplexing performance with data having quite wider 3-dB bandwidths, comparable to those of its resonances, and thereby to provide a proof-of-concept demonstration for supporting higher data rates (e.g., 40 Gb/s NRZ data channels). The experimental setup used for this purpose is shown in Fig. 6(a), employing three CW light beams at 1550 nm ð1Þ, 1550.65 nm ð2Þ, and 1551.4 nm ð3Þ, with 7 dBm output power per channel, to be launched at the appropriate input port(s) of

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Fig. 7. BER curves for three 25 Gb/s RZ data patterns after (a) multiplexing and (b) demultiplexing via the MUX2 device. Eye diagrams for channel 3 at 25 Gb/s (left) and 12.5 Gb/s (insets) are depicted also here.

MUX2. AWGs were employed along the experimental setup so as to provide the desired WDM data signal or individual data channels. An electro-absorption modulator (EAM) driven by a 12.5 Gb/s electrical clock signal was responsible for generating 17 ps-wide optical pulses, whereas the RZ data patterns were derived by driving a subsequent Ti:LiNbO3 MZM with a 12.5 Gb/s 27  1 PRBS. The 3
12.5 Gb/s RZ data stream was amplified by a high-power EDFA, resulting in 27 dBm output power. Before entering the MUX2, the WDM signal was imported in a split-delay-and-recombine fiber stage that was used as a PRBS data rate 2xmultiplier (doubler) to attain 25 Gb/s channel rate. After the pulse repetition rate multiplication, the 3
25 Gb/s RZ data signal was evaluated again under demultiplexing (I) and multiplexing (II) conditions via the fabricated SOI MUX2, using its D7, D8, and D3 drop ports and following the same rationale described in the previous section. A second EAM driven by the complementary 12.5 Gb/s electrical clock signal was employed after the chip, providing the appropriate demodulating window (i.e., 12.5 Gb/s 25 ps-wide clock pulses). In this way, each one of the 12.5 Gb/s RZ data channel was able to be detected by a 12.5 Gb/s BER tester at the receiver. Two-stage EDFAs along with OBPFs (1 nm and 3 nm) were utilized at the EAMs' output for amplification and noise rejection purposes, respectively, whereas optical delay lines (ODLs) were employed in order to synchronize suitably the data and clock patterns. The spectrum of the WDM data signal with 25 Gb/s channel rate that was generated by the 2x-multiplier and served as the input signal in both demultiplexing (I) and multiplexing (II) stages is shown as an inset of Fig. 6(a). The measured 3-dB bandwidth for each channel was about 40 GHz and the crosstalk values between channels 1–2 and channels 2–3 were 15 dB and 20 dB, respectively. In the multiplexing operation, the WDM signal was initially demultiplexed into its constituent wavelengths by means of an AWG and then each data channel was launched at the corresponding drop port of MUX2, resulting in the multiplexed signal's spectrum of Fig. 6(b). As it is shown, more than 25 dB MUX spectral separation between adjacent channels was achieved. Moreover, the central peak and the first side harmonics of each channel were preserved but the remaining spectral components were suppressed by more than 5 dB. When operating the device as a demultiplexer, the WDM signal exiting the doubler was fed into the common port of MUX2, leading to more than 20 dB channel isolation, as depicted in the corresponding output spectra of Fig. 6(c)–(e). Channel 3 exhibited the higher isolation (25 dB) as a result of the larger channel spacing (94 GHz compared to the 81 GHz spaced channels 1 and 2) and the position of the 2nd order RR (#3) within the MUX configuration, since light had already passed by RRs #8-#4. Fig. 7 presents the BER curves obtained for the 3 data channels in order to evaluate the MUX2's effect on the signal integrity in both the multiplexing and demultiplexing process. By using the fabricated device as multiplexer, similar BER measurements and error-free performance were received for all data channels [see Fig. 7(a)]. The maximum power penalty of 0.3 dB (at 109 BER value) against the BtB measurements was received for channel 3 due to the narrower bandwidth of the respective drop resonance. The BtB configurations were

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implemented according to the procedure followed in the 4
10 Gb/s MUX/DEMUX experiment. Indicative clearly open eye diagrams of channel 3 before the second EAM (25 Gb/s channel rate) as well as at the receiver (12.5 Gb/s channel rate) are also included as insets of Fig. 7(a), suggesting that there is no significant signal degradation when using the MUX2. However, 20 ps wide pulses were measured in both channel rates, implying a 3 ps widening of the pulses compared to their BtB counterparts, as it is clear from the respective eye diagrams. Regarding the other channels, lower than 1 ps pulse widening was observed. In case of data demultiplexing [see Fig. 7(b)], error-free performance with lower than 0.15 dB power penalty was attained for all data signals. Again clearly open eye diagrams were obtained in 25 Gb/s and 12.5 Gb/s channel rates, revealing 3 ps, 1.5 ps, and 0.5 ps pulse widening for channels 3, 1, and 2, respectively, owing to the bandwidth of the corresponding D3, D7, and D8 resonances.

6. Conclusion We have presented two 8
1 ring-based SOI MUXs/DEMUXs integrated on the same SOI platform. Each device comprised eight cascaded second-order RRs to attain wide pass band channels ð 40 GHzÞ with low near-channel crosstalk ( 18 dB) even for dense channel spacing (100 GHz). The desired channel spacing was achieved by TO tuning of the RRs, requiring 352 mW power consumption for the two devices. The multiplexing and demultiplexing performance of the integrated devices was evaluated by means of BER measurements by using WDM data streams with 10 Gb/s (NRZ), as well as with 25 Gb/s (RZ) channel rates, exhibiting error-free operation with up to 0.3 dB power penalty. The small signal degradation observed even for the narrow (17 ps) RZ data pulses, in conjunction with the aforementioned channel spacing, crosstalk and bandwidth values, render the proposed MUXs/DEMUXs capable to support the next requirements of optical interconnects in higher data rates.

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