Design and control of a three-phase active rectifier ... - IEEE Xplore

Design and Control of a Three-phase Active Rectifier Under Non-ideal Operating Conditions Marco Liserre and Antonio Dell’Aquila

Frede Blaabjerg

Department of Electrotechnical and Electronic Polytechnic of Bari Bari, Italy liserre(dellaqui)@poliba.it

Institute of Energy Technology Aalborg University Aalborg, Denmark [email protected]

Abstract - Industrial engineers face many non-ideal operating conditions in the design of the active rectifiers: too long computation time, presence of acquisition filters, ac phases unbalance, location of the grid voltage sensors after a dominant reactance and passive damping if an LCL-filter is used. The phenomena generated by these conditions are generally nonlinear. Hence the first step is to find out how much each of them affects the system’s overall performance. Then new rules for the tuning of the controllers can be developed on the basis of the analysis of the transient behavior and of the steady state harmonic content of the dc voltage and of the ac current. This procedure is developed in this paper through simulations and laboratory tests.

I. INTRODUCTION The harmonic stress on the grid caused by power electronic systems is limited by many design guidelines, recommendations and standards. Thus the converters that lower the effects on the grid are gaining more and more attention. Among them is the boost active rectifier (Fig. 1). It can absorb almost sinusoidal input current with a near unity power factor, working in both rectifying and regenerative mode, and it can control the dc voltage [1]. Thus the active rectifier is the preferred solution in applications such as drives that work frequently in regenerative mode like crane, elevator, centrifuge, braking of large inertia or wind turbine. However the field of applications of the active rectifier is limited by the cost of the hardware and of the software i.e. by the number of switches, by the switching frequency needed and by the control complexity required. The basic requirements of a good design can be fulfilled with a PI-based cascade control structure for the active and the reactive power. However, especially if moderate switching frequencies and little values of the passive elements are adopted, the performance of the system could considerable be decreased due to phenomena such as too long computation time, presence of acquisition filters, ac phase unbalance, position of the grid voltage sensors after a dominant reactance and presence of passive damping if an LCL-filter is used.

io Sa L, R

ea iag n

Sb

iC

a b

eb ibg

c

ec icg

iL

Sc

C

+ vo -

Sa

Sb

Sc

Fig. 1. Three-phase active rectifier with an L-filter.

Thus industrial engineers need precise criteria for the design and control of the active rectifier valid under the mentioned non-ideal conditions. First of all a too long computation time or the use of filters on the measured electrical quantities cause delays in the voltage and current loops resulting in higher overshoots and decrease of the tracking capability. These effects have never been studied in details in the active rectifier field. On the contrary it is well known that the grid unbalance causes even harmonics at the dc output and odd harmonics in the input current [2]. Some solutions have been studied such as the use of negative sequence in the reference current [3] that unfortunately leads to uncontrollability of the power factor or the use of two current controllers for positive and negative sequences [4] which also can create stability problems. The opposite situation in terms of harmonics (i.e. odd harmonics at the dc output and even harmonics in the input current) is caused by the placement of the grid voltage sensors after a dominant reactance. This can be the case of an LCLfilter based active rectifier. In fact the ac capacitor voltage is sensed to perform an active damping and then used also for the orientation of the dq-frame instead of the grid voltage in order to avoid the use of too many sensors [5]. If instead of an active damping, resistors are inserted in series with the capacitors to damp the LCL-filter. This can cause harmonics in the dc voltage and in the ac current and the change of the dynamics of the system.

This work has been realized with the financial support of the Italian Ministero della Istruzione, Università e Ricerca (CLUSTER 13).

All these non-linear phenomena are usually neglected in the tuning process of the PI-controllers that is usually done following the same criteria adopted for the electric drives [6].

0-7803-7420-7/02/$17.00 © 2002 IEEE

1181

 di d (t ) 1 − ωi q (t ) = − Rid (t ) + e d (t ) −   dt L  di (t )  q + ωi d (t ) = 1 − Ri q (t ) + e q (t ) −  dt L 

Thus the current loop (inner loop) that is common for the two applications is tuned following the "technical optimum" and the dc voltage loop (outer loop) is designed as the speed/torque loop, i.e. with the “symmetrical optimum”. The design is based on the assumption that the inner and the outer loops are decoupled. However, in the active rectifiers the non-ideal operating conditions, such as too long computation time, presence of acquisition filters, ac phase unbalance, position of the grid voltage sensors after a dominant reactance and presence of passive damping if a LCL-filter is used, lead to the generation of harmonics that make the inner and outer loops coupled. Moreover both the technical and symmetrical optimum are oriented to the optimisation of the dynamic performances that are crucial for electric drives but not so much for active rectifiers. Instead the minimisation of the ripple in the dc voltage and of the low frequency harmonics in the ac current are the main aims for the active rectifier. Thus new tuning rules capable to minimise the effects of the non-ideal operating conditions are needed for the active rectifier’s controllers. In this paper the non-linear phenomena and the tuning strategies for the controllers to reduce their negative influence on the system’s performance are detailed studied using computer simulations and laboratory tests. II. MODEL OF THE ACTIVE RECTIFIER The state of the rectifier is modelled by means of a switching space-vector defined with the switching functions p j (t ) (j = a, b, c): p(t ) = (2 3)( pa (t ) + α ⋅ pb (t ) + α 2 ⋅ pc (t ) )

With these assumptions the mathematical model of the system, if an L-filter on the ac side is employed, is given by: d i (t ) 1  1  = − Ri (t ) + e (t ) − p(t )v o (t ) dt L 2  d v o (t ) 1  3    =  Re  p(t ) i (t ) − i L (t ) dt C 4    ∨

1  p d (t )v o (t ) 2  1  p q (t )v o (t ) 2 

(3)

Eq. (3) shows how in the dq-frame the d and q differential equations for the current are dependent due to the crosscoupling terms ωiq(t) and ωid(t). Moreover (2) assumes the form of: d v o (t ) 1  3  =  p d (t )i d (t ) + p q (t )i q (t ) − i L (t ) dt C 4 

[

]

(4)

If instead an LCL-filter is used on the ac side the model can be modified as reported in [7]. III. CONTROL OF THE ACTIVE RECTIFIER The Voltage Oriented Control (VOC) of the rectifier is based on the use of the dq-frame oriented such as the d-axis is aligned on the grid voltage vector as shown in Fig. 2. The reference current d-component i*d is used to perform the dc voltage control while the reference current qcomponent i*q is controlled to obtain a unity power factor. The control structure is defined as “cascade” (Fig. 3). In the following the sampling period will be indicated with Ts. A. Current controller design The ac current controllers are designed on the basis of an average model of the L-filter based active rectifier. If there is a LCL-filter on the ac side the capacitor can be neglected [7] but the performances of the system with the LCL-filter and its passive or active damping should be verified.

q

β

(1)

i (t ) (2)

iq

where v (t ) , i (t ) and e (t ) are the space-vectors of the rectifier input voltage, current and grid voltage; i o (t ) , i C (t ) and i L (t ) are the rectifier output current, the capacitor current ∨ and the load current. The symbol “ ” indicates the complex conjugate. Eqs. (1)-(2) show that the system is non-linear and its behaviour depends on p (t ) . By considering a dq-frame that rotates at the angular speed ω, where ω = 2πf and f is the fundamental frequency of the power grid’s voltage waveform, (1) becomes:

id

ω e (t )

d α

Fig. 2. Voltage oriented control of the active rectifier in the dq frame.

v*o +

_

PI

i*d

_

id PI

+

vo

ωL ωL

0

*

i

q

+ _

iq

PI

ed ud + + vd,av +

uq _

vq,av

+ +

eq

Fig. 3. Basic scheme of a cascade controller for the active rectifier.

1182

The continuous switching vector, which components are the duty cycle of each converter leg −1 ≤ s j (t ) ≤ 1 (j = a, b, c), is defined as: s (t ) = (2 3)(sa (t ) + α ⋅ sb (t ) + α 2 ⋅ sc (t ) )

Moreover (3) can be linearized considering vo(t)=Vo with Vo constant, thus instead of the continuous switching vector the average converter voltage is used and (4) can be rewritten as:  R   1 d id (t ) − L ω  id (t ) − L   = + dt iq (t )  − ω − R  iq (t )  0 L   1    L 0  ed (t ) + 1  eq (t ) 0  L 

 0  v (t ) d , av 1   vq , av (t ) −  L

dvo (t ) 1  3  =  [Sd id* (t )] − iL (t ) C 4 dt 

(5)

To achieve the “technical optimum” (i.e. 5% overshoot) [8], the PI integrator time constant TI should be chosen equal to the plant time constant T and the constant kp: L 3Ts

In Fig. 5 the voltage control loop in the S-domain is reported, including the current loop transfer function and a PIcontroller that can be tuned following the “optimum symmetrical” [8]. Indicating with ωc the crossover frequency of the open loop transfer function and with ψ the phase margin at that frequency is:

a=

kP =

To have the two complex conjugate poles of the closed loop transfer function critically damped (a = 2.4):

+_

z −1

− kP

k P = 0.19 ⋅

C S d Ts

i G(z)

(10)

TI = 17 ⋅ Ts

Consequently the voltage loop’s bandwidth fbv is: f bv =

ωc 1 1 = ≈ 2π 6πaTs 50Ts PI

w _ +

(9)

TI = 3a Ts

B. Voltage controller design The dc voltage control is achieved through the control of the power exchanged by the converter. The increase or decrease of the dc voltage level is obtained taking more or less power from the grid in respect to what is required by the dc load, thus changing the value of the reference for the ac current control loops.

Ts )z − 1 TI z −1

4C 9aSd Ts 2

(7)

(1 +

(8)

1 + cosψ sinψ

where a is the parameter responsible both of the cross-over frequency and of the phase margin. Thus the controller’s parameters are:

(6)

1 1 f bi = ≈ 6πTs 20Ts

1 3aTs

ωc =

Consequently the current loop’s bandwidth fbi is:

i*

(7)

If a cascade controller is used the dc voltage control is performed through the selection of the input current value i*d(t).

Eq. (5) is linear. Once the compensation of the grid voltage is done and the current loops are decoupled, both control loops of active and reactive power appear as in Fig. 4, where w is the disturbance that takes into account all the neglected phenomena. The G(z) is the Zero Order Hold (ZOH) equivalent of the plant transfer function. This is justified by the fact that the Zero Order Hold is a suitable model of the analogue to digital conversion. The ZOH introduces half a sampling period delay that is the value that should be considered to be taken into account of the modulator influence.

kP =

The voltage loop is the outer loop and the current loops are the inner loops. These internal loops are designed to achieve short settling times. On the other hand, the main goals of the outer loop are optimum regulation and stability thus the voltage loop could be designed to be somewhat slower (5-20 times). Therefore, the internal and the external loops can be considered decoupled, and thereby, the actual grid current components can be considered equal to their references when designing the outer dc controller. Thus on the basis of the average version of (4) and considering the current equal to its reference value id(t)=i*d(t), iq(t)=i*q(t)=0 and sd(t)=Sd, sq(t)=Sq:

vo

*

+_

(11) current loop

 1   k P 1 + T Is 

1 1 + 3Ts s

iL _ +

plant

3S d 1 4 Cs

Fig. 5. Voltage control loop in the S-domain.

Fig. 4. Current control loop in Z-domain.

1183

vo

IV. NON-IDEAL OPERATING CONDITIONS The non-ideal operating conditions lead to the generation of harmonics that influence both the active rectifier’s input and output thus both ac and dc controls. Generally, these low frequency harmonics become particularly dangerous because the design of the loops is based on the hypothesis that they are decoupled, due to the difference in the time constants, and thus it is possible to linearise them. The current control loop is designed considering constant dc voltage due to the slowness of the voltage loop. Moreover, the load changes produce transients in the voltage loop suffering only a little the consequent transient of the current loop that is faster. However, low order harmonics contradict both of these considerations. In fact if the dc voltage has a low frequency ripple it can not be considered constant for the current loop design. In the following each of the considered phenomena will be analyzed. A. Delays The presence of delays in the control loops is quite common and can be caused by too long computation time or the presence of filters on the feedback signals. Generally, if a symmetrical PWM modulation is adopted the sampled currents during zero vector on-time are ripple-free. Thus the filters adopted on the currents are needed only to cut high frequency spikes and they introduce only little delays. On the contrary if the elaboration time of the algorithm takes more than one sampling period the modulator input can not be refreshed at the end of the period. Thus, if the system has been designed to refresh the duty cycle every sample period, one Ts more is introduced in the loop (Fig. 6). The effects are decrease of stability margin and increase of the overshoot.

Let’s introduce the switching functions: ∞

p a (t ) = ∑ Ama cos[ m(ωt + ϕ a )] m =1

∞ 2π   pb (t ) = ∑ Amb cos[ mωt − + ϕ b ] 3 m =1   ∞ 2π   pc (t ) = ∑ Amc cos[ m ωt + + ϕ c ] 3 m =1  

If the VSC is driven in order to generate balanced voltages then: Ama = Amb = Amc = Am

(12)

where the subscripts “p” and “n” address the positive and negative sequences of the electrical quantities. Starting from the positive and negative sequences in the input ac currents one can demonstrate the presence of even harmonics in the dc current that create even harmonics in the dc voltage. w

additional delay

i* +_

z

−1

z

−1

D(z)

_ +

i G(z)

Fig. 6. Current control loop with one delay more due to too long calculation time.

(14)

Moreover to have the maximum output dc voltage:

ϕ a = ϕb = ϕc = 0

(15)

Then the current fed by the VSC on the dc side is: io (t ) =

∨ 3   Re  p (t ) i (t )  = iop (t ) + ion (t ) 4  

(16)

where: ∨ 3   Re p (t ) i p (t )  4   ∨ 3   n io (t ) = Re p (t ) in (t )  4  

iop (t ) =

(17)

then substituting (12) and (13) in (16) and considering the effect of the interaction of the first harmonic of the switching function with the positive and negative sequences of the grid current: io (t ) = I o + I o 2 cos( 2ωt + ϕ n )

B. Grid unbalance The grid voltage unbalance can be modelled considering an inverse sequence in the grid voltages that generate an inverse sequence in the grid current. Balanced grid voltages and unbalance phase impedances can also cause this effect. Thus: i (t ) = i p (t ) + in (t )

(13)

(18)

where: Io =

3 2 A1 I p cos ϕ p 4

Io2 =

3 2 A1 I n 4

The second part of (18) is one of the most dangerous low frequency harmonics in io(t). This second harmonic comes from the interaction of the fundamental component of the switching vector p(t ) and the fundamental component of the inverse current. Assuming a linear dc load if the dc current io(t) has a second order harmonic also the dc voltage ripples at the same frequency: vo (t ) = Vo + Vo2 cos(2ωt + ϕ 2 )

(19)

However, the grid current is also a function of the dc voltage. The interaction of the fundamental component of the switching vector p(t ) with the second order harmonic of the dc voltage creates a third order harmonic in the reflected input voltage, which allows a third order (not zero sequence) harmonic current to flow into the grid.

1184

In fact the converter ac side voltage due to the first harmonic of the switching function: v a (t ) p = a1

1 vo (t ) A cos(ωt ) 2

v a (t ) p

a1

kP =

(21)

then the poles are again critically damped as shown in Fig. 7 and Fig. 8. Thus, a decrease of the current controller PI’s proportional gain gives good results.

The second part of (21) produces a third harmonic also in the grid current. C. Position of the grid sensors If the grid voltage that is used for the dq-frame’s orientation is measured after a not negligible reactance, the grid current produces a voltage drop. Consequently, a derivative action is inserted in the system leading to oscillations characterised by even harmonic content in the current and odd harmonic content in the dc voltage. D. Passive damping of the LCL-filter If an LCL-filter is used on the ac side, the use of a passive damping in series with the capacitors leads the poles of the current closed loop to be more damped thus the system suffers a slow down. Moreover, also a low frequency oscillation both in the ac current and in the dc voltage is produced. V.

L 5Ts

(20)

from (19) and (20): 1 1 = Vo A cos(ωt ) + Vo 2 A cos(3ωt + ϕ 3 ) 2 4

For example if a sample period delay more is present in the current loop, choosing: (22)

B. Effect of grid unbalance Grid unbalance effects are particularly heavy if reduced values of the dc side capacitor is used. Instead the ac side inductors values have less influence. An increase of the switching/sampling frequency can also decrease the effects of the unbalance. On the contrary once chosen the values of the passive elements of the system (especially of the dc capacitor C) and of the switching frequency, a good tuning procedure of the PI voltage controller can decrease the effects of the unbalance. With reference to the “symmetrical optimum” tuning procedure reported in Section III, a change of the parameter a and thus of the cross-over frequency and of the phase margin as defined in (8) does not give good results. More in detail a change of the parameter a results in a change of both the proportional and the integral gains as shown in (9).

ANALYSIS AND SIMULATION OF THE NON-IDEAL

1

uncompensated

WORKING CONDITIONS

The simulation models have been built using the Matlab® and the Simulink® Toolbox. The parameters of the system under investigation are reported in Table I. Two types of filter have been adopted on the ac side: • L-filter, 8 mH value, the tests with this configuration are indicated with “(L-system)”; • LCL-filter, a grid side inductance of 5 mH a converter side inductance of 3 mH and between them three capacitors of 2.2 µF star connected. The tests with this configuration are indicated with “(LCL-system)”. In the reported tests the sampling and switching frequencies are equal to 5 kHz and a double-edge modulation strategy is adopted. Tuning the controllers as reported in § III the bandwidth of the current loop is 250 Hz and the bandwidth of the voltage loop is 100 Hz.

0.5

0

-0.5

-1

compensated -1

-0.5

0

25

feedback

20

d current (A)

TABLE I. ELECTRICAL PARAMETERS OF THE SYSTEM Rated rms line to line voltage 380 [V] Rated power 4.1 [kW] Reference dc voltage 700 [V] Rated dc current 5.5 [A] DC Capacitor 500 [µF]

1

Fig. 7. Root locus of the current control loop (L-system) if there is one delay more. Uncompensated and compensated. 25

A. Effect of delays Some of the effects of delays can easily be compensated if the proportional gain of the PI’s current controller is modified. In fact the overshoot can be reduced at the price of a slower system.

0.5

15

15

10

10

5 0.08

feedback

20

0.1

0.12

time (s)

0.14

5 0.08

0.1

0.12

0.14

time (s)

(a) (b) Fig. 8. Simulated d-current step response (L-system) if there is one sample delay more (a) uncompensated and (b) compensated.

1185

C (23) Sd Ts it is possible to achieve a 30 % reduction of the dc voltage low frequency ripple at the price of an increase of the harmonic content of the ac current of 10-30 % (depending on the load level) as it is proven by the harmonic spectra of Fig. 9. In fact increasing the bandwidth of the voltage controller, the compensation of the dc oscillation is more effective but the voltage controller produces a d-reference current for the inner loop, affected by higher values of harmonics. Consequently, the active rectifier generates on its ac side three phase voltages, defined in (13), characterised by harmonics that interact with dc voltage’s ones producing other low order harmonics in the ac current such as the 5th. In conclusion if the aim is to reduce the voltage ripple, the voltage controller PI’s proportional gain should be increased. On the contrary if the aim is to reduce the low frequency harmonic distortion in the ac current, the voltage controller PI’s proportional gain should be decreased.

dc voltage (%)

Instead if only the proportional gain defined in (10) is increased to: k P = 0.48 ⋅

C. Effect of the position of the grid sensors The main effect is the creation of even harmonics in the grid current. A compensation is possible using a filter that introduces a time constant comparable with that of the reactance upstream the point of measure of the grid voltage such as to obtain a zero-pole cancellation. Fig. 10 shows the 2nd and 4th harmonics of the current due to the measurement of the grid voltage after a dominant reactance (in black) and the same harmonics if there is a filter on the grid voltage measurement. To reduce further the low frequency harmonic distortion in the ac current, the voltage controller PI’s proportional gain should be reduced.

dc voltage (%)

D. Effect of passive damping of LCL-filter Fig. 11 shows the root locus of the LCL-filter based system increasing the passive damping. A decrease of the voltage controller PI’s proportional gain reduces the low frequency harmonic distortion in the ac current. 0.4

0 0

1

2

3

4

5

6

7

8

0

1

2

3

4

5

6

7

8

grid current (%)

20 15 10 5 0

Harmonic order Fig. 9. Harmonic spectra of the dc voltage and of the grid current if there is a 10% unbalance in the grid voltages (black bars) and increasing the proportional gain of the dc voltage controller (white bars) (L-system).

0.4 0.2 0 0

1

2

3

4

5

6

7

8

0

1

2

3

4

5

6

7

8

grid current (%)

20 15 10 5 0

H armonic order

Fig. 10. Harmonic spectra of the dc voltage and of the grid current if there is a 3% reactance before the grid voltage’s measurement (black bars) and adding a filter on the measurement (white bars) (L-system). 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 -1

-0.5

0

0.5

1

Fig. 11. Root locus of the current closed loop for the LCL-filter system varying the damping from zero to the characteristic impedance of the capacitor at the resonance frequency (arrow direction).

E. Design example As an example of a system affected by some non-ideal conditions, an experimental set-up will be considered and described in the following session. This active rectifier adopts an LCL-filter on the ac side with a passive damping. Moreover, the grid voltage is measured after a 3 % reactance and in the system there is a 1 % unbalance. The decrement of the overall system’s performance due to all the studied phenomena is shown in Fig. 12: starting from the ideal conditions that allow almost constant dc voltage and sinusoidal input current and adding one by one all the nonideal phenomena, the system suffers a progressive increase of the dc voltage’s low frequency ripple and a non-sinusoidal input current. It is possible to see how the measurement of the grid voltage after a 3 % reactance, creates a q-current different from 0 because the dq-frame is not correctly oriented. In Fig. 13 are reported two possible solutions to the low frequency harmonic distortion in the ac current: to double the dc link capacitor or to reduce the dc voltage gain to one half. All the quantities reported in Fig. 12 and Fig. 13 are free by the switching ripple because they are sampled in the center at every switching period.

1186

20 10 0 -10 -20 0.26

0.265

0.27

0.275

0.28

q-current (A) d-current (A)

grid currents (A)

14

12

10

8

6 0.26 2

0.265

0.27

0.275

0.28

0.27

0.275

0.28

0

-2 0.26

time (s)

0.265

time (s)

ideal conditions 20

q-current (A) d-current (A)

14

grid currents (A)

12 10

10 0 -10 -20 0.26

0.265

0.27

0.275

0.28

time (s)

8 6 0.26 2

0.265

0.27

0.275

0.28

0.265

0.27

0.275

0.28

0.265

0.27

0.275

0.28

0.265

0.27

0.275

0.28

0 -2 0.26

time (s)

+ damping effects q-current (A) d-current (A)

grid currents (A)

20 10 0 -10 -20 0.26

0.265

0.27

0.275

0.28

14 12 10 8 6 0.26 2 0 -2 0.26

time (s)

time (s)

VI. EXPERIMENTAL RESULTS The laboratory set-up, which is shown in Fig. 14, consists of a commercial Danfoss inverter VLT® 3008 where the control card has been removed, a Siemens microcontroller SAB80C167 and an Analog Devices ADSP-21062 SHARC floating-point Digital Signal Processor. In Fig. 15 are shown the measured grid voltage, grid current and the grid current’s harmonic spectrum: the 3rd (not zero sequence) and 5th are due to a 2 % grid voltage unbalance; the 2nd and 4th are due to the measurement of the grid voltage after a 3 % reactance through a filter that partially compensates the effects as it was shown in Fig. 10. Moreover, these results have been obtained with a reduced dc voltage controller proportional gain as it was shown in Fig. 13. Moreover, in Fig. 16 it is reported the positive effect of the increase of the switching/sampling frequency on the overall system performance. The dc voltage has a reduced oscillation. Then Fig. 17 shows that at a reduced load the non-ideal conditions influence more the shape of the current waveform. In Fig. 18 the dynamic responses of the dc voltage and ac currents due to a load change from 33 % to 100 % rated load, are shown. It is clear as all the non-ideal conditions have been clearly individuated because there is a perfect agreement between the shapes of the electrical quantities that have been simulated and those which have been measured.

+ voltage measure after 3% reactance a 20

q-current (A) d-current (A)

14

grid currents (A)

12

d

10

10 0 -10 -20 0.26

0.265

0.27

0.275

0.28

time (s)

d

8 6 0.26 2

0.265

0.27

0.275

0.28

0.265

0.27

0.275

0.28

c

b

0 -2 0.26

b

time (s)

+ 1% voltage unbalance e

Fig. 12. Effects of non-ideal conditions for LCL-system. 20

q-current (A) d-current (A)

14

grid currents (A)

12 10

10 0 -10 -20 0.26

0.265

0.27

0.275

0.28

time (s)

8 6 0.26 2

0.265

0.27

0.275

a

0.28

filter

e

VLT 3008

b

e driving signal

c

i

0 -2 0.26

0.265

0.27

0.275

vo

0.28

time (s)

double dc capacitance 20

GRID

& enable

A/D CONVERTER

s/h

µc SAB80C167

q-current (A) d-current (A)

14

IRQ

grid currents (A)

12 10

10 0 -10 -20 0.26

0.265

0.27

time (s)

0.275

0.28

8 6 0.26 2

0.265

0.27

0.275

DSP ADSP 21062

0.28

0 -2 0.26

d CONTROLLER 0.265

0.27

0.275

0.28

Fig. 14. Controller set-up for active rectifier.

time (s)

half proportional gain of the PI-based dc controller

Fig. 13. Possible solutions to mitigate the non-ideal conditions.

1187

20

ea 20

10

grid current (%)

grid current (A)

20

ia

0 -10 -20 0

0.005

0.01 time (s)

0.015

0.02

15 10 5 0

0

1

2

3

4

5

harmonic order

Fig. 15. Measured grid voltage, grid current and its harmonic spectrum.

(5 kHz)

(6 kHz)

VII. CONCLUSION Many phenomena such as too long computation time, presence of acquisition filters, ac phase unbalance, position of the grid voltage sensors after a dominant reactance and presence of passive damping if an LCL-filter is used, have been proved, to cause bad dynamic behavior and high harmonic pollution of the input ac current and of the output dc voltage both in L-filter based and LCL-filter based active rectifiers. Hence, new tuning rules for the controllers have been proposed to optimize the system. In short the effect of delays due to filters or too long computational time lead to dangerous current overshoot that can be limited by a proper reduction of the current controller proportional gain; the effects of unbalance are an increasing ripple in the dc voltage that can be reduced by increasing the voltage controller’s proportional gain; the effect of the measurement of the grid voltage after a dominant reactance is low frequency harmonics in the grid current that can be compensated adding a proper filter on the grid voltage’s measurement. Generally, the reduction of the dc voltage’s proportional gain has the same positive effect of the increase of the dc voltage’s capacitor value on the ac currents. Thus different phenomena need different tuning solutions which sometimes contradicts each other. On the basis of the desired harmonic content of the grid current and of the maximum allowable ripple of the dc voltage it is possible to find an optimum trade-off.

(7 kHz)

(8 kHz)

Fig. 16. Measured grid currents (5 A/div) and dc voltage (14 V/div only ac component) at rated conditions varying the switchning frequency.

REFERENCES [1]

[2]

[3]

[4] 33% rated load

100 % rated load

Fig. 17. Measured grid voltage (86 V/div), grid, converter and input filter capacitor currents (5 A/div). 20

[5]

[6]

15 10 5

[7]

0 -5 -10

[8]

-15 -20 0.1

0.12

0.14

0.16

0.18

0.2

0.22

simulated

0.24

0.26

0.28

[9]

0.3

measured

Fig. 18. Grid currents (5 A/div) and dc voltage (14 V/div, only ac component) for a load step change.

1188

R. Wu, S. B. Dewan and G. R. Slemon: “Analysis of an ac-to-dc voltage source converter using PWM with phase and amplitude control”, IEEE Trans. on Ind. Applications, Vol. 27, No. 3, March/April 1991, pp. 355-364. L. Moran, P. D. Ziogas and G. Joos: “Design Aspects of Synchronous PWM Rectifier-Inverter System Under Unbalanced Input Voltage Conditions”, IEEE Trans. on Ind. Applications, Vol. 28, No. 6, Nov./Dec. 1992, pp. 1286-1293. A. V. Stankovic and T. A. Lipo: “A Novel Control Method for Input Output Harmonic Elimination of the PWM Boost Type Rectifier Under Unbalanced Operating Conditions ”, IEEE Trans. on Power Electronics, Vol. 16, No. 5, Sept. 2001, pp. 603-611. H-S. Song and K. Nam: “Dual Current Control Scheme for PWM Converter Under Under Unbalanced Input Voltage Conditions”, IEEE Trans. on Ind. Electronics, Vol. 46, No. 5, Oct. 1999, pp. 953-959. V. Blasko, V. Kaura, “A novel control to actively damp resonance in input LC filter of a three-phase voltage source converter”, IEEE Trans. on Ind. Applications, Vol. 33, No. 2, 1997, pp. 542-550. M. Liserre, “Innovative control techniques of power converters for industrial automation”, PhD Thesis, politecnico di Bari, Bari, Italy, December 2001, http://www-dee.poliba.it/dee-web/Ricerca/labconverter/staff/Liserre_files/PhD_thesis_Liserre.pdf. M. Liserre, F. Blaabjerg, S. Hansen: “Design and Control of an LCLfilter Based Active Rectifier”, Conf. Rec. 36th IAS Ann. Meeting, Chicago (USA), Sept./Oct. 30-4, 2001. W. Leonhard, “Control of electrical drives” Springer 1997 ISBN 3540593802. P. Enjeti , S. A. Choudhury, “A new control strategy to improve the performance of a PWM ac to dc converter under unbalanced operated condition” IEEE Trans. on Power Electronics, Vol. 8, No. 4, Oct. 1993, pp. 493-500.