design and implementation of memristor

DESIGN AND IMPLEMENTATION OF MEMRISTOR A Project and Thesis submitted in partial fulfilment of the requirements for the Award of Degree of Bachelor of Science in Electrical and Electronic Engineering

By

Md. Mydul Islam (ID: 143001010) Faysal Al Mahmud (ID: 143001011) Md. Mahfuj Ahmed (ID: 110101007)

Supervised by

MD. HASAN MARUF Senior Lecturer of EEE Green University of Bangladesh

DEPARTMENT OF ELECTRICAL AND ELECTRONIC ENGINEERING

FACULTY OF SCIENCE AND ENGINEERING

GREEN UNIVERSITY OF BANGLADESH March 2018

Certification This is to certify that this project and thesis entitled “Design and Implementation of Memristor” is done by the following students under my direct supervision and this work has been carried out by them in the laboratories of the Department of Electrical and Electronic Engineering under the Faculty of Science and Engineering of Green University of Bangladesh in partial fulfilment of the requirements for the degree of Bachelor of Science in Electrical and Electronic Engineering. The presentation of the work was held on 28 March 2018.

Signature of the candidates

_____________________ Name: Md. Mydul Islam ID #: 143001010

________________________ Name: Faysal Al Mahmud ID #: 143001011

________________________ Name: Md. Mahfuj Ahmed ID #: 110101007

Countersigned

__________________________ Md. Hasan Maruf Senior Lecturer, Department of Electrical and Electronic Engineering, GUB Page 2 of 66

The project and thesis entitled “Design and Implementation of Memristor,” submitted by Md. Mydul Islam, ID No: 143001010, Faysal Al Mumud, ID No: 143001011, and Md. Mahfuj Ahmed, ID No: 110101007, Session: Spring 2018 has been accepted as satisfactory in partial fulfilment of the requirements for the degree of Bachelor of Science in Electrical and Electronic Engineering on 28 March 2018.

BOARD OF EXAMINERS

____________________________ Prof. Dr. Md. Fayzur Rahman Dean, Faculty of the Science and Engineering Chairperson, Department of Electrical and Electronic Engineering Green University of Bangladesh

____________________________ Md. Hasan Maruf Senior Lecturer Department of EEE, GUB

Supervisor

____________________________ Khan Rahmat Ullah Assistant Professor Department of EEE, GUB

Internal Member

____________________________ Prof. Dr. Md. Fayyaz Khan Pro Vice Chancellor Green University of Bangladesh

Internal Member

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Dedicated to

Our Parents

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CONTENTS List of Tables

viii

List of Figures

ix

List of Abbreviations

xi

List of Symbols

xi

Acknowledgment

xii

Abstract

xiii

Chapter 1:

INTRODUCTION

1.1

Introduction

14

1.1.1

Motivation

15

1.2

Objectives

16

1.3

Challenges and Limitations

17

1.4

Paper Outline

17

1.5

Conclusion

17

Chapter 2:

14-17

LITERATURE REVIEWS 18-25

2.1

Introduction

18

2.2

Framework

18

2.3

Research Reviews

19

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Chapter 3:

THE MEMRISTOR

26-30

3.1

Introduction

26

3.2

Memristor

26

3.3

Working Principle

27

3.4

Analogy

29

3.5

Conclusion

30

Chapter 4:

MEMRISTOR MODELING

31-41

4.1

Introduction

31

4.2

Models

31

4.2.1

Linear Ion-Drift Model

31

4.3

Window functions

34

4.3.1

Strukov et al

34

4.3.2

Benderli

34

4.3.3

Joglekar

35

4.3.4

Biolek

36

4.3.5

Prodromakis

36

4.3.6

Picewise

37

4.3.7

TEAM

38

4.4

Comparison of window function

40

4.5

Conclusion

41

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Chapter 5:

LOGIC FAMILIES

42-47

5.1

Introduction

42

5.2

Memristor Ratioed Logic

42

5.3

Imply

44

5.3.1

Fundamental Operations – IMPLY, FALSE

44

5.4

Magic

46

5.4.1

Magic Gates

46

5.5

Conclusion

47

Chapter 6:

SPICE DESIGN AND IMPLEMENTATION

6.1

Introduction

48

6.2

MRL

48

6.2.1

Input sequence

48

6.2.2

Gates

49

6.3

Dynamic Hazard

54

6.4

Conclusion

56

Chapter 7:

CONCLUSION

7.1

Conclusion

57

7.2

Future Work

57

8

57-58

References

59-64

Appendix

65-66

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LIST OF TABLES Table

Table Caption

Page No

2.3

The history of the research.

19

4.3

Some intuition for the most of the model parameters

40

4.4

Comparison on Parameter Value

41

5.3.1.a

The truth table for logical implication.

44

5.3.1.b

The summarises of the analysis performed.

45

The summarised result of Kvatinsky’s

46

5.4

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LIST OF FIGURES Figure

Figure Caption

Page No

1.1 A symbol of Memristor.

14

1.1.1 Application of Memristor.

15

3.2.a The basic circuit element.

26

3.2.b The memristor symbol

27

3.3 Memristor switching behaviour

29

3.4 Flow of water through a pipe

29

4.3.3 Hysteresis curve of the Joglekar window function in LTspoce

35

4.3.4 Hysteresis curve of the Biolek window function in LTspoce

36

4.3.5 Hysteresis curve of the Prodromakis window function in LTspoce

37

4.3.6 Hysteresis curve of the Piecewise window function in LTspoce

37

4.3.7 Hysteresis curve of the TEAM window function in LTspoce

39

5.2.a A 2 input And gate

42

5.2.b A 2 input OR gate

42

5.2.c 2 input And gate

43

5.2.d 2 input OR gate

43

5.3.1 A Memristor based Imply gate arranged in crossbar form.

44

5.4.1 A Magic Gates.

46

6.2.1 The input sequence of voltages

49

6.2.2.a MRL2-input AND Gate with no load

49

6.2.2.b MRL 2-input OR Gate with no load

50

6.2.2.c The output of 2-input AND Gate

50

6.2.2.d The output of 2-input OR Gate

51

6.2.2.e CMOS inverter.

51

6.2.2.f MRL 2-input OR and NOR Gate

52

6.2.2.g The output curves of OR and NOR Gates

52

6.2.2.h MRL 2-input AND and NAND Gate

53

6.2.2.i The output curves of AND and NAND Gates

53

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6.2.2.j MRL 2-input XOR Gate with no load

54

6.2.2.k The output of 2-input XOR Gate

54

6.3 The Hazards are investigated for AND nd NAND gates

55

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ABBREVIATIONS AND SYMBOLS 𝐶𝑀𝑂𝑆

Complementary Metal Oxide Semiconductor

𝑀𝑅𝐿

Memristor Ratioed Logic

𝑀𝐴𝐺𝐼𝐶

Memristor Aided LoGIC

𝑃𝐿𝑀𝐴

Programmable Logic Memristor Array

𝑇𝐸𝐴𝑀

ThrEshold Adaptive Memristor model

𝐵𝐶𝑀

Boundary Condition Memristor model

𝐷𝐴𝑄

Data Acquisition Device

𝑉𝐼

Virtual Instrument

𝑅𝑜𝑛

Memristor ‘on’ state (low) resistance. Represents logic level 1.

𝑅𝑜𝑓𝑓

Memristor ‘off’ state (high) resistance. Represents logic level 0.

𝑉𝑜𝑛

Voltage threshold for ‘on’ switching

𝑉𝑜𝑓𝑓

Voltage threshold for ‘off’ switching

𝑖𝑜𝑛

Current threshold for ‘on’ switching

𝑖𝑜𝑓𝑓

Current threshold for ‘off’ switching

𝑉𝑧 𝑉𝑠𝑒𝑡

Denotes high impedance output mode of voltage driver used for Implication and MAGIC The negative voltage applied across the memristor to set the state to logic 1

𝑉𝑐𝑙𝑒𝑎𝑟

The positive voltage applied across the memristor to clear the state to logic 0

𝑉ℎ𝑖𝑔ℎ

Denotes the voltage level used for logic high for the MRL gates and PLA. 0V is used for logic 0.

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ACKNOWLEDGEMENT

First of all, we give thanks to Allah or God. Then we would like to take this opportunity to express our appreciation and gratitude to our project and thesis supervisor Md. Hasan Maruf, Senior Lecturer of Department of EEE for being dedicated in supporting, motivating and guiding us through this project. This project can’t be done without his useful advice and helps. Also thank you very much for giving us opportunity to choose this project. We also want to convey our thankfulness to Prof. Dr. Md. Fayzur Rahman, Dean and Chairperson of the Department of EEE for his help, support and constant encouragement. Apart from that, we would like to thank our entire friends for sharing knowledge; information and helping us in making this project a success. Also thanks for lending us some tools and equipment. To our beloved family, we want to give them our deepest love and gratitude for being supportive and for their inspiration and encouragement during our studies in this University.

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ABSTRACT

In the recent history of electronics industry, Nano scale devices took a major leap through the invention of the physical memristor device in 2008 by Hewlett Packard Labs. These are considered to be novel devices finding extensive applications in the field of semiconductor memory integration and development. There are various design styles for designing digital logic such as MRL, IMPLY, MAGIC. In this paper, the logic gates, which are the most basic digital design units, has been developed using MRL (Memristor Ratioed Logic) design style. Then we use hybrid CMOS technology with memristor cell for implementing universal logic gates whose resistance is set based on the input signals that generalizes the operational regime for NAND and NOR functionality. Building on the same principle, we develop a XOR logic, which is comparable with CMOS implemented XOR gate.

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CHAPTER 1 INTRODUCTION 1.1 Introduction According to classical electrical circuit theory, there are three fundamental passive circuit elements: the resistor, the inductor and the capacitor. Back in 1971, Chua (1971) challenged this established perception. He realized that only fiveout of the six possible pairwise relations between the four circuit variables (current, voltage, charge and voltage flux) had been identified. Based on a symmetry argument, he postulated mathematically the existence of a fourth basic passive circuit element that would establish the missing link between charge and voltage flux. The postulated element was named the memristor because, unlike a conventional ohmic element, its instantaneous resistance depends on the entire history of the input (voltage or current) applied to the component (Oster & Auslander 1972; Oster 1974) [1]. Hence, the memristor can be understood in simple terms as a nonlinear resistor with memory.

Fig. 1.1 A symbol of Memristor. Chua & Kang (1976) and Chua (1980) generalized this concept to a broader family of nonlinear dynamical systems, which they termed memristive, and demonstrated their usefulness in the modelling and understanding of physical and biological systems such as discharge tubes, the thermistor or the Hodgkin–Huxley circuit model of the neuron. Although in the intervening years, experimental devices with characteristics similar to the memristor (i.e. hysteresis, zero crossing and memory) were investigated [2], researchers generally failed to associate or explain them in the context of memristive systems.

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1.1.1 Motivation This paper explores the design and implementation of logic gates using memristor. The motivation for using memristors in logic and memory stems from the fundamental advantages they have the potential to offer: 1. Memristors has a good scalability with some current devices already down to a few nanometres. Moreover, this characteristic opens a new roadmap for semiconductor technology. 2. As transistors scale down their leakage current increases. A large portion of power consumption in a modern commercial processor is can be due to leakage current. Parts of the processor are actually powered down when not in use to counteract this. In contrast, a memristors performance improves with scaling and there is possibility for zero static power consumption for some logic families. 3. Some memristors can switch states with low energy like Pico joules or less. 4. They are non-volatile thus providing greater resilience to power interruptions, and possibility of almost zero boot times for computers. Note that this is not characteristic of all practical memristors. For some devices, the state decays in a period that ranges from milliseconds to weeks depending on the type. 5. Some can be compatible with CMOS technology in terms of both voltage levels and the production process.

Application Analog

Digital

Chaotic Circuits

Cellular Computatio n

Configurable Circuits

Cellular Nonlinear Network

Neuromorphic Circuits

Configurable Circuits

Binary Switches

Memory

Phased Array Antennas

Amplifiers

Filters

Brain Tasks Emulation

Image Processing

Multiplexing

Routing

Binary, Multistate

Fig 1.1.1 Application of Memristor.

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1.2 Objectives The aim of this project is to investigate the ability for memristors to perform binary digital logic. To date, various logic families have been investigated through both theoretical analysis and simulation. However, there exist significant gaps in research. For example, models with voltage thresholds have not fully been investigated even though many practical devices exhibit voltage threshold like behaviour. Additionally, little research has been published on logic simulations which use memristor models which have been fitted to practical data. Although many papers show promising simulation results for some logic families in terms of speed, power and chip area, it is difficult to accept them due to lack of physical meaning, i.e. the models parameters used could represent a device which may not exist now or even in the future. [3] Note that this is not always the case, for example, Kyoungrok et al. use a fitted model to investigate hybrid CMOS architectures. However, there is scope to expand on this by investigating other families and logic circuits. [4] Finally, little to no research has been published on practical implementations of non-trivial logic, and this type of investigation is one of the main goals of this project. This is because although simulations are useful, they are limited for three main reasons: 1. No perfectly accurate model exists since the precise physics and dynamics of memristors are not yet fully understood. 2. The most accurate models are computationally expensive meaning accurate and long simulations of complex designs are not feasible. 3. Simulation can never fully capture real world physics due to assumptions and simplifications. For example variability between devices, or parasitic capacitances due to neighbouring tracks, or temperature effects. The ultimate goal for this project is to design and implement a non-trivial logic circuit using multiple gates such as an half adder; something which has never been done before to the writers best knowledge. To achieve this, various logic families first need to be investigated, and basic logic gates need to be analysed. Simulation will be used to broaden understanding and help with the practical implementation so various models will be also investigated and used for simulation based analysis.

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1.3 Challenges and Limitations The main limitation, which resulted in the failure of the ultimate goal of this project, was the unavailability of the devices. Although many titanium dioxide memristive devices were available on a wafer, inability to construct the probing card and unsuccessful bonding attempts meant the practical investigation and implementation of this project was hold.

1.4 Paper Outline This report opens with the background section, which more formally introduces memristors and memristive systems. A brief background of practical devices, in particular HP’s TiO2 popular device, is then presented. The next section shows the introduction of memristor and analysis of fundamental working principle of memristor. An analogy is presented here for understang the memristor. Sections 4 and 5 concern the modelling aspect of memristors. Various window functions and mathematical models are investigated and among them the TEAM one is selected for PSpice implementation [5]. A comparative study of window functions is specifically described in section-4. Section 6 attempts design of Memristor Ratioed Logic gate: AND, OR, NAND, NOR circuit, using memristor and CMOS. XOR gate is also implanted using the OR gate and CMOS [6]. The reasons of dynamic hazard are sorted out. Therefore, an evaluation is performed instead based on information gathered during research and simulation.

1.5 Conclusion This chapter construct with basic and introductive descriptions of memristor. In this chapter explores the brief of design and implementation of logic gates using memristor. The motivation for using memristors in logic and memory stems from the fundamental advantages. In the part of objective, described various logic families with investigated through both theoretical analysis and simulation of memristor. This chapter also a brif of some challenges and various limitations of memristor implementation and application. With memristive systems and background of practical devices are developed in paper outline. Basically, this part is a basic introduction of memristor. Page 17 of 66

CHAPTER 2 LITERATURE REVIEW 2.1 Introduction Around four decade ago, Leon Chua published his paper about memristor. However, some other scientists, already studied the concept of a resistor with some memory characteristics. Chua was the one to establish a more accurate connection on his findings. In this section, a short introduction on memristor history is given, and after that a perspective of the research that has been conducted on memristor research over the past 50 years is discussed more in detail.

2.2 Framework During the 1960's, Professor Leon Chua, who was then at Purdue University, established the mathematical foundation for nonlinear circuit theory. This work was the basis for his classic 1969 textbook Introduction to Nonlinear Network Theory as well as a large number of papers he has published in refereed journals [7]. He became very well-known because of this work. And it led to his recruitment to the faculty of the Electrical Engineering and Computer Science department of UC Berkeley and a large number of awards, including the IEEE Gustav Robert Kirchhoff Award, nine other major awards from IEEE and other scholarly organizations, 9 honorary doctorates at major universities around the world, and numerous visiting professorships [8]. In his IEEE biography, he is acknowledged as the father of nonlinear circuit theory and cellular neural networks (CNN). Because of his work on nonlinear circuit elements, Chua made an interesting observation. For traditional linear circuits, there are only three independent two-terminal passive circuit elements: the resistor R, the capacitor C and the inductor L. However, when he generalized the mathematical relations to be nonlinear, there was another independent differential relationship that in principle coupled the charge q that flowed through a circuit and the flux φ in the circuit, dφ = M dq, that was mathematically different from the nonlinear resistance that coupled the voltage v to the current i, dv = R di [9]. As a strictly mathematical exercise, he explored the Page 18 of 66

properties of this potentially new nonlinear circuit element, and found that it was essentially a resistor with memory – it was a device that changed its resistance depending on the amount of charge that flowed through the device, and thus he called this hypothetical circuit element M a memristor. In other words, the mathematical relationship between flux and charge could be the result of some other cause – any mechanism that led to the constraint embodied by the equation dφ = M dq would lead to a device with the properties of a memristor [10]. He published these initial findings essentially as a curiosity – it was not obvious at that time that such a circuit element existed. However, some people (as I did at first) have taken this paper too literally and thought that a memristor must involve a direct interaction of a charge with a magnetic flux – in fact, there was no such requirement or restriction in the memristor definition. This issue was made much clearer in a second paper published with his then student Sung Mo Kang L. O. Chua & S. M. Kang, Memristive devices and systems, Proc. IEEE 64, 209-223 (1976) [11]. This study was a critical generalization of the simple memristor concept of the first paper, but it has not been cited with the frequency of the 1971 paper, so fewer people are aware of its implications. Chua and Kang introduced the fact that a 'memristive device' has a state variable (or variables), indicated by w, that describes the physical properties of the device at any time. A memristive system is characterized by two equations [12]. The 'quasi-static' conduction equation that relates the voltage across the device to the current through it at any particular time, v = R(w,i) i, and the dynamical equation, which explicitly asserts that the state variable w is a time varying function f of itself and possibly the current through the device, dw/dt = f(w,i). Neither the flux φ nor the charge q appears in either of these two equations, but it is relatively 'easy to show' that if both R and f are independent of the current i, the two equations reduce to the original definition of a memristor [13].

2.3 Research Reviews The history of the research that has been done based on the time-line is listed in the following: Table 2.3 The history of the research. 1960

Bernard Widrow

He developed “memistor”; a three terminal circuit element in which the

(From Stanford

resistance of the “memistor” was controlled by the charge. This element

University)

Page 19 of 66

was the basic building block of ADALINE (ADAptive Linear NEuron) which was a neural network architecture. [14] 1967

J. G. Simmons &

In their paper, "New conduction and reversible memory phenomena in

R. R. Verderber

thin insulating films", observed hysteretic resistance switching in a silicon oxide thin film that was injected with gold ions. They suggested that electron trapping is the reason of this phenomena. [15]

1968

F. Argall

He published a paper entitled “Switching phenomena in titanium oxide thin films”. The results he got were somehow similar to those Williams got for the HP Labs memristor. [16]

1971

1976

Leon Chua

He mathematically postulated that based on the relations between the

(From University

four fundamental circuit variables and the symmetry, there should exist

of

another circuit element that relates the charge and flux. He published

California

an article with the title of “Memristor - the missing circuit element” in

Berkeley)

IEEE Transactions on Circuit Theory.

Leon Chua &

Leon Chua and his student Sung Mo Kang generalized the theory of

Sung Mo Kang

memristors and memristive circuits, in their paper “Memristive devices and systems” published in IEEE Proceedings.

1986

1990

Robert Johnson &

They received U.S. Patent 4,597,162 for describing the manufacturing

Stanford

process of a reconfigurable resistance switching array based on phase

Ovshinsky

changing materials.

S. Thakoor,

They published a paper in the Journal of Applied Physics entitled

A. Moopenn,

"Solid-state thin film memistor for electronic neural networks" [17],

T. Daud &

and developed a tungsten oxide variable resistor that was electrically

A. P. Thakoor

reprogrammable. But it is not clear that whether this device has any relation with Chua's memristor or not. Even Chua's paper is not cited in the references.

1993

Katsuhiro

They received U.S. Patent 5,223,750 [18] for describing an artificial

Nichogi,

neural function circuit that was created using two terminal organic thin

Akira Taomoto,

film resistance switches. Although nothing was mentioned about the

Shiro Asakawa &

memristor, still there were some similarities in terms of properties.

Kunio Yoshida (From the Matsushita Research Ins.)

Page 20 of 66

1994

F. A. Buot &

They published the article entitled "Binary information storage at zero

A. K. Rajagopal

bias in quantum-well diodes" and described current-voltage characteristics which was similar the memristor I-V curves in AlAs/GaAs/AlAs quantum well diodes. But again no relation to Chua's paper was found [19]. The authors were not aware of Chua's paper at the time.

1998

Michael Kozicki & On June 2nd, they received U.S. Patent 5,761,115 for presenting the William West

Programmable Metallization cell. The device consisted of an ion conductor between two or more electrodes, where the resistance or capacitance of the ion conductor can be programmed via the growth and dissolution of a metal "dendrite". Despite some similarity to the memristor, there is no connection mentioned.

2000

A. Beck,

In July 3rd, the researchers at IBM Research Lab in Zurich published

J. G. Bednorz,

an article entitled "Reproducible switching effect in thin oxide films for

Ch. Gerber &

memory applications" in Applied Physics Letters [20]. They reported

C. Rossel,

resistance switching behavior in thin oxide films that was

(FromIBM

reproducible.The resulting hysteresis characteristic was similar to

Research Lab in

memristor,without pointing out the relation to memristor

Zurich) 2000

Philip Kuekes,

In October 3rd, researchers at HP Labs received U.S. Patent 6,128,214

Stanley Williams

(assigned to HP) [21] and described a two terminal nonlinear resistance

&

switch as a rotaxane molecular structure of a nanoscale crossbar. Once

James Heath

again, no relation to memristor was mentioned.

(From HP Labs) 2001

Shangqing Liu,

They, in the article "A New Concept for Non-Volatile Memory: The

NaiJuan Wu,

Electric Pulse Induced Resistive Change Effect in Colossal

Xin Chen &

Magnetoresistive Thin Films" [22], showed that oxide bi-layers are

Alex Ignatiev

very important in achieving high-to-low resistance ratio. Similar

(From University

characteristics were reported, but still no connection to memristors is

of

provided.

Houston) 2005

Darrell Rinerson,

In March 22th, they received U.S. Patent 6,870,755 (assigned to Unity

Christophe

Semiconductor) [23] for introducing reversible two terminal resistance

Chevallier, Steven

switching materials based on metal oxides.

Longcor, Wayne Kinney, Edmond

Page 21 of 66

Ward & Steve Kuo-Ren Hsia 2005

Zhida Lan, Colin

In November 1st, they received U.S. Patent 6,960,783 (assigned to

Bill & Michael

Advanced Micro Devices) [24] which introduces a resistance switching

Van Buskirk

memory cell that was made from a layer of organic material and a layer of metal oxides or sulfides. It showed similar current-voltage characteristic to the memristor, but nothing mentioned about it.

2006

Stanford

He received U.S. Patent 6,999,953 [25] and described using a neural

Ovshinsky

synaptic system based on phase change material as a two terminal resistance switch. Although Chua's paper is cited as a reference, but no connection to memristor is mentioned.

2007

2007

Vladimir Bulovic,

In February 27th, they received U.S. Patent 7,183,141 (assigned to

Aaron Mandell &

Spansion) [26], for developing methods of programming two terminal

Andrew Perlman

ionic complex resistance switches to act as a fuse or anti-fuse.

Gregory Snider

In April 10th, Gregory Snider from HP Labs described implementation

(From HP Labs)

of two terminal resistance switch similar to memristors in reconfigurable computing architectures and received U.S. Patent 7,203,789, (assigned to HP) [27].

2007

Gregory Snider

In August 10th, Gregory Snider published an article entitled "Selforganized computation with unreliable, memristive nanodevices" [28] and discussed that memristive nanodevices are useful in pattern recognition and reconfigurable circuit architectures.

2007

2008

Blaise Mouttet

In November 27th, Blaise Mouttet described the use of two terminal

(graduate student

resistance switching materials in signal processing, control systems,

from George

communications, and pattern recognition. He received U.S. Patent

Mason University)

7,302,513. [29]

Gregory Snider

In April 15th, Greg Snider received U.S. Patent 7,359,888 (assigned to Hewlett-Packard) [30] and introduced a nanoscale two terminal resistance switch crossbar array formed as a neural network.

2008

Dmitri Strukov,

In May 1st, the team at HP Labs published an article in Nature "The

Gregory Snider,

missing memristor found" [31], [32] and introduced a relationship

Duncan Stewart &

between the two terminal resistance switching characteristic in

Stan Williams

nanoscale systems.

Page 22 of 66

2008

Blaise Mouttet

Between June 1st-5th, during Nanotechnology Conference and Trade Show in Boston, Blaise Mouttet, presented the poster "Logicless Computational Architectures with Nanoscale Crossbar Arrays" [33]. He described analog computational architectures that use similar resistance switching materials.

2008

Victor Erokhin &

In July 7th, they claimed that two years before HP Labs find the

M. P. Fontana

titanium oxide memristor, they have discovered a polymeric memristor, and it is discussed in the article "Electrochemically controlled polymeric device: a memristor”. [34]

2008

J. Joshua Yang,

In July 15th, explained memristive switching behavior in nanodevices

Matthew D.

in their Nature paper, entitled "Memristive switching mechanism for

Pickett, Xuema Li,

metal/oxide/metal nanodevices". [35]

A. Douglas, A. Ohlberg, Duncan R. Stewart & R. Stanley Williams 2008

Stefanovich

In August 26th, they received U.S. Patent 7,417,271 (assigned to

Genrikh, Choong-

Samsung) [36] and showed that a bi-layer oxide two terminal resistance

rae Cho, In-

switch can have memristive properties. But there is no relation or

kyeong Yoo, Eun-

reference given to Chua’s theory.

hong Lee, Sung-il Cho & Changwook Moon 2008

Blaise Mouttet

Between September 14th-16th, during the nanotechnology Conference in Boston he presented a poster entitled "Proposal for Memristors in Signal Processing". [37]

2008

Yu V. Pershin &

In September 23rd, they discussed memristive behavior in Spintronics

M. Di Ventra

in an article entitled "Spin memristive systems: Spin memory effects in

(From University

semiconductor Spintronics" [38], and published in Physical Review

of California, San

Letters.

Diego) 2008

Yu V. Pershin, S.

In October 22nd, they published an article entitled "Memristive model

La Fontaine & M.

of amoeba's learning" [39]. They studied the amoeba-like cell,

Di Ventra

Physarum Polycephalum that was mapped it to a series of voltage pulses that could mimic the changes in the environment.

Page 23 of 66

2008

2008

Duncan Stewart,

In October 28th, researchers at HP Labs, received U.S. Patent

Patricia Beck, &

7,443,711 (assigned to HP) [40] and introduced a tunable nanoscale two

Doug Ohlberg

terminal resistance switch.

Blaise Mouttet

In November 4th he received U.S. Patent 7,447,828 [41] for several cases of using resistance switching materials in adaptive signal processing.

2008

Leon Chua, Stan

In November 21st, Leon Chua, Stan Williams, Greg Snider, Wolfgang

Williams, Greg

Porod, Massimiliano Di Ventra, Rainer Waser, and Blaise Mouttet

Snider, Rainer

conducted a panel discussion at The Symposium on Memristors and

Waser, Wolfgang

Memristive Systems held at UC Berkeley. They talked about the

Porod,

theoretical foundations of this field and the potentials of using

Massimiliano Di

memristor for RRAM and neuromorphic architectures. [42]

Ventra & Blaise Mouttet 2008

Blaise Mouttet

In December 2nd he received U.S. Patent 7,459,933 [43] for claims in using hysteretic resistance materials for image processing and pattern recognition.

2009

N. Gergel-

Researchers at the National Institute of Standards and Technology

Hackett, B.

(NIST) in Gaithersburg, United States, succeeded to create a flexible

Hamadani, B.

and low power memory that can "remember" the passing current

Dunlap, J. Suehle,

(indicated in the resistance). These flexible memristors have potential

C. Richter, C.

applications in or both long-term and short-term memories such as

Hacker & D.

disposable sensors and medical applications. [44]

Gundlach 2010

H. J. Koo, J. H.

Researchers at North Carolina State University (NCSU) demonstrated

So, M. D. Dickey

a squishy memory device with physical properties of a Jelly, that works

& O. D. Velev

well in wet environments [45]. They claimed that it can provide an electronic bridge between man and machine. The circuit is both squishy and hydrophilic which allows it to be implemented in living human tissues. The device consists of two electrodes made from an alloy of Gallium and Indium, which in room temperature is in a liquid form. Sandwiched between these two electrodes are two films made of agarose, a hydrogel used in biochemistry. One of the films is doped with polyacrylic acid (PAA) and the other one with polyethyleneimine (PEI) which is a base. A resistive thin layer of gallium oxide is usually created in the border between the electrodes and the hydrogel. But on Page 24 of 66

the side with PEI doping, due to high pH this oxide layer is suppressed. Hence, by applying voltage, the thickness of the resistive oxide layer on the other side, the resistance of the device can be changed. A positive voltage across the device increases the thickness of the oxide and it will lead to higher resistance. Moreover, the current flow can be controlled and this means that the device can switch between conductive and nonconductive modes, just like a diode. If the current switch off, the diode keeps a memory of its last resistance state. So, it has memristor characteristics. It was reported that the memristor that NCSU team made retained its memory for 3 steady hours. They also made a test version of it into a crossbar array. 2010

Bhagwat

On June 3rd, they published a paper entitled "Programmable current

Swaroop, William

mode Hebbian learning neural network using programmable

West, Gregory

metallization cell" [46]. They demonstrated that by using an ionic

Martinez, Michael

programmable resistance device, we can minimize the complexity of

Kozicki & Lex

an artificial synapse.

Akers 2010

James Heath,

In June 12th, the researchers at HP Labs discussed implementation of a

Philip Kuekes,

chemically fabricated two terminal configurable bit element in a

Gregory Snider, &

crossbar configuration, provided for defect tolerant computing, in their

Stan Williams

paper

(From HP Labs)

Opportunities for Nanotechnology" [47]. Still, no connection to

entitled

"A

Defect-Tolerant

Computer

Architecture:

memristors is found.

Page 25 of 66

CHAPTER 3 THE MEMRISTOR 3.1 Introduction In this chapter, a description of the definition and properties of memristor is given. Then the main switching mechanisms in memristive systems are discussed briefly.

3.2 Memristor Memristor is a two terminal electrical component that moderates an electrical circuit to ensure the current flow and retains the measure of earlier passed charge. It is a nonlinear device satisfied the Ohm’s law with the time varying resistance which can be expressed as 𝑣=𝑅 (𝑥, 𝑡) 𝑖 so, 𝑑𝑥/𝑑𝑡=𝑓 (𝑥, 𝑡) where ‘x’ describes the internal condition of the system depending on time and at the mean time it gives “memory” to the system [48]. This reason makes the memristor differ from the resistor characteristics.

Fig. 3.2.a The basic circuit element.

From the conceptual frame of reference, the three radical types of equipment – Resistor, Capacitor, and Inductor, can be explained with six practicable correlations among the four Page 26 of 66

circuit variables: voltage (v), current (i), charge (q), and flux (φ) [49]. According to Figure 3.2 two of these solutions derives the current definition, 𝑖=𝑑𝑞/𝑑𝑡 and Faraday's induction law, 𝑑𝜑=𝑣𝑑𝑡 and another three solutions give the equations of fundamental circuit apparatus, these are capacitance, 𝐶=𝑑𝑞/𝑑𝑣; resistance, 𝑅=𝑑𝑣/𝑑𝑖; and inductance, 𝐿=𝑑𝜑/𝑑𝑖 [50]. 1971 Chua observed that the combination of electric charge (q), and magnetic flux (φ) was kept unclearly. At that time, Chua associated a circuit component, which can explain the charge and flux relationship and it was named as ‘Memristor’, where memristance, 𝑀=𝑑𝜑/𝑑𝑞 [51]. (a)

Fig. 3.2.b (a) Displays the memristor symbol where ‘P’ indicates the positive terminal (undoped) and ‘M’ indicates the negative terminal (doped). Figure (b) shows the schematic of a memristor of length D as two resistors in series. The doped region (TiO2−x) has resistance RONw/D and the undoped region (TiO2) has resistance ROFF(1−w/D). The size of the doped region, with its charge +2 ionic dopants, changes in response to the applied voltage and thus alters the effective resistance of the memristor. Again, two memristors with the same polarity in series is displayed in figure(c). d and ud represent the doped and undoped regions, respectively. In this case, the memristive effect is retained because doped regions in both memristors simultaneously shrink or expand. Further figure (d) represents two memristors with opposite polarities in series. The net memristive effect is suppressed.

3.3 Working Principle At the beginning, the memristor was assumed as a purely a.c. the device, but lately the D.C. characteristic is found that’s why this device has got the attention [52]. Memristor has two switching portions based on its state; one is high resistance state and low resistance state. TiO2 is mostly used in the memristor with different materials like Cu, Ag, Pt, Au or PEO-PANI, as top and bottom electrodes. and for the active layer such as TaOx, ZnO, HfO2, SnO2 or multiple layers [53]. In this case, the switching behaviour is developed for the lack of oxygen in the system. In the direction of the anode, a metallic conduction path is formed by the reduction of Page 27 of 66

an oxide material. Therefore, the device is switched from high resistance state to low resistance state namely SET process is started in the system [54]. The oxidation reaction appears at the anode for conducting the evolution of oxygen gas, which results in the oxidation of the effective stratum border on the anode, and hence the device starts reverse switching from to high resistance state from low resistance state. This process is named as RESET process. Strukov et al. represented a physical model of the memristor where it was characterized by an equivalent time-dependent resistor whose value at a time t is linearly proportional to the quantity of charge q that has passed through it. They realized a proof-of-concept memristor, which consists of a thin nano layer (2 nm) of TiO2 and a second oxygen deficient nano layer of TiO2−x (8 nm) sandwiched between two Pt nano wires (50 nm). Oxygen (O2−) vacancies are +2 mobile carriers and are positively charged. A change in distribution of O2− within the TiO2 nano layer changes the resistance [55]. By applying a positive voltage, to the top platinum nanowire, oxygen vacancies drift from the TiO2−x layer to the TiO2 undoped layer, thus changing the boundary between the TiO2−x and TiO2 layers. As a consequence, the overall resistance of the layer is reduced corresponding to an “ON” state [56]. When enough charge passes through the memristor that ions can no longer move, the device enters a hysteresis region and keeps q at an upper bound with fixed memristance, M (memristor resistance). By reversing the process, the oxygen defects diffuse back into the TiO2−x nano layer. The resistance returns to its original state, which corresponds to an “OFF” state. The significant aspect to be noted here is that only ionic charges, namely oxygen vacancies (O2−) through the cell, change memristance. The resistance change is non-volatile hence the cell acts as a memory element that remembers past history of ionic charge flow through the cell.

Page 28 of 66

Fig. 3.3 Memristor switching behaviour. (a) “ON” state, low resistance, (b) “OFF” state, high resistance. The key feature of memristor is it can remember the resistance once the voltage is disconnected. In (a) “doped” and “undoped” regions are related to RON and ROFF, respectively. The dopant consists of mobile charges. In (b), L and we are the thin-film thickness and doped region thickness, respectively [57].

3.4 Analogy A common analogy for a resistor is pipe-carrying water. The water itself is analogous to electric charge, pressure at the input of the pipe is similar to the applied voltage, and rate of flow of water through pipe is the electrical current. Just as with an electrical resistor, flow of water

Fig. 3.4 Flow of water through a pipe

Page 29 of 66

through a pipe is faster if the pipe is shorter and /or it has a larger diameter. An analogy for a memristor is an interesting kind of pipe that expands or shrinks when water flows through it. It the water flows in one direction, the diameter of the pipe increases, thus enabling the water to flow faster. If the water flows in opposite direction, the diameter of the pipe decreases, thus slowing down the flow of water. If the water pressure is turned off, the pipe will retain its most recent diameter until the water turned back on. Thus, the pipe does not store the water like a bucket (for a capacitor) -it remembers how much water flowed through it.

3.5 Conclusion In this section represents the working principle and analogy of the Memristor. It also shows an overview of the basic working procedure and with the behaviour of memristor. In the part of working principle shown the switching behaviour of memristor. It is mention that, Memristor is a switching device. And memristor has two switching portions based on its state; one is high resistance state and low resistance state. On the other hand, it has two regions which are “doped” and “undoped” regions they are related to RON and ROFF respectively. Finally, this chapter also described common analogy of memristor with comparing to a flow of water through a pipe.

Page 30 of 66

CHAPTER 4 MEMRISTOR MODELING 4.1 Introduction Memristors can be used in quite extensive range of applications. In each application, different characteristics is expected from memristor. For example, in logic and memory applications, an element that have the ability to compute, control and store the data after computation is needed. They need to have fast read and write times. The reading mechanism shouldn't change the data while reading. The difference between stored data should be large enough to avoid bad noise margins and have better sensitivity. Also for storing Boolean data in a memristor, the ratio between Ron and Roff resistances should be high enough. There are other characteristics that are important for memristor applications, such as good scalability, low power consumption and compatibility with conventional CMOS. The main memristor models that has been proposed and different window functions are discussed in this chapter.

4.2 Models To be able to design, analyse and simulate memristor based circuits and applications, a proper model is needed. Since May 2008, that HP Labs published their paper on memristor implementation, several models have been proposed. In this report the major presented memristor models will be pointed out.

4.2.1 Linear Ion-Drift Model HP model, which was published in 2008, explains the physical behavior of the memristor device. It is mainly a nonlinear device of width D divided by two regions or, two variable resistors inside it. In its one region, it is covered with doped titanium oxide (TiO2-x) and another side by undoped titanium oxide (TiO2) [58]. The doped region (RON) has low resistivity because of high concentration of oxygen vacancy dopants. On the other hand, the undoped region (ROFF) has high resistivity [59]. These two resistors are said to be variable since their value depends on the thickness of each layer, which is changing with the displacement of the TiO2-x/TiO2 boundary due to the drift of oxygen vacancies under the electric field. The mathematical calculation of the memristor is given below (according to [60]): Page 31 of 66

The drift and diffusion velocities contains a linear relationship including the uniform electric field across the device, 1 dw(t) D

=

dt

RON β

i(t)

(1)

Where D=Physical length of the memristor, 𝑑𝑤(𝑡)/𝑑𝑡 = state variable, RON = Resistance of the doped region, β = the dimensions of magnetic flux= D2/µD Integrating (1) gives: w(t) D

=

w(t0 ) D

+

q(t)

(2)

QD

Replacing w(t)/D = x(t) yields:

𝑥(𝑡) = 𝑥(𝑡𝑜 ) +

𝑞(𝑡)

(3)

𝑄𝐷

Here q(t)/QD means the measure of charge drifting in the channel.

From the HP model [18], we can write:

v(t) = {R ON

w(t) D

+ R OFF (1 −

w(t) D

)}i(t)

(4)

Or, v(t) = {R ON ∙ x(t) + R OFF (1 − x(t))}i(t)

(5)

So, memristance can be written as:

M(q) = R ON

w(t) D

+ R OFF (1 −

w(t) D

)

(6)

If we then assume r = ROFF/RON and q (t0)= 0 , therefore 𝑤(𝑡) = 𝑤(𝑡0 ) ≠ 0, then it can be written (6) as:

M0 = R ON (x(t 0 ) + r(1 − x(t 0 )))

(7) Page 32 of 66

Where M0 is the value of memristance at t0. Therefore, at time t, the memristance will be: q(t)

M(q) = M0 − ∆R( Q )

(8)

0

Where ∆𝑅 = 𝑅𝑂𝐹𝐹 − 𝑅𝑂𝑁 . Since 𝑅𝑂𝐹𝐹 ≫ 𝑅𝑂𝑁 , we can estimate that ROFF≈ M0, which will be similar to (6). Now, we know that 𝑣(𝑡) = 𝑀(𝑞) ∙ 𝑖(𝑡) and 𝑖(𝑡) = 𝑑𝑞(𝑡)/𝑑𝑡 Substituting (8) into that, yields: q(t)

V(t) = (M0 − ∆R ( Q ))

dq(t)

0

dt

(9)

Integrating (9) gives:

q(t) =

QD M0 ∆R

2∆R

∙ (1 ± √1 − Q

2 D M0

φ(t))

(10)

Using the same assumption, we made above, that ΔR≈ M0≈ ROFF, we will have:

q(t) = QD (1 − √1 − Q

2 D ROFF

φ(t))

(11)

Therefore, the memristor internal state based on (03) is:

2μ

x(t) = 1 − √1 − rDD2 φ(t)

(12)

In addition, the current-voltage related equation is:

i(t) =

v(t) ROFF (1−√1−

2μD φ(t)) rD2

(13)

Page 33 of 66

Considering the previously mentioned equation, it is clear that memristor is a nanoscale device. Because for the thinner devices where the values of D is smaller the memristor shows much better characteristics.

4.3 Window functions Window function acts for adding more nonlinear behaviour in state variable close to the bounds, which was not permissible in HP model, and when the state variable is at the bounds it multiplies the derivative of the state variable and forces it to reach at zero [61]. The next section explored the different proposed window functions for memristor.

4.3.1 Strukov et al Strukov developed the equations (14) and (15) which prevents the limitations of Chua’s postulate, describing the non-linear relationship between the integral of current and the voltage and the condition of ‘hard’ switching (large voltage excursions or long times under bias) which expresses the proportional relationship between the state variable and the charge passes through the device [62].

v(t) = {R ON

w(t) D

dw(t) dt

+ R OFF (1 −

= μv

Ron D

i(t)

w(t) D

)}i(t)

(14)

(15)

Strukov et al. proposed their window function as [18]

F(w) =

w(1−w) D2

(16)

where the boundary condition is

F(D) =

1−D D

≃0

(17)

4.3.2 Benderli Benderli & Wey proposed another window function in 2009 (18) which can express the linear and nonlinear functionality of memristor [63].

Page 34 of 66

F(w) =

w(D−W) D2

(18)

The boundary conditions for equation (18) are [64] 0