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IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, VOL. 22, NO. 3, JUNE 2012
Design of a Program-Controlled Precise Synchronous Triggering System Applied to Pulsed High Magnetic Field Facility Jianfeng Xie, Xiaotao Han, Jiangtao Shi, and Liang Li
Abstract—Recently, a Program-controlled Synchronous Triggering System (PSTS) is developed at Wuhan National High Magnetic Field Center. The designed system could generate triggering signal for thirteen power modules and eight magnets distributed in different experiment stations. By generating precise and synchronous triggering signals required for the facility, the multiple power modules could be discharged synchronously or in a preset time sequence. The PSTS is composed of triggering signal generator, fiber converter, expanded cell, and local sequence generator. The triggering signal generator, isolated from local device, is applied for sequential control of multi-module in the facility. The signal transmission is realized by optical fiber. A Digital Signal Processor (DSP) with specific type of TMS320F2812 is employed to design the triggering signal generator. The parameters of triggering channels and time-delay with the accuracy of 1 us could be configured through human machine interface. Local sequence generator unit is integrated in the local control unit on the basis of a Complex Programmable Logic Device (CPLD) with specific type of EPM7128. Local sequence generator is responsible for producing the time sequence signals to control and record the waveform of each power module, as well as the triggering signal waveform modulation for thyristor through expanded cell. Based on the designed system, the pulsed high magnetic field facility could be operated effectively. The test result illustrates that the system is of high performance. Index Terms—Digital signal processor, high magnetic field facility, local sequence generator, program-controlled synchronous triggering system, triggering signal generator.
I. INTRODUCTION
H
IGH magnetic field is one of the extreme conditions for the frontier modern scientific research. Pulsed high magnetic field is widely available as it is much easier to get a higher magnitude [1]–[3]. Pulsed high magnetic field facility mainly consists of pulsed magnets, pulsed power source, and the corresponding control Manuscript received September 12, 2011; accepted January 23, 2012. Date of publication March 22, 2012; date of current version May 24, 2012. This work was supported in part by the Fundamental Research Funds for the Central Universities, HUST Grant 2011TS106/2011QN097, National Basic Research Program of China under the 973 Program: 2011CB012800 (2011CB012801) and by the Chinese National Natural Science Foundation under Grant 51077064 and Grant 51177062. The authors are with the Wuhan National High Magnetic Field Center, Huazhong University of Science and Technology, Wuhan 430074, China and with the State Key Laboratory of Advanced Electromagnetic Engineering and Technology, Huazhong University of Science and Technology, Wuhan 430074, China (e-mail:
[email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TASC.2012.2186779
Fig. 1. Main diagram of PHMFF.
system. As an important part of the control system, a programcontrolled synchronous triggering system is designed for sequential control of multi-module in the facility. The facility at Wuhan National High Magnetic Field Center includes eleven 1 MJ, two 0.8 MJ capacitor power modules, one battery power module in the power hall, eight different magnets distributed in experiment stations, and three selectors used to combine power modules with selected magnet. All the experiment operations are realized through the control system, including PSTS, central and local control part. The central part is responsible for receiving instructions from users, configuring system parameters, and controlling selectors. The local control part executes instructions from central part, processes local triggering signals from PSTS and returns action results. PSTS receives instructions from central control part, produces corresponding timing logic signal for all selected power modules and magnets in experiment stations, trigs power modules for discharge and starts wave recording of discharge voltage and current [4], [5]. II. THE DESIGN OF PSTS A. Requirements and Compositions of Pulsed High Magnetic Field Facility (PHMFF) The diagram of the pulsed high magnetic field facility is shown in Fig. 1. There are eleven capacitor power modules in the facility, the maximum feasible charging voltage of each module is 25 kV and the stored energy is 1 MJ. During a pulse with 10 ms width, the peak pulse current is up to 40 kA [6].
1051-8223/$31.00 © 2012 IEEE
XIE et al.: PROGRAM-CONTROLLED PRECISE SYNCHRONOUS TRIGGERING SYSTEM
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Fig. 3. Diagram of triggering signal generator.
Fig. 2. Block diagram of PSTS.
The battery power module consists of about 2000 batteries. The maximum designed voltage is 1000 V with the pulse current up to 35 kA, and the discharge time 1.5 s. During the discharge process, users can select one or several power modules, which depend on the requirement of the energy or the magnitude of magnetic field. If several power modules discharge in parallel, the triggering signals for each selected module are required more accuracy for synchronization. On the other hand, when discharge to multi-coil magnet, because each coil has independent power circuit, the corresponding triggering signals for each coil should have strict timing relationships. Otherwise, the magnet may break because of wrong triggering signals. In the facility, a local recording unit is installed in every power module and experiment station. The start point of recording depends on the record trigging signal, which is also produced by PSTS. To ensure the safety of the important device in the facility, such as power module, magnet, and so on, PSTS should be precise and reliable. Moreover, high flexibility is also required; PSTS should have programmable interface, enough signal channels, then PSTS can select trigging channels and configure the parameters such as signal lead or lag and time-delay for specified channel freely. B. Description of PSTS Multi-level structure is adopted in the design of PSTS. The first level located in the main control room is mainly composed of triggering signal generator and fiber converter, the second level is composed of local sequence generator and expanded cell located in the power hall. To reduce the time delay of long distance line transmission, two levels is combined through fiber. The block diagram of PSTS is shown in Fig. 2. The triggering signal generator, isolated from local device by optical fiber is employed for sequential control of multimodule discharge in the facility through producing precise trigging signal for power module and magnet. The parameters of triggering channels could be configured through Ethernet interface by main control program.
The triggering signal transmission is realized by optical fiber. Local sequence generator is responsible for producing the time sequence signals for conducting thyristor through expanded cell and recording waveform for each power module. In each experiment station, signal conversion unit is designed to receive optical recording signal from the triggering signal generator, and then convert the optical pulse to TTL level signal for the start of sampling through the acquisition card. III. KERNEL PARTS IN PSTS In the designed PSTS, the following key parts are used to ensure the implementation of the system. A. Triggering Signal Generator As a crucial part of PSTS, triggering signal generator is designed which have 25 independent signal channels, each channel parameters could be configured through programmable interface. The block diagram is shown in Fig. 3. A digital signal processor with specific type of TMS320F2812 produced by Texas Instruments is employed as the computing unit of the triggering signal generator. In advantage of its high bus frequency up to 150 M, the triggering signal generator could achieve more accuracy for timing signals. The processor receives instructions through Ethernet interface from the main control program, and stores channel parameters into flash memory to ensure the information never lose even power off. As the discharge of power modules requires more precise timing signals, a complex programmable logic device with specific type of EPM7128 is employed to ensure the realization of the strict sequential logic for trigging signals. On the basis of CPLD, a pulse count method is adopted to generate signals. Pulse Width Modulation (PWM) signal from DSP processor is used as a reference pulse source, and two threshold values are set by DSP for pulse time-delay and width control. When DSP receives command for start trigging process, it first sends a start signal to CPLD through Input and Output (IO) port to start counting the reference pulse source. When counting value reaches the time-delay threshold of a selected channel, the specified channel output trigging pulse. When the count value reaches pulse width threshold, the corresponding trigging signal closes. In this way, all selected channels according to the specified time-delay parameter activate signal output, and stop the pulse output in turn. Because CPLD can achieve ns level of clock delay, and can output signals through IO port in parallel, the timing signal of each channel could ensure the accuracy of 1 us.
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IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, VOL. 22, NO. 3, JUNE 2012
Fig. 4. Diagram of local sequence generator.
As trigging signals for wave recording in the power module and experiment station does not require strict timing, the DSP processor IO port is directly used to control the recording pulse delay and width through software timer. B. Local Sequence Generator The block diagram of local sequence generator is shown in Fig. 4. When local sequence generator receives trigging signal through optical interface, it generates multi-channel signals used for driving thyristor to discharge through timing and logic conversion. CPLD chip with specific type of EPM7128 is also adopted to design the local sequence generator unit. Considering the waveform requirement of thyristor conducting, trigging signal should be modulated through local sequence generator unit. A 6 M frequency external crystal is used as reference pulse source. CPLD detects the input signal’s rising edge, and then start counting, in this way, the input signal with fixed width of 20 ms is modulated into a continuous serial pulses with about 60 percent duty, until the end of the input single. Because battery power module uses battery as its energy storage element, the discharge process cannot be turned off naturally, so a separate converter circuit is needed. The converter circuit includes capacitor, thyristor, and charging unit. Converter circuit requires a separate trigging signal, which is designed from two ways; one is from trigging signal generator used for power system normal turned off. Another is from local sequence generator, it detects discharge current of every thyristor arm in main circuit and compares the current with threshold set by D/A chip controlled by DSP. Then, the comparator results are transferred to IO ports of CPLD. CPLD samples the signals and produces trigging signal for converter circuit to shut down the discharge current in event of fault. What’s more, the comparator thresholds could be changed using central computer through communication with the DSP in local sequence generator. C. Protection Solutions Some solutions are adopted in triggering signal generator to protect important device when discharge multi-coil magnet. If the triggering signal of inner coil loses, the outer coil triggering
signal outputs, the magnet may break. To prevent the situation, all channels triggering output is introduced to DSP. Processor detects the signal output to ensure the inner coil triggering signal output firstly, and then the outer coil signal could activate. To prevent thyristor conducting caused by false trigger, the local sequence generator is in power-off state most of the time, which is only powered on when discharge process started. In local sequence generator, the unit firstly uses RC circuit to eliminate the vibration of input signal, and detects the pulse width, If the width does not meet the requirement, then the signal will be ignored, and moreover fault codes is generated and transmits to local control part. To reduce interference signal fleeing into PSTS, high-speed optical coupling isolation is also used. Meanwhile, multi-level power isolation technology is adopted. Each module of PSTS is supplied by isolated switching power module separately. IV. SOFTWARE DESIGN A. Software Structure and Functional Diagram The main flow chart of triggering signal generator is described in Fig. 5. After initialization, the program keeps waiting for command from the main control program. During experiment, in first step, the trigging channel is selected through command. According to the selected power modules, the parameters of all selected channels should be configured. When start command is received, program sends time-delay parameters of all channels to CPLD through data bus, and initials the processor PWM frequency and duty, enables PWM signal output and then recording trig is produced and transmitted to power module and experiment stations. Finally, the program sends start signal to CPLD, then keeps waiting until CPLD completes all power module trigging signal output correctly according to its internal logic. If program detects any abnormal condition, the processor sends a lock signal to interrupt all trigging signal output immediately and stores the fault codes into memory. B. The Design of CPLD Program CPLD program using Very High speed integrated circuit hardware Description Language (VHDL) mainly includes pulse count, signal logic output and bus operation module. The program is realized through multiple processes based on Quartus II 6.0 platform. The main structure of VHDL program is shown in Fig. 6. The pulse count process detects the rising edge of output enable signal from DSP, and then start counting PWM clock signal, when the count reaches the time-delay threshold, the program sets the corresponding IO port high, and when the count reaches the width threshold, the program clear the IO port, power on reset signal is used for count value initiation. The bus operation process detects the write, power on reset, chip select, data bus and address bus signals from DSP. If CPLD internal defined registers have been selected through sys_cs and sys_addr signals, DSP write the parameters of selected channel to CPLD registers through data bus, power on reset signal is used for chip initiation.
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Fig. 7. Field waveform of the dual coil test magnet.
Fig. 5. Main procedure of triggering signal generator.
discharge sequence between inner coil and outer coil should be configured. During the test, PSTS firstly generate trigging signal for the start of sampling in experiment station, and then 8 power modules for outer coil are synchronously discharged, 25 ms precise time later, 2 power modules for inner coil are discharged. The test results for PSTS illustrate that the trigging signals are of well synchronization performance and the parameters could be configured according to the requirement freely and precisely. VI. CONCLUSION
Fig. 6. Main structure of VHDL program.
TABLE I PARAMETERS OF THE TEST MAGNET
As an important part of pulsed high magnetic field facility, the control system including central unit, local unit and PSTS are designed and applied to the facility. And plenty of discharges through capacitor power modules have been made, it shows the PSTS is reliable. And by now long pulse power modules are still in construction, further test for PSTS will be processed after the modules are enabled. REFERENCES
V. TEST RESULTS Table I shows the parameters of the dual coil test magnet. Fig. 7 shows the test field waveform for the test magnet with the help of PSTS. Inner coil is discharged by 2 capacitor power modules with the total energy 0.5 MJ, and outer coil is discharged by 8 capacitor power modules with the total energy 6.2 MJ. The generated total field of the magnet is 83 T. Power modules for one coil should be trigged synchronously, and the
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