Design Strategy to Optimize the Reliability of Grid-Connected PV ...

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 11, NOVEMBER 2009

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Design Strategy to Optimize the Reliability of Grid-Connected PV Systems Freddy Chan and Hugo Calleja, Senior Member, IEEE

Abstract—This paper presents a strategy, based on the designof-experiments technique, aimed at optimizing the reliability in inverters for photovoltaic systems. The process involves designing the inverter several times, each time with different specifications, and calculating the reliability for each design. The specifications are established in a systematic manner, in such a way that the parameters with the highest impact are easily identified. The optimization procedure follows a standard reliability estimation methodology and involves modifying the stress factors in a judicious manner. The strategy is exemplified with an integrated boost inverter and a desired mean time between failures of 12 years. Index Terms—Design of experiments (DOE), photovoltaic (PV) inverters, reliability.

I. I NTRODUCTION

T

HE CURRENT trend in photovoltaic (PV) systems for residential applications is toward grid-connected apparatus, with powers between 1 and 5 kW. A major issue is the maintenance cost, which is directly related to reliability. In a typical system, the PV cells have an operational life in excess of 20 years; however, the inverter has a much shorter operational life. There have been several programs aimed at increasing the number of installed PV systems throughout the world. A large number of apparatus has been fielded, and reliability data have been collected. The International Energy Agency reported that 98% of the failures was related to the power stage, and the average time to failure was five years. Similar results were obtained in the German “1000 Roofs” and in the Japanese “Residential Japan” programs [1], [2]. The power stage in a PV system can be built in a number of ways, and several surveys of single-phase inverters have been reported recently [3]–[6]. The surveys, however, are mainly concerned with the topologies from a power-electronics point of view and do not explicitly take the reliability into account. Only one survey attempts to describe this subject, albeit in an incomplete manner, establishing as a guideline the number of active devices in the power stage [7]. The lack of relevance of reliability issues might be due to the fact that the vast majority of the topologies reported were developed with other parameters in mind, such as efficiency, cost, or volume. Manuscript received September 30, 2007; revised June 10, 2008. First published July 9, 2008; current version published October 9, 2009. F. Chan is with the Department of Sciences and Engineering, Quintana Roo University, Chetumal 77019, México (e-mail: [email protected]). H. Calleja is with the National Center for Research and Development of Technology, Cuernavaca, Morelos 62490, México (e-mail: hcalleja@ cenidet.edu.mx). Digital Object Identifier 10.1109/TIE.2008.928100

Fig. 1. Single-phase boost inverter topology.

On the other hand, there is an effort to design and manufacture high-reliability inverters, with mean time between failures (MTBF) of ten years [8], [9]. Electrolytic capacitors have been singled out as the most troublesome component, and topologies without large capacitors have been developed. It has been supposed that the avoidance of electrolytic capacitors provides, by itself, a higher reliability, regardless of the total number of components employed, the switching modes, and the stresses. [10], [11]. This paper presents a strategy to improve the reliability of grid-connected PV systems by considering this property at the design stage. The strategy is exemplified with the integrated boost inverter shown in Fig. 1 [12]. II. M ETHODOLOGY The methodology to optimize the reliability comprises seven stages and is described in the following. A) Define the MTBF (or, alternatively, the failure rate) to be achieved. For PV systems, the MTBF should be al least 87 600 h (ten years). B) Select the topology according to system requirements. Proper selection of the adequate circuit is the most important step to achieve a reliable design. There are many options available to implement the power stage; however, each topology has limitations, drawbacks, and advantages [13]–[15]. The selection must take the design parameters into account, namely, power range, switching frequency, input and output voltages, isolation requirements, etc. In the following, the design parameters will be simply referred to as parameters. C) Develop a statistical model based on the design-ofexperiments (DOE) technique [16]. The DOE technique will be described in Section III. In this stage, several random combinations of the design parameters are selected.

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effects analysis (FMEA); however, FMEA may only identify major failure modes in a system. The sequence is as follows.

Fig. 2. Flow diagram to optimize reliability.

D) Calculate the values of the circuit components and compute the MTBF for all the parameter combinations selected in the previous stage. The MTBF can be computed following the procedure outlined in MIL-HDBK 217F [17]. E) If any of the random combinations yields an MTBF longer than the limit set in stage 1), then a detailed specification of the components used in the topology can be worked out. Otherwise, the MTBF sensitivity to the most significant parameters must be identified. Section IV discusses these parameters and its relationship to the reliability. F) Analyze the results using statistical analysis tools to determine which parameters and/or interactions have a significant effect on the MTBF. G) Identify critical components in the topology and the stress factors with the highest contribution to the failure rate. If the optimization does not yield a design that satisfies the design objectives, then a different topology should be selected and the process repeated. The methodology is graphically shown in Fig. 2 as a flow diagram. III. DOE The DOE is a very efficient statistically based method that systematically studies the effects of the design parameters on the behavior of the circuit. It enables the designer to analyze and quantify the effects and interactions between the parameters that affect the reliability. Once the parameters with the highest impact are identified, they can be dealt with in a systematic manner. This technique is similar to the failure modes and

1) Define n parameters to be considered. If deemed necessary, this can be done using a diagram that helps organize cause-and-effect-related data. 2) Select the levels that will apply to each parameter. This involves selecting the maximum (Max) and minimum (Min) values for the parameter defined in the previous step. 3) Calculate the number of combinations nC of the parameters. In statistics, fractional factorial designs are experimental designs consisting of a carefully chosen subset (fraction) of the experimental runs of a full factorial design. The subset is chosen so as to exploit the sparsityof-effects principle to obtain information about the most important features of the problem studied while using only a fraction of the effort required for a full factorial design in terms of experimental runs and resources. If the fractional factorial design strategy is followed, then there are 2n−1 combinations. It is necessary to set up an appropriate design matrix. Each combination constitutes an entry, and the design will be performed as many times as there are entries in the matrix. 4) The term “Interaction” refers to the combined effect of two parameters on the output. At this point, the number of interactions nI is selected, considering the nonrepetitive binary combinations of two parameters. 5) Calculate the overall arithmetic average MTBF using MTBF =

nC 1  MTBFj nC j=1

(1)

where MTBFj is the MTBF obtained with the jth combination of the input parameters. 6) For each parameter par, calculate the following: a) the arithmetic averages of the MTBF obtained when the parameter considered is maximum, when it is minimum, and the difference according to

Avg(Max)par =

nC /2 2  MTBFj |par=Max nC j=1

(2)

Avg(Min)par =

nC /2 2  MTBFj |par=Min nC j=1

(3)

ΔAvgpar = Avg(Max)par − Avg(Min)par

(4)

b) the sum-of-squares SSpar using SSpar =

2n−1 (ΔAvgpar )2 . n

(5)

7) For each interaction int, calculate the following: a) the arithmetic averages of the MTBF obtained when the interaction considered is maximum, when it is

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TABLE I PARAMETERS AND LEVELS

minimum, and the difference according to Avg(Max)int =

nC /2 2  MTBFj |in=Max nC j=1

(6)

Avg(Min)int =

nC /2 2  MTBFj |int=Min nC j=1

(7)

ΔAvgint = Avg(Max)int − Avg(Min)int

(8)

b) the sum-of-squares SSint using SSint =

2n−1 (ΔAvgint )2 . n

(9)

8) In this case, the error ε is set equal to the summation of the sum-of-squares values obtained for the three interactions. This procedure is known as pooling the error. The error is calculated as follows: ε=

ni  (SSint )j .

(10)

j=1

9) There are different degrees of freedom involved in the process, namely, DFpar for parameters, DFint for interactions, and DFε for the error. Considering that each parameter only takes two different values, several simplifications can be applied, which are DFpar = 1, DFint = 1 and DFε = nI . The next step is to obtain the mean-square (MS) values for the parameters, the interactions, and the error. With the aforementioned simplifications, the MS value for parameters is MSpar = SSpar .

(11)

The MS value for interactions is MSint = SSint .

(12)

The MS value for the error is MSε =

ε . DFε

(13)

10) For each parameter, calculate the ratio Fpar as follows: Fpar =

MSpar . MSε

(14)

11) The term F (α, DFpar , DFε ) represents the critical value of the statistical Fisher–Snedecor distribution and is tabulated in most statistical books [18]. The term α represents the level at which the designer is willing to risk in concluding that a significant effect is not present when, in actuality, it is. If the calculated Fpar ratio is greater than the tabulated value of F (α, DFpar , DFε ), then the parameter actually has a significant effect on the MTBF and should be included in the optimization procedure. Otherwise, it should be excluded.

12) For a particular α, the parameters that have the highest impact were identified in the previous step. To improve the MTBF, the optimum settings can be obtained by inspecting the following prediction equation for n parameters: MTBF = MTBF +

n 

ΔAvgpar

par=1

F(α,DFpar ,DFε )

(15)

where MTBF is calculated with (1). To optimize the design, the parameters with positive coefficients should be increased up to the maximum value, and the parameters with negative coefficients should be reduced down to the minimum value. IV. D ESIGN E XAMPLE A. Set MTBF The MTBF selected is 12 years or 105 120 h. B. Select Power Topology For the sake of simplicity, it will be assumed that the inverter topology, the integrated boost inverter shown in Fig. 1, is already defined. This is a symmetrical circuit formed by two bidirectional dc/dc converters. Each one generates a dc output plus an alternating voltage at the mains frequency, each 180◦ out of phase from one another. The output is obtained in a differential manner, and each converter provides half the output power. C. Model Based on DOE Technique 1) Determine Parameters to Be Considered: For gridconnected PV systems, it has been found that the power range Po , the switching frequency fs , the solar cell voltage Vin , and the grid voltage Vca are the main parameters considered when selecting a power topology. This arises from the reliability analysis made to diverse topologies [19]. Therefore, n = 4, and a DOE including these parameters should provide an insight of how they affect the reliability. 2) Select Parameter Levels: This involves selecting the minimum and maximum values for the four parameters selected previously. The settings are listed in Table I. 3) Select Combinations: Considering that n = 4, there will be eight combinations. The design matrix is shown in Table II. The converter should be designed for each parameter combination.

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TABLE II ORTHOGONAL DESIGN MATRIX WITH MTBF RESULTS

TABLE III INTERACTIONS AND AVERAGE MAXIMUM AND MINIMUM VALUES

D. MTBF Computations Calculate the circuit components and compute the MTBF for all the parameter combinations in the design matrix. The boost inverter (Fig. 1) is designed with the data indicated in the second to fifth columns, with one design for each row. The component values are calculated following the design procedure described in [12]. The inductor value can be calculated with L=

2 2 Vin Vca √ 2 . 0.11Po fs 2Vca + Vin

The output current rms value is    √ Vin 2 Po 1.5 + 2 1 + 2 . Irms = 4Vin Vca

(16)

(17)

The capacitor value is C=

Po √ 2 . 0.02fs 2Vca + Vin

The maximum value of the capacitor voltage is √ V cmax = Vin + 2Vca .

(18)

(19)

Once the components’ values are known, the electrical stresses can be obtained through simulations. The reliability calculations were performed using RELEX [20], a commercial software package that includes a database with the component failure rates and executes the procedure in MIL-HDBK 217. It calculates stress factors from maximum voltage, current, and power dissipation for each component. It also calculates and plots reliability parameters, such as failure rate or MTBF, and its behavior as function of temperature or time. It should be noted that the calculations only included the elements in the power stage. The control circuitry and other elements, such as the transistor drivers, were not included in the analysis. The results are shown in the rightmost column of Table II.

F. Statistical Analysis The results are analyzed using statistical analysis tools to determine which parameters and/or interactions have a significant effect on the MTBF desired. 1) Calculate Overall Arithmetic Average MTBF: The result is shown in the bottom row of Table II. The number of interactions is selected considering the nonrepetitive binary combinations of two parameters. Considering that there are four factors, the corresponding combinations are AB or CD, BC or AD, and AC or BD. Table III lists these interactions. 2) Calculate Averages: For the parameters, calculate the arithmetic averages of the MTBF obtained when the parameter considered is maximum, when it is minimum, and the difference. The detailed procedure for parameter A is as follows. First, Avg(Min)A is the arithmetic average of the values listed in the MTBF column, rows 1–4 in Table III Avg(Min)A = (53.3 + 48.9 + 49.6 + 49.8)/4 = 50.4. (20) In turn, Avg(Max)A is the arithmetic average of the values listed in the MTBF column, rows 5–8 in Table III Avg(Max)A = (59.8 + 57.8 + 64.2 + 45.3)/4 = 56.7 (21) ΔAvgA = Avg(Max)A − Avg(Min)A = 56.7 − 50.4 = 6.3.

3) Calculate Sum of Squares: It is necessary to calculate the sum of squares for each parameter. Using parameter A again as an example, the process is as follows: SSA =

E. MTBF Verification None of the combinations in the design matrix achieve the desired MTBF; therefore, it is necessary to continue with the optimization procedure.

(22)

2n−1 24−1 (ΔAvgA )2 = (6.3)2 = 79.4. n 4

(23)

4) Calculate Averages: For the interactions, calculate the arithmetic averages of the MTBF obtained when the interaction considered is maximum, when it is minimum, and

CHAN AND CALLEJA: DESIGN STRATEGY TO OPTIMIZE RELIABILITY OF PV SYSTEMS

TABLE IV RESULTS FROM ANALYSIS OF VARIANCE

TABLE V STRESS FACTORS FOR INDUCTORS, TRANSISTORS, AND CAPACITORS

the difference. For example, the procedure for interaction AB or CD is as follows: Avg(Max)AB or CD = (53.3 + 48.9 + 64.2 + 45.3)/4 = 52.9. (24) 5) Calculate Sum of Squares: It is necessary to calculate the sum of squares for each interaction SSAB (or) CD =

2 2n−1  ΔAvgAB (or) CD n

24−1 (−1.3)2 = 3.4 4 2 2n−1  ΔAvgAC (or) BD = n =

SSAC (or) BD

= SSAD (or) BC = =

2

4−1

4 n−1

2

n

(−4.1)2 = 33.7 

ΔAvgAD (or) BC

(25)

(26) 2

24−1 (−3.1)2 = 19.2. 4

3 

(SSI )j = 3.4 + 33.7 + 19.2 = 56.3.

10) Optimize Parameters: From the analysis of variance, the parameters A, C, and D were found to be significant at the 25% level. Based on (15) and using the data in Table III, the equation to be inspected in order to maximize the MTBF is    6.3  5.3  6.3  − − MTBF = 53.5 + 2.02 A 2.02 C 2.02 D   MTBF = 53.5 + 3.1A − 3.1C − 2.6D .

(27)

(28)

7) Calculate MS Values: The only value that has to be calculated is the one corresponding to the error 56.3 ε = = 18.8. DFε 3

(29)

8) For Each Parameter, Calculate Ratio Fpar : The result for parameter A is as follows: FA =

79.4 MSA = = 4.2. MSε 18.8

(32)

Based on these results, the switching frequency and the power level should be reduced and the solar array voltage increased. The magnitude of the coefficients gives an estimate of how much the associated parameter impacts on the MTBF. The switching frequency and the input voltage have the highest effect, followed by the power level.

To identify the relationships between the parameters selected and the failure rates of the devices used, it is necessary to perform a reliability analysis at the component level. The MIL-HDBK 217 handbook lists base failure rates λb for electronic devices. To estimate the reliability of an electronic assembly, it is necessary to first calculate the actual failure rates λC of the components involved. The actual values are obtained by multiplying the listed λb values by the π factors that take the stresses into account. The actual failure rate is given by

j=1

MSε =

(31)

G. Identify Critical Components in Topology and Stress Factors With Highest Contribution to Failure Rate

6) Calculate Error: The error can now be calculated ε=

4469

(30)

9) Compare Fpar Versus F (α, DFpar , DFε ): For α = 25% and parameter A, we have F (0.25, 1, 3) = 2.02 [19]. Considering that the calculated FA is larger than the tabulated F (0.25, 1, 3), parameter A is considered to have an impact on the MTBF. The results obtained from the calculations performed in this stage are summarized in Table IV.

λC = λb

n

 πi

(33)

i=1

where n is the number of π factors for each device. MTBFC is given by MTBFC = λ−1 C .

(34)

The inverter in Fig. 1 is built with transistors, capacitors, and inductors. The corresponding stress factors are listed in Table V. The factor πT is related to the temperature. It can be calculated with the expressions listed in Table VI. The term Tj is the junction temperature, in degree Celsius, for transistors and diodes or the hot-spot temperature for inductors and capacitors. It can be calculated using Tj = Tc + θjc Pd

(35)

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TABLE VI TEMPERATURE STRESS FACTORS

TABLE IX STRESS FACTORS AND BASE FAILURE RATES FOR CRITICAL DEVICES

TABLE VII QUALITY FACTORS THAT APPLY TO TRANSISTORS

TABLE VIII APPLICATION FACTOR FOR TRANSISTORS Fig. 3.

where Tc is the case temperature, θjc is the thermal resistance between the junction and the case (or hot spot and case), and Pd is the power dissipated by the device. The quality factors πQ are listed in Table VII. The JANTX and JANTXV are high-quality devices in a robust package. The factor πE depends on the operational environment, namely, (G) ground, (N) seaborne, (A) airborne, (M) missile, etc. In this case, it is assumed that the environment is ground benign (GB ) and πE = 1. The application factor πA basically depends on the power handled by the device, as listed in Table VIII. In this case, the transistors operate in the switching nonlinear mode. The factor πC depends on the capacitance value C, expressed in microfarads, and based on πC = C 0.23 .

(36)

The factor πV depends on the ratio S between the voltage applied to the capacitor and its rated voltage. This factor is calculated with  5 S + 1. (37) πV = 0.6 A reliability analysis was performed using a case temperature equal to 55 ◦ C. The system specifications are as follows: Po = 500 W, fs = 50 kHz, Vin = 48 V, Vca = 220 V at 60 Hz. Based on (16), , , –(19), L1 − L2 = 314 μH, Irms = 5.8 A, C1 −

MTBF versus temperature factor πT .

C2 = 3.87 μF, and V cmax = 359 V. The transistors selected were COOLMOS devices in a plastic package T1 − T4 = SPP08N50C3 (θjc = 1.5). A commercial quality factor was used for the capacitor (electrolytic and aluminum). Table IX lists the stress factor and base failure rates for the transistor and the capacitor. The analysis yields failure rates equal to 15.251 failures per 106 h for transistors, 0.336 failures per 106 h for capacitors, and 0.001 failures per 106 h for transistors. Electrolytic capacitors are often considered the most failureprone component. In this case, however, the MOSFETs exhibit the highest failure rate. Similar trends have been found in other analyses [21], [22]. According to capacitor manufacturers, the explanation is that reliability was previously estimated using models based on temperature alone. Moreover, new technologies have drastically improved the operational life. Considering that the transistor has the highest failure rate, it is necessary to improve its stress factors. The factors πE and πA related to environment and application, respectively, cannot be changed. In the πT calculation, RELEX adds the ambient temperature (30 ◦ C) to the junction temperature. Overall transistor losses are 25.5 W, where 81% corresponds to conduction losses, 4% to commutation losses, and the remaining 15% is related to the gate drive. Thus, the temperature-related factor πT can be improved by reducing the conduction losses. This can be done by using transistors rated at higher currents, therefore having lower on-resistances. Fig. 3 shows the MTBF obtained for different temperature factors. Another factor that can be changed is πQ , which is related to the quality and to the transistor package. Fig. 4 shows the relationship between MTBF and the quality factor πQ . For the capacitor, the factors with the highest impact are πT (related to temperature) and πV (related to the voltage rating).

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VI. D ISCUSSION

Fig. 4.

MTBF versus quality factor πQ .

Fig. 5.

MTBF versus voltage factor πV of capacitor. TABLE X MTBF AND FAILURE-RATE OPTIMIZATION

However, as shown in Fig. 5, the capacitors do not contribute significantly to the MTBF.

V. MTBF O PTIMIZATION When analyzing the MTBF trends, it is possible to improve the converter reliability. If the MTBF design objective is 12 years (approximately 105 000 h), then an overall failure rate FR < 9.55 failures/106 h is needed. Taking the trends shown in Figs. 3–5 into account, the following parameters were selected for the final design: Po = 500 W, fs = 50 kHz, Vin = 48 V, Vca = 220 V, πQ = 5.5, πV = 2, and πT = 3.58. The design included a capacitor whose minimum operating voltage was equal to 680 V. The power circuit included transistors rated at 13.1 A at 100 ◦ C, with an on-resistance equal to 0.19 Ω (model SPP21N50C3). Table X lists the MTBF and the failure rates obtained with and without optimization. It can be readily appreciated that it is possible to obtain MTBF > 100 000 h.

The strategy described helps identify the design parameter combination that provides the best MTBF. It should be noted, however, that the prediction equation does not yield an actual estimate of the MTBF life expected. Rather, it represents the magnitude of the impact that each parameter has on the MTBF. The coefficients in (32) resemble the sensitivity factors used in other applications, such as the design of analog filters. The sensitivity analysis requires a differentiable mathematical expression relating the cause and the effect. In many cases, the relationship is not available, and it is much easier to apply the method described in this paper. In the example presented, it was assumed that the power range Po , the switching frequency fs , the solar cell voltage Vin , and the grid voltage Vca could all be varied freely within the ranges specified in Table I. This is not always the case. For instance, the output voltage might be defined by the application and cannot, therefore, be included in the DOE analysis. As a rule, only parameters that can be controlled must be specified. The MIL HDBK 217F procedure was selected for the reliability calculations because it can be applied without actually building the converter, and it is still most widely accepted in the aerospace and military industry, although it is generally viewed as pessimistic. Several simplifications were performed, such as the case temperature in the switching devices, which was assumed constant throughout the calculations. If a maximum ambient temperature is specified, the heatsink thermal resistance can be calculated using the well-known electrothermal analogy. The calculation, however, will yield a positive result unless the case temperature is lower than the ambient temperature; however, there is a limit to the minimum value that can be practically attained. Adding the extra complexity of the thermal design (which must also be performed for each parameter combination) makes sense if there are other relevant issues. For example, an application might require that the converter volume be taken into account. A smaller volume most likely will imply a smaller heatsink, a higher temperature, and a shorter MTBF. Further, when designing a system, it is not always possible to know in advance the junction or core temperatures within each component. Therefore, it is advantageous that the reliability prediction models allow flexibility in how these temperatures are calculated. The software package selected supports several reliability calculation models. When appropriate, they include different temperature calculation methods. Based on the information available, the reliability analyst can select the method best suited to the application. Once the best design parameter combination has been selected, the reliability can be improved by reducing the stress factors, particularly πT , which usually has the highest impact. Lowering the case temperatures always provides a longer MTBF and will produce even better results when the design parameters are properly selected. VII. C ONCLUSION This paper has presented a strategy to select the design parameters for inverters in PV systems, in such a way that

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the reliability is optimized. The strategy is based on the DOE technique. It involves designing the inverter several times, each time with a different set of specifications, and calculating the reliability for each design performed. The technique identifies the parameters with the highest impact on the reliability. Therefore, the design specifications can be established in a systematic manner. Once a set of design parameters has been selected, the reliability can be further improved by judiciously modifying the stress factors. At first glance, the technique might seem disadvantageous because it is computationally intensive. However, nowadays, the computational burden is simplified because there are many software tools available. The technique makes sense if the goal is to have a sturdy reliable design and the design cycle can be drastically shortened. The methodology is exemplified with an integrated boost inverter and a desired MTBF of 12 years. R EFERENCES [1] IEA-PVPS, Performance, Analysis and Reliability of Grid-Connected PVSystems in IEA Countries, 2003. [Online]. Available: www.iea-pvps.org [2] IEA-PVPS, Reliability Study of Grid Connected PV Systems: Field Experience and Recommended Design Practice, 2002. [Online]. Available: www.iea-pvps.org [3] F. Blaabjerg, R. Teodorescu, M. Liserre, and A. V. Timbus, “Overview of control and grid synchronization for distributed power generation systems,” IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 1398–1409, Oct. 2006. [4] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, “A review of single-phase grid-connected inverters for photovoltaic modules,” IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005. [5] W. Xiao, W. G. Dunford, P. R. Palmer, and A. Capel, “Regulation of photovoltaic voltage,” IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 1365– 1374, Jun. 2007. [6] J.-M. Kwon, K.-H. Nam, and B.-H. Kwon, “Photovoltaic power conditioning system with line connection,” IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 1048–1054, Jun. 2006. [7] Y. Xue, L. Chang, S. B. Kjaer, J. Bordonau, and T. Shimizu, “Topologies of single-phase inverters for small distributed power generator: An overview,” IEEE Trans. Power Electron., vol. 19, no. 5, pp. 1305–1314, Sep. 2004. [8] R. H. Bonn, “Developing a next generation PV inverter,” in Proc. IEEE Photovolt. Spec. Conf., 2002, pp. 1352–1355. [9] S. González, C. Beauchamp, W. Bower, J. Ginn, and M. Ralph, “PV inverter testing, modeling, and new initiatives,” in Proc. NCPV Solar Program Rev. Meeting, 2003, pp. 537–540. [10] T. Shimizu, K. Wada, and N. Nakamura, “Flyback-type single-phase utility interactive inverter with power pulsation decoupling on the DC input for an AC photovoltaic module system,” IEEE Trans. Power Electron., vol. 21, no. 5, pp. 1264–1272, Sep. 2006. [11] J. Kinght, S. Shirsavar, and W. Holderbaum, “An improved reliability CuK based solar inverter with sliding mode control,” IEEE Trans. Power Electron., vol. 21, no. 4, pp. 1107–1115, Jul. 2006. [12] R. O. Cáceres and I. Barbi, “A boost dc–ac converter: Analysis, design, and experimentation,” IEEE Trans. Power Electron., vol. 14, no. 1, pp. 134–141, Jan. 1999.

[13] F. Chan, H. Calleja, and E. Martinez, “Grid connected PV systems: A reliability-based comparison,” in Proc. IEEE Int. Symp. Ind. Electron., 2006, pp. 1583–1588. [14] X. Tian, “Design for reliability and implementation of power converters,” in Proc. IEEE Rel. Maintainab. Symp., 2005, pp. 89–95. [15] G. Chen, R. Burgos, Z. Liang, F. Lacaux, F. Wang, D. Boroyevich, J. D. Van Wyk, and W. G. Odendaal, “Reliability oriented design considerations for high power converter modules,” in Proc. IEEE Power Electron. Spec. Conf., 2004, pp. 419–425. [16] C. R. Hicks, Fundamental Concepts in the Design of Experiments. New York: Holt, Rinehart and Winston, 1982. [17] Department of Defense, MIL-HDBK-217F Reliability Prediction of Electronic Equipment, 1991, Arlington, VA. section 4. [18] J. W. Barnes, Statistical Analysis for Engineers and Scientists: A Computer-Based Approach. New York: McGraw-Hill, 1994, p. 366. [19] F. Chan and H. Calleja, “Reliability: A new approach in design of inverters for PV systems,” in Proc. IEEE Int. Power Electron. Congr., 2006, pp. 1–6. [20] [Online]. Available: http://www.relex.com/ [21] D. Hirschmann, D. Tissen, S. Schroder, and R. De Doncker, “Reliability prediction for inverters in hybrid electrical vehicles,” in Proc. IEEE Power Electron. Spec. Conf., 2006, pp. 1–6. [22] M. Aten, G. Towers, C. Whitley, P. W. Wheeler, J. C. Clare, and K. J. Bradley, “Reliability comparison of a matrix and others converter topologies,” IEEE Trans. Aerosp. Electron. Syst., vol. 42, no. 3, pp. 867– 875, Jul. 2006.

Freddy Chan received the B.S. degree in electronic engineering from Mérida Institute of Technology, Mérida, México, in 1996, and the M.S. and Ph.D. degrees in electronic engineering from the National Center for Research and Development of Technology, Cuernavaca, Morelos, México, in 1999 and 2008, respectively. He is currently a Professor with the Department of Sciences and Engineering, Quintana Roo University, Chetumal, México. His research interests include energy-conversion and reliability issues in photovoltaic systems.

Hugo Calleja (M’90–SM’01) received the Ph.D. degree in electrical engineering from the National Center for Research and Development of Technology, Cuernavaca, Morelos, México, in 2000. He was a member of the Engineering Faculty of the National Autonomous University of Mexico, México, México, for six years, and he was with the Institute for Electrical Research, Cuernavaca, for nine years, where he was in charge of the development of metering equipment. Since 1993, he has been a full-time Professor with the National Center for Research and Development of Technology, where he is currently engaged in the design of photovoltaic (PV) systems. He is author of a book on electronic circuits for data acquisition. His research interests include electronic instrumentation for power-electronics and reliability issues in PV systems.