Dimensional Constraints on High Aspect Ratio Silicon Microstructures ...

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Available electronically February 8, 2002. Electrochemical etching of silicon in hydrofluoric acid (HF) elec- trolyte is a well known technique for the formation of ...
Journal of The Electrochemical Society, 149 共3兲 C180-C185 共2002兲

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Dimensional Constraints on High Aspect Ratio Silicon Microstructures Fabricated by HF Photoelectrochemical Etching G. Barillaro,z A. Nannini, and F. Pieri Dipartimento di Ingegneria dell’Informazione: Elettronica, Informatica, Telecomunicazioni Universita` di Pisa, 56126 Pisa, Italy The fabrication of macropores in crystalline silicon by photoelectrochemical etching in a hydrofluoric acid electrolyte is investigated. It is shown that the dimensional constraints on the pore diameters, which, in previous literature, are considered to depend on substrate doping, can be significantly relaxed. We show that it is possible to fabricate arrays of square section macropores with sides ranging from 2 to 15 ␮m using the same n-doped 共2.4-4 ⍀ cm兲 silicon substrate. Moreover, we demonstrate that macropore arrays with pitch variation up to 100% 共8 and 16 ␮m兲 can be simultaneously grown on the same silicon sample. The same process is used to fabricate arrays of silicon walls with different spacing and pitch as well. A simple model, based on the coalescence in a single pore of multiple stable pores, is proposed to explain the experimental data. © 2002 The Electrochemical Society. 关DOI: 10.1149/1.1449953兴 All rights reserved. Manuscript submitted July 9, 2001; revised manuscript received October 19, 2001. Available electronically February 8, 2002.

Electrochemical etching of silicon in hydrofluoric acid 共HF兲 electrolyte is a well known technique for the formation of porous silicon.1,2 The dissolution of silicon in the electrolyte is activated by holes. In p-silicon electrodes holes are the majority carriers, so that it is possible to produce porous silicon simply by etching the sample in an HF-based solution, even in the dark. For n-type silicon, the majority carriers are electrons, so that it is necessary to generate holes in order to produce porous silicon. Depending on the silicon doping and on the type of the anodized silicon substrate, different pore morphologies can be obtained. In fact, microporous layers characterized by random pores with nanometric dimensions can be easily grown on p-type substrates,3 while macroporous layers with micrometric straight pores can be obtained from n-type substrates.4 In the last case, by illuminating the rear surface of the wafer with sufficiently energetic photons, holes can be generated in the substrate by a process of photon absorption. Under anodic biasing conditions, the photogenerated holes move to the front surface and silicon dissolution takes place. Initially, the electric field concentrates at sharp defects on the flat wafer surface. Surface defects therefore act as seeding points for macropore formation. As the etch progresses, the electric field still concentrates at the pore tips, where most of the injected holes react with the electrolyte. Fewer holes are then available for the dissolution of the sidewalls, that are therefore protected against dissolution.5 By prepatterning the wafer surface with defect sites it is possible to determine where macropores will form. KOH etching after a standard photolithographic step can be used to create pyramidal notches in the required positions which can act as an array of defects. Both random5,6 and prepatterned7 macropore arrays with high aspect ratio 共up to 250兲 were fabricated through the wafer thickness8 and on the whole wafer.9-11 The macropore morphology significantly depends on the anodization conditions, such as current density, etching time, HF concentration, temperature, and bias, as well as on substrate properties, such as doping and orientation. The feasibility of different pore geometries and patterns and their dependence on growth conditions was discussed in detail by Lehmann et al.12 Although the pore diameter could be related to the porosity alone, which can be accurately controlled by varying the current density, they report that the substrate resistivity severely limits the range of feasible pore diameters; they propose a rule of thumb giving the appropriate substrate resistivity in ohms per centimeter as the square of the desired pore diameter in micrometers. They also report that the sensitivity to the macropore growth process on the relation between pitch and doping density is so high that a reduction of the pitch by only 3% changes a perfect pore pattern to an imperfect one. The main purpose of this paper is to show that, although the

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above limit is actually undeniable, the diameter of the pores and pitch can be varied on a wide range independently of the substrate resistivity. Regular macropore arrays with sides ranging from 2 ␮m up to 15 ␮m were fabricated using a silicon substrate with 2.4-4 ⍀ cm resistivity. Moreover, macropore arrays with a change in the pitch of 100% were simultaneously fabricated on the same sample. The fabrication process is described, and the macropore formation is discussed. We also report the feasibility of this process to fabricate high aspect ratio silicon structures as wall arrays with different thickness and pitch. Finally, a model for the pores formation, which is able to explain the experimental results, is proposed. The model is based on the self-organization and coalescence of several stable pores to form a single one and includes the commonly accepted model of macropore formation as a particular case for small dimensions of the pattern. Fabrication Process The experimental setup used for macropores formation is sketched in Fig. 1. The electrochemical cell is made of polytetrafluoroethylene 共PTFE兲 and has a volume of 400 cm3 . The front side of the silicon sample is in contact with the electrolyte. The electrolyte composition is 1:2:17 共vol兲 HF 共48%兲: C2 H5 OH 共99.9%兲: H2 O. Ethanol is added to reduce hydrogen bubble formation at the sample surface, a technique commonly used for microporous silicon formation.13 For the same reason, the solution is stirred during the anodization process. The area of the sample exposed to the electrolyte is about 0.6 cm2 and has a circular shape. Electron hole pairs are generated by illuminating the back side of the sample with a 300 W halogen lamp, 20 cm from the sample, through a circular window in the metal foil used to provide the electrical contact to the sample. The power supply of the lamp can be varied to modulate the etching photocurrent. The counter electrode is a platinum wire immersed into the electrolyte, close to the sample surface 共about 5 mm兲. An HP4145B parameter analyzer is used to apply the anodization voltage and to monitor the etching current. All the experiments are executed at room temperature. The sample material is an n-type silicon wafer, 具100典 oriented, 2.4-4 ⍀ cm resistivity, 550 ␮m thick, single-side polished. A preliminary study of Si-HF electrochemical system was carried out in order to find the region for stable pore growth. Typical J-V curve obtained for our Si-HF system for high light intensity 共about 150 W兲 is shown in Fig. 2. In agreement with the literature,5 a current limit peak J ps ⫽ 35 mA/cm2 at 2.5 V, separating silicon porous formation and electropolishing regimes, was observed in the anodic region of the characteristic. Random macropore arrays were then fabricated for several etching currents below J ps and constant anodization voltage of 3 V, above the voltage of the current limit peak, as suggested in Ref. 8.

Journal of The Electrochemical Society, 149 共3兲 C180-C185 共2002兲

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Figure 1. Electrochemical cell used for macropore fabrication.

The macropore average diameter has been estimated by scanning electron microscope 共SEM兲 observations in about 2 ␮m, in agreement with the literature data.5 The same silicon substrate was used to fabricate regular high aspect ratio structures, following the fabrication process sketched in Fig. 3. A silicon dioxide layer 共5000 Å thick兲 was grown on the sample by thermal oxidation 共Fig. 3a兲. A pattern was defined using a standard photolithographic process. The patterns were arrays of square holes of different side and pitch, and arrays of straight lines with different width and pitch. Some of the studied dimensions are summarized in the first column of Tables I and II. A buffered hydrofluoric acid 共BHF兲 etch was then used to transfer the pattern to the silicon dioxide 共Fig. 3b兲. Pyramidal notches were created by KOH etching through the patterned silicon dioxide 共Fig. 3c兲. Electrochemical etching in HF was then used to fabricate regular structures in the silicon substrate 共Fig. 3d兲, using the above described electrochemical cell. The last step of the process was a drying one, performed in air at 95°C for 10 min. The fabricated samples were finally cleaved to allow SEM observations of the cross sections.

Figure 2. Typical J-V curve for the HF-Si electrochemical system under examination.

Figure 3. Schematic steps for prepatterned macropore fabrication.

Results and Discussion Patterned pores with sides ranging from 2 ␮m up to 15 ␮m were fabricated starting with the aforementioned silicon substrate, using the above detailed process. The sample porosity was changed between 25 and 90%, starting with a fixed initial pattern and only varying the etching current. In Fig. 4 an SEM cross section of a square hole array with pitch of 16 ␮m having pores with side of 15 ␮m, corresponding to 90% of porosity, is shown. Macropores are about 35 ␮m deep, corresponding to 20 min of etching time. The porosity p of the array, defined as the ratio between the volume of etched silicon and the total initial volume, is determined, at the steady state, by the etching current density J according to the relation p ⫽ J/J ps , where J ps is the critical current density at the pore tips.8 Varying the etching current density is then a viable way to control the porosity of the sample under etching. Consequently,

Figure 4. SEM cross section of a macropore array with a pitch of 16 ␮m having pores with sides of 15 ␮m. The porosity of the fabricated array is 90% according to the density current used in the experiment.

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Journal of The Electrochemical Society, 149 共3兲 C180-C185 共2002兲

Table I. Condition of fabricated macropore arrays for different dimensions and porosities. An X means a flawless sample, a B means lateral branching, while ‘‘Õ’’ means a sample that cannot be fabricated „see text…. Porosity Hole square array

⬍25%

25%

50%

75%

80%

85%

90%

2 ␮m pitch 4 ␮m 4 ␮m pitch 8 ␮m 8 ␮m pitch 16 ␮m

/ B B

X X B

X X X

X X X

X X X

X X X

X X X

starting with the same initial pattern, it is possible to change the geometrical dimensions of the pores. Indeed, for an orthogonal pattern of square holes with pitch r, where the pitch is defined as the period of the pattern, the pore side s is, from simple geometrical considerations, s ⫽ rp 1/2. In Table I some of the fabricated structures are summarized. For each row, we report in the first column of the table the KOH starting pattern 共shape and geometrical dimensions of pattern before the anodization process兲 and in the next columns the porosity values obtained for the fabricated samples. In the table we indicate with an X the patterns obtained without any defect, while the B indicates samples in which branching of the pores occur; finally, the ‘‘solidus’’ character means that the sample cannot be fabricated with the specified porosity value 共as is clarified below兲. For instance, in the last row of the table we can see that starting from an initial KOH squared hole array with 8 ␮m side and 16 ␮m pitch, it is possible to vary the porosity of the anodized sample from 50 to 90%, using a proper etching current. No branching of primary pores is observed for the above specified porosity. It must be noted that, in the above example, a value of porosity of 90% corresponds to pores with sides of 15 ␮m, while the width of the silicon walls between two adjacent pores is 1 ␮m. When the porosity is 25% or lower, branching of primary pores is observed in the silicon wall separating pores. For a 25% porosity, the initial pattern was simply transferred to the silicon substrate; the side of pores and the wall thickness between the adjacent pores of anodized sample remains 8 ␮m as in the mask. In order to explain the use of the solidus character we observe that, due to the fact that the average diameter of the random pores is about 2 ␮m for the used substrate, it is not possible to fabricate samples with porosity requiring pores with diameters less than 2 ␮m. This is, for instance, the case reported in Table I for a porosity ⬍25% with starting pattern 2 ␮m side, 4 ␮m pitch square hole array. No limit for upper porosity is found in our samples. As matter of fact, branch-free, regular macropore arrays with porosity up to 90% were fabricated 共see Table I兲. On the contrary, it is evident from Table I that a porosity lower limit exists. Below the lower porosity limit secondary pores, 具100典 oriented, grow in the silicon walls separating the primary ones. This effect was explained by considering the width of the walls separating neighboring primary pores. It is commonly accepted8 that the macropore growth process is ruled by the extension of the space charge region around the pore tips, so that when the wall width between neighboring pores is about twice that of the space-charge region, too few holes penetrate in the silicon wall to promote silicon dissolution, and no pores grow in the silicon between adjacent ones. On the contrary, when the wall thickness becomes wider, more holes, generated deep in the substrate, can diffuse into the silicon walls and reach the Si-HF interface, where they react with the electrolyte giving rise to the growth of secondary pores. The space-charge region width w for the electrochemical system under investigation can be estimated from the Schottky contact theory14 w ⬇ 共 2␧␧ 0 V J /eN D兲 1/2 with ␧ and ␧ 0 , respectively, the dielectric constant of Si and the vacuum permittivity, V J junction voltage, e elementary charge, and N D the concentration of donors. All the experiments were performed

with an anodization voltage of 3 V; assuming that all the voltage drops at the silicon-electrolyte interface, we obtain an excess estimation of w ranging between 1.4 and 1.7 ␮m for the silicon substrate doping we used. In our samples, branching of primary pores is observed when the wall thickness between near pores is greater than 4 ␮m, which is more than twice that of the space-charge width. This result does not completely agree with the predictions for macropores formation in n-type silicon which are based on the aforementioned space-charge region model. Results in agreement with our experiments were reported by Foll et al.15 for random macropores in a silicon wafer with the same orientation and similar resistivity. This fact seems to suggest that hole diffusion in the substrate is probably the main limiting effect for pore branching, but other phenomena should also be considered in order to properly model the pore branching, for instance, the ohmic resistance in the narrow nondepleted region between adjacent pores could play a role as well. The experimental data suggest that for macropore array fabrication, once the substrate resistivity is fixed, no higher limit exists for porosity; any increase of it simply results in larger pores and thinner walls separating pores. A limit was found, however, for the thickness of the silicon walls separating adjacent pores. In fact, once the initial pattern is given, a minimum value always exists for the porosity of the macropore array, corresponding to a maximum width for the silicon wall separating pores. Below this porosity limit it is not possible to fabricate branch-free patterned pores. Arrays with different dimensions can be grown on the same silicon sample, once the porosity 共that is, the etching current density兲 has been chosen. Two different patterns with a 100% pitch variation were fabricated on the same sample; an SEM top view is shown in Fig. 5. The initial pattern in the oxide was constituted by two arrays, 4 ␮m squares with a pitch of 8 ␮m, and 8 ␮m squares with a pitch

Figure 5. SEM top view of two difference macropore arrays with 100% pitch variation. A macropore array with 14 ␮m side and 16 ␮m pitch 共left兲 was fabricated simultaneously with an array with 7 ␮m side and 8 ␮m pitch 共right兲. Random macropores present in the area between the arrays were destroyed by the drying step.

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Figure 7. SEM cross section of a wall array. Thickness of the walls is about 2 ␮m, while the spacing is 6 ␮m, corresponding to 75% porosity. The walls shown are 25 ␮m deep.

in Table II, in a similar manner to the macropores case of Table I. Again, no limit is found for higher porosity. However, as in the case of macropore arrays, a lower limit exists, but it is clear from Table II that the maximum allowable width of silicon walls is significantly greater 共up to 6 ␮m兲 than the maximum width in square arrays. This could be explained by considering the field effect of corner existing in the macropore arrays between four neighboring pores. In fact, in the wall array no angles exist focusing electric field lines, so that a reduced number of holes, coming from the substrate, are present in the silicon walls, due to insignificant drift field effect. So, it should be again considered that not only the space-charge layer, but also hole path resistance and geometrical shape of the fabricated structures could influence the thickness of the silicon walls in the electrochemical etching and thus the lower limit of the porosity. A SEM cross section of a wall array is shown in Fig. 7. The array was obtained by the anodizing of a KOH pattern of 4 ␮m wide straight lines with a pitch of 8 ␮m. Thickness of the walls is about 2 ␮m, while the spacing is 6 ␮m, corresponding to 75% porosity, according to the current density used in the experiment. The walls are about 25 ␮m deep. The above reported experimental results do not completely agree with the commonly accepted limits reported in Ref. 12. As already pointed out, the theoretical relationship concerning porosity and pore diameter only depends on the etching current density; however, in Ref. 12 the substrate resistivity was found to be crucial for the pore diameter. This is reasonable when the macropore growth process is supposed to depend only on the extension of the space-charge region at the pore tips. In fact, if the stable pore diameter reduces with the depletion region width, which in turn depends on the doping density of the substrate, a misadjustment of pitch and/or doping density leads to branching of pores for high doping densities or to dying pores for low doping densities. The region of stable pore diameters is, then, a narrow function of the substrate resistivity. On the basis of their results the sensitivity of the system to small varia-

Figure 6. SEM cross section of a macropore array. Thickness of the walls is 1 ␮m, while the side of pore is 7 ␮m, corresponding to 75% of porosity. Pores shown are about 35 ␮m deep. It is evident that 16 stable pores grow and join to build the single structure 共zoom兲.

of 16 ␮m. With a proper choice of the current, a pore array with a 14 ␮m side and a 16 ␮m pitch 共Fig. 5, left兲 and an array with a 7 ␮m side and a 8 ␮m pitch 共Fig. 5, right兲 were simultaneously fabricated. A SEM cross section of the Fig. 5 left array is shown in Fig. 6. Pores shown in Fig. 5 and 6 are 35 ␮m deep, corresponding to 20 min of etching time with 27 mA/cm2 etching current density. Interestingly, the obtained porosity is greater than that of the initial pattern 共25% for both arrays兲, and it is found to be about 75% in both arrays, in agreement with the current density used in the experiment. It must be noted that the abrupt end of the pattern does not lead to branching of pores. Wall arrays were also fabricated, using KOH patterned straight lines as initial nucleation sites for electrochemical silicon etching. Dimensions and porosity of the fabricated structures are summarized

Table II. Condition of fabricated wall arrays for different dimensions and porosities. For the meaning of symbols refer to Table I. Porosity Wall array 2 ␮m pitch 4 ␮m 4 ␮m pitch 8 ␮m 8 ␮m pitch 16 ␮m

⬍25%

25%

50%

75%

80%

85%

90%

/ B B

/ X B

X X B

X X X

X X X

X X X

X X X

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Journal of The Electrochemical Society, 149 共3兲 C180-C185 共2002兲 ing primary pores is not too thick, according with data reported in Table I and Table II, no secondary pores grow deep in the silicon out of the predetermined defects, indeed, because the electric field is localized at the created notches, few holes can reach the Si-HF interface through the silicon separating the etched pitch. Due to the fact that most of the holes coming from the substrate are collected at the sharper and deeper KOH defects any initial dissolution reaction out of the predetermined defects cannot proceed further and only a few holes are available for dissolution of the flat silicon surface. It is known that an equilibrium density for stable random macropores growth exists, which depends on silicon substrate resistivity and anodization parameters 共voltage, current density兲. A redistribution phase starts, then, as soon as the nucleation process terminates. In this phase, some pores stop growing and terminate, whereas other pores, collecting more holes, continue to grow increasing their diameter. Similarly we postulate that, a redistribution process starts, because the density of the macropores growing is greater than the equilibrium density. Thus, the diameter of the growing pores increases to reach the value of stable random pores 共about 2 ␮m for the used substrate兲 共Fig. 8c and d兲. As soon as this redistribution process terminates, the phase of stable pore growth starts yielding an arrangement of pores that is stable and does not signifi-

Figure 8. Schematic steps of time evolution model for HF electrochemical silicon etching 共macropore formation兲.

tions of pitch or doping 共for instance, a reduction of the pitch by only 3%兲 should change a perfect pore pattern to an imperfect one. A rule of thumb for selection of silicon substrate was given, i.e., the square of the desired pore diameter 共in micrometers兲 gives the appropriate substrates resistivity 共in ohms per centimeter兲. For example, 2 ␮m pores could be growth only using a 4 ⍀ cm n-type substrate, and it should not be feasible to fabricate regular macropore array with a side up to 15 ␮m using our substrate. Moreover, the fabrication of regular macropore array with a pitch variation of about 100% should not be possible. On the basis of exhaustive SEM investigation of the fabricated structures, we suggest a macropore growth model which is able to explain our experimental results. It is known that stable random macropore growth on surfaces without prestructured nucleation sites is preceded by two phases of pore nucleation and redistribution.15 We suggest that the same nucleation and redistribution phases still exists for stable macropore growth also on prestructured silicon surface. Moreover, we postulate that the phase of pore redistribution is a crucial step for HF electrochemical silicon etching. The evolution model for HF electrochemical silicon regular macropore formation process is schematically shown in Fig. 8. For the first time, shallow macropores are formed in correspondence to pre-existing defect sites 共Fig. 8a and b兲. The surface density of the shallow macropores could be relatively high, about the defect density of a polished silicon surface 共106 defects/cm2 ). When the silicon between neighbor-

Figure 9. SEM cross sections of two wall arrays fabricated starting with 2 ␮m straight lines and a pitch of 4 ␮m, and different current densities. The width of the initial notch is close to the diameter of stable pores. At 50% porosity 共top兲, corresponding to 2 ␮m pores and walls, a single pore grows at each site, while at 90% porosity 共bottom兲, corresponding to 0.4 ␮m pores and 3.6 ␮m walls, two pores grow at each site.

Journal of The Electrochemical Society, 149 共3兲 C180-C185 共2002兲 cantly change anymore 共Fig. 8e and f兲. The overall structure grows deep without further modification of dimensions and shape. Interestingly, the number of pores growing in the predetermined notch depends on its dimensions. If the typical dimension of the notch is approaching the diameter of stable random pores, only one pore grows in correspondence of the single defect, as reported by the commonly accepted model for macropore formation.8 When the dimension of the defect is much greater than the diameter of the random pores, more pores grow in the defect site and coalesce, creating a structure with a greater dimension. For instance, a 2 ␮m pitch, 4 ␮m square array was fabricated with only one macropore growing at each pyramidal notch, while a 4 ␮m pitch, 8 ␮m square array was fabricated with four macropores growing and joining in each site. In both the experiments, it was necessary to hold the etching density current at 0.25 J ps , corresponding to 25% of porosity, in order to fabricate a pore array having the same geometrical dimensions as the initial KOH pattern. In fact, we found that the number of stable pores growing into a single prepatterned defect depends also on the etching current, once the dimension of the defect is fixed. This is directly related to the dimension of the obtained structure. As matter of fact, it can be noted that starting from a KOH pattern of square holes with a side of 4 ␮m and a pitch of 8 ␮m, when the used etching current is raised at 0.75 J ps , corresponding to 75% of porosity, the number of stable pores growing and joining increases from four 共J ⫽ 0.25 J ps兲 up to sixteen 共see Fig. 6, zoom兲. This is the explanation of the result that, once the initial pattern is assigned, it is possible to vary the porosity of the fabricated sample simply by varying the anodization current density. In Fig. 9 are shown the SEM cross sections of two wall arrays, anodized with proper currents to obtain porosities respectively, of 50% 共up兲 and 90% 共bottom兲. The same initial pattern, straight lines 2 ␮m width with a pitch of 4 ␮m, was used as a seeding pattern for both arrays. It is evident that only one pore grows for 50% of porosity, while two pores grow and join to assemble the final structure for 90% of porosity, according to the above discussed macropore growth model. Similar results about the growth of several pores in a single predetermined defect were reported using isotropic wet etching and RIE notches as seeding points.16 In Ref. 16 it is reported that, due to the higher current density at the corners of any primary notch, the electrochemical etching initially starts at the four corners. In our sample a KOH etching was used for seeding points formation, so that inverse pyramidal defects were fabricated as initial defects. Nonetheless, as discussed above, the number of the pores growing and joining at any notch can be higher than four. Our results suggest

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that, though the effect of the corners is significant in the process of macropore formation, other aspects, as the dimension of the patterned defect and the etching current density, as well as the shape of the defect 共square hole or straight line兲, should be taken into account to properly model the electrochemical etching of the substrate. Conclusions In this paper a study of the photoelectrochemical formation of prepatterned macropores on a silicon substrate with 2.4-4 ⍀ cm resistivity is reported. Dimensional constraints for macropore dimensions as a function of the resistivity of the substrate are shown to be significantly less severe than those reported in the previous literature. Macropore arrays with sides ranging between 2 and 15 ␮m, as well as arrays of walls with comparable dimensions, were fabricated on the same substrate. A simple physical model based on the coalescence of several smaller random pores, which includes the commonly accepted model as a particular case, is proposed to explain the experimental data. This increased flexibility in the choice of the dimensions could allow new applications of the photoelectrochemical etching technique in the field of silicon microfabrication. Universita` di Pisa assisted in meeting the publication costs of this article.

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