A High-Performance DSP-Controller for Parallel Operation of Online UPS Systems Josep M. Guerrero*, Luis García de Vicuña**, Jose Matas**, Jaume Miret**, and Miguel Castilla** *
Department of Automatic Control Systems and Computer Engineering C/Comte d’Urgell, 187. 08036 – Barcelona. Email:
[email protected] ** Department of Electronics Engineering Av. Víctor Balaguer S/N. 08800 – Vilanova i la Geltrú. Email: @eel.upc.es droop method, with the purpose to share the harmonic current content properly. Nevertheless, this control approach has an inherent trade-off between voltage regulation and power sharing. Besides, the droop method exhibits slow dynamic response, since it requires low-pass filters with a reduced bandwidth to calculate the average value of the active and reactive power over one line-cycle [8]. Another important disadvantage of the droop method is its load-dependent frequency deviation, which implies a phase deviation between the output voltage frequency of the UPS system and the input voltage provided by the utility mains. This fact can lead a loss of synchronization that can be a problem in case of overload or failure, since the bypass switch must connect the utility line directly to the critical bus in spite of its phase difference [6]. Consequently, this method, in its original version, can be only applied to offline or lineinteractive UPS systems [9]. Hence, this technique is not applicable to online UPS, since it is mandatory that the output voltage must be continuously in phase with the mains when it is present. In our previous works [10][11], we proposed different control schemes to overcome several limitations of the droop method. However, these controllers by themselves are inappropriate to apply to parallel online UPS systems. In this paper, a novel wireless control scheme is proposed to parallel different online UPS modules with high performance and restricted requirements. The novel droop function ensures both steady-state objectives and proper dynamics. The controller provides: 1) fast transient response; 2) power sharing accuracy for linear and nonlinear loads; 3) stable frequency operation; and 4) good phase matching between the output-voltage and the utility mains. Experimental results are provided from two-1 kVA onlineUPS units connected in parallel, to validate the performance of the proposed control strategy. The controller of each module was implemented by using a TMS320LF2407A 16bit fixed-point digital signal processor (DSP).
Abstract—In this paper, a novel controller for parallelconnected online uninterruptible power supplies (UPS) without control interconnections based on the droop method is presented. The control approach consists in drop the frequency of every module when its output power increases, resulting in an unavoidable nominal frequency deviation. Consequently, this method in its original form is only applicable to off-line or lineinteractive UPS systems. As opposed to the conventional droop method, the proposed control scheme endows proper transient response, strictly frequency and phase synchronization with the ac mains, and excellent power sharing even for nonlinear loads. Hence, this controller is suitable for paralleled online UPS systems. Experimental results are obtained from two parallelconnected 1-kVA online UPS by using TMS320LF2407A DSP.
I. INTRODUCTION
R
ECENTLY, a new generation of uninterruptible power supplies (UPS) with capability to operate independently in parallel is emerging in the Industry. In such systems, the absence of control wires between the modules of the paralleled system is taking importance to improve the reliability without restricts the physical location of the modules [1]. The droop method is often applied to avoid mutual control wires while obtaining good power sharing. In this sense, many wireless controllers have been reported in the literature to connect in parallel UPS inverters [2]-[5]. However, although this technique achieves the highest reliability and flexibility, it has several drawbacks that limit its application. For instance, the conventional droop method is not suitable when the paralleled-system must share nonlinear loads, because the control units should take into account the harmonic current, and at the same time to balance active and reactive power. Recently, novel control loops that adjust the output impedance of the units by adding output virtual reactors [5][6] or resistors [7] have been included into the This work was sponsored by the Spanish Ministry of Science and Technology: CICYT DPI 2003-06508-C02-01.
0-7803-8269-2/04/$17.00 (C) 2004 IEEE
463
~
jX1
ac mains utility bus + E1∠φ1
UPS #1
UPS #2
UPS #N
V∠0º
i1
jX2 i2
~
ZL
~
+ E2∠φ2
distributed online UPS
Fig. 3. Equivalent circuit of two inverters sharing a load. secure bus
Nevertheless, as we state before, the conventional droop method can not satisfy the need for synchronization with the utility, due to the frequency variation of the inverters, which enforces a phase deviation.
distributed loads
Fig. 1. Online distributed UPS system.
III. STATIC AND DYNAMIC LIMITATIONS OF THE CONVENTIONAL DROOP METHOD
Bypass operation
~ Utility mains
Normal operation
~ =
=
Fig. 3 shows the equivalent circuit of two inverters connected to a common bus through coupled inductors. In such case, the active and reactive powers drawn from one inverter to the load can be expressed as [12]
~
Rectifier
Batteries
Inverter Mains failure operation load
Fig. 2. Block diagram of an online UPS module.
EV sinφ X EV cos φ − V 2 Q= X P=
II. OPERATION PRINCIPLE OF THE ONLINE UPS SYSTEM UPS are classified into three configurations [1]: offline, line-interactive, and online. Although the two-firsts UPS configurations are in general less expensive than online UPS, this last is the better when highest reliability must be achieved, since no transfer time exists from normal to stored energy modes. Fig. 1 shows the general diagram of a distributed online UPS system. This system consists of two buses: the utility bus, which is connected to the public ac mains; and the secure bus, connected to the distributed critical loads. The interface between these buses is based on a number of online UPS modules connected in parallel, which provides continuously power to the loads. Fig. 2 shows the scheme of each UPS module, which includes a rectifier, a set of batteries, an inverter, and a static bypass switch. The main operation modes of an online UPS system are listed below: 1) Normal operation: The power flows to the load, from the utility through the distributed UPS units. 2) Mains failure: When the public ac mains fails, the UPS inverters supply the power to the loads, from the batteries, without disruption. 3) Bypass operation: When an overload situation occurs, the bypass switch must connect the critical bus directly to the ac mains, in order to guarantee the continuous supply of the loads, avoiding the damage of the UPS modules. For this reason, the output-voltage waveform should be synchronized to the mains, when this last is present.
(1)
(2)
where X is the output reactance of an inverter, φ is the phase angle between the output voltage of the inverter and the voltage of the common bus, and E and V are the amplitude of the output voltage of the inverter and the load voltage, respectively. From these equations, it can be derived that the amplitude E and the frequency ω of the inverter output voltage could control the active and reactive power flow
ω = ω * − mP
(3) E = E − nQ (4) * * being ω and E the output voltage angular frequency and amplitude at no load, and m and n are the droop coefficients for the frequency and amplitude, respectively. This droop characteristic allows load sharing between modules without wire interconnections. However, the droop method has several intrinsic problems [10][11]: 1) static trade-off between the frequency and amplitude output-voltage regulation and the active and reactive powersharing accuracy; 2) limited transient response; 3) loss of frequency and phase synchronization between the output voltage and the ac mains; 4) improper sharing of harmonic currents; and 5) power sharing influenced by the imbalance between the line impedances. *
464
400 V o (p ro p o s e d c o n t ro lle r)
S1
S3
L
rL
Vin
300
iL 200
S2
S4
Vin· u
C
vo
ic
100
5 x Io -1 0 0
Vin
vref
_
PI
+ _
-2 0 0
_
+
+
PWM
V o (c o n ve n t io n a l P ID c o n t ro ll e r)
0
Fig. 4. Power stage of the single-phase UPS inverter.
1+kds
V re f
u +
-3 0 0
1 + Ls+rL _
vo
1 Cs
-4 0 0 0
0 .0 0 2
0.004
0.006
0 .0 0 8
0 .0 1
0.012
0 .0 1 4
0.016
0.018
0.02
Power Stage
^ kd/C LPF LPF
ic
io
ic
Fig. 6. Waveforms of the output current and the output voltage when using a conventional PID and the proposed controller supplying a nonlinear load.
vo
vo
According to nonlinear control and feedback linearization theory [14][15], the output voltage of this system has a second order relative degree. Thus, we can find the open loop output voltage dynamics as
Inner control loops
Fig. 5. Block diagram scheme of the output-voltage controller.
IV. CONTROLLER DESIGN The aim of this section is to overcome the aforementioned drawbacks of the droop method and to synthesize a novel control strategy without communication wires, which could be appropriate to high-performance paralleled industrial online UPS. The control method we propose consist of three main nested loops: an inner loop that regulates the output voltage, an intermediate loop to enforce a virtual output impedance, and an outer loop that achieves the active and reactive power sharing. This paper, dislike to previous works [2]-[9], takes into account the inner control loops in the design process, due to their important role in the power sharing accuracy.
LC
d 2 vo dt
+ rL C
d vo dt
+ vo + L
d io dt
+ rL io = Vin u
(7)
where means average value over one switching cycle. In order to linearize and to achieve a good tracking of the output voltage we derive the following controller expression
(
)
(
)
Vinu == vref + k p vref − vo + ki ∫ vref − vo dt + k d
(
)
d vref − vo . dt
(8) being vref the output-voltage reference (see Fig. 5). By using (7) and (8), the closed-loop output voltage dynamic behavior takes the form
A. Output Voltage Regulation Loop Fig. 4 shows the power stage of a single-phase inverter, which includes an IGBTs bridge configuration and an L-C filter. The equivalent series resistance (ESR) of the filter capacitor is not considered in the model, since its effect appears far above the frequency range of concern [13]. The bilinear differential equations that describe the large-signal dynamic behavior of this converter are presented as follows di L L = Vin u − vo − rL i L (5) dt dv C o = ic = i L − io (6) dt where u is the control variable, which can take the following values: 1, 0, or –1, depending on the state of the pair of switches S1–S4 and S2–S3.
vo =
k d s 2 + (1 + k p ) s + k i LCs 3 + (rL C + k d ) s 2 + (1 + k p ) s + k i
vref −
Ls 2 + rL s − io . LCs 3 + (rL C + k d ) s 2 + (1 + k p ) s + k i
(9)
where s is the Laplace operator. Looking at this expression, the inverter can be modeled by two-terminal Thevenin equivalent circuit of the form: v o = G ( s ) ⋅ v ref − Z o ( s ) ⋅ i o ,
(10)
being G(s) the voltage amplification, and Zo(s) the output impedance.
465
Magnitude (dB)
0 -20 -40 -60
40
0
(b )
-2 0
-80
-6 0
150
100
100
50
50 0 -50 -100 10 1
(a )
20
R e s istiv e b e h av io r
-4 0
Phase (deg)
Phase (deg)
Magnitude (dB)
20
In d u c tiv e b e h av io r
(c )
-5 0 -1 0 0
10 2
10 3
10 4
10 5
-1 5 0 1 01
10 6
1 04
1 03
1 02
1 05
1 06
F re q u e n c y (H z)
Fig. 7. Sensitivity of the output impedance in front of rL variations. rL = 0.2, 0.4, and 0.8 Ω (pointer indicates increasing order of rL).
vo
(a )
(b )
0
Frequency (Hz)
io
(c )
Fig. 9. Output impedance bode plot: (a) Pure inductive, (b) HPF with ωc = 500 Hz, and (c) HPF with ωc = 50 Hz.
P P/Q calculation
Q
Reference generator
vo* +
vref
vo regulator (inner loops)
UPS inverter
vref = vo* − Z D ( s ) ⋅ io
Outer loop power-sharing control
(11)
being ZD(s) the virtual output impedance, and vo* the output voltage reference at no-load, defined as vo* = E ⋅ sinωt . Fig. 8 illustrates this concept in relation to the rest of control loops. This control loop ensures the output impedance magnitude and phase. Conventionally, it can be obtained by introducing a series decoupling inductor between the output of the inverter and the common ac-bus, which is heavy and bulky. In order to avoid this problem a virtual inductor [10] can be introduced in the system. This concept consists in emulate an inductive behavior by drooping the output voltage proportionally to the time derivative of the output current. In this sense, if ZD(s) is pure inductive (ZD=sLD), it yields to the output impedance
ZD(s) virtual output impedance
Fig. 8. Block diagram of the closed loop system, with the virtual output impedance path.
Fig. 6 illustrates the tracking performance of the proposed controller in front of a conventional PID control, and using the following parameters: Vin=400V, L=1mH, C=20µF, rL=0.2Ω, kp=5, ki=2500, and kd=0.00013. By using the proposed controller the output voltage follows perfectly the reference, while using a conventional PID there is a large lag in phase and a considerable steady-state amplitude error. The frequency-domain behavior of the output impedance can be analyzed through the bode diagram shown in Fig. 8. The impedance is near inductive from 0 to 2 kHz, which encloses the line frequency. However, as can be seen the magnitude and the phase of the low frequency range depends on the parasitic resistance of the inductor rL. This parameter is not easy to measure nor to estimate, since it is determined by the ESR of the filter inductor, the on/off-resistance of the IGBTs, and so on.
Z o (s) =
[
]
LD k d s 3 + L + LD (1 + k p ) s 2 + ( LD ki + rL ) s 3
2
LCs + (rL C + k d ) s + (1 + k p ) s + ki
. (12)
In this expression, if LD k i >> rL , the effect of rL over the low-frequency output-impedance is reduced. However, the output voltage THD can increase too much when the system supplies nonlinear loads. This drawback can be overcome by using a high-pass filter instead of a pure-derivative term of the output current, which is useful to share linear and nonlinear loads [10]. Thus, the instantaneous droop function (11) takes the form
B. Virtual Impedance Loop The output-impedance of the closed-loop inverter affects the power sharing accuracy, and significantly influences the P/Q droop control characteristics. Further, the proper design of this output inductance can reduce the impact of the lineimpedance unbalance over the power sharing accuracy. In order to program a stable output impedance, we can drop the output voltage reference proportionally to the output current, using the following instantaneous droop control loop
vref = vo* − LD
ω ps s +ωp
being ωp the pole frequency of the high-pass filter.
466
(13)
HPF
Harmonic current-sharing loop
to the common AC bus
Virtual Inductor
Static switch
L
LPF
Qi
io
Q
Vin
E
PD
E*
Eo ref
Eref
io
ω*
+90º
~ P
BPF
Pi
vo
E · sin (ωt)
ω
PD
∆φ
∆φ=φ−φ∗
kφ
kφ
vo
Inner loop analog controller + drivers
Power calculation
vmains
vo
C
Sine generator
Eo ref
∆φ
PLL
Sine generator
DAC
ADC
Droop function
P/Q calculation
Phase difference Synchronization loop
DSP DSP TMS320LF2407A
Fig. 10. Block diagram of the proposed controller.
Fig. 11. Power stage and controller of a single unit.
The output impedance in such case is shown at the bottom of this page (14). Fig. 9 shows a comparison of the output-impedance bode plots resulting from the use of a pure inductive function (11), and the use of the high-pass filter approach (13), for cut-off frequencies: 500 Hz and 50 Hz. Notice that the last solution is the better to share linear and nonlinear loads, since it combines inductive behavior around the output-voltage frequency, while trends to be resistive for high-order current harmonics.
The transient droop function ensures stable frequency regulation under steady-state conditions, and at the same time, achieves active power balance by adjusting the frequency of the modules during a load transient. Besides, to adjust the phase of the modules we propose an additional synchronizing loop ~
ω = ω * − mP − md
In order to improve the transient response of the paralleled-system, power-derivative terms are included into the conventional droop method (3)-(4). Then, the following control scheme is proposed: dQ dt ~ ~ dP * ω = ω − mP − md dt
(15)
ω = ω * − kφ (φ − φ * ) ,
(16)
(19)
being φ and φ* the phase angles of the output voltage inverter and the utility mains, respectively. Taking into account that ω = dφ dt , expression (19) now can be formulated as
where nd and md are the derivative coefficient of the reactive ~ power Q and the active power P, respectively, P is the active power signal without the dc-component, which is done by ~ τ −1s P= P, (17) −1 ( s + τ )( s + ω c ) being τ the time constant of the transient droop action. Note that the P- ω function has no frequency-deviation in steadystate [10].
Z o (s) =
(18)
where ∆φ is the phase difference between the inverter and the mains; and kφ is the proportional constant of the phase error between the output-voltage and the mains. The steadystate frequency reference ω* is obtained by measuring the utility line frequency, or by using its internal frequency reference in case of mains failure. ~ The P -terms of the previous equality tends to zero in steady state, leading to
C. Proposed P/Q-Sharing Outer Loop
E = E * − nQ − nd
~ dP − kφ ∆φ dt
dφ dφ * + kφ φ = + kφ φ * , (20) dt dt which is stable for kφ positive. Thus, when phase difference increases, frequency will decrease slightly and, hence, all the UPS modules will be synchronized with the utility, while sharing the power drawn to the loads.
ω p LD k d s 3 + [L + ω p LD (1 + k p )]s 2 + (ω p LD ki + rL ) s LCs 4 + (rL C + k d + ω p LC ) s 3 + [1 + k p + ω p (rL C + k d )]s 2 + [ki + ω p (1 + k p )]s + ω p ki
467
(14)
0 .0 2
0.015
0 .0 1
UPS #2 connection
i1–i2 UPS #1 and UPS #2 sharing 1kW load
phas e differenc e (rad)
UPS #1 supplying 1 kW load
0.005
φ2
0
φ1
-0 . 0 0 5
-0 .0 1
-0 . 0 1 5
-0 .0 2 0
0.1
0 .2
0.3
0.4
0 .5
0.6
0.7
0 .8
0.9
1
t im e (s )
Fig. 12. Transient response of the circulating current (X-axis: 100 ms/div, Y-axis: 4 A/div).
Fig. 13. Phase difference between the UPS and the ac mains.
(a) (b) Fig. 14. Steady-state waveforms supplying a nonlinear load: (a) load voltage and current (X-axis: 5 ms/div, Y-axis: 150V/div, 15A/div), (b) output current of the two units (X-axis: 10 ms/div, Y-axis: 5 A/div).
up. When this occurs, the UPS inverter is connected to the common bus, and the droop-based control is initiated. As indicates Fig. 11, the controller was implemented by means of a TMS320LF2407A, 16-bit fixed-point 40 MHz digital signal processor (DSP) from Texas Instruments. The voltage sampling frequency was rated at 10 kHz, while the current frequency was 20 kHz. DSP capture units were used to synchronize the output voltage with the ac-mains, and to measure their phase error and the line frequency. The filters were discretized through infinite-impulse response (IIR) solutions, and the PD controllers were easily carried out by using Euler’s method. Finally, the inner control loop that regulates the output voltage (8) can be implemented by using analog circuits or sharing a low cost microcontroller. Fig. 5 shows the block diagram of the proposed control scheme, in which the derivative term is implemented by using a small current
V. DSP-CONTROLLER IMPLEMENTATION Fig. 10 depicts the block diagram of the proposed controller. In order to adjust the output voltage frequency, equation (16) is implemented, which corresponds to the frequency mains drooped by two transient-terms: the ~ transient active power signal P (17) passed through a PD regulator; and the phase difference term (18), added in order to synchronize the output voltage with the ac mains, in a phase-locked loop (PLL) fashion. The output-voltage amplitude is regulated by using the conventional droop method with an additional derivative term of the reactive power (15). The output impedance of the inverter can be emulated by means of the high-pass filter (13) to share linear and nonlinear loads. The controller also includes a PLL block in order to synchronize the inverter with the common bus at the start-
468
online UPS. On the other hand, the proposed controller emulates a special kind of impedance, avoiding the use of a physical coupled inductance. The experimental results reported here show the effectiveness of the proposed approach.
transformer to sense ic current, in order to avoid the high frequency noise [13]: kd
d vo dt
=
kd ic , Cˆ
(21)
ACKNOWLEDGMENT
being Cˆ the nominal value of C. The control law can be realized by comparing the right term of (8) with a triangular wave scaled by the input voltage, in a unipolar or bipolar approach. This results in a PWM generator that decoples output voltage dynamics from input voltage variations.
The authors would like to express their gratitude to J. Barri, R. Ciurans, D. Montesinos, and A. Sabé from Salicrú Electronics, for their help with the experimental verification. REFERENCES
VI. EXPERIMENTAL RESULTS [1]
To show the validity of the proposed approach two 1-kVA single-phase UPS modules were built and tested. Each UPS has an inverter consisted of a single-phase IGBT full-bridge with a switching frequency of 20kHz and an LC output filter, with L=1mH, C=20µF, Vin=400V, and vo=220Vrms/50Hz. The control parameters were chosen to ensure stability, proper transient response and good phase matching, with the following coefficients: LD=800 µH, ωp=50 Hz, ωc=5 Hz, ω*=50 Hz, E*=311 V, m=1×10-4 (rad/s)/W, n=1×10-4 V/VAr, md=2×10-5 rad/W, nd=5×10-7 V·s/VAr, kφ=100 (rad/s)/rad, τ=1 s, and the initial phases φ1=-0.01 rad, φ2=-0.02 rad. The dynamic performance of the parallel system is experimentally evaluated in case of connecting UPS #2 when the UPS #1 is supplying all the power required by a 1 kW load. Fig. 12 shows as the proposed control achieves a low circulating current (i1-i2) between the modules in this situation. Fig. 13 shows the evolution of the phase difference between the modules and the utility line, which stay synchronized in steady state. Other experimental tests were done by supplying a nonlinear load with a crest factor of 3. The measured total harmonic distortion (THD) of the load voltage was about 2.5%. Fig. 14 depicts the load voltage, the load current, and also the output current of the two modules showing very good load sharing capability even when supplying nonlinear loads.
[2] [3] [4]
[5] [6] [7] [8]
[9] [10]
[11]
VII. CONCLUSIONS [12]
In this paper, a novel load-sharing controller for parallelconnected online UPS systems was proposed. The controller is based on the droop method, which avoids the use of control interconnections among modules. In a sharp contrast with the conventional droop method, the controller presented is able to keep the output-voltage frequency and phase strictly synchronized with the utility ac mains, while maintaining good load sharing for linear and nonlinear loads. This fact let us to extend the droop method to paralleled
[13] [14] [15]
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