A Novel Synchronization Technique for Wireless

electronics Article

A Novel Synchronization Technique for Wireless Power Transfer Systems Xin Liu 1 , Nan Jin 2 , Xijun Yang 1, *, Tianfeng Wang 1 , Khurram Hashmi 1 and Houjun Tang 1 1

2

*

Key Laboratory of Control of Power Transmission and Transformation Ministry of Education, Shanghai Jiao Tong University, 800 Dongchuan RD., Shanghai 200240, China; [email protected] (X.L.); [email protected] (T.W.); [email protected] (K.H.); [email protected] (H.T.) College of Electric and Information Engineering, Zhengzhou University of Light Industry, Zhengzhou 450002, China; [email protected] Correspondence: [email protected]; Tel.: +86-138-1606-6208

Received: 29 September 2018; Accepted: 6 November 2018; Published: 13 November 2018

Abstract: Recently, wireless power transfer (WPT) systems with active receivers have been proposed for conduction loss reduction, bidirectional power transfer and efficiency improvement. However, the synchronization of WPT systems is complex in nature with the selection of high operating frequencies. Without proper synchronization, power oscillations appear and the system can become unstable. In this paper, a detailed analysis of different WPT systems is presented and the essence of the synchronization technique is derived as being composed of two functions: independent frequency locking and reference phase calibration. The voltage across the receiver-side compensation capacitor is divided and utilized for frequency locking, whereas the reference phase calibration is realized through software code. The proposed method is effective and easy to implement, with a lower overall cost due to its simplicity. The technique can work effectively at high frequency and withstand large variations of operating frequency, load and mutual inductance. In addition, it can address the synchronization problem of multiple active receiver WPT systems with and without cross coupling among the receiving coils. Theoretical analysis and experimental results validate the proposed technique. Keywords: active receivers; frequency locking; reference phase calibration; synchronization; wireless power transfer

1. Introduction Wireless power transfer (WPT) techniques can realize energy transmission through coupled coils without the need for physical contact between the transmitter and the receiver [1–3]. Considerable efforts are put into the modeling, performance analysis, design and optimization of WPT systems [4–10]. The operating frequencies of WPT systems can range from kHz to MHz. Radio frequency (RF) WPT systems operate at higher frequencies (such as 6.78 MHz and 13.56 MHz) and aim to increase the power transfer capacity [10–12]. Since the frequency is too high for digital signal processors (DSP) to control the transitions in RF WPT systems, diode rectification is widely adopted which brings about high forward voltage losses. Inductive power transfer systems with lower operating frequency (such as 85 kHz) can be used to transmit higher power levels such as in electric vehicle charging scenarios. Although inductive power transfer systems transmit power wirelessly in a shorter distance than RF systems, their overall efficiencies and power levels are higher. To avoid large transmission losses, various methods are investigated to achieve high efficiency. Recently, inductive power transfer systems with active receivers are the focus of study [13–16]. These systems can realize bidirectional power transfer [17–19] and contribute to efficiency improvement [20–22]. An active receiver in Reference [20] Electronics 2018, 7, 319; doi:10.3390/electronics7110319

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Electronics 2018, 7, 319

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contributes to a maximum efficiency rise of 10% compared with traditional diode rectifiers. However, such systems are complex in nature and some issues remain unresolved, such as the synchronization problem. The transmitter and receiver are contactless, whereas the control signals of the primary and secondary sides are in rigorous sequential relationships [23]. Although, theoretically the controllers can have the same operating frequency, the actual output frequencies may differ due to manufacturing tolerances of the devices. For DSP TMS320F28335 [24], the frequency precisions of regular pulse width modulator (PWM) and high resolution pulse width modulator (HRPWM) at 100 kHz are 0.1% and 0.002%, respectively. The corresponding maximum errors in the frequencies are in the range of 100 Hz and 2 Hz, respectively. Although the frequency deviations are much smaller as compared to the fundamental operating frequency, the WPT system becomes unstable. Without effective synchronization, the phase angles between the primary and secondary resonant voltages will change periodically, which results in power oscillations. Thus, synchronization of the WPT systems with active receivers is necessary and crucial for stable system operation. Synchronization methods of the WPT systems can be classified into three categories as elaborated in Figure 1. The first method, as shown in Figure 1a, is introducing an external clock such as general packet radio service (GPRS), code division multiple access (CDMA) and Wi-Fi. Such systems can work only in places where the communication signals are available and stable. When the signal transfer path changes, phase error will appear due to changed time delays of different controllers. Thus, this technique cannot be easily applied to systems where the transmitter and receiver spatially move with respect to each other, such as mobile phone and electric vehicle charging scenarios [25]. The second method is, installing real-time clocks on the transmitter and receiver sides as shown in Figure 1b, which can include on-board atomic clocks and precision oscillators. This method is expensive, whereas small frequency discrepancies still exist. Cumulative error occurs during a long-time operation. The third method is, considering the transmitter as a source and synchronizing the receiver using auxiliary devices as shown in Figure 1c. The feasibility and robustness of the third scheme is greater in these methods. In References [17,18,26,27], a sense winding on the secondary side is proposed to capture the magnetic flux generated by the primary resonant current in order for synchronization. A voltage signal on the sense winding can be induced and the phase locking loop (PLL) is used to detect the primary time sequence. However, secondary magnetic flux produces an undesired voltage, which can deteriorate the synchronization performance seriously. A compensation circuit should be added to eliminate the phase error caused by this effect, whereas the circuit parameters depend heavily on the operating conditions. As reported in Reference [17], the phase error can be about 22% when the coupling factor is decreased by 50% and 15% when the primary compensation capacitance is decreased by 20%. In Reference [20], secondary current is sampled by the sensor for synchronization. Except for the cost and frequency bandwidth of the sensors, the phase error caused by the time delay of the devices is corrected by a carefully designed and parameter-sensitive phase-shift circuit. In References [28,29], the real and reactive powers produced by the receiver are utilized to estimate the position of the voltage vector induced by the primary converter. This method requires accurate samplings of secondary high-frequency resonant current and voltage, as well as a complex processing hardware circuit and calculation algorithm. In multiple active receiver applications, the magnetic field becomes more complex, which increases the difficulty in phase compensation. Previous works largely focus on the applications and contributions of multiple active receiver WPT systems [30,31], whereas, synchronization techniques have not been explored due to their complexity. Since time delay of the synchronization signal can lead to phase errors, it can be inferred that the accuracy of the synchronization technique is closely related to the signal transmission speed. A higher speed, therefore, corresponds to a higher accuracy. Some high speed methods typically use a laser beam for synchronization [32]. However, the authors find that the essence of synchronization is frequency locking which is independent of signal transmission speed. Generally, circuit-based methods are utilized to correct the phase errors caused by the time delay and system parameter variations [17,20]. The authors find that phase calibration can be easily achieved through software code.


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This paper provides a clear illustration of the synchronization technique for the WPT systems. Four specific conditions are investigated, namely: Tuned and detuned WPT systems with one active receiver, and multiple active receiver WPT systems with and without cross coupling among receiving coils. Through summarizing the analysis of different systems, the essence of the synchronization technique is deduced and presented. Then, a universal synchronization technique belonging to the third synchronization category is elaborated and verified through experimental results. The salient contributions of this work are: (1) (2) (3) (4)

Presenting a detailed analysis of the synchronization technique and clearly decomposing it into independent frequency locking and reference phase calibration based on mathematical derivations; Proposing an effective frequency locking circuit that has strong robustness and independence of system parameters; Achieving reference phase calibration through software code without using additional phase-shift circuits, which advances in easy realization and cost effectiveness; Realizing the synchronization for WPT systems with multiple active receivers.

This paper is divided into five sections. Section 2 analyzes different WPT systems with active receivers, which contributes to figuring out the essence of the synchronization technique. Based on the analysis, Section 3 presents the proposed hardware circuit and software code, aiming for frequency locking and reference phase calibration, respectively. Section 4 validates the feasibility and effectiveness of theElectronics proposed through experiments. Section 5 concludes this paper. 2018,systems 7, x FOR PEER REVIEW 3 of 21 Clock

Clock 2

Clock 1 Primary controller

Secondary controller Primary controller

(a)

Secondary controller

(b)

Synchronization

Clock Primary controller

Auxiliary devices

Secondary controller

(c)

Figure 1. Synchronization methods: externalclock; clock; (b) clocks; andand (c) auxiliary Figure 1. Synchronization methods: (a)(a)external (b)precision precisionon-board on-board clocks; (c) auxiliary synchronization devices. synchronization devices.

2. Synchronization This paper Analysis provides a clear illustration of the synchronization technique for the WPT systems. Four specific conditions are investigated, namely: Tuned and detuned WPT systems with one active

2.1. Tuned WPT System with active One Active Receiver receiver, and multiple receiver WPT systems with and without cross coupling among receiving coils. Through summarizing the analysis of different systems, the essence of the

The schematic of a WPT system with one active receiver is depicted in Figure 2. V 1,dc , V 2,dc , synchronization technique is deduced and presented. Then, a universal synchronization technique I1,dc and I2,dc are the primary and secondary dc voltages and currents, respectively. C1,dc and belonging to the third synchronization category is elaborated and verified through experimental C2,dc results. are theThe filtering and is theare: load. L1 and L2 are the transmitting and receiving L,2work salientcapacitors contributions of R this coils compensated by C1 and C2 , respectively. R1 and R2 are the coil resistances. Q1 –Q8 are eight (1) Presenting a detailed analysis of the synchronization technique and clearly decomposing it into metal-oxide-semiconductor field effect transistors (MOSFETs). v1 and v2 are the voltages applied on independent frequency locking and reference phase calibration based on mathematical the resonant network, which contain only the odd frequency components. i1 and i2 are the primary derivations; and secondary resonant currents. Their fundamental frequency components are denoted as v11 , v21 , i11 (2) Proposing an effective frequency locking circuit that has strong robustness and independence and i21 , whose root-mean-square (RMS) values are V 11 , V 21 , I11 and I21 , respectively. Due to the band of system parameters; pass filtering effect by the resonant the through fundamental frequency component contributes (3) Achieving reference phasenetwork, calibration software code without using additionalmost phase-shift circuits, which advances easy realization and cost effectiveness; to the transferred power. Therefore, i11 and iin are nearly the same as i and i , respectively. The typical 21 1 2 (4) Realizing the synchronization for WPT systems with multiple active receivers. waveforms of the system are presented in Figure 3, where v21 leads i21 by ϕ2 . 2α1 and 2β2 represent This paper is divided into five sections. Section 2 analyzes different WPT systems with active receivers, which contributes to figuring out the essence of the synchronization technique. Based on the analysis, Section 3 presents the proposed hardware circuit and software code, aiming for frequency locking and reference phase calibration, respectively. Section 4 validates the feasibility and effectiveness of the proposed systems through experiments. Section 5 concludes this paper.

Electronics 2018, 2018, 7, 3197, x FOR PEER REVIEW Electronics

4 of 20 44 of of 21 21

Electronics 2018, 7, x FOR PEER REVIEW

typical typical waveforms waveforms of of the the system system are are presented presented in in Figure Figure 3, 3, where where vv21 21 leads leads ii21 21 by by φ φ22.. 2α 2α11 and and 2β 2β22

the phase angles the resonant In most of the related to WPT represent the angles the voltages. In most previously published papers represent theofphase phase angles of ofvoltages. the resonant resonant voltages. Inpreviously most of of the thepublished previouslypapers published papers systems, fundamental harmonic analysis (FHA) and phasor methods are widely adopted [20–22], related related to to WPT WPT systems, systems, fundamental fundamental harmonic harmonic analysis analysis (FHA) (FHA) and and phasor phasor methods methods are are widely widely [20–22], which can greatly analysis. In paper, boldface represent whichadopted can greatly simplify In thisthe paper, boldface letters the phasors andthe capital adopted [20–22], which the can analysis. greatly simplify simplify the analysis. In this this paper,represent boldface letters letters represent the and italic letters represent RMS of For V 11 and V 11 phasors and capital capitalRMS italicvalues letters of represent RMS values values of the the phasors. phasors. ForVexample, example, V 11 and V 11 italic phasors letters represent the phasors. For example, V11 and represent the voltage 11 represent the voltage and represent the value voltageofphasor phasor and RMS RMS value value of of vv11 11,, respectively. respectively. phasor and RMS v11 , respectively. II1,dc 1,dc

Q Q11

++ -- C C1,dc 1,dc V V1,dc 1,dc Q Q22

Q Q33

R R11 ii11

vv11

R R22

M M12 12 LL11

ii22

LL22

C C11

Q Q44

Q Q55

C C22 Q Q66

II2,dc 2,dc

Q Q77 ++ --

vv22

C R L,2 C2,dc 2,dc RL,2

V V2,dc 2,dc

Q Q88

Figure 2. WPT system with one active receiver.

Figure WPTsystem system with with one Figure 2.2.WPT oneactive activereceiver. receiver.

ii11

2β 2β22 φφ22

2α 2α11

vv11

vv22

vv11 11

ii22 vv21 21

Figure 3. primary and secondary waveforms with one active receiver. Figure 3. Typical Typical primary and secondarywaveforms waveforms of of WPT system with oneone active receiver. Figure 3. Typical primary and secondary ofaaaWPT WPTsystem system with active receiver.

Primary parameters identical inverting angular frequency 11 is Primary and secondary secondary parameters are identical and the inverting angular frequency ωis is√ 1 . Primary and and secondary parameters are are identical andand thethe inverting angular frequency ω 1ω L1 C1 1 Then, Equation (1) is obtained according to primary current loop. .. Then, Equation (1) is obtained according to primary current loop. Then, Equation (1) is obtained according to primary current loop.

L11C11

V11 = − jω1 M12 I21 + I11 R1 V11 = − jω11M1212I 21 + I11 R 11 21 11 11

(1) (1)

(1)

Generally, the voltage across R1 is much smaller than Vthan Equation (1) can simplified smaller V Equation (1) be Generally, the across R 11 . Therefore, is much much smaller than V11 11.. Therefore, Therefore, Equation (1)becan can be Generally, the voltage voltage across R11 is simplified into Equation (2). into Equation (2). simplified into Equation (2). V11 − I11 R1 V11 V − I 11R I21 = (2) V11 R11 ≈≈ V V11 11 − I11 11 II21 = − jω M − jω (2) 12 ≈ 1 M12 (2) 21 = −− j1jω11M − j M ω M12 − j M 11 12 12 12 Neglecting the losses of the active bridge, energy conservation equation of the receiver can be Neglecting the losses of the active bridge, energy conservation equation of the receiver can be derived asNeglecting the losses of the active bridge, energy conservation equation of the receiver can be derived derived as as V21 I21 cos ϕ2 = V2,dc I2,dc . (3) V21 I cos ϕ = V I . (3) 21 2 2,dc 2,dc (3) 21 2 According to fundamental harmonic21analysis, V 112,dc and2,dcV 21 can be obtained. According 11 and and V V21 21 can can be be obtained. obtained. According to to fundamental fundamental harmonic harmonic analysis, analysis, V11 √ V

2 2 sin α1 V11 = 22 22 sin sinα V1,dc V π 11 VV1,dc V1111 = = 1,dc π √ π 22 22 sin β 2 2 sin sin β 222VV2,dc V21VV== V2,dc 21 ππ 21 = 2,dc π

(4) (4) (5) (5)

(4)

(5)

Thus, the expression of I2,dc can be deduced as Thus, 2,dc can can be be deduced deduced as as Thus, the the expression expression of of II2,dc

I2,dc =

8 sin α1 sin β 2 cos ϕ2 V1,dc . π2 ω1 M12

(6)

When the primary and secondary controllers operate at different frequencies (f 1 and f 2 , respectively), ϕ2 is expressed as ϕ2 = 2π( f 1 − f 2 )t + ϕ2,0 , (7)


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where ϕ2,0 is the initial phase of ϕ2 . ϕ2,0 is determined by controllers, whereas it may be different from the coded phase. Then, I2,dc is derived by substituting Equations (7) into (6). I2,dc =

8V1,dc sin α1 sin β 2 cos[2π( f 1 − f 2 )t + ϕ2,0 ] π2 ω1 M12

(8)

When f 1 = f 2 , I2,dc is stable. Furthermore, when ϕ2,0 = 0, I2,dc reaches peak value which benefits power transfer. 2.2. Detuned WPT System with One Active Receiver Figure 4 shows the equivalent circuit of an active bridge. Z2 represents the equivalent impedance of the active bridge on the AC side, which consists of resistive and reactive components. The phase of I21 is denoted by ϕi2 . Then, V21 can be expressed as V21

√ 2 2 sin β 2 = V2,dc e j( ϕ2 + ϕi2 ) . π

(9)

Since I2,dc = V 2,dc /RL,2 , Equation (3) can be deduced into Equation (10). V21 I21 cos ϕ2 =

V2,dc 2 RL,2

(10)

Therefore, I21 can be obtained and I21 can be rewritten as jϕ

πV2,dc e i2 I21 = √ . 2 2RL,2 sin β 2 cos ϕ2

(11)

The expression of Z2 can be derived as Equation (12) according to Equations (9) and (11), which is related to ϕ2 . 8 sin2 β 2 cos ϕ2 RL,2 e jϕ2 V21 (12) Z2 = = I21 π2 Furthermore, the relationship between I2,dc and I21 can be obtained as Equation (13). I2,dc

√ 2 2 sin β 2 cos ϕ2 = I21 π

(13)

The transmitter can operate at various frequencies and the dual-side parameters can be different in practice, that is, the system can be detuned. The primary and secondary reactance are expressed as Equations (14) and (15). 1 X1 = ω 1 L 1 − (14) ω1 C1 X2 = ω 1 L 2 −

1 ω1 C2

(15)

Therefore, the dual-side current loops can be derived as follows. V11 = − jω1 M12 I21 + 11 ( R1 + jX1 )

(16)

0 = − jω1 M12 I11 + I21 ( R2 + jX2 + Z2 )

(17)

Then, the secondary current I21 can be deduced as Equation (18). I21 =

jω1 M12 V11 ( R1 + jX1 )( R2 + jX2 + Z2 ) + ω1 2 M12 2

(18)

V11 = − jω1M12 I21 + Ι11 ( R1 + jX1 )

(16)

0 = − jω1M12I11 + I21 ( R2 + jX 2 + Z2 )

(17)

Then,7,the Electronics 2018, 319 secondary current I21 can be deduced as Equation (18). I 21 =

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jω1 M 12 V11 ( R1 + jX 1 )( R2 + jX 2 + Z 2 ) + ω12 M 12 2

(18)

By combining Equations (4), (13) and (18), the following equation can be obtained. By combining Equations (4), (13) and (18), the following equation can be obtained.

8ω1 M12 V1,dc sin α1 sin β 2 cos ϕ2 8ω1 Mπ122V1,dc sin α1 sin β|(2 R + jX )( R cos ϕ2 + Z ) + ω 2 M 2 | + jX 2 2 2 1 1 1 12 I 2,dc = 2 π ( R1 + jX 1 )( R2 + jX 2 + Z 2 ) + ω12 M 12 2 Defining the function g2 (ϕ2 ) to indicate the influence of ϕ2 on I2,dc .

(19)

cos ϕ2 g2 ( ϕ 2 ) = cos ϕ 2 g2 (ϕ|(2 )R=1 + jX1 )( R2 + jX2 2+ Z2 ) + 2ω1 2 M 12 | 2 ( R1 + jX1 )( R2 + jX 2 + Z 2 ) + ω1 M12 By substituting Equations (7) and (20) into Equation (19), I2,dc can be rewritten as

(20)

I2,dc =

(19)

Defining the function g2(φ2) to indicate the influence of φ2 on I2,dc.

(20)

By substituting Equations (7) and (20) into Equation (19), I2,dc can be rewritten as

I2,dc =

8ω1 M12 V1,dc sin α1 sin β 2 8ω1 M 12V1,dc sin α1 sin β 2 g2 (2π( f 1 − f 2 )t + ϕ2,0 ). g 2 (2π( f1 − f 2 )t + ϕ 2,0 ) . π2 2

I 2,dc =

π

(21)

(21)

TheThe output current is related ofthe thecontrollers controllers and initial phase. output current is relatedtotothe thefrequency frequency difference difference of and thethe initial phase. Without synchronization, ϕ changes periodically, resulting in the variation of g (ϕ ). As a result, I2,dc 2 As a result, I2,dc Without synchronization,2 φ2 changes periodically, resulting in the variation of g22(φ2). will will oscillate at the frequency of (f − f ). oscillate at the frequency of 1(f1 − f22). I2,dc

i2 v2

+ C2,dc -

i2 V2,dc

v2

RL,2

Z2

Figure Equivalentcircuit circuit of active Figure 4.4.Equivalent active bridge. bridge.

2.3. 2.3. Multiple Receivers without Cross Coupling Multiple Receivers without Cross Coupling Figure 5 shows a multiple receiver WPT system without cross coupling the Figure 5 shows a multiple activeactive receiver WPT system without cross coupling amongamong the receiving receiving coils, which has one transmitter and multiple receivers. The transmitting and receiving coils, which has one transmitter and multiple receivers. The transmitting and receiving coils are coils are coupled, whose mutual inductances are denoted (i ≥ 2). ,C i, Ci,dc and RL,i are the coupled, whose mutual inductances are denoted as M1i as (i M ≥1i 2). Li , LRi,iR , iC i , Ci,dc and RL,i are the inductance, coil resistance,compensation compensation capacitor, capacitor andand loading resistance of coil coil inductance, coil resistance, capacitor,filtering filtering capacitor loading resistance receiver i, respectively. v i, ii and Ii,dc are the resonant voltage, resonant current and output dc current, of receiver i, respectively. vi , ii and Ii,dc are the resonant voltage, resonant current and output dc respectively. current, respectively. The phase difference between vi1 and ii1 (φi) can be expressed as

The phase difference between vi1 and ii1 (ϕi ) can be expressed as ϕi = 2π( f1 − f i )t + ϕi,0 , ϕi = 2π( f 1 − f i )t + ϕi,0 ,

(22)

(22)

where φi,0 and fi are the initial phase of φi and the operating frequency of receiver i, respectively. Equivalent i and reactance Xi given by Equations (23) and (24), can be obtained where ϕi,0 and f i areimpedance the initial Zphase of ϕi and the operating frequency of receiver i, respectively. according to Equations (12) and (14).

Equivalent impedance Zi and reactance Xi given by Equations (23) and (24), can be obtained according to Equations (12) and (14). 8sin 2 β i cos ϕi RL,i e jϕ i

Zi =

2

π

8 sin β i cos ϕi RL,i 1 X i = ω1 Liπ−2 ω1Ci 1 Xi = ω 1 L i − ω1 Ci

Zi =

(23)

2

e jϕi

(23) (24)

(24)

The source of the system described is the primary resonant voltage. The original electromotive force of each receiver coil is induced by the primary current. Therefore, the resonant current frequencies of the receivers are supposed to be identical to the primary operating frequency. The current loops of the system are given as follows.


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The source of the system described is the primary resonant voltage. The original electromotive force of each receiver coil is induced by the primary current. Therefore, the resonant current frequencies of the receivers are supposed to be identical to the primary operating frequency. The n current loops of the system are given as follows.

V11 = − ∑ jω1 M1k Ik1 + I11 ( R1 + jX1 ) k=2

(25)

n

V11 = − jω1 M 1k I k1 + I11 ( R1 + jX 1 ) k =2 I 0 = − jω1 M 1i 11 + Ii1 ( Ri + jXi + Zi )

(25)

(26)

0 = − jω1M1iresonant I11 + Ii1 (Ri +current jX i + Zi )I can be deduced as Equations (26) (27) Primary current I11 and the receiver-side i1 and (28). Primary current I11 and the receiver-side resonant current Ii1 can be deduced as Equations (27) V11 and (28). (27) I11 = n ω1 2 M1k 2 R1 + jX1 + V∑ 11 Rk + jXk + Zk I11 = n k=2 ω12 M 1k 2 (27) R1 + jXjω 1 + 11jX k + Z k 1k M 1ikV + R 2 = Ii1 = (28) n 2 2 ( Ri + jXi + Zi )( Rj1ω+MjXV1 + ∑ R ω+1 jXM1k+Z ) I i1 =

1

1i

11 n

k=2

k

ω12 M 1k 2

k

k

(28)

Ri + jX i + Z(13). ) i )( R1 + jX 1 +  Thus, Ii,dc is derived based on (Equation k= 2 Rk + jX k + Z k

sin β i (13). Thus, Ii,dc is8ω derived onα1Equation 1 M1i Vbased 1,dc sin Ii,dc =

I i,dc

cos ϕi 2 n π 8ω M V sin α sin β i ( R + jX + Z )( R cos ϕ i i 1 +i jX1 + ∑ i = 1 1i 1,dc 2 1 2 n π

( Ri + jX i + Z i )( R1 + jX 1 +  k=2

(29)

ω1 2 M1k 2 R2k + jXk + Zk )

ωk1=M2 1k

Rk + jX k + Z k

)

(29)

Zi is related to ϕi . Therefore, function gi (ϕ2 , ..., ϕn ) is defined to indicate the influence of ϕi on Ii,dc .

Zi is related to φi. Therefore, function gi(φ2, ..., φn) is defined to indicate the influence of φi on Ii,dc.

cos ϕi gi ( ϕ2 , ..., ϕn ) = cos ϕi n 2M 2 gi (ϕ 2 ,..., ϕ n ) = ω 1 1k 2 ω12 M ( Ri + jXi + Zi )( R1 + jX1n + ∑ Rk1k+ jXk + Zk ) ( Ri + jX i + Z i )( R1 + jX 1 +  k=2 ) k=2 Rk + jX k + Z k

(30) (30)

By substituting Equations (22) and (30) into Equation (29), Ii,dc can be rewritten as By substituting Equations (22) and (30) into Equation (29), Ii,dc can be rewritten as

Ii,dc =

8ω1 M1i V1,dc sin α1 sin β i 8ω M V sin α sin g βii ((2π( f 1 − f 2 )t + ϕ2,0 ), ..., (2π( f 1 − f n )t + ϕn,0 )). (31) I i,dc = 1 π21i 1,dc 2 1 gi ((2π( f1 − f 2 )t + ϕ 2,0 ),..., (2π( f1 − f n )t + ϕ n,0 )) . (31) π

When the cross coupling among is not notconsidered, considered, a function of the is aisfunction of the When the cross coupling amongthe thereceiving receiving coils coils is Ii,dcIi,dc operating frequency differences (f 1(f− andthe theinitial initialphases phases operating frequency differences 1 −ffii)) and (φi,0(ϕ ).i,0 ). I2,dc

R2 i2 M12

L2 C2

R1 i1

M1n C1

RL,2

…

V1,dc

V2,dc

Receiver 2

L1

v1

+ C2,dc -

v2

Rn

In,dc

in

Inverter Ln

+ Cn,dc -

vn

Cn

Vn,dc RL,n

Receiver n

Figure 5. Schematic of of a multiple WPTsystem systemwithout without cross coupling. Figure 5. Schematic a multipleactive activereceiver receiver WPT cross coupling.

2.4. Multiple Receivers with Cross Coupling Figure 6 shows a multiple active receiver WPT system with cross coupling among the receiving coils. The cross coupling mutual inductances are denoted as Mij (i, j ≥ 2 and i 6= j). The current loop of receiver i can be deduced as Equation (32).


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Electronics 2018, Receivers 7, 319 2.4. Multiple

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with Cross Coupling

Figure 6 shows a multiple active receiver WPT system with cross coupling among the receiving coils. The cross coupling mutual inductances are denoted as Mij (i, j ≥ 2 and i ≠ j). The current loop of n receiver i can be deduced 0as=Equation (32). − jω M I + I ( R + jX + Z ), i ≥ 2 (32)

∑

ji j1

1

i

i1

i

i

j=1,j6=ni

0 = −  jω1 M ji I j1 + I i1 ( Ri + jX i + Z i ), i ≥ 2 Then, the receiver-side resonant current Ii1 can be obtained by: j =1, j ≠ i

(32)

n Ii1 can be obtained by: Then, the receiver-side resonant current ∑ jω1 Mji Ij1 j=1,jn6=i

, i ≥ 2. jωi1 M Ri + jX + jiZIij1 j=1, j≠ i , i ≥ 2. I i1 = Thus, the expression of Ii,dc is derived. Ri + jX i + Z i Ii1 =

(33) (33)

Thus, the expression of Ii,dc is derived. n ∑n jω1 Mji Ij1 √ 2 2 sin β i cos ϕi j=1,j6=i jω1 M ji I j1 , i ≥ 2 (34) Ii,dc =  π β i cos ϕi | R 2 2 sin (34) ≠ i jXi + Zi | j=1, i j+ I i,dc = ,i≥2 π Ri + jX i + Z i The equivalent impedance of the receiver and the resonant currents are related to ϕi . Thus, function is defined asoffollows. i (ϕ2 , ..., ϕn ) impedance Thegequivalent the receiver and the resonant currents are related to φi. Thus, function gi(φ2, ..., φn) is defined as follows. n ∑n jω1 Mji Ij1 cos ϕi j=1,j6=i jω M I cos ϕ  1 ji j1 i , i ≥ 2 gi ( ϕ2 , ..., ϕn ) = (35) (35) j=1, j≠ i gi (ϕ 2 ,..., ϕ n ) = | Ri + jXi + Zi | , i ≥ 2 Ri + jX i + Z i Ii,dc can be rewritten as Equation (36). Ii,dc can be rewritten √ as Equation (36). 2 2 sin β i Ii,dc = 2π( f 1 − f 2 )t + ϕ2,0 ), ..., (2π( f 1 − f n )t + ϕn,0 )) (36) 2 2 singβi (( i (36) I i,dc = π gi ((2π( f1 − f 2 )t + ϕ 2,0 ),..., (2π( f1 − f n )t + ϕ n,0 )) π Regardless of their tuned or detuned conditions, having one or multiple active receivers, with or Regardless their tuned or detunedofconditions, having one or multiple active with without crossingof coupling, the frequency receiver-side resonant currents should bereceivers, f 1 . It is found or without crossing coupling, the frequency of receiver-side resonant currents should be f 1. It is that Equations (8), (21), (31) and (36) can be written into a similar expression as shown in Equation (37) found athat Equations (8), (21), (31) and (36) can be written into a similar expression as shown in where i is a constant value under a certain system configuration. Equation (37) where ai is a constant value under a certain system configuration. Ii,dc = gi (( ( f 1 − f 2 )t + ϕ2,0 ), ..., (2π( f 1 − f n )t + ϕn,0 )) I i,dcai = ai g2π i ((2π( f1 − f 2 )t + ϕ 2,0 ),..., (2π( f1 − f n )t + ϕ n,0 ))

(37) (37)

The constant and and find the reference phase of the receivers. i,dc constant The synchronization synchronization target target is is to to keep keep IIi,dc Thus, of the WPTWPT systems can becan divided into twointo independent functions:functions: Ensuring Thus,the thesynchronization synchronization of the systems be divided two independent ◦ that f 2 = f 3that = . .f2. ==ff3 n= =…f 1=and ϕ2,0 Ensuring fn = fϕ1 and n,00= .0°. 2,0 = φ 3,0==φ.3,0. .==…ϕ= n,0φ= I2,dc

R2 i2 M12

L2 C2

R1 i1 V1,dc

M2n

L1 M1n C1

V2,dc RL,2

Receiver 2 …

v1

+ C2,dc -

v2

Rn

In,dc

in

Inverter Ln

vn

Cn,dc

Cn

+ -

Vn,dc RL,n

Receiver n

Figure Figure 6. 6. Schematic of of aa multiple multiple active active receiver receiver WPT WPT system system with with cross crosscoupling. coupling.

Electronics 2018, 7, 7, 319 x FOR PEER REVIEW Electronics 2018,

99of of 21 20

3. Proposed Synchronization Technique 3. Proposed Synchronization Technique The synchronization system can be decomposed into independent frequency locking and The synchronization system can be decomposed independent frequency locking andisreference reference phase calibration as analyzed in Section 2.into In this paper, the frequency locking realized phase calibrationhardware as analyzed in Section 2. In this paper, the frequency is realized by a proposed by a proposed circuit and the reference phase calibrationlocking is achieved through software hardware circuit and the reference phase calibration is achieved through software code. code. 3.1. Hardware Hardware Circuit Circuit 3.1. The frequency Thus, the the The frequency of of receiver-side receiver-side resonant resonant currents currents should should be bef f11.. iiii flows flows through through C Cii.. Thus, frequency of of the as well. well. In In this this paper, paper, the the voltage voltage across across the frequency the voltage voltage across across C Cii should should be be equal equal to to ff11 as the compensation capacitor is utilized for frequency locking. compensation capacitor is utilized for frequency locking. Figure 77 shows of the Figure shows the the block block diagram diagram and and detailed detailed schematic schematic of the proposed proposed frequency frequency locking locking circuit, which whichproduces producesaazero-crossing zero-crossingsynchronization synchronization signal. voltage across i is divided circuit, signal. TheThe voltage across Ci is Cdivided over over the resistances, which can obtain voltage v . The high-side resistance R is 2 MΩ and the h and the low-side the resistances, which can obtain voltage vci. The cihigh-side resistance Rh is 2 MΩ low-side resistance Rl isTo10ensure kΩ. Tothat ensure that v properthe range, theofvalues of the ci stays resistance Rl is 10 kΩ. vci stays within a within proper arange, values the divider divider resistances should be configured with the power level. A bidirectional Zener diode with resistances should be configured with the power level. A bidirectional Zener diode with 6.8 V 6.8 V reverse breakdown voltage is used to limit the voltage. v is sent to the comparator TLV3502 ci to the comparator TLV3502 (Texas reverse breakdown voltage is used to limit the voltage. vci is sent (Texas Instruments, Richardson, TX,which USA) which can generate a square wavethe with the frequency f 1. Instruments, Richardson, TX, USA) can generate a square wave with frequency f1. After After passing through the isolator ISO721 (Texas Instruments, Richardson, TX, USA), the frequency passing through the isolator ISO721 (Texas Instruments, Richardson, TX, USA), the frequency locking signal signal vvfifi is is fed fed to to the the synchronization synchronization port port of of DSP DSP such such as as GPIO6 GPIO6 in in TMS320F28335 TMS320F28335 (Texas (Texas locking Instruments, Richardson, Richardson, TX, TX, USA). USA). The The comparator comparator and and the the isolator isolator are are supplied supplied by by an Instruments, an isolated isolated direct-current-to-direct-current (DC/DC) converter ADUM5000 (Analog Devices Inc., Wood, MA, direct-current-to-direct-current (DC/DC) converter ADUM5000 (Analog Devices Inc., Wood, MA, USA). The The resonant resonant capacitor capacitor voltage and is is converted converted into into aa digital digital signal signal immediately. immediately. Thus, USA). voltage is is high high and Thus, the frequency In addition, addition, the the circuit circuit consists consists of of aa the frequency locking locking circuit circuit is is insensitive insensitive to to interferences. interferences. In comparator, an isolator and an isolated power supply chip, which makes it cost effective and has a low comparator, an isolator and an isolated power supply chip, which makes it cost effective and has a power consumption. low power consumption.

Comparator

vci

Isolator

vfi

Synchronization port (GPIO6)

(a) ADUM5000 Vcc1

ii

Vcc

GND Vcc1

2M

Ci

vci

Rl 10k

ZD

+ -

Vcc1 1k

IN

GND TLV3502

DGND

Isolation barrier

Rh

Vcc vfi OUT

GND DGND ISO721

15p

1k

DGND

(b) Proposed frequency locking circuit: (a) block diagram; and (b) detailed schematic. Figure 7. Proposed

3.2. Software Software Code Code 3.2. lags iii iby by90°. 90◦ .However, However,due dueto tothe thetime timedelay delayof ofthe thefrequency frequencylocking lockingand andthe thedriver driver circuits, circuits, vvcici lags ϕ in Equation (37) is uncertain and can differ from the coded initial phase. After locking the frequency, i,0 in Equation (37) is uncertain and can differ from the coded initial phase. After locking the φi,0 the reference of the controllers be calibrated, which is implemented software code. frequency, thephases reference phases of theshould controllers should be calibrated, which is by implemented by The coded phase defined in the controller is ϕ ’ whose initial value is ϕ .’ The task of reference phase i i,0 software code. The coded phase defined in the controller is φi’ whose initial value is φi,0.’ The task of calibrationphase is to change ϕi,0 ’ to ϕi,0 φ =i,00,’ to that is, vi and in phase. Figure 8 shows the reference reference calibration is ensure to change ensure φi,0 i=i are 0, that is, vi and ii are in phase. Figure 8 phase calibration process. Firstly, ϕ ’ is set at ϕ .’ v and i are captured by the oscilloscope. Then, i i,0 i i shows the reference phase calibration process. Firstly, φi’ is set at φi,0.’ vi and ii are captured by the oscilloscope. Then, the system is turned on and vi and ii phase synchronization is observed. If vi and ii


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10 of 21

the is turned on andalgorithm vi and ii phase is observed. If vφi iand are not in phase, are system not in phase, traversal can besynchronization executed to change φi,’ where ’ canii vary from φi,0’ to ◦ + ϕ .’ Once v traversal algorithm can be executed to change ϕ ,’ where ϕ ’ can vary from ϕ ’ to 360 i i,0 Since thei 360° + φi,0.’ Once vi and ii are in phase, the reference phasei is locked and φi,0i,0 ’ is determined. and are in phase, reference phase is locked ϕi,0 ’ circuit, is determined. Since the timephase delay 2018, 7, xthe FOR PEER REVIEW 10 ofremains 21 timeiiElectronics delay remains almost unchanged for a and certain the corresponding error is almost unchanged for a certain circuit, the corresponding phase error is independent of the load, the independent of the load, the mutual inductance and other system parameters. Furthermore, the areinductance not in phase,and traversal algorithm can be executed to change φthe i,’ where φi’ can vary from φi,0’ to mutual other system parameters. Furthermore, reference phase calibration only reference phase calibration only needs one execution after the system is implemented and it can be 360° + φi,0.’ Once vi and ii are in phase, the reference phase is locked and φi,0’ is determined. Since the needs one execution after the system iswhich implemented and synchronization it can be completed within several minutes, completed within several minutes, makes this technique easy for wide time delay remains almost unchanged for a certain circuit, the corresponding phase error is which makes this synchronization technique easy for wide applications. applications. independent of the load, the mutual inductance and other system parameters. Furthermore, the reference phase calibration only needs one execution after the system is implemented and it can be completed within several minutes, which makes thisStart synchronization technique easy for wide applications. j = 0, φi'(j) = φi,0' Start

φi'(j)= φi'(j-1) + 1° j = 0, φi'(j) = φi,0' j =φji'(j-1) +1 + 1° φi'(j)= No j = j +1 No

vi and ii in phase ? Yes

vi and ii in phase ?

Set φi,0' at φi'(j) Yes Set φi,0' at φi'(j)

End

End

Figure 8. Reference phase calibration process. Figure 8. Reference phase calibration process.

The main flowchart of the phase calibration process has been elaborated above, whereas the register configuration details great importance as as described Improper The main flowchart theofof phase calibration process has beenbelow. elaborated above,configuration whereas the can configuration detailsofare are great importance described below. Improper configuration register configuration details are of great importance as described below. Improper configuration lead to the becoming unstable. can lead to system the system becoming unstable. can lead tothree the system becoming unstable. There are counter modes of the enhanced pulse width modulator (EPWM): count-up mode, are three counter modes of the enhanced pulse width modulator (EPWM): count-up There are three counter modes of the enhanced pulse width modulator (EPWM): count-up count-down mode and count-up-down mode. For easyFor calculation of the register count-up mode, count-down mode and count-up-down mode. easy calculation of thevalues, registerthe values, the mode, count-down mode and count-up-down mode. For easy calculation of the register values, the mode is adopted this work. Thework. frequency locking process the controller is shown is inshown Figurein 9, count-up mode isin adopted in this The frequency lockinginprocess in the controller count-up mode is adopted in this work. The frequency locking process in the controller is shown in where TBPRD1 and TBPRDi (i ≥ 2) are the time base periods (TBPRD) of the PWM modules of the Figure 9, where TBPRD1 and TBPRDi (i ≥ 2) are the time base periods (TBPRD) of the PWM modules Figure 9, where TBPRD1 and TBPRDi (i ≥ 2) are the time base periods (TBPRD) of the PWM modules transmitter-side and receiver-side controllers, respectively. For better understanding, the time delay of of theoftransmitter-side andand receiver-side respectively. For better understanding, the time the transmitter-side receiver-sidecontrollers, controllers, respectively. For better understanding, the time the devices is not considered in this analysis. Ideally, time base periods can be the same. However, delay of the devices is not considered in this analysis. Ideally, time base periods can be the same. delay of the devices is not considered in this analysis. Ideally, time base periods can be the same. the actual output will deviatewill from the preset due to limited frequency precision. In However, the actual output frequency fromvalue thepreset preset value to limited frequency However, the frequency actual output frequency willdeviate deviate from the value duedue to limited frequency practice, TBPRDi should be greater than TBPRD1. TheTBPRD1. receiver-side controller detects thedetects frequency precision. In practice, TBPRDi should be greater than than The receiver-side controller precision. In practice, TBPRDi should be greater TBPRD1. The receiver-side controller detects thesignal frequency locking signal first,where where thebe counter should to TBPRD1. Then, locking at first, where the counter should equivalent tobe TBPRD1. Then, counter isthe resetthe to the frequency locking signal at at first, the counter should beequivalent equivalent tothe TBPRD1. Then, counter is reset to 0. This process can ensure the frequency of v i equal to f 1 . 0. This process the frequency of vithe equal to f 1 . of vi equal to f1. counter is reset can to 0.ensure This process can ensure frequency

vci

vci vfi

vfi

TBPRDi TBPRD1

TBPRDi TBPRD1

Counter

Counter 0 0

t Synchronization moment

moment Figure Synchronization process. Figure9.9.Synchronization Synchronization process.

Figure 9. Synchronization process.

t


11 of 20


11 of 21

Faulty can lead leadto totwo twoproblems. problems.Firstly, Firstly, shown Faultyconfigurations configurationsof ofthe thereserved reserved registers registers can asas shown in in Figure 10a, where TBPRDi is smaller than TBPRD1, the counter operates abnormally. The counter Figure 10a, where TBPRDi is smaller than TBPRD1, the counter operates abnormally. The counter reaches TBPRDi and lockingsignal signalappears, appears,the thecounter counter is reset reaches TBPRDi andisisreset resettoto0.0.When When the the frequency frequency locking is reset to 0to 0 again, resultinginina awrong wrongcounting counting sequence. sequence. Therefore, greater than TBPRD1. again, resulting Therefore,TBPRDi TBPRDishould shouldbebe greater than TBPRD1. Secondly, shownininFigure Figure10b, 10b,although although the the counter counter operates gate drive Secondly, asas shown operatesnormally, normally,ananerroneous erroneous gate drive signal is generated. Comparing values of groups A and B (CMPA and CMPB) are used to generate βi signal is generated. Comparing values of groups A and B (CMPA and CMPB) are used to generate CMPB (or (or CMPA) falls falls into the of (TBPRD1, TBPRDi), wrong gate drivegate signals βi and andφϕi.i When . When CMPB CMPA) intorange the range of (TBPRD1, TBPRDi), wrong drive appear. The counter cannot reach the reserved register value where the control signal is supposed to is signals appear. The counter cannot reach the reserved register value where the control signal be toggled. Then, the gate drive signal remains unchanged, which leads to a wrong v i. Therefore, the supposed to be toggled. Then, the gate drive signal remains unchanged, which leads to a wrong vi . maximum and CMPB be slightly smaller than TBPRD1, which is denoted as CMP max. Therefore, theCMPA maximum CMPAshould and CMPB should be slightly smaller than TBPRD1, which is denoted value of CMPmax should be determined according to the frequency precision of the as The CMPspecific max . The specific value of CMPmax should be determined according to the frequency precision controllers. of the controllers. vci

vci

vfi

vfi TBPRDi CMPB TBPRD1

TBPRD1 TBPRDi Counter

No action

CMPA

0 t Synchronization moment

(a)

Counter 0

Action t Synchronization moment

(b)

Figure Faulty configuration of reserved registers: (a) wrong counting sequence; and (b) Figure 10.10. Faulty configuration of reserved registers: (a) wrong counting sequence; and (b) comparing comparing beyond the counting range. value beyondvalue the counting range.

Figure shows detailed synchronizationprocess processand andcorresponding correspondingrelationships relationshipsamong amongthe Figure 1111 shows thethe detailed synchronization the reserved register and the phase angles. The gate signals of receiver are denoted reserved register valuesvalues and the phase angles. The gate drivedrive signals of receiver i arei denoted as Qas 4i−3 , Q 4i−3 , Q 4i−2 , Q 4i−1 and Q 4i , whereas the comparing values of the corresponding controller are denoted Q4i−2 , Q4i−1 and Q4i , whereas the comparing values of the corresponding controller are denoted as as CMPA, 2i−1 , CMPB2i−1, CMPA2i and CMPB2i. The mathematical expressions of the register values are CMPA 2i−1 CMPB2i−1 , CMPA2i and CMPB2i . The mathematical expressions of the register values are shown the followingequations. equations. shown in in the following (ϕ i,0 '− ϕ i + β i − 90) CMPA 2i −1 (=ϕi,0 0 − ϕi + β i − 90CMP (38) ) max 360 CMPA2i−1 = CMPmax (38) 360 (ϕ '− ϕ i + β i − 270) 0 CMPB 2i −1 (=ϕ i,0 CMPmax (39) i,0 − ϕ36 i +0 β i − 270) CMPB2i−1 = CMPmax (39) 360 (ϕ0i,0 '− ϕ i − β i + 90) CMPA 2i(=ϕi,0 − ϕi − β i + 90CMP (40) ) max 360 CMPA2i = CMPmax (40) 360 (ϕ0i,0 '− ϕ i − β i − 90) ) max CMPB (=ϕi,0 − ϕi − β i − 90CMP (41)(41) CMPmax CMPB2i =2i 360 360 ◦ to 360 ◦ , according i andϕφi,0 mayrange range from from 00° 360°, the calculated Sinceϕiφand Since accordingto toEquations Equations(38)–(41), (38)–(41), the calculated i,0 ’ ’may CMPA and CMPB values may beyond [0, CMP max ]. When these values are negative or greater CMPA and CMPB values may be be beyond [0, CMP ]. When these values are negative or greater than max than CMP max , several times of CMP max should be added or subtracted to ensure them falling in the CMPmax , several times of CMPmax should be added or subtracted to ensure them falling in the range. range. The task of reference phase calibration process is to change ϕi,0 ’ to track the point where ϕi = 0. After that, the receiver-side phase angles can be applied for impedance matching or output power regulation [20,21]. Many wireless charging devices require a constant voltage supply. Thus, Figure 12 shows the control flowchart for constant voltage power transfer, where Ui,dc * represents the desired voltage. If Ui,dc is greater than Ui,dc * (i.e., Ui,dc ,> Ui,dc *), βi is decreased by 1◦ . Otherwise, βi is increased by 1◦ . This method is effective and easy to implement.

ii vci Electronics 2018, 7, 319

vfi

12 of 20


ϕi,0 '

Synchronization moment

360

CMPmax

CMPA2i

CMPA2i-1ii CMPB2i-1 Q4i-3vci Q4i-2 v Q4i-1 fi Q4i

12 of 21

CMPmax

CMPB2i

ϕi,0 '

Synchronization moment

360

CMPmax

CMPmax

CMPA2i

vi

CMPA2i-1

CMPB2i

CMPB2i-1 Q4i-3 Q4i-2

φi 2βi

Figure 11. DetailedQsynchronization process and corresponding relationships among reserved 4i-1 register values and phase angles. Q4i v

i The task of reference phase calibration process is to change φi,0’ to track the point where φi = 0. After that, the receiver-side phase angles can be applied for impedance matching or output power φi voltage supply. Thus, Figure regulation [20,21]. Many wireless charging devices require a constant 2βi 12 shows the control flowchart for constant voltage power transfer, where Ui,dc* represents the desired voltage. If Ui,dc synchronization is synchronization greater thanprocess Ui,dc * (i.e., Ui,dc,> Ui,dc*), relationships βi is decreased by among 1°. Otherwise, 11.Detailed Detailed process corresponding relationships reserved Figure 11. and and corresponding among reserved register βi is increased by 1°. This method is effective and easy to implement. register values and phase angles. values and phase angles.

Begin is to change φi,0’ to track the point where φi = 0. The task of reference phase calibration process After that, the receiver-side phase angles can be applied for impedance matching or output power Initializations regulation [20,21]. Many wireless charging devices require a constant voltage supply. Thus, Figure 12 shows the control flowchart for constant voltage power transfer, where Ui,dc* represents the desired voltage. If Ui,dc is greater than Ui,dcU*i,dc(i.e., Ui,dc,> Ui,dc*), βi is decreased by 1°. Otherwise, βi is sampling increased by 1°. This method is effective and easy to implement.

No

* ? Ui,dc < Ui,dc Begin Yes

No

βi = βi + 1° Initializations

βi = βi - 1°

Ui,dcQuit sampling ? Yes * ? Ui,dcEnd < Ui,dc

No

Yes Figure Figure12. 12.Flowchart Flowchartofofconstant constantvoltage voltagepower powertransfer. transfer. βi = βi - 1° βi = βi + 1°

3.3.System SystemLayout Layout 3.3. No

Quit ? multiple Theschematic schematicof ofthe theproposed proposedWPT WPTsystem system with multipleactive activereceivers receivers is isshown shown in inFigure Figure 13. 13. The with A frequency locking circuit is installed on each receiver side that produces the synchronization signal A frequency locking circuit is installed on each Yes receiver side that produces the synchronization for each DSP controller. signal for each DSP controller. End Theprototype prototypesystem systemisisimplemented implementedin inthe thefollowing followingsequence: sequence:Firstly, Firstly,the thecoded codedinitial initialphase phase The Figure 12. Flowchart of constant voltage power transfer. calibratedand andthen thenthe the corresponding reference phase is written the controllers. Secondly, isiscalibrated corresponding reference phase is written intointo the controllers. Secondly, the the primary controller is turned on and the primary active bridge inverts the high frequency voltage. primary controller is turned on and the primary active bridge inverts the high frequency voltage. 3.3. System Layout The frequency locking signal is generated, whereas the receiver-side controllers remain on standby and the rectification is used byWPT the receivers. Thirdly, the active gate drive signals of the receivers Thediode schematic of the proposed system with multiple receivers is shown in Figureare 13. generated. Finally, thecircuit phase angles are altered according power transfer requirements. A frequency locking is installed on each receiverto side that produces the synchronization signal for each DSP controller. The prototype system is implemented in the following sequence: Firstly, the coded initial phase is calibrated and then the corresponding reference phase is written into the controllers. Secondly, the primary controller is turned on and the primary active bridge inverts the high frequency voltage.


13 of 21

The frequency locking signal is generated, whereas the receiver-side controllers remain on standby and the diode rectification is used by the receivers. Thirdly, the gate drive signals of the receivers13are Electronics 2018, 7, 319 of 20 generated. Finally, the phase angles are altered according to power transfer requirements. R2

I2,dc

i2

V2,dc

+ C2,dc -

v2

L2 C2

RL,2

M12 Synchronization circuit M2n

EPWM module

R1

V1,dc

β2 & φ2 DSP controller 2 L1 …

i1 v1

C1

M1n Rn in Ln

vn

Cn

In,dc + Cn,dc -

Vn,dc RL,n

EPWM module DSP controller 1

α1

Synchronization circuit

EPWM module βn & φn DSP controller n

Figure13. 13. System System schematic. schematic. Figure

4. Experiment and Discussion 4. Experiment and Discussion verify presented synchronization technique, system is experimentally studied by To To verify the the presented synchronization technique, the the system is experimentally studied by using two prototypes: the first WPTissystem is implemented one active receiver, twousing prototypes: the first WPT system implemented with onewith active receiver, whereas,whereas, the otherthe with with two active The specificof parameters of theare prototypes listed in Table 1. Three twoother active receivers. Thereceivers. specific parameters the prototypes listed inare Table 1. Three independent independent microcontrollers and six Cree half are used coil self-inductances and microcontrollers and six Cree half bridges are bridges used [33]. The [33]. coil The self-inductances and mutual mutual inductances are measured using inductance, capacitance, and resistance (LCR) meter inductances are measured using inductance, capacitance, and resistance (LCR) meter TH2830 (RIGOL, TH2830 (RIGOL, Suzhou, China). Chroma programmable alternating-current-to-direct-current Suzhou, China). Chroma programmable alternating-current-to-direct-current (AC/DC) electronic load (AC/DC) electronic load model 63803 (Chroma, Marlborough, MA, USA) is utilized to vary the model 63803 (Chroma, Marlborough, MA, USA) is utilized to vary the loading resistance. Tektronix loading resistance. Tektronix TPS2024B Oscilloscope (Tektronix, Inc., Beaverton, OR, USA) is used to TPS2024B Oscilloscope (Tektronix, Inc., Beaverton, OR, USA) is used to record the experimental record the experimental waveforms. The experimental video is attached in Supplementary waveforms. The experimental video is attached in Supplementary Materials. Materials. Table 1. Key parameters of proposed system. Table 1. Key parameters of proposed system. Symbol Symbol L1 L2 L3 C1 C2 C3

L1 L2 L3 C1 C2 C3

Quantity Quantity coil inductance coil inductanceofoftransmitter transmitter coil inductance of receiver coil inductance of receiver1 1 coil inductance of receiver 2 coil inductance of receiver 2 primary compensation capacitance primary compensation compensation capacitance capacitance of receiver 1 compensation capacitanceofofreceiver receiver compensation capacitance 21 compensation capacitance of receiver 2

Value Value µH 6161 μH 61 µH 61 μH 81 µH 81 μH 0.05 µF 0.05 μFµF 0.05 0.05 μFµF 0.04 0.04 μF

4.1. One active Receiver WPT System Figure 14 shows the photograph of the WPT system with one active receiver. Figure 14a shows the designed DSP controller which consists of frequency locking circuit, power supply module and DSP TMS320F28335. Figure 14b shows the view of the complete system. Both the coil inductances are 61 µH, which are compensated by 0.05 µF AC capacitors. V 1,dc is 50 V. The power transfer distance (d12 ) is 80 mm with the mutual inductance of 16.7 µH.

4.1. One active Receiver WPT System Figure 14 shows the photograph of the WPT system with one active receiver. Figure 14a shows the designed DSP controller which consists of frequency locking circuit, power supply module and DSP TMS320F28335. Figure 14b shows the view of the complete system. Both the coil inductances Electronics 319 14 of 20 are 612018, μH,7,which are compensated by 0.05 μF AC capacitors. V1,dc is 50 V. The power transfer distance (d12) is 80 mm with the mutual inductance of 16.7 μH.

TMS320F28335 Power supply

Frequency locking circuit

Gate drive signals

(a) Primary controller

Primary compensation capacitors

Primary active bridge Transmitting coil Voltage sensor

Receiving coil

Oscilloscope Secondary controller

Load

Secondary compensation capacitors Secondary active bridge

(b) Figure14. 14. Photograph Photograph ofofWPT system with one one activeactive receiver: (a) DSP(a) controller; and (b) overall Figure WPT system with receiver: DSP controller; and (b) system. overall system.

Accordingtotointernational international standard standard of wireless wireless electric [34], thethe According electricvehicle vehiclecharging chargingSAE SAEJ2954 J2954 [34], operating frequency of the WPT system ranges from 81. 38 kHz to 90 kHz. The worst possible operating frequency of the WPT system ranges from 81. 38 kHz to 90 kHz. The worst possible synchronizationscenario scenarioisisinvestigated investigated in in this this paper, paper, that secondary synchronization that is, is, when when ff1 1isis9090kHz. kHz.The The secondary operating frequency is also set at 90 kHz. Figure 15 shows the experimental result of v 1, v2, i2 and V2,dc operating frequency is also set at 90 kHz. Figure 15 shows the experimental result of v1 , v2 , i2 and without proposed synchronization technique. Both α1 and β2 are 45°.45R◦ L,2 50 Ω. The transient V 2,dc without proposed synchronization technique. Both α1 and β2 are . Ris L,2 is 50 Ω. The transient process is shown in the upper portion of the figure, whereas the corresponding details areare process is shown in the upper portion of the figure, whereas the correspondingenlarged enlarged details shown in the lower portion. As evident from the figure, V2,dc changes periodically at a frequency shown in the lower portion. As evident from the figure, V 2,dc changes periodically at a frequency about 0.6 Hz. Because of the limited frequency precision of the microcontrollers, there exists 0.6 Hz about 0.6 Hz. Because of the limited frequency precision of the microcontrollers, there exists 0.6 Hz frequency difference between the transmitter and the receiver. Although the frequency difference is frequency difference between the transmitter and the receiver. Although the frequency difference is small compared to 90 kHz operating frequency, φ2 ranges from 0° to 360° at 0.6 Hz. Since I2,dc is a small compared to 90 kHz operating frequency, ϕ2 ranges from 0◦ to 360◦ at 0.6 Hz. Since I2,dc is a cosine function according to (8), power oscillations appear. When φ2 lies within a range of (90°, 270°), ◦ cosine function according from to (8),the power oscillations When ϕ2 lies withinloading a rangeresistance of (90◦ , 270 the power is transferred secondary side toappear. the primary side. However, is ), theutilized powerin is this transferred fromwhich the secondary side tothe therequired primarypower. side. However, resistance experiment, cannot provide Therefore, loading V2,dc becomes zero is utilized in this experiment, which cannot provide the required power. Therefore, V becomes zero 2,dc a range of during this phase range as shown in the lower part of Figure 15a. When φ2 lies within during this phase range as shown in the lower part of Figure 15a. When ϕ2 lies within a range of (−90◦ , 90◦ ), the power is transferred to the secondary side and V 2,dc is a cosine function. In simulations, the frequency of the gate drive signal is identical to the preset one, which can be used to verify the above experiment. A simulation in Simulink is implemented and f 1 − f 2 is set at 0.6 Hz. The simulated result in Figure 15b agrees well with the experiment, which validates the synchronization analysis. It can be concluded that WPT systems with active receivers cannot function normally without applying synchronization techniques.

(−90°, 90°), the power is transferred to the secondary side and V2,dc is a cosine function. In simulations, the frequency of the gate drive signal is identical to the preset one, which can be used to verify the above experiment. A simulation in Simulink is implemented and f1 − f2 is set at 0.6 Hz. The simulated result in Figure 15b agrees well with the experiment, which validates the synchronization analysis. It can be2018, concluded that WPT systems with active receivers cannot function normally without Electronics 7, 319 15 of 20 applying synchronization techniques. 2

v1

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Figure15. 15.Power Power oscillations oscillations without (a)(a) experimental; and and (b) simulated. v1, 50 v1 , Figure withoutsynchronization: synchronization: experimental; (b) simulated. 2 and V 2,dc ,100 V/div; i 2 , 5 A/div. V/div; v 50 V/div; v2 and V 2,dc ,100 V/div; i2 , 5 A/div.

Figure shows experimental synchronization results of proposed the proposed technique Figure 1616 shows thethe experimental synchronization results of the technique underunder various various conditions, including v f2 , v 2 , i 2 and V 2,dc . Figure 16a shows the typical experimental conditions, including vf2 , v2 , i2 and V 2,dc . Figure 16a shows the typical experimental waveforms of the waveforms of the The tuned WPT system. input voltage, theload phase angles and the load tuned WPT system. input voltage, theThe phase angles and the remain unchanged. The remain measured unchanged. The measured resonant frequency of the system is 91.5 kHz and the transmitter operates resonant frequency of the system is 91.5 kHz and the transmitter operates at this frequency. As can thisin frequency. As the can frequency be seen in locking Figure 16a, the vfrequency locking signal vf2 is stable and v2 is in beatseen Figure 16a, signal f2 is stable and v2 is in phase with i2 . Figure 16b phase with i 2. Figure 16b shows the typical waveforms of the detuned WPT system where the shows the typical waveforms of the detuned WPT system where the operating frequency is 90 kHz. operating frequency is 90 kHz. The proposed synchronization technique performs well in the The proposed synchronization technique performs well in the detuned WPT system. Figure 16c shows detuned WPT system. Figure 16c shows the experimental result during mutual inductance variation the experimental result during mutual inductance variation in the detuned WPT system. d12 changes in the detuned WPT system. d12 changes from 120 mm to 80 mm, where the mutual inductance from 120 mm to 80 mm, where the mutual inductance changes from 11.1 µH to 16.7 µH. V 2,dc decreases changes from 11.1 μH to 16.7 μH. V2,dc decreases with the increase of mutual inductance. As evident with the increase of mutual inductance. As evident from the enlarged details, the system is stable from the enlarged details, the system is stable and v2 is still in phase with i2. Figure 16d shows the and v2 is still inresult phaseduring with i2load . Figure 16d shows the experimental result load variation experimental variation in the detuned WPT system. RL,2during changes from 50 Ω toin 25the detuned WPT system. RL,2 changes 50 Ω toAlthough 25 Ω by connecting the by electronic loadvin parallel. Ω by connecting the electronic loadfrom in parallel. V2,dc decreases nearly half, 2 and i2 Although V decreases by nearly half, v and i remain in phase. 2 2 2,dc remain in phase. The proposed synchronization system can work effectively with variations in operating frequency, The proposed synchronization system can work effectively with variations in operating coil positioncoil andposition load. Then, β2 Then, can beβ2 used regulate the output power. Figure 1717shows frequency, and load. can betoused to regulate the output power. Figure showsthe constant voltage power transfer process. The reference output voltage is set at 100 V. To guarantee the constant voltage power transfer process. The reference output voltage is set at 100 V. To the transferred power, V 1,dc is increased to 80 V to in80 this experiment. The load changes from 50 Ω guarantee the transferred power, V1,dc is increased V in this experiment. The load changes from ◦ each 25 better Ω. To record better record and observe the transition, 2 is varied 1° each millisecondininthis to50 25ΩΩ.toTo and observe the transition, β2 isβvaried by 1by 100100 millisecond experiment. As evident from the figures, β2 increases with decreasing RL,2 to supply more power and V 2,dc stabilizes at the desired 100 V within 0.25 s. The setting period can be decreased by reducing the observation time and increasing the increment or decrement to β2 . The received power increases from 200 W to 400 W and the dc-to-dc efficiency increases from 91.5% to 92.3%. For operational convenience, a magnetic core has not been used on the receiver side. The coupling factor can be increased by installing a magnetic core, which can improve the overall efficiency.

this experiment. As evident from the figures, β2 increases with decreasing RL,2 to supply more power and V2,dc stabilizes at the desired 100 V within 0.25 s. The setting period can be decreased by reducing the observation time and increasing the increment or decrement to β2. The received power increases from 200 W to 400 W and the dc-to-dc efficiency increases from 91.5% to 92.3%. For operational Electronics 2018, 7, 319 of 20 convenience, a magnetic core has not been used on the receiver side. The coupling factor can16be increased by installing a magnetic core, which can improve the overall efficiency.

vf2

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Figure 16.Experimental Experimental synchronization of of proposed technique under various conditions: (a) Figure 16. synchronizationresults results proposed technique under various conditions: tuned WPT system; (b) detuned WPT system; (c) mutual inductance variation in detuned WPT (a) tuned WPT system; (b) detuned WPT system; (c) mutual inductance variation in detuned WPT V/div;vv2 and and V V2,dc, ,100 V/div; i2, 5 A/div. system; and load variation detuned WPT system. system; and load variation in in detuned WPT system. vf2v,f25, 5V/div; Electronics 2018, 7,(d) x (d) FOR PEER REVIEW 17 of 21 2 2,dc 100 V/div; i2 , 5 A/div.

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Figure 17. 17. Constant voltage power transfer. vf2v,f25, 5V/div; andVV2,dc , 100 V/div; i2 ,A/div. 10 A/div. Figure Constant voltage power transfer. V/div; vv22 and , 100 V/div; i2, 10 2,dc

4.2. Multiple Active Receiver Wpt System Figure 18a,b show the photographs of the multiple active receiver WPT systems without and with cross coupling between receiver-side coils, respectively. V1,dc is 50 V and α1 is set at 45°. RL,2 and RL,3 are 50 Ω. L3 is 81 μH, compensated by 0.04 μF AC capacitor. The calculated resonant frequency of receiver 2 is 88.5 kHz. The systems operates at 90 kHz, that is, the complex detuned condition. To

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Figure 17. Constant voltage power transfer. vf2, 5 V/div; v2 and V2,dc, 100 V/div; i2, 10 A/div.

4.2. Multiple Active Receiver Wpt System Figure 18a,b show the photographs photographs of the multiple multiple active active receiver receiver WPT WPT systems systems without without and and ◦. R with between receiver-side receiver-sidecoils, coils,respectively. respectively.VV is 50 V and α is set at 45 with cross coupling between 1,dc is 50 V and α 1 is set at 45°. R L,2 and L,2 1 1,dc and RL,350are Ω.81LμH, µH, compensated by AC 0.04capacitor. µF AC capacitor. The calculated resonant RL,3 are Ω. 50 L3 is compensated by 0.04 μF The calculated resonant frequency 3 is 81 frequency 2 isThe 88.5systems kHz. The systems operates at 90 kHz, that is, detuned the complex detuned of receiver of 2 isreceiver 88.5 kHz. operates at 90 kHz, that is, the complex condition. To ◦ and condition. confirm thatcan thework receivers work conditions, under different conditions, confirm thatTothe receivers undercan different β2 is set at 45° andβ2β3isatset 30°.atIn45Figure β 30◦transmitting . In Figure 18a, coil lies incross the middle and the cross between the 18a, coilthe liestransmitting in the middle and the coupling between thecoupling two receiving coils is 3 atthe two receiving coils is neglected. and d are 80 mm. M and M are 21.2 µH and 16.7 µH, neglected. Both d12 and d13 are 80Both mm.dM 12 and M 13 are 21.2 μH and 16.7 μH, respectively. In Figure 12 13 12 13 respectively. In Figure 18b,on thethe receivers put on for theamong mutualthe inductances 18b, the receivers are put above. are Except for the theabove. mutualExcept inductances coils, the among coils, theremain systemthe parameters theM same. M1311.7 andμH M23and are 4.8 8.9 μH, µH, respectively. 11.7 µH and system the parameters same. M12remain , M13 and 23 areM 8.9 12 ,μH, 4.8 respectively. The cross coupling mutual between receiving coils is comparable TheµH, cross coupling mutual inductance betweeninductance the receiving coilsthe is comparable with the mutual with the mutual inductances. inductances. Primary active bridge

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(b) Figure 18. 18.Multiple Multiple active receiver systems cross coupling between active receiver WPT WPT systems withoutwithout and withand crosswith coupling between receiver-side receiver-side coils: (a) without cross and (b) with cross coupling. coils: (a) without cross coupling; andcoupling; (b) with cross coupling.

Figure thethe typical waveforms of theofsuccessful synchronization result without Figure 19a 19ashows shows typical waveforms the successful synchronization result crossing without coupling, includingincluding v2 , i2 , v3 and evident from thefrom figure, and v are in phase with i crossing coupling, v2, i2i,3v. 3As and i3. As evident thevfigure, v 2 and v 3 are in phase withi3i2, 2 3 2 and respectively. The power transferred to the active receivers Figure 19bFigure shows 19b the typical and i3, respectively. Theispower is transferred to the active successfully. receivers successfully. shows waveforms the systemofwith coupling between two receiver-side coils. The synchronization the typical of waveforms the cross system with cross coupling between two receiver-side coils. The system performs system well and the WPTwell system confirm the feasibility of the synchronization performs and is thestable. WPT These systemexperiments is stable. These experiments confirm proposed in multiple activeinreceiver WPT systems. feasibilitysynchronization of the proposed technique synchronization technique multiple active receiver WPT systems. v2 i2

v2 i2

Figure 19a shows the typical waveforms of the successful synchronization result without crossing coupling, including v2, i2, v3 and i3. As evident from the figure, v2 and v3 are in phase with i2 and i3, respectively. The power is transferred to the active receivers successfully. Figure 19b shows the typical waveforms of the system with cross coupling between two receiver-side coils. The Electronics 2018, 7, 319system performs well and the WPT system is stable. These experiments confirm 18 of 20 synchronization the feasibility of the proposed synchronization technique in multiple active receiver WPT systems. v2

v2

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v3 i3

i3

Time (2.5 µs/div ) (a)

Time (2.5 µs/div ) (b)

Figure 19. Successful Successful synchronization synchronization results results of of multiple multiple active active receiver systems systems without without and with cross coupling between receiver-side coils: (a) without cross coupling; and (b) with cross cross coupling. coupling. v22 and v33,, 50 V/div; i 2 and i 3 , 5 A/div. 50 V/div; i2 and i3 , 5 A/div.

4.3. Discussion Discussion 4.3. This paper paper provides providesa acomprehensive comprehensive synchronization analysis of different systems This synchronization analysis of different WPTWPT systems and and decomposes the synchronization system into independent frequency locking and reference decomposes the synchronization system into independent frequency locking and reference phase phase calibration. 2 summarizes the comparisons of different synchronization techniques. calibration. Table 2Table summarizes the comparisons of different synchronization techniques. The The inverter’s operating frequency is 20 kHz in References [6,17], 30 kHz in Reference [20] and inverter’s operating frequency is 20 kHz in References [6,17], 30 kHz in Reference [20] and 85 kHz in 85 kHz in Reference [29]. A higher operating frequency can amplify the phase errors observed Reference [29]. A higher operating frequency can amplify the phase errors observed in Reference in Reference Thus, the synchronization difficulty with frequency. the increasing [17]. Thus, the[17]. synchronization difficulty increases with increases the increasing The frequency. proposed The proposed system can operate at 90 kHz, validating the effectiveness of proposed frequency locking system can operate at 90 kHz, validating the effectiveness of proposed frequency locking method. In method. In addition, the proposed synchronization technique is independent of system parameters addition, the proposed synchronization technique is independent of system parameters and the and theerror phase error can be calibrated in advance. it can perform well under different conditions phase can be calibrated in advance. Thus, itThus, can perform well under different conditions such such as frequency variation, mutual inductance variation, load variation and so forth. Usually, critical as frequency variation, mutual inductance variation, load variation and so forth. Usually, aa critical and parameter-sensitive parameter-sensitive phase-shift phase-shift circuit circuit is is needed needed to to compensate compensate the the phase phase error error caused caused by by time time and delay. However, However, it it is by software which reduces reduces delay. is easier easier to to achieve achieve reference reference phase phase calibration calibration by software code, code, which the complexity and cost of the synchronization circuit. Although the proposed technique is validated through a resistance load, it can be effectively applied to battery charging and bidirectional power transfer systems. Table 2. Comparisons of different synchronization techniques. Source [6] [17] [20] [29] This paper

Operating Frequency

Frequency Variation

20 kHz 20 kHz 30 kHz 85 kHz

× × × × √

90 kHz

Mutual Induction Variation

Load Variation

× √

√ √ √ √

√

√

× √

Multiple Receivers

Phase Calibration Method

× × × × √

N/A Circuit-based Circuit-based Circuit-based Software Code

Complexity N/A Complex circuit and algorithm N/A Complex circuit and algorithm Simple circuit and simplified algorithm

5. Conclusions This paper presents a detailed synchronization analysis of WPT systems with active receivers. The synchronization problem is decomposed into two independent parts: frequency locking and reference phase calibration. Based on the analysis, a novel synchronization technique is proposed where frequency locking is realized through the hardware circuit and reference phase calibration is achieved through software code, which is a great progress for synchronization system design. In experiments, frequency locking can be realized at 90 kHz and reference phase calibration only requires one execution after the system is implemented. The proposed synchronization technique adapts to multiple active


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receivers under tuned and detuned conditions. In addition, the synchronization system performs well when key system parameters vary. Constant voltage power transfer can be realized with 92.3% dc-to-dc efficiency at 400 W received power. The feasibility and effectiveness of the proposed synchronization technique have been verified by theoretical analysis and experimental results. Supplementary Materials: The following are available online at https://zenodo.org/record/1485267#.WqdtFLFKJ0. Author Contributions: X.L., H.T. and X.Y. conceptualized the main idea of this research project; X.L. designed and conducted the experiments with the help of T.W.; N.J. and X.Y. checked the results. X.L. wrote the whole paper; N.J. and K.H. reviewed and edited the paper. Funding: This research was funded by United Foundation of NSFC-Henan, grant number U1604136. The APC was funded by Xijun Yang. Conflicts of Interest: The authors declare no conflict of interest.

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