A power electronics equalizer application for partially

A power electronics equalizer application for partially shaded photovoltaic modules Luiz Fernando Lavado Villa, Tien Phu Ho, Jean-Christophe Crebier and Bertrand Raison, Member IEEE  Abstract — This paper studies a photovoltaic module embedded power electronics topology derived from a battery equalizer. The proposed topology eliminates the multiple maximum power point peaks common to partial shading in photovoltaic modules. The topology does so by equalizing the overall energy of the PV module through the use of only one inductive storage element. A theoretical study is carried out to describe the physical equations of the topology. Based on it, a prototype is designed and built. It is tested with a partially shaded PV module, raising its power output by nearly 40% at best. The results are compared to similar topologies dedicated to mitigate partial shading in PV applications.

Section III describes the proposed power electronics application, its working phases, major equations and various functionalities. Section IV addresses the experimental validation of a prototype and section V makes an overall comparison between the proposed and other state-of-the-art PV module embedded applications.

Index Terms—photovoltaic power systems, maximum power point tracking, supervisory algorithms, power electronics, equalizer, embedded systems

PV mismatch is a wide and often complex area of study. This section details the terminology and phenomena addressed in this paper.

(a)

III. PV MISMATCH AND CURRENT RESEARCH

II. INTRODUCTION

A. The PV module A PV module can be considered a voltage-controlled current source connected in parallel with a diode [13]. The output current depends on the available sunlight and the temperature of the module. Its output characteristics may be described by a graph called current-voltage (I-V) curve, shown in figure 1.

T

he world pays growing attention to the renewable, clean and practically inexhaustible energy sources [1]. Photovoltaic (PV) installations are a familiar reference in this landscape, ranging from small (less than 5 kW) residential plants to larger (thousands of kW) grid-connected PV fields. They can also compose hybrid power systems, along with other renewable energy sources [1, 2]. PV systems are roughly composed of two parts: the PV modules and their power electronics (PE) applications. While dispersed between these two parts, all PV research themes seek to improve productivity, power, efficiency, safety, and reliability [1, 2]. One of the biggest reliability issues of PV systems is the difference between its expected and actual power output. This problem can be called PV mismatch, even though there is no consensus in the literature [3]. It can have many sources and the one addressed in this paper is the partial shading of PV modules. Many authors have proposed ideas to mitigate the effects related to partial shading. Solutions range from alternative interconnections among the PV modules within a plant to PV module embedded power electronics (PE) applications [4–11]. This paper proposes a topology based on a battery equalizer as a PV module embedded application for partial shading [12]. An in depth theoretical analysis of this topology is made in order to show its adaptability to the PV and its potential against partial shading. It is then designed, tested and validated in a real PV module under partial shading. Finally, it is compared with other PV module embedded applications. This paper is organized as follows. Section II describes the PV mismatch problem and the solutions in current literature.

Fig.1 IV characteristics and maximum power points for various irradiances at fixed temperature

The unit used to measure the available power which can be drawn from the sun is called irradiance and expressed in W/m2 [13]. The important points of an I-V curve are described in table I. TABLE I IMPORTANT POINTS OF AN I-V CURVE

Name of the point Short-circuit current

Manuscript received XXXX XXth, 2012. Accepted for publication. Copyright © 20XX IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending a request to [email protected]. L. F. Lavado Villa,T. P. Ho, J. C. Crebier and B. Raison are with the Grenoble Electrical Engineering Laboratory (G2ELab), BP 46 Saint-Martin d’Hères, 38402, France (e-mails: {name}@g2elab.grenoble-inp.fr

1

Voltage

Current

Characteristic

0

ISC

Sensitive to irradiance [12]

Open-circuit voltage

VOC

0

Sensitive to temperature and silicon impurities [12]

Maximum power point (MPP)

VMPP

IMPP

Tracked by a dedicated PE circuit [7]

To maximize the power output of the PV plant, either its current or its voltage are controlled to stay as long and as close as possible to the MPP [14]. The algorithm that guarantees this optimum output is called maximum power point tracker (MPPT). It is associated with the power electronics DC/DC converter connected to the plant [8]. In this work, a converter and its associated MPPT will be considered to be using a hill-climb control strategy to control the voltage of the PV module, keeping it constantly at VMPP [14].

under reverse voltage by short-circuiting them, thus allowing the other cells to work at their normal current. However, bypass diodes deform the I-V curves while activated, interfering with the MPPT. This makes the tracking of the MPP impossible for simple algorithms. Some authors have proposed many tracking algorithms in an effort to compensate this phenomenon [14, 20]. Other authors have proposed PE topologies directly embedded to the PV module. They are designed based on the power independence principle, explained below.

B. PV mismatch: an overview PV mismatch is the difference between expected and actual power outputs of a PV module or plant. It can be classified according to its sources as internal or external. Internal mismatch is caused by imperfections within PV modules or cells, such as aging, poor solder bonds, impurities in the silicon crystal or variability in production [15, 16]. Techniques to mitigate it can be found in current literature, such as [17] and [18]. External mismatch has its sources outside of the PV modules, such as interconnections and converter losses or shadows [5, 18]. Many researchers are dedicated to improve the efficiency of inverters or proposing different topologies associated with more efficient MPP tracking algorithms [5, 14, 19]. This paper focuses its study on external mismatch caused by partial shading and the PV module embedded PE topologies dedicated to its mitigation.

D. Power independence principle The optimal situation against PV mismatch is to have PV cells connected in series but with different voltages and currents. Thus, they can be free to operate as close as possible to their local MPP. This is called the power independence principle (PIP), which is the main objective of all embedded PE topologies. This principle is described in the figure 2.

C. The problem of the partial shading in PV modules A PV module is partially shaded when the light cast upon some of its cells is obstructed by some object, creating a shadow. In this work, a shadow is considered to have a shape and opacity. The opacity of the shadow is called shading factor (SF), varying from zero to one. A SF of zero means that all the available irradiance shines on the PV module. On the contrary, a SF of one means that all available irradiance is filtered by the shadow before reaching the PV module. The shape of the shadow is determined by its length and width. The number of shaded cells or cell groups connected in parallel determines the width of the shadow. Its length represents the number of shaded cells or cell groups connected in series. The cells composing the PV modules studied in this work are all considered to be connected in series. Thus, their shadows have no width. The shaded PV cells will produce less current than the others, which will lead to one of the two scenarios [13, 15, 16, 20]:

Fig. 2 The power production of four independent PV cell groups (3 unshaded and 1 shaded) according to the shading factor

The PV module in figure 2 is considered to have 4 cell groups connected in series, each capable of producing 40 W under an irradiance of 1000 W/m2. Only one of the four groups is considered shaded. The blue line with square dots represents the maximum power output of the PV module without bypass diodes, tracked by a hill-climb controlled MPPT. The red line with diamond dots represents the output power of the PV module when the bypass diode is working, no matter the shading factor. The optimal power output of a commercial PV module can be deduced from these two curves. It follows the blue line until it crosses the red one. At this point, the bypass diode would be activated and the output of the PV module would no longer be sensitive to variations in the shading factor. The purple line with round dots illustrates the power independence principle. It shows how the PV module would respond if the current of the shaded cell group was independent from the others. The power output of only ¼ of the module would be affected by the shadow, joining the red line for an SF of 1. The triangle drawn by combining the blue, red and purple lines points out a

 The other cells impose their current over the shaded cells, making them work under negative voltage, dissipating power and risking destruction.  The MPPT will track the current of the shaded cells, imposing it over the others and making them produce less energy. To protect the shaded cells from being destroyed and to minimize losses in power production, PV modules are equipped with bypass diodes. They prevent the shaded cells from working 2

supplementary power not exploited in PV modules equipped with bypass diodes. The embedded PE topology makes such power available at the cost of its conversion efficiency, yielding the green line with triangle dots. Although being less effective for low or high SF, it would still raise the power production for all others.

3. The PE topology presented below. 4. The sensors, which capture the information needed by the control algorithm.

E. PV module embedded PE applications The state-of-the-art PV module embedded PE technologies dedicated to the PIP are mainly divided in two applications: series and parallel [7, 13]. Series applications use highly efficient power electronics topologies connected to each cell group of the PV module and dedicated to locally track their MPP. They either convert the DC current of the PV modules directly to AC or to another DC level, which is then sent to a central inverter. They are often called distributed MPPT (DMPPT) or micro-converters in the current literature [6–10]. Parallel applications use inductors to share the energy among cell groups. They eliminate local MPP created by the shadow, replacing them with one global MPP. They are called generation control circuit (GCC) [13, 21], returned energy architecture (REA) [22] or active bypassing [23, 24]. All applications face the same implementation challenges:

Fig. 3 Overview of the equalizer system

The control algorithm of the equalizer will be based on how the transistors will be activated and the information retrieved through the sensors. Thus, the physical operation of the system will be explored first. From it, the modes of operation of the elements that compose the control strategy of the system will be presented. All information derived from these two studies will be used to compare the performance of the equalizer to other equivalent applications in the light of the cited challenges.

 The choice of how many cells are going to operate independently, called granularity.  How to grant access to the electric terminals of the cells, called connectivity.  Number, size and complexity of passive components.  The cost of the system.  The complexity of the control strategy.  How easily it can be integrated into one dedicated microchip, called integration.  The guarantee of functioning if one or many active components fail, or functional reliability.  The power lost during operation or efficiency.  The extra power that is extracted from the PV modules equipped with the application in comparison with PV modules equipped with bypass diodes or power gain.

A. The proposed PE topology The topology proposed in this paper is shown in figure 4. Even though it is similar to the battery equalizer in [11], their functionalities, sizing and limits are different. The step up DC/DC converter and its MPPT control technique are modeled in this part by a current source.

This paper proposes a new PV module embedded parallel PE application, analyses it based on the above criteria and makes an overall comparison with other topologies. IV. PROPOSED SYSTEM Figure 3 gives an overview of the proposed system and its associated PV module. It is called equalizer system, being composed of four parts: 1. The microcontroller that stores the control algorithm of the system. 2. The gate driver, which translates the commands from the microcontroller into higher currents that can activate the transistors.

Fig. 4 The equalizer topology and a simplified MPPT [13]

The topology and its implementation challenges are analyzed in further details in section V. 3

TABLE II EQUATIONS OF THE WORKING PHASES OF THE TOPOLOGY

The proposed equalizer has 8 transistors (K2 - K9), 10 diodes (D1 - D10), 4 capacitors (CI - CIV) and an inductor (L). The PV module is represented by 4 cell groups (PVI - PVIV). The transistors are voltage-bidirectional but currentunidirectional due to the diodes, which impose one single current flow. Its single inductor can be charged by the available voltage of any unshaded cell group(s). The stored energy is then used to support the shaded cell group(s) by connecting the inductor in parallel to them, thus creating a alternative path to the excess MPPT current. In normal operating conditions, the switching pattern imposes rapid variations in voltage and current to the cells. To filter these, each cell group has a capacitor connected to it. The efficiency of the topology and its control functionalities is analyzed in the following sections.

Charge phase

Discharge phase

VL = V pvI +V pvII +V pvIII

(2)

VL = V pvIV

(5)

I mppt + I L = I pvI + I cI

(3)

I mppt  I L = I pvIV + I cIV

(6)

I mppt = I pvIV + I cIV

(4)

I mppt = I pvI + I cI

(7)

Where:  Imppt is the current imposed by the MPPT.  VL and IL are the voltage and current in the inductor.  VCi and ICi are the voltage and current in the ith capacitor.  VPVi and IPVi are the voltage and current in the ith PV cell group.

B. Theoretical study of the equalizer topology and components Figure 5 illustrates the working phases of the equalizer, namely charge and discharge. In this case the shadow is cast over the PVIV cell group.

1) Duty cycle and currents of the equalizer Table II gives the equations needed for calculating the duty cycle, the mean current in the inductor and the mean MPPT current. All of them are important for designing the converter and estimating its efficiency. Their equations are summed up in table III. TABLE III VARIABLES DERIVED FROM THE CHARGE AND DISCHARGE PERIODS

Variable

Equation n

Duty cycle

Fig. 5 An example of charge (a) and discharge (b) phases

The figures will adopt the following legend of symbols:

2 n +n 1 2

(8)

Mean MPPT current

I mppt = 1  D  SF  I pv

(9)

Mean inductor current

I L = SF  I pvI

(10)

Where n1 is the number of cell groups charging and n 2 is the number of those discharging. The duty cycle can be calculated by combining equations (2) and (5) to the fact that the average inductor voltage for one full period must be zero. Equation (8) shows that the duty cycle of the topology depends on the number of cells charging or discharging because their voltage is considered to be equal. Some authors point to the fact that this is not always the case [10, 20], which could compromise this equation. However, considering the evolution of the I-V curve of figure 1, a voltage discharge of the cell groups leads to a rise in their output current, which saturates after a certain voltage. Thus, the current in the inductor cannot grow indefinitely if its average voltage is different from zero. Instead, the PV cell groups will adapt themselves to the duty cycle imposed by the equalizer. As a consequence, the topology can work at a fixed duty cycle.

Fig. 4 Legend of symbols used in the examples

Where IL is the current in the inductor. The group PVIV is supposed shaded by a fixed SF. Thus, its current is expressed as:

I pvIV =( 1−SF )⋅I pvI

D=

(1)

The shadow is considered to have negligible impact on the voltage. The equations of the charge and discharge periods, and their associated numbers, are given in table II. 4

However, its power output may not be optimal for all shadow shapes and shading factors. The mean MPPT current circulating through the module is the unshaded MPPT current less the diverted current. There is a clear relation between the shadow and the power output of the structure. The SF determines the intensity of the equalizing current, while the shape of the shadow determines which cell group charges or discharges, hence the duty cycle. The power output of the system depends on both, as seen in equation (9). The mean current of the inductor is obtained from equations (3), (4), (6) and (7) plus the fact that the average current in the capacitors for one period must be zero. It is completely dependent on the shading factor, as seen in equation (10). Leading to two conclusions:

be used for power equalizing, search or bypassing. These functionalities and an overview of the control strategy are described in this section. 1) The equalizer mode and its basic switching sequences The equalizing process can be more or less complex, depending on which part of the PV module is shaded. To detail this functionality, this section introduces the notion of basic switching sequence (BSS). The example given in figure 5 extracts energy from three unshaded cell groups and gives it to one. It will be referenced thereof as BSS 3 to 1. Figure 6 shows two other BSS and illustrates the flexible connectivity of the topology. Table V proposes a non-exhaustive list of shading scenarios, together with their associated BSS and active switches. The BSS can be used to create composed switching sequences (CSS). For example, both BSS 2 to 1 and 1 to 1 in figure 6 could be used to create a CSS which allows all cell groups of the module to take part in the equalizing process of the shaded cell group (PVIII).

 The current flowing through the inductor is the same as in a bypass diode: the difference between the Imppt and the ISC of the shaded cell group.  Higher SF will lead to greater losses in the inductor and the capacitors. This makes their sizing important in the study of the topology. Consequently, the efficiency of the topology will be largely determined by the quality of its components. If they are properly sized, the equalizer losses might be similar to those of the bypass diodes. 2) The passive components The value of the inductor can be deduced from equations (3) and (6), while the capacitance from equations (4) and (7). They are summed up in table IV. TABLE IV INDUCTANCE AND CAPACITANCE OF THE TOPOLOGY

Variable Capacitance

Inductance

Fig. 6 Two examples of BSS: (a) 2 to 1 and (b) 1 to 1

Equation

C = 1  D   D  SF 

L = n1  D 

I pv ΔVC  f

V pvI ΔI L  f

TABLE V EXAMPLES OF BSS AND THEIR RESPECTIVE SWITCHES

(11)

Shaded Group(s) PVIV PVIII PVIII PVIII & PVIV PVII & PVIII PVI, PVII & PVIV PVI PVI, PVII PVI, PVII & PVIII

(12)

Where ΔVC is the capacitor voltage ripple, f is the switching frequency and ΔI is the inductor current ripple. The capacitance depends on the SF and the duty cycle of the equalizer, while the inductance depends only on the latter. Thus, the control system and its associated operation modes have a direct impact over the sizing of the passive components. To design the equalizer and estimate its losses, the control system must be studied first.

BSS (n1 to n2) 3 to 1 2 to 1 1 to 1 2 to 2 1 to 2 1 to 3 4 to 1 4 to 2 4 to 3

Charge K2 K2 K4 K2 K2 K2 K2 K2 K2

K7 K5 K5 K5 K3 K3 K9 K9 K9

Discharge K7 K5 K5 K5 K3 K3 D1 D1 D1

D10 K8 K8 D10 K8 D10 K4 K6 K8

2) The search mode The shape of the shadow is the most important information needed by the equalizer. The flexible connectivity of the equalizer makes it possible to search each cell group in order to detect irregularities in current production. This information

C. Theoretical study of the control system The high operating flexibility of the transistor network can 5

may be used to determine not only the shape but also the SF of the shadow. Figure 7 shows the four stages of this mode. The topology allows a current to pass through the inductor by closing the transistors closest to the cell group. Its current, which is an image of the shadow, is then read by a sensor and stored. Once the search is complete, current values can be compared in order to determine the position and SF of the shadow. For example, if no current flows in the inductor, this means that the cell group is in reverse bias. After the inductor is charged, the transistors can be opened. The diodes D1 and D10 will then naturally start conducting, restituting the stored energy to the whole topology. Another alternative is to close K3 and K6, returning the energy directly to the discharged cell. Despite its simplicity, this search must be conducted very carefully. While K4 and K5 are closed, the capacitor discharges itself. If the charge phase is too long it can disturb the power output of the PV module.

until the voltage in the capacitor(s) reaches zero. At this moment, the totality of Imppt will be split between the ISC of the shaded cells and IL, as in a bypass diode. In this mode, the current in the inductor can be periodically monitored. If the shadow moves away, the current in the inductor will tend to zero. This is a signal that can be used by the control system to stop the bypass mode and naturally restitute the energy stored in the inductor through D1 and D10. In the case of a fault in the equalizer, an overall bypass function is assured by D1, D10 and the inductor. 4) Overview of the control strategy The control strategy of the equalizer can be divided into 4 phases: Idle, Search, Decision and Action. They are illustrated in figure 8.

Fig. 8 Overview of the control strategy

While in the Idle state, the system monitors changes in I L or Imppt. They can be used to identify a change in power production and trigger a search. The Search state executes the search mode described above. Once it is complete, the information is used by the Decision state to determine if the equalizer will activate its transistors or not. If yes, this state determines the operation mode (equalize or bypass), the active transistors and the duty cycle. The Action state physically reconfigures the duty cycles of each PWM dedicated to each transistor. Finally, after the reconfiguration, the equalizer goes back to the Idle state. In order to validate this algorithm, two separate, yet complementary, studies must be conducted.

Fig. 7 The four stages of the search Mode

The duration of the search and its associated algorithm which uses the acquired information to precisely define the location and the magnitude of the shadow are still under study.

1. An efficiency study of all three operation modes to assess their losses and validate their applicability. 2. An in depth description of the variables, thresholds and time lengths involved in the decision algorithm.

3) The bypass mode Theoretically, as shown in figure 2, embedded PE topologies are not energy-efficient for high shading factors. Instead of equalizing, the proposed structure can be used to bypass the highly shaded cell group(s). For example, bypassing PVIII uses the switches of the discharge phase in figures 6(a). While bypassing PVIV uses those in figure 5(a). During bypass the discharge phase switches are kept closed

The first study can be conducted while using equations (8) through (12) to size the components of the equalizer. If any of the operation modes is deemed inapplicable, the algorithm must be reviewed. The second study needs not only these results but also an extended system analysis, ranging from the equalizer to the DC bus. This is not in the scope of this paper. 6

D. Efficiency of the proposed equalizer

thus, no constraints on the sizing of the inductance. During bypass mode, the current in the inductance, diodes and MOSFETS may be as high as the ISC of the PV module. The active power components assure the power transfer among the cell groups of the PV module. They must be able to withstand the maximum voltage ratings of the module, thus ±VOC. Their current is IL whose maximum is ISC. The values chosen from the above scenarios are detailed in table VII. They represent a compromise between the volume of the components and the equalizer performance under any BSS.

Many variables must be taken into consideration to study the efficiency of the equalizer. All those described in tables III and IV can be influenced by the operation mode, its associated BSS, the location of the shadow, its SF and by other design constraints. 1) Sizing of the components To size the components, the following design constraints are adopted:  An inductor current ripple (ΔIL) of 1 A, due to the low impact of current variation in power output.  A capacitor voltage ripple (ΔVC) of 50 mV, due to the high impact of voltage variation in power output.  A working frequency (f) of 100 kHz, compatible with current commercial micro-controllers.  Any operation mode and BSS can be used.  The topology must be able to work in continuous or discontinuous mode in order to equalize low or high SF, respectively.

TABLE VII CHOSEN VALUES OF THE SIZED VARIABLES

Variable Inductance Max IL, Imosfet and ID Capacitance Max VDSSmosfet

2) Inductance sizing and testing An inductor was built with the ferrite core ETD29-3C90 and single copper wire of 1.25mm2 width. Its series resistance (RS), thus conduction losses, is low due to the combination of a reduced number of turns and a large wire section. The final result is a 20-turn and 0.18mm air gap inductor. After measuring it with an Aglient 4294A Precision Impedance Analyzer, the following characteristics were determined.

The PV module is a Photowatt PW1650, with the following characteristics:       

A peak power of 165 W for 1000 W/m2. An open circuit voltage of 43 V. A MPP voltage of 35 V. The voltage of each PV group (Vpv) is 8.75 V. The current of the cells (Ipv) is 4.8 A. A short-circuit current of 5 A. A total 72 cells divided in 4 groups of 18.

L = 106μH

3) Efficiency study To assess the conversion efficiency of the equalizer, its theoretical power output must be compared to its power losses:

TABLE VI SUMMARY OF THE RESULTS FROM SIZING THE COMPONENTS

D 0.25 0.33 0.50 0.50 0.67 0.75 0.20 0.33 0.43

L(μH) 65.60 58.30 43.75 87.50 58.30 65.60 70.00 116.7 150.0

Max IL(A) 5.00 5.00 5.00 5.00 5.00 5.00 6.25 7.50 8.75

RL = 20mΩ

The single core wire will not have a skin effect problem due to low working frequency and ripple current of the equalizer.

The sizing of the components for the equalizer mode can be obtained from applying the design constraints, the PV module characteristics and each BSS to equations (8) through (12). They are summarized in table VI.

BSS 3 to 1 2 to 1 1 to 1 2 to 2 1 to 2 1 to 3 4 to 1 4 to 2 4 to 3

Chosen value 100 µH 5A 220 µF +/-60 V

C(μF) 187.5 222.2 250.0 250.0 222.2 187.5 800.0 666.6 571.4

ηout =

PoutEQ  Ploss PoutEQ

(13)

The power output is given by equation (14). All voltages are considered equal.

PoutEQ = I mppt  4  Vpv 

(14)

The losses of the equalizer are essentially concentrated in the MOSFET (either by switching or conduction), in the inductor and in the diode, as described in table VIII. To analyze the efficiency of the equalizer, its losses are calculated based on the shading factor and BSS. Figure 9 summarizes these results.

The results from the last three BSS show higher inductor currents and bigger passive components, both leading to more losses. Thus, they will not be taken into consideration in the design of the topology or used by the control system. In search mode, the current circulating in the inductance will be small due to the short duration of the charge period. It poses, 7

TABLE VIII LOSSES EQUATIONS FOR THE EQUALIZER

Losses Overall Conduction diode Switching diode Conduction MOSFET Switching MOSFET Inductor

4) Comparison with bypass diodes As shown in figure 2, the power output of a commercial PV module can be expressed by the linear combination of two curves: Tracker and Bypass. Both are expressed in table IX, along with the equalizer power output.

Equation Ploss = PdiodeC + PdiodeS + PmosC  PmosS + PL

(15)

PdiodeC = 2  Vth  I L

(16)

PdiodeS = t rr I rrm  n1  n2 .VPV . f

(17)

TABLE IX COMPARISON BETWEEN POWER OUTPUT EQUATIONS OF DIFFERENT APPLICATIONS

PmosC = 2  RdsON  I

(18)

1 PmosS =  t r + t f  I L n1  n2 .VPV . f 2

Power output

(19)

Equalizer

PoutEQ = I mppt  4  VPV 

(21)

PL = RL  I L2

(20)

Tracker

PoutTRK = SF  4  VPV  I PV

(22)

Bypass

PoutBP = n2  VPV  I PV

(23)

2 L

Equation

Where:             

The power gained by using the equalizer is the difference between its power output and that of the Tracker (for low SF) or of the Bypass (for high SF). They can be written as:

Ploss is the total power loss. PdiodeC is the conduction power loss in the diodes. PdiodeS is the switching power loss in the diodes. PmosC is the MOSFET conduction power loss. PmosS is the MOSFET switching power loss. PL is the inductor conduction power loss. The capacitor losses are neglected. The MOSFET Rdson is 0.07 Ω. The MOSFET rise time (tr) is 10 ns. The MOSFET fall time (tf) is 4 ns. The diode threshold voltage (Vth) is 0.55 V. The diode peak reverse recovery current (Irrm) is 2 A. The diode reverse recovery time (trr) is 25 ns.

 PoutEQ  PlossEQ   PoutTRK  GEQ TRK =  PoutTRK  PoutBP PoutTRK  

(24)

 PoutEQ  PlossEQ   PoutBP  PlossBP  G EQ  BP =  PoutTRK  PoutBP PoutBP  PlossBP   

(25)

Where the bypass diode losses are:

PlossBP = n2  I PV  Vth

The equalizer remains within 90% of efficiency until an SF of 0.8. And for a SF of 1, only BSS “1 to 2” and “1 to 3” have efficiencies below 85%. Thus the equalizer mode should only be used for SF lower than 0.8. For higher SF, it is better to use the bypass mode.

(26)

Figure 10 traces equations (24) and (25) as a function of the shading factor and the BSS. It unveils two important properties of the equalizer: the optimal SF and the SF range. BSS

BSS

Fig. 10 The comparative power yield of equalizing, bypassing and Tracking (equations 22 and 23) Fig. 9 Equalizer efficiency for different shading factors and BSS (eq. 13)

A gain peak is distinguishable for all BSS. It represents their optimal SF and the point where the PoutTRK crosses PoutBP in figure 2. The higher is the number of shaded cell groups, the higher is the optimal SF. As a consequence, equalizing is more effective against longer shadows, even for high SF. In the case of BSS “1 to 3”, the

To benchmark the equalizer efficiency, its power output will be compared to that of a PV module equipped with bypass diodes.

8

power gain may be raised by almost 80% at 0.8 SF. The SF range is composed by all SF for which the power gain is positive. If more unshaded cell groups are sharing their power, the SF range grows larger. Thus, all unshaded cells are needed to address high SF, making this an important parameter to find the optimal switching sequence. These properties, however important, need to be confirmed through measurements and compared to other PV module embedded PE applications.

The bypass diodes are used as the reference measurements. They came from the factory welded behind the module, inside a junction box. There is a bypass diode for every 18 cells. The equalizer is connected to the junction box of the bypass diodes, replacing them. The equalizer mode, BSS 3 to 1 and BSS 2 to 2 were tested. They were chosen for their simplicity and high power output capacity. B. Experimental results Each I-V curve can be used to compose a power-voltage (P-V) curve. They are composed of many points, making their interpretation difficult. To facilitate this task the following convention is proposed. Two P-V curves are displayed in Figure 11, one with and another without the equalizer for a SF of 0.57. The BCC is “3 to 1”. The three points indicated in the figure will be used to compose curves similar to those in figure 2. From figure 12, it is clear that the proposed equalizer erases the two local power points, replacing them by a global one. Thus, the equalizer guarantees the power independence principle.

V. EXPERIMENTAL VALIDATION A series of measurements was carried out to validate the power gain, optimal SF and SF range of the prototype issued from the design described above. A. Description of the test bench The test bench is composed of a partially shaded PV module, the equalizer, a set of 4 bypass diodes and a programmable load, as shown in figure 11. The PV module is a PhotoWatt PW1650, equipped with 72 polycrystalline silicon cells, forming 8 strings of 9 cells (9x8). It has an open circuit voltage of 59 V, reaching 40 V at typical power (150 W). Each cell measures 125x125 mm2 and has a 5.3 A short-circuit current. The module is located at Grenoble, France, (45°11’16’’ North and 5°43’37’’East) facing south with a 35° tilt angle.

Fig. 12 Example of two measured PV curves and their MPP points

The results from the measurements of BSS “3 to 1” are summed up in the figure 13. It has a trend line to study this progression for unmeasured SF. Fig. 11 – The four major components of the test bench. Clockwise: The programmable load, the bypass diodes, the equalizer prototype and the PV module

The shadow is composed by layers of translucent plastic film. Its equivalent shading factor was characterized through measurements, summarized in table X. TABLE X THE EQUIVALENT SHADING FACTORS FOR DIFFERENT LAYERS OF PLASTIC FILM

Layers of plastic Equivalent SF

1 0,18

2 0,36

3 0,48

4 0,57

The programmable load is used as a manual MPPT. It allows the user to choose any point of the I-V curve. During the experiment, the whole I-V curve is traced.

Fig. 13 Linear expansion of the results for the BSS 3 to 1

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As the shading factor rises, the PV module yields more power with the equalizer than without it. The green line represents the efficiency of the equalizer, showing poor performances for both low and high SF. To confirm the efficiency of the topology, the same analysis is conducted for the BSS 2 to 2, yielding figure 14.

information from the sections above. The granularity of the series applications is limited because more converters mean more losses. Other parallel applications are also limited by their multiple inductors whose overall losses come from their multiple energy transfers. The equalizer can have as many routing branches as needed to access each cell of a module. Even in this extreme scenario, its losses and passive components are only slightly bigger than those presented in this paper. Total granularity is also the great advantage of bypass diodes. The design of the PV modules has a great impact on the connectivity of its embedded PE application or bypass diodes. All of these applications are highly adaptable, granting them with a high connectivity. Series and parallel applications often have numerous inductors and many possible power paths, which raise their costs and control complexity. The equalizer is much simpler, due to its single inductor. The control strategies of series applications require either a great amount of sensors or a complex algorithm. Parallel applications have simpler control strategies and require fewer sensors. Other parallel applications have a single duty cycle that is constantly upgraded according to the evolution of the output current. The equalizer works at a fixed duty cycle for any SF. Its duty cycle depends on the location of the shadow, which can be found using the search mode. Integration can reduce size and production costs while increasing reliability of an embedded system. Series applications have a great integration potential because of their simple topologies. Other parallel applications have a low potential, because their transistors only share connections to their neighbors. The simplicity and redundancy of the connections among the transistors of the presented equalizer grants it with a high integration potential. The functional reliability of bypass diodes, series and the other parallel applications is limited. If they are activated, the totality of the produced current passes over all their actives components, reducing the global efficiency in bypass mode. The equalizer, however, has a major safety functionality with its global bypass function, grating it with a high functional reliability. Even though the conversion efficiency of series applications is high, they generate losses with or without shadow since the output current continuously flows through numerous power devices. Parallel applications are only active in the occurrence of a shadow, thus being more efficient. The equalizer is even more efficient because the current of other parallel applications is constantly passing through all active components. The power gain of the embedded applications is calculated from equation (40) and table XI, yielding figure 16. From the available data, only GCC [13] and GCC [21] are issued from measurements. All the others are simulations, which do not take into consideration the system losses.

Fig. 14 Linear expansion of the results for the BSS 2 to 2

The variation of irradiance during this experiment was much weaker, revealing its performance to be better than in figure 13. A comparison with bypass diodes was calculated based on the results from figure 13 and 14. The lines in figure 15 are the power yield of the trend lines, while the dots are actual measured data.

Fig. 15 Comparative power yield based on the experimental results

An important power gain is shown near the optimal SF for both BSS (nearly 40% and 20%). The trend in power yield is very similar to the theoretical estimation, despite the lower gain. The SF range is reduced, reinforcing the idea that the equalizer is better applicable for intermediary SF. It is important to remark that these measurements were performed with a prototype, which can still be optimized to reduce losses. With these results, the equalizer can now be completely compared to the others embedded PE applications. VI. COMPARISON WITH OTHER PV EMBEDDED PE TOPOLOGIES The comparison below is based on the challenges listed in section II.E, the current literature [6–10, 13, 21–24] and the 10

TABLE XI

The final conclusion is that the proposed topology accumulates functional advantages, while remaining simple and reliable.

EQUIVALENCE USED IN THE ESTIMATION OF THE POWER GAIN

Embedded system DMPPT [7] DMPPT [8] DMPPT [20] GCC [13]

SF 0.36 0.57 0.48 0.37

Equivalent BSS 3 to 1 2 to 2 3 to 1 3 to 1

GCC [21] REA [22]

0.6 0.5

2 to 2 2 to 2

VII. CONCLUSION An embedded power electronics structure designed for compensating the effect of partial shading in photovoltaic modules was studied in this work. Its topology is based on a battery equalizer, giving it its name: PV equalizer. The proposed equalizer redistributes the produced energy between unshaded and shaded PV cell through the use of one single inductor and a current inverter topology. Part of the current available in the unshaded cells is used to charge the inductor, which is then connected in parallel to the shaded cells, creating another path for the excess current. Neither the shaded cells nor the unshaded cells impose their respective currents. As a result, they can all work as close as possible to at their local maximum power point, an idea presented here as the power independence principle. The topology of the equalizer was presented, its working phases were detailed and equations analyzed. The flexibility of the topology was described by its three operation modes: equalize, search and bypass. They were combined to present an overview of the control algorithm of the system. An energy study of each mode was conducted after the sizing of the components. A prototype was created and a series of experiments was conducted to validate it. The results confirm the power independence principle and the interest of the topology, which has raised the power output of the PV module by almost 40% in one case. The results were compared to similar state-of-the-art PV module embedded PE applications. The proposed topology was found to be simple, reliable, highly granular, easy to integrate and efficient. It retrieves more power than the other applications for the same shading conditions. The part of the control algorithm responsible for deciding when, for how long and which transistors are to be activated is still under development. Current work is considering the use of all the information presented in this paper to create self-adaptive algorithms. These can be based in Kalmann filters or Markov chains in order to follow changes in the position and intensity of the shadow.

Fig. 16 Comparative power gain of different PV embedded systems

Where GEQ-TR is the gain provided by the equalizer and GOTHER-TR is the gain of the other topologies. There are two cases where the efficiency of the presented equalizer was lower than that of the other embedded system. For DMMPT [7], the shading factor is low and the simulation does not take losses into consideration. In REA [22], the shadow is non-uniform, making the comparison difficult. The overall comparison between the embedded PE systems and the equalizer is summed up in table XII.

TABLE XII OVERALL COMPARISON BETWEEN EMBEDDED PV SYSTEMS

Granularity Connectivity

Bypass diodes [21] Total High

Cost

Low

Challenge

Passive components Control strategy

None

DMPPT [16, 17, 20] Limited High Medium to High Simple to Complex

GCC & REA [14, 15, 22] Limited High Medium to High Complex

EQ Total High Medium

VIII. REFERENCES

Simple [1]

None

Complex

Medium

Medium

Integration Functional Reliability Efficiency

None

High

Low

High

Limited

High

Limited

High

High

Power Gain

None

Medium Medium to High

Medium Low to Medium

High Medium to High

[2]

[3]

[4]

[5]

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IX. BIOGRAPHIES Luiz Fernando Lavado Villa was born in Foz do Iguaçu, Brazil in 1984. He received his electrical engineer degree from the UFSC (Federal University of Santa Catarina), Brazil, in 2009 and his M.S. degree from the GIT (Grenoble Institute of Technology) in 2010. He is now preparing his PhD degree at the G2ELab, Grenoble Electrical Engineering Laboratory, of the University of Grenoble. The focus of his work is the interface between power electronics and control applications for shaded photovoltaic systems.

Tien-Phu Ho was born in Nghe An, Vietnam in 1986. He received his electrical engineer degree from the HUST (Hanoi University of Science and Techonology), Vietnam, in 2009 and his M.S. degree from the GIT (Grenoble Institute of Technology) in 2011. He is now preparing his PhD degree at the G2ELab, Grenoble Electrical Engineering Laboratory, of the University of Grenoble. His research interests are the automated protection for DC distribution grids. Bertrand Raison (M’03) was born in Béthune, France in 1972. He received his M.S. and Ph.D. degrees in Electrical Engineering from the Grenoble Institute of Technology, France, in 1996 and 2000. He has joined from 2001 to 2009 the Grenoble Institute of Technology as an Associate Professor. Since 2009, he has joined the Science University Joseph Fourier as a Professor. His general research interests are fault detection and localization in electrical systems and distribution network planning and protection with respect to fault management.

Jean-Christophe Crebier earned his Bachelor degree in Electrical Engineering in 1995 from INP Grenoble, France. In 1999, he received his PhD in Power Electronics, EMC and power factor correction from LEG, INPG, France. In 1999 he was working as a Post-Doc student in CPES (Center for Power Electronics Systems), USA, doing research in system integration. In 2001, he was hired by CNRS (National Center for Scientific Research), France, as a full time researcher in power electronics. Today, his main research fields are system and functional, hybrid and monolithic integration and packaging for medium to high voltage active devices. Applications to the management of multicell systems such as PV, batteries and distributed systems.

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