Proceedings of 2nd National Conference on
Advanced Communication Systems and Design Techniques (NCACD) 2012
Organized by:
Department of Electronics and Communication Engineering Haldia Institute of Technology, Haldia West Bengal, Pin-721657
Sponsored by:DRDO, New Delhi CSIR, New Delhi
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COMMITTEES PATRON MR. LAKSHMAN SETH, Chairman, ICARE
CONVENERS Dr. Sunandan Bhunia, Dept. of ECE, HIT Dr. Jaydeb Bhaumik, Dept. of ECE, HIT
LOCAL ADVISORY COMMITTEE Prof. A. K. Mukhopadyay, Director, HIT Mr. Asish Lahiri, Secretary, ICARE Mr. Anjan Mishra, Registrar, HIT
COORDINATORS Mr. Raj Kumar Maity, Dept. of ECE, HIT Mr. Surajit Mukherjee, Dept. of ECE, HIT
TECHNICAL COMMITTEE Prof. S.C. Dutta Roy, INSA Hon.Scientist, IIT Delhi Prof. B. N. Biswas, Chairman, SKF Education Div. Prof. B. N. Basu, J. C .Bose School of Engg. Hooghly Prof. Ram Gopal Rao, IIT, Bombay Prof. Indranil Sengupta, IIT Kharagpur Prof. Bhabani Prasad Sinha, ISI, Kolkata Prof. Sourangshu Mukhopadhyay, B.U, Burdwan Prof. Bhaskar Gupta, J.U, Kolkata Prof. Nikhil Ranjan Das, INRAPHEL, CU Prof. Animesh Maitra, C.U., Kolkata Prof. C.K.Sarkar, J.U, Kolkata Prof. Partha Pratim Sarkar, K.U, Nadia Prof. Sudakhina Kundu, W.B.U.T, Kolkata Prof. M. K. Pandit, Dean-School of Engg, HIT Prof. Debasis Giri, HIT, Haldia Dr. Indrajit Chakrabarti, IIT Kharagpur Dr. S. Dasgupta, IIT Roorkee Dr. Aniruddha Chandra, NIT Durgapur Dr. Santi Prasad Maity, BESU, Kolkata Dr. Prasant Kumar Sahu, IIT Bhubaneswar Dr. Sumit Kundu, NIT Durgapur Dr. Ananda Sankar Chowdhury, J.U, Kolkata Dr. Kailash Chandra Ray, IIT Patna Dr. Rowdra Ghatak, NIT, Durgapur Dr. Debalina Ghosh, IIT Bhubaneswar. Dr. Santosh Biswas, IIT Guwahati Dr. Sambhu Nath Pradhan, NIT Agartala Dr. Mounita Saha, General Motors, India Dr. Santanu Dwari, ISM Dhanbad Dr. Ravi Kumar, IIIT Bhubaneswar Dr. S.K. Behera, NIT, Rourkela Dr. Jawar Singh, IIITDM, Jabalpur Mr. Debaprasad Das, MSIT, Kolkata Dr. Deepayan Bhowmik, University of Sheffield, UK Dr. Prasun Ghosal, BESU, Howrah Dr. Ashraf Hossain, Aliah University, Kolkata Dr. Lakshi Prasad Roy, NIT Rourkela Dr. Priyanka Mondal, Poly-Grames research Center, École Polytechnique de Montréal, Canada Dr. Santosh Ghosh, K.U.Leuven, Belgium Dr. Sourav Das, Alcatel-Lucent India Ltd
FINANCE COMMITTE: Mr. Sudipta Basu, Finance Manager, HIT Mr. Jagannath Samanta, Dept. of ECE, HIT Mr. Avisankar Roy, Dept. of ECE, HIT PUBLICATION COMMITTEE Mr. Dibyendu Choudhury, Dept. of ECE, HIT ORGANIZING COMMITTEE Mr. Kushal Roy, Dept. of ECE, HIT Mrs. Somdatta Sinha, Dept. of ECE, HIT Mr. Souragni Ghosh, Dept. of ECE, HIT Mr. Amit Bhattacharya, Dept. of ECE, HIT Mr. Tirthadip Sinha, Dept. of ECE, HIT Mr. Akinchan Das, Dept. of ECE, HIT Mr. Bishnu Prasad De, Dept. of ECE, HIT Mr. Avishek Das, Dept. of ECE, HIT Mrs. Shampa Samanta, Dept. of ECE, HIT Mr. Pulak Maity, Dept. of ECE, HIT Mr. Sudhansu Maity, Dept. of ECE, HIT Mr. Sachindeb Jana, Dept. of ECE, HIT Mr. Subhendu Barman, Dept. of ECE, HIT Mr. Atanu Pradhan, Dept. of ECE, HIT Mr. Tapan Maity, Dept. of ECE, HIT Ms. Ira Khila, Dept. of ECE, HIT TRAVEL & ACCOMMODATION Mr. Suman Paul, Dept. of ECE, HIT Mr. Pinaki Satpathy, Dept. of ECE, HIT WEB DESIGN: Mr. Banibrata Bag, Dept. of ECE, HIT Mr. Sourav Das, Dept. of ECE, HIT
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LIST OF REVIEWRS 1. Prof. Nikhil Ranjan Das, University of Calcutta, Kolkata 2. Prof. M. K. Pandit, Dean-School of Engg, HIT, Haldia 3. Prof. P. P. Sarkar, K.U, Nadia 4. Prof. Debasis Giri, HIT, Haldia 5. Dr. Aniruddha Chandra, NIT Durgapur 6. Dr. Rowdra Ghatak, NIT, Durgapur 7. Dr. S. K. Behera, NIT, Rourkela 8. Dr. Ananda Sankar Chowdhury, Jadavpur University, Kolkata 9. Dr. Sourav Das, Alcatel-Lucent India Ltd 10. Dr. Jaydeb Bhaumik, HIT Haldia 11. Dr. Sunandan Bhunia, HIT Haldia 12. Mr. Debaprasad Das, MSIT, Kolkata 13. Mr. Debasish Mondal, HIT Haldia 14. Mr. Rashmi Ranjan Rout, NIT Warangal 15. Mr. Jagannath Samanta, HIT, Haldia
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CONVENERS’ MESSAGE The 2nd National Conference on Advanced Communication Systems and Design Techniques (NCACD 2012) will be held at Haldia Institute of Technology, Haldia, West Bengal during 29-30th September, 2012. The Conference is being organized by the Department of Electronics & Communication Engineering. Aim of the conference is to bring together the professionals from teaching and Industries fraternity from all over the India, including research scholars to present their work and exchange the information available so as to bridge the gap between Industrialists, Academicians & Researchers. The conference will cover wide range of topics in the field of
Wireless Communication, Microwave Communication,
Optical Communication, Signal Processing, VLSI Design and Embedded Systems. Besides incorporating a large number of reviewed papers for presentation at the conference, seven eminent speakers have been invited to deliver special talks on their respective fields of research, so that students and young researchers may be benefitted in their future research works. We have the pleasure to acknowledge the co-operation and financial support that we have received from different organizations, viz., Council of Scientific and Industrial Research (CSIR) New Delhi, Defence Research and Development Organisation (DRDO).
September, 2012
Dr. Jaydeb Bhaumik Joint Convener
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Dr. Sunandan Bhunia Joint Convener
PREFACE It is really a great pleasure for us to welcome all of you to the 2nd National conference on Advanced Communication Systems and Design Techniques (NCACD 2012). With the help of our Local Advisory Committee as well as the Technical Program Committee, we hope to present a rich technical program containing research articles from diverse fields of Electronics and Communication Engineering. A great success of 1st National conference on Advanced Communication Systems and Design Techniques (NCACD 2011) and huge requests from the participants inspired us to organize the NCACD 2012. A large number of papers were received for consideration for presentation in the conference. After peer review of the papers about 65% of the submissions were selected for publications in the conference proceeding. Moreover some of the selected and extended version of the accepted papers will be published in the regular issue of January 2013 of International Journal of Soft Computing and Engineering (IJSCE). We are very thankful to the authors for submitting their research papers. Also, we are very thankful to the reviewers for their timely reviews. The accepted papers have been categorized into several sections,
viz.,
Microwave
Communication,
Optical
Communication,
Wireless
Communication, Signal Processing, VLSI Design and Embedded Systems. Also, abstracts of all invited talks are incorporated in the proceeding in a separate section. Even after the end of the conference, we believe that this proceeding will remain as a unique source of knowledge specifically for students and aspiring researchers.
September, 2012
Dibyendu Chowdhury Rajkumar Maity Surajit Mukherjee Jaydeb Bhaumik Sunandan Bhunia
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Contents Sl. No.
Page no.
Invited Talk 1. 2. 3. 4. 5.
A New Look At Gunn Oscillation by Professor B. N. Biswas Microwave Tubes Development Scenario in India by B. N. Basu Semiconductor Photonic Devices for Optical Communication by N. R. Das Innovative research studies for the design of practical monopole antenna by P. P. Sarkar Challenges in Video Summarization by Ananda S. Chowdhury
1 2 5 6 10
Microwave Communication 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11.
Numerical Analysis of D.C Properties of Si/Si0.9Ge0.1 DDR IMPATT Structure by Double Iterative Technique An Analysis of Wave Guide E-Plane Tee as 3dB splitter at X Band Using HFSS Software Integrated Radar for Smart Vehicle Link Design of a Miniaturized Dual Wide Band Frequency Selective Structure Optimization of Size Reduction of a Dual-band Frequency Selective Surface by Modifying Slot Dimension Studies on Compact-Broadband Application of Frequency Selective Surface (FSS) by Modifying the Unique Shaped Slot within Rectangular Patch Compact Multi-frequency Microstrip Antenna Design of a Single Layer Frequency Selective Surface with Dual Wide Band Compact Wideband Planar Quasi Semiconductor Monopole Antenna Shorting Pin Loaded Compact and Broadband Triangular Microstrip Patch Antenna Effects of periodicity on dipole array FSS structure
13 16 19 25 28 31 34 37 40 44 48
VLSI & Embedded Systems 1. 2. 3.
Optimized ISA Based Microcontroller for Small Scale Applications Real-time control of a DC Motor using Open Source Code Tools Modeling and Performance Analysis of Ballistic 1-D Carbon Nanotube Field Effect Transistor (CNTFET) Stability Analysis in CNT and GNR Interconnects Analytical Sub-threshold Surface Potential and Drain Current Model for Linearly Doped Double Halo DMG MOSFET Development of a new Tag Anti-collision Algorithm for RFID System And its VLSI Implementation
51 55 60
7.
Design and Implementation of Ultra Low-Power 8×8 Adiabatic Multiplier using SPADL
75
8. 9. 10.
Design and Analysis of high speed low power Carry Look-Ahead Adder using static logic FPGA Implementation of High Speed Numerically Controlled Oscillator for QAM Architecture Architecture for Programmable Generator Polynomial Based Reed-Solomon Encoder and Decoder Design of RS (255, 251) Encoder and Decoder in FPGA
79 84 87
4. 5. 6.
11.
64 67 71
91
Wireless & Optical Communication 1. 2. 3. 4. 5.
Computation of Cladding Index and Effective Mode Profiles of 1D Silica-Air Photonic Crystal Fiber in Optical Communication Range HEDHRA: A Hybrid Energy-Efficient Data Centric based Hierarchical Routing Algorithm for Cognitive Wireless Sensor Networks Transmission of Bi-phase or Manchester Coded Infrared Signal and Reception through a compatible Receiver for specific application Recent advancements in Smell Sensor: a minireview Optical Method to Study the Surface Tension of Water and Water with Organic & Inorganic Impurities
95 99 104 108 115
Signal Processing 1. 2. 3. 4.
An Approach of Digital Watermarking with Secret Sharing Scheme High Performance Novel Squareroot architecture using Ancient Indian Mathematics for High Speed Signal Processing Towards Emotion Detection Through Electro-Cardiograph (ECG) Signal A Secure Off-line Electronic Payment System
119 124 130 135
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
A New Look At Gunn Oscillation Professor B. N. Biswas, Emeritus Professor, Sir J. C. Bose School of Engineering On switching a Gunn Oscillator one observes the growth of oscillation until it attains a finite value with the frequency of oscillation determined by the resonant frequency of the tank circuit with finite bandwidth. We say that the oscillation builds up from inherent system noise which is a wideband (multi-tone) signal. We do not usually consider the location of the poles or eigen values of the oscillatory system in the complex frequency plane. Do they remain stationary all the time during the growing period of oscillation and afterwards? The author finds a moving and dancing character of the poles. It is result
is based on the principle of energy balance. Next we look into the energy required to generate a
oscillating harmonic signal. This leads to the definition of an energy operator commonly known as Teager Energy Operator (TEO). This operator can be used to ascertain the parameters
of a signal, viz, frequency, demodulation of of instantaneous limiting during the process of amplitude stabilization. Further, how is a single frequency oscillation possible out of a multi-tone signal? It will be shown that the capture of a single frequency oscillation is possible due to two mechanisms, viz, (1) suppression of weaker signals in a regenerative tuned circuit and (2) dynamic narrowing of the oscillator bandwidth with the growth of oscillation. If however there are finite transmissions through the regenerative circuit at other frequencies generated through the process of limiting then weak signal suppression mechanism does not apply. Then under favorable condition this may lead to multi-frequency oscillations. To avoid theoretical complexity, an experimental result showing three frequency oscillations in a Gunn oscillator is presented in this lecture for the benefit of the participants. The lecture develops a simple method of ascertaining the amplitude and frequency of steady state oscillation in terms of the device and system parameters without taking recourse to non-linear technique, as is commonly done. This calculation
fm signals, etc.
am signals and
The second part of this lecture looks into the effect of an external signal on a free running Gunn oscillator and explains the phenomenon of synchronization. It develops the governing amplitude equation of the injection synchronized oscillator from the energy exchange point of view. The phase equation is derived without taking recourse to non-linear circuit analysis. This tutorial concludes with an application of the phenomenon of injection locking together with the Teager Energy Operator for the demodulation of an fm signal in the presence of unwanted disturbances. The outcome of this application is interesting and can be taken up for further work. Finally it is worthwhile to note that although this tutorial is developed for a two-terminal oscillator, it is can be easily extended to three-terminal oscillator because the mathematical models are identical.
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Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Microwave Tubes Development Scenario in India B. N. Basu, Sir J. C. Bose School of Engineering, Hooghly-712139, West Bengal, India
I. INTRODUCTION Microwave tubes are high power electron devices which work as sources and amplifiers in microwave and higher frequency ranges. The principle of a microwave tube is based on electromagnetic theory. While following the development of microwave tubes it is worth reviewing the relevant historical timeline. Mention may be made to J. C. Maxwell’s electromagnetic theory (1870) and the landmark experimental work of H. Hertz and J. C. Bose. “In 1895, J. C. Bose of India gave his first public demonstration of electromagnetic waves, using them to ring a bell remotely and to explode some gunpowder. In 1896, the Daily Chronicle of England reported as follows. “The inventor (J. C. Bose) has transmitted signals to a distance of nearly a mile and herein lies the first and obvious and exceedingly valuable application of this new theoretical marvel. Popov in Russia was doing similar experiments, but had written in December 1895 that he was still entertaining the hope of remote signaling with radio waves. The first successful wireless signaling experiment by Marconi on Salisbury Plain in England was not until May 1897.” All Indians must be proud of the achievement of this great Indian scientist, J. C. Bose, who was the first in the world to establish a radio link. Further, J. C. Bose carried out millimetre-wave experiment on diffraction grating, spectrometer, polarimeter, etc. He was also the first to use the concept of chiral material made out of oppositely twisted bundles of jute fibre to experiment on the rotation of plane of polarisation of electromagnetic waves which he reported in his pioneering paper as early as 1898 in Proceedings of Royal Society of London; the paper was communicated to the Society on his behalf by none other than Lord Raleigh. In this work, J. C. Bose demonstrated electro-optic analogues of two varieties of sugar solutions: dextrose and laevulose. He used ordinary book pages as the polarizer/analyzer (Jagadish Chunder Bose, “On the rotation of plane of polarisation of electric waves by a twisted structure,” Proc. R. Soc. Lond, vol. a63, pp. 146-152, 1898). Thus, this work of J. C. Bose is believed to be the first ever microwave/millimetre-wave experiment in artificial materials for electromagnetic applications which exhibit the chiral characteristics! Microwave tubes belong to the area of vacuum electron devices, though there do exist some no-vacuum, plasma-assisted microwave tubes as well, which extend the capability of these tubes by extending their space-charge limiting current capability and relaxing the magnetic field requirement. Microwave tubes are superior to their solid-state counterparts with respect to the heat generated due to electron collision, the attainable operating temperature, the breakdown limit on the maximum electric field inside the
device, the base plate size, the RF output attainable, etc. Further, there are two types of devices/systems in which the advantages of solid state devices and their relevant technology are accrued. In the first of these types, we have vacuum microelectronic tubes, which are developed using solid-state electronics micro-fabrication technology like DRIE and LIGA (X-ray lithography). This has made it possible to extend the frequency range of high power microwave tubes to millimetre and terahertz frequency regimes. In the second of these types, we have the microwave power module (MPM), in which both a solid-state amplifier and a microwave tube (TWT) power booster coexist to equally share their gains, along with a built-in electronic power conditioner (EPC). Our country is capable of developing MPMs. Through sponsored projects, the preliminary work in developing terahertz tubes has been initiated in our country.. II. TREND OF DEVELOPMENT Efforts are being continuously made throughout the globe in improving the performance characteristics of conventional microwave tubes by innovative design and technology. The race to widen the bandwidths of a TWT and a klystron continues. Efforts are also being made to enhance the TWT efficiency for space applications, for instance, by the pitch tapering of the helix, besides the multi-stage depressed collection. Further, innovative helix loading techniques are being used to develop wideband helix TWTs in our country, such as vane-loaded envelope, tapered dielectric helix supports, and multi-dispersion structures. The multi-beam technology is also being attempted in our country, in particular, for developing compact, high power klystrons. Of late, we have also initiated work in developing high power fast-wave millimetre-wave tubes, which overcome the limitation of conventional slow-wave tubes. The work has been taken up to develop a gyrotron for plasma heating. Considerable theoretical work in broadbanding a gyro-TWT or in rarefying the modes of a gyrotron has been reported by Indian scientists. The work on developing high power microwave (HPM) tubes using an intensive relativistic electron beam (IREB), such as relativistic TWTs, VIRCATORs, plasma-assisted pasotrons, etc. have also been taken up in the country. The presentation will apprise the participants of the status of our country vis-à-vis the following global trend in the development of microwave tubes.
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Department of ECE, Haldia Institute of Technology, Haldia
Microwave Tubes Development Scenario in India Trend Improved performance conventional microwave tubes
Tubes Wideband electronic warfare TWTs, high efficiency, long-life, light-weight space-TWTs, high power compact multi-beam klystrons,etc.
Tubes accruing the Advantages of both vacuum and solid-state devices/electronics
Folded-waveguide TWT, reflex klystron, etc.
IREB driven tubes
VIRCATOR, MILO, relativistic backward-wave oscillator, relativistic klystron (RELTRON), OROTRON, etc.
Fast-wave tubes
Gyrotron, gyro-TWT, gyro-klystron, etc.
Plasma-filled tubes
Plasma-assisted TWT, pasotron, gyrotron, etc.
Some Features/Comments Innovative tube- envelope/tapered dielectric helix-support/pitch profiling/depressed collection Multi-beam electron gun Terahertz generation/ batch production Bremsstrahlung of electrons in electrostatic field (VIRCATOR), E-bomb using a magnetic flux compression generator (FCG) in conjunction with a VIRCATOR, Self focusing (MILO) Information warfare Filling up of mm-wave technology gap in high power domain Bremsstrahlung of electrons in magnetic field Periodic beam Coaxial structure, PBG structure for mode selection/rarefaction Space-charge neutralization for enhanced beam current transport/relaxed focussing Development of PCE gun
III. DEDICATED ORGANISATIONS IN THE COUNTRY We may list the organisations in the country engaged in microwave tubes R&D as follows. Organisation Activity areas and status Establishment of the facilities for the development of magnetrons in late 1950’s (since Institute of Radiophysics discontinued).Significant contribution to understanding the non-linear theory of electron and Electronics (Calcutta beam parametric amplifiers by N. B. Chakrabarti. Subsequently study on nonlinear effects in University), Kolkata multi-beam and beam-plasma devices and in TWTs, elsewhere in the country Development of magnetrons initiated at National Physical laboratory (NPL), New Delhi National Physical laboratory (CSIR) by Amarjit Singh and N. C. Vaidya. Subsequent shifting of activities to Central (NPL), New Delhi (CSIR) Electronics and Engineering Research Institute (CEERI), Pilani (CSIR) Central Electronics and Magnetron, Carcinotron, TWT (wide bandwidth, high efficiency), klystron, multi-beam Engineering Research Institute technology, high emission density cathode, gyrotron, plasma-assisted tubes, HPM tubes (CEERI), Pilani (CSIR) (initiated) Centre of Research in Established at the Banaras Hindu University (BHU) in 1979 by N. C. Vaidya. Analysis of Microwave Tubes (CRMT), helical structures, broadbanding of TWTs, nonlinear Eulerian dynamics for harmonic and Banaras Hindu University inter-modulation effects in TWTs, analyses of gyro-TWTs and gyrotrons, broadbanding of (BHU), Varanasi gyro-TWTs Microwave Tube Research and Development Centre Established in 1984 Helix and coupled-cavity TWTs, high emission density cathodes, (MTRDC), Bangalore gyro-TWTs, HPM tubes (initiated) (DRDO) Electronics and Radar Vulnerability of electronic systems to HPM generated, for instance, by the VIRCATOR in Development Organisation collaboration with MTRDC and BARC (LRDE), Bangalore (DRDO) Bharat Electronics (BE) Manufacturer of microwave tubes such as magnetrons, klystrons and TWTs Limited, Bangalore Established by G. S. Sidhu Pilani Electron Tubes, Manufacturer of high power transmitting tubes having potential for manufacturing Sangrur magnetrons Indian Institute of Gyrotron theory due to M. V. Kartikeyan (with support from Karlsruhe Institute of Technology (IIT), Roorkee Technology). Participation in a multi-institutional project for the development of the first ever gyrotron with CEERI, Pilani as the nodal centre Devi Ahalya Vishwa Initiated by K. P. Maheshwari in the development of relativistic microwave tubes (TWTs Vidyalaya (DAVV), Indore and oscillators) 3
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
The presentation will highlight the activities of the above organisations in the development of microwave tubes in our country and take care to include their list and specifications as well as their major users. A position paper prepared in the year 2006 will also present the requirement of microwave tubes (TWTs, klystrons, magnetrons, gyrotrons, etc.) in our country for the organisations that include ISRO, RCI, LRDE, DLRL, MTRDC, DEAL, ADA, RRCAT, BARC, BEL, IPR, SAMEER etc., for a period of the next ten years from then (that is, up to the year 2016). Finally, the consortium approach of developing strategic devices with reference to the development of a gyrotron that involves the participation of the academia, the R&D laboratories and the potential manufacturers of microwave tubes in our country will be discussed. The activities of the Vacuum Electronic Devices and Applications (VEDA) Society, India in promoting the activities in microwave tubes area in our country will also be touched upon. IV. CONCLUSION Attention is invited to the existing R&D potential in the country in the area of microwave tubes. The presenter will consider himself to be fortunate if he could establish a collaborative liaison of a young researcher with any of the concerned R&D organisations mentioned in this presentation.
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Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Semiconductor Photonic Devices for Optical Communication N. R. Das
Institute of Radio Physics and Electronic,University of Calcutta,West Bengal, India
Email:
[email protected]
Optical communication has taken the lead role to meet today’s demand for large volume of data transfer at high speed. Research in this field has been largely stimulated with the advent of optical fibre. Various semiconductor photonic devices are the key components of an optical fiber communication system. Photonics deals with generating and harnessing photons (i.e. electromagnetic radiation). As electron is to electronics, so photon is to photonics. Semiconductor photonics devices include LEDs, LASERs, semiconductor optical amplifiers, optoelectronic modulators, photodetectors, etc.. The present discussion is mainly confined on LEDs, lasers and photodetectors. In an LED (light emitting diode) or a semiconductor LASER (light amplification by stimulated emission of radiation), carriers (electrons/holes) at a higher state loose energy to come down to a lower state by emitting light. This type of transition is called radiative transition. Transitions may be non-radiative (no light) also, where the loss of energy is in the form of heat by lattice vibration (creating phonon) instead of generating photons. In case of conventional structures, the energy is released (lost) when there is electron-hole recombination. LED is an electroluminescent device, where a semiconductor p-n junction is forward biased. Electrons move to the p-region to recombine with holes in the p-region and vice versa. Emission wavelength depends on the choice of material (band-gap). For communication applications high-speed is desired, which requires the modulation bandwidth to be high. The bandwidth can be increased by reducing The active layer thickness, increasing drive current, etc. within certain limit. Significant improvement in performance can be achieved by using heterojunction LED. In a double heterojunction LED, the active layer is sandwiched by wide-gap layers on both sides (top and bottom). This structure also helps in the design of an edge emitting LED, which is important for communication applications. Light with much power is emitted from one edge of the LED. Nano-LEDs, such as quantum well (QW) LEDs, quantum dot (QD) LEDs, are important for their high speed and better linearity than conventional LEDs. Besides, these can be made tunable in wavelength. In a semiconductor LASER, the p-n junction of highly doped semiconductor is used. When forward biased, population inversion occurs in the junction region; stimulated emission then causes high power light emission. The next requirement is to use a resonant cavity in order to get coherence in the emitted radiation. The end-facets (crystal planes) of the active region itself serve as the end mirrors to form the resonant cavity. One end is made less reflective so that laser output can be obtained from that edge. Because of high power and narrow line-width, lasers are better suited than LEDs for long distance optical communication. Using heterojunctions, both light and carrier confinements are possible, thus reducing the threshold current of laser – an important requirement of laser. If the active region is made thinner to reach a nanostructure, then a quantum well is formed and the characteristic property of this nanostructure further improves the threshold current density. A significant reduction in threshold current density has been achieved by using other nano-lasers, such as quantum wire and quantum dot lasers. Distributed feedback (DFB) laser helps in narrowing the linewidth of lasers. Vertical cavity surface emitting laser (VCSEL) is suitable for chip-to-chip communication, vertical integration of lasers and detectors, etc.
Photodetector is a device that absorbs light and accordingly gives a current in the external circuit. When light (in general, e.m. radiation) is incident on a semiconductor, it may be absorbed by the semiconductor, if light energy is greater than or equal to its band-gap energy. If the energy is less than the band-gap energy, usually there is no absorption. In this absorption process an electron is taken from the valence band to the conduction band. A semiconductor photodetector can be classified in many ways: by no. of junctions, wavelength range, transition states and internal gain. Some of the photodetectors (PDs) are photoconductor, p-n junction photodiode, p-i-n PD, Avalanche photodiode (APD), etc. The performance parameters of photodetectors are its quantum efficiency /gain, bandwidth and noise. High efficiency is required for better responsivity to detect weak signals, and high bandwidth is required for detection of high bit-rate signals. The thickness of the active layer plays an important role. If the bandwidth is transit-time controlled, then lower thickness is required for higher bandwidth, while a larger thickness is required for higher quantum efficiency. This trade-off in conventional PDs can be resolved by using advanced structures, such as resonant cavity enhanced structures or edge-coupled structures. The discussion above is mainly related to the interband transition. In case of nanostructures, there may be inter-subband transition also. In this case, light may be absorbed by electrons (holes) to be excited from a lower subband to a higher subband in the conduction (valence) band. Similarly, carriers in an excited state may loose energy to come down to a lower state by emitting radiations. The energies of such transitions are usually in the mid or far infra-red regions, and so have diverse and emerging applications, such as THz emission, space communication, medical imaging, night vision, etc. Quantum cascade laser is an example of terahertz optical source. Similarly, quantum well infra-red photodetectors (QWIPs) and quantum dot infra-red photodetectors (QDIPs) are infrared detectors at mid and long infrared wavelengths. In conclusion, we have briefly discussed the operation of LEDs, LASERs and Photodetectors, and some considerations required for their use in optical communication. The potential of nanostructure photonic devices for improved performance has also been indicated.
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Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Innovative research studies for the design of practical monopole antenna P. P. Sarkar
Abstract— Microstrip antenna, a subject of extensive studies for the last two decades, generally exhibit very narrow bandwidth. Percentage bandwidth is around 2%. Tremendous research work has been going on to enhance the bandwidth which is urgently required for modern telecommunication applications. This requirement develops monopole antenna as the latest one. The achievement is ultra wide bandwidth. But no researchers present absolute gain or radiation efficiency for the last few years. The value was really very low which was a serious problem towards telecommunication applications. However recently few research teams including ours are going to take care of its gain or radiation efficiency. The paper deals with this innovative studies needed for practical use. Index Terms—Broadband, gain, monopole antenna, radiation efficiency.
I. INTRODUCTION
In today’s world of high tech gadgets it is rare to find a person
with out his personal communication device such as mobile. It has become an indispensable equipment of the civilized world. Because of its high portability and low end-user cost, its popularity has increased exponentially. This popularity in turn is fueling the need for even more portable and low cost communication devices. This has led the manufacturers to think about integrating different devices operating in different spectral band onto the same device. This even includes devices for transferring data wirelessly. Integration of wireless data devices has led to the requirement of compact broadband antenna.
Fig. 1. Microstrip Antenna Microstrip antenna becomes the obvious choice for the above devices. A Microstrip antenna is a planar antenna having a dielectric layer sandwiched between two metal layers of negligible thickness compared to the dielectric thickness. A
typical Microstrip antenna is shown in the fig [1]. In Microstrip antenna one of the metal layers acts as ground plane and the other acts as the radiating element. The radiating patch is generally small in size as compared to the ground plane [fig.1]. The shape and size of the radiating patch depends on the operating frequency of the antenna and its other characteristics. The general thickness of these types of antennas is about 0.5 mm – 3 mm and the typical size is very less compared to the traditional antennas operating at the same resonant frequency. This is the reason why it is preferred in light weight, low cost portable devices. But the microstrip antennas have limitations too. Out of the others the one which attracts importance in communication engineering is the bandwidth. The typical bandwidth of Microstrip antenna is around 1%-6% [1]which is generally not enough for today’s high end communication. Various techniques have been suggested by researchers to cope up with this problem. This can be broadly categorized under following heads. 1) Regularly shaped broadband MSA 2) Planar multi-resonator broadband MSA 3) Multilayer broadband MSA 4) Staked multi-resonator MSA 5) Broadband planar monopole antenna II. REGULARLY SHAPED BROADBAND MSA This type of antenna is categorized by the shape of their patches. The patch of these antennas can be described by a specific mathematical equation or in other words the structure of this patch is defined by definite planar geometrical shapes. The broad band characteristics in regular shaped MSA can be obtained by changing the shape of the patch by using slots/slits. Fig.2 and Fig.3 [2-5] shows few examples where a bandwidth of up to 40% has been obtained (Fig.3) [5]. Here the main aim is to decrease the Q factor, since the Q factor is inversely proportional to BW, decrease in Q factor increases the bandwidth.
(a)
(b)
P. P. Sarkar, DETS, University of Kalyani, Kalyani, Nadia, India, e-mail:
[email protected] 6
Department of ECE, Haldia Institute of Technology, Haldia
Innovative research studies for the design of practical monopole antenna
(c) Fig. 2. Different Microstrip Antennas with Slots
(a) Fig.4 (a) Example of Planar multiresonator broadband MSA [6]
(a) Top View
Fig. 4(b) Return Loss vs Frequency plot for the above structure [6] IV. MULTILAYER BROADBAND MSA
(c) VSWR v/s Frequency Plot Fig. 3. Microstrip Antenna with Slots
III. PLANAR MULTIRESONATOR BROADBAND MSA As said before, the size of the radiating patch depends on the resonant frequency of the antenna. In this broadbanding technique two resonators of different resonant frequencies are used in a single antenna. This generates a staggered tuning effect. By proper optimization the staggered tuning can be used to achieve broadband effect (Shown in fig.4).
In the multilayer configuration, two or more patches on different layers of the dielectric substrate are stacked on each other. Based on coupling mechanism these configurations are categorized as electromagnetically coupled or aperture coupled MSA. Electromagnetically Coupled MSAs In the electromagnetically coupled MSA, one or more patches at the different dielectric layers are electromagnetically coupled to the feed line located at the bottom dielectric layer as shown in Fig. 5. Alternatively, one of the patches is fed by a coaxial probe and the other patch is electromagnetically coupled. Either of the bottom or top patch is fed with a coaxial probe as shown in Fig.5. The patches can be fabricated on different substrates, and accordingly the patch dimensions are to be optimized so that the resonance frequencies of the patches are close to each other to yield broad BW. These two layers may be separated by either air-gap or foam yielding BW of 15–30%.
Fig. 5. An electromagnetically coupled MSA, in which (a) the bottom patch is fed and (b) the top patch is fed
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Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Aperture-Coupled MSAs In the aperture-coupled MSA, the field is coupled from the microstrip feed line placed on the other side of the ground plane to the radiating patch through an electrically small aperture/slot in the ground plane, as shown in Fig. 6(a). Two different dielectric substrates could be chosen, one for the patch and the other for the feed line to optimize the individual performances. The coupling to the patch from the feed line can be maximized by choosing the optimum shape of the aperture. Two patches of rectangular or circular shapes, which are stacked on each other in different dielectric layers yield around 30% BW. A BW of nearly 70% has been obtained by stacking patches with resonant apertures [7]. The drawback of these structures is the increased height, which is not desirable for conformal applications and increased back radiation for aperture-coupled MSAs.
Fig. 6(a). Rectangular MSA fed by aperture coupling V. STAKED MULTI-RESONATOR MSA
what was missing is the radiation efficiency. The monopole antenna is very popular among the antenna researchers and almost all the research articles on antenna that are currently being published in highly reputed journals is related to monopole Microstrip antenna. The researchers in these articles supported their design using return loss/ vswr /radiation pattern. But they generally don’t mention the radiation efficiency or gain. Recently few articles have been published and they indicate that a radiation efficiency of more than 90% and antenna gain of 5.8dBi can be obtained using monopole antenna [10]. The structure of the proposed antenna and its Gain vs Frequency plot are shown in Fig.7 and Fig.8 respectively. This, I think is a very good achievement. Girish Kumar and K.P. Ray [11] have also mentioned that “The BW can also be defined in terms of the antenna’s radiation parameters. It is defined as the frequency range over which radiation parameters such as the gain, half-power beam width (HPBW), and sidelobe levels are within the specified minimum and maximum limits. This definition is more complete as it also takes care of the input impedance mismatch, which also contributes to change in the gain”. I also supported that the researchers must mention their radiation efficiency. An antenna which has a good matching with the transmission line will give good return loss, but may not be radiating at all. Consider the case of a Microstrip line matched termination. The termination will have very good return loss characteristics, but cannot be considered as an antenna. This can be verified by using the radiation efficiency. If it wasn’t for the radiation efficiency, the Microstrip matched termination would have been an excellent antenna.
In the planar configuration, the total length of the antenna increases but the height of the antenna remains the same as that of the single RMSA. In the stacked configuration or multilayer configuration, on the other hand, the total length of the antenna remains the same as that of the single patch, while its thickness increases. By combining these two techniques (i.e., by stacking multiple resonators on each other), the overall BW of the antenna increases due to the increase in both the length and thickness of the antenna (shown in fig 6(b)). Fig.7 Gain vs Frequency Plot This is also noticed among my students and scholars. Students are encouraged to think innovatively. As, a result my research team has developed a technique by which gain of monopole antenna can be increased up to 8dbi.
Fig 6(b) Stacked Multi-resonator Antenna [8] VI. BROADBAND PLANAR MONOPOLE ANTENNA Among the other methods monopole antenna has been reported to give the highest bandwidth. 100% bandwidth is also reported [9]. These ultra wide band antennas were replicated in our lab; on experiments it was found that these antennas have high impedance matching bandwidth. But,
Fig 8. Antenna Design for ref [10] 8
Department of ECE, Haldia Institute of Technology, Haldia
Innovative research studies for the design of practical monopole antenna
VSWR Vs Frequency Plot 1.6 1.5
VSWR
In our laboratory our research team is trying to enhance bandwidth as well as gain of the monopole antenna. Fig 9 shows the fabricated picture of the designed antenna in our laboratory. The theoretical and measured Return Loss Vs Frequency plot and Gain Vs Frequency plot are shown in Fig 10 and Fig 11 respectively for this designed antenna. Table I shows the theoretical and measured gain value of the monopole antenna. 154% band width and 8dBi gain are achieved for this antenna. VSWR is also very good which is shown in Fig. 12.
1.4 1.3 1.2 1.1 1 6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
Frequency (GHz)
Fig 12:- VSWR Vs frequency plot We are still trying to enhance the band width and gain of the monopole antenna. In our laboratory, by introducing array of U-shaped monopole antenna we have achieved upto 22dBi gain, which is no doubts a good achievement. VII. CONCLUSION What is inferred from the above is; the researchers were monotonically concentrating in the traditional parameters. But as the complexity of the subject increases the researchers should think innovatively to present their findings. These may not be their fault as we generally find it easier to think like others. The same was highlighted by Srijana Mitra Das, “Our research institutes including IITs are filled with scientists just following research done in foreign universities…the result – none of our universities is ranked within the global 100.” in “Home truths on research” The Times of India, Saturday, 25th August, 2012.
Fig.9: Fabricated antenna
REFERENCES Fig 10:-Theoretical and Practical Return Loss Vs Resonant Frequency Plot
Carver, K.; Mink, J.; , "Microstrip antenna technology," Antennas and Propagation, IEEE Transactions on , vol.29, no.1, pp. 2- 24, Jan 1981. [2] Kin-Lu Wong; Wen-Hsiu Hsu; , "Broadband triangular microstrip antenna with U-shaped slot," Electronics Letters , vol.33, no.25, pp.2085-2087, 4 Dec 1997 [1]
[3]
Fig 11:- Theoretical and practical Gain Vs Frequency plot TABLE - I Theoretical and Practical Gain of the antenna Frequency Theoretical Gain Practical Gain (GHz) (dBi) (dBi) 2 1.84 2.34 3
2.83
3.5
5
3
4
6.5
3
4
11
7.23
8
S. T. Fang, Analysis and design of triangular microstrip antennas, Ph.D. dissertation, De-partment of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan,1999 [4] Luk, K.M.; Lee, K.F.; Tam, W.L.; , "Circular U-slot patch with dielectric superstrate," Electronics Letters , vol.33, no.12, pp.1001-1002, 5 Jun 1997. [5] Huynh, T.; Lee, K.-F.; , "Single-layer single-patch wideband microstrip antenna," Electronics Letters , vol.31, no.16, pp.1310-1312, 3 Aug 1995. [6] Wu, C.-K. and Wong, K.-L. (1999), Broadband microstrip antenna with directly coupled and parasitic patches. Microw. Opt. Technol. Lett., 22: 348–349. [7] Targonski, S.D.; Waterhouse, R.B.; Pozar, D.M.; , "Design of wide-band aperture-stacked patch microstrip antennas," Antennas and Propagation, IEEE Transactions on , vol.46, no.9, pp.1245-1251, Sep 1998. [8] Legay, H.; Shafai, L.; , "New stacked microstrip antenna with large bandwidth and high gain ," Microwaves, Antennas and Propagation, IEE Proceedings , vol.141, no.3, pp.199-204, Jun 1994. [9] R. Zaker, C. Ghobadi, and J. Nourinia, "A modified microstrip-FED two-step tapered monopole antenna for UWB and WLAN applications," Progress In Electromagnetics Research, Vol. 77, 137-148, 2007. [10] Mandal, T. and Das, S., Ultrawideband-printed hexagonal monopole antennas with WLAN band rejection. Microw. Opt. Technol. Lett., 54: 1520–1525.June 2012 [11] Girish Kumar, K.P. Ray, Broadband Microstrip Antennas. Boston, Artech House, 2003, pp. 13. 9
Department of ECE, Haldia Institute of Technology, Haldia
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2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Challenges in Video Summarization Ananda S. Chowdhury {E-mail:
[email protected]} Department of Electronics and Telecommunication Engineering, Jadavpur University, Calcutta Video in digital format is now commonplace and widespread in both professional use, and in domestic consumer products from camcorders to mobile phones. With the recent advancements in video capture, storage and distribution technologies, the extent of video content accessible in the daily life has increased exponentially. To handle such huge amount of data, proficient video management systems are being developed to access the video information in a user-friendly way. This has led to a quickly evolving research area known as video summarization. As the name suggest, video summarization/abstraction deals with a succinct representation of any video. In terms of browsing and navigation, a good video summary will enable a user to obtain either maximum information about a video sequence within a certain time period or sufficient information about that sequence in a minimum time. Video summarization refers to a class of nonlinear content-based video compression techniques which can efficiently represent most significant information in a video stream using a combination of still images, video segments, graphical representations and textual descriptors. Video summarization can be broadly classified into two categories: Video Storyboard Design and Video Skimming. Storyboard is a set of static key frames (motionless images) which preserves the overall content of a video with minimum data. Video skimming refers to a set of images with audio and motion information. Though the technique of skimming provides important pictorial, audio and motion information, video storyboard summarizes the video content in a more rapid and compact manner. Currently, several challenges exist within the whole process of video summarization. For this article, we will only focus on various challenges and methods for designing a video storyboard. The first step towards video storyboard design is to split the video stream into a set of meaningful and manageable basic units by the process of temporal video segmentation. Most of these approaches depend on shot detection, which becomes inaccurate due to the presence of different types of transitions (e.g., fade in, fade out, abrupt cut) between successive video frames. Another well-known approach of video segmentation is to divide the video stream into frames (still images). But sampling rate becomes a very important parameter in the frame based video segmentation which can directly influence the content coverage of the final key frame set. Many of the existing video summarization methods use uniform sampling in the pre-processing stage which may result in exclusion of some informative frames. Various clustering methods are applied over the years to design a video storyboard through extraction of key frames. The main aim of these clustering-based techniques is to design the video storyboard by grouping frames based on a set
of features like color, motion, shape, and texture. After the clustering is complete, usually, one frame per cluster is selected to design the storyboard. Performance of such clustering methods depends heavily on the user inputs and/or certain threshold parameters (e.g., number of clusters). In addition, different criteria that are used to measure the similarity between the video frames significantly influence the key frame set. Unlike other research areas, a consistent evaluation framework for video analysis and summarization is somewhat lacking, possibly due to the absence of well-defined objective ground truth. As video summarization is a subjective task to a large extent, subjective evaluation becomes necessary in addition to the objective evaluation. The proposed approach [1] is designed to address some of the important challenges in the area of video summarization. We aim at obtaining superior video summaries using informationtheoretic pre-sampling and robust Delaunay clustering [2]. Very low sampling rate leads to poor quality of video summary and at the same time increases the time required to get the summary. In contrast, very high sampling rate could miss important information contained in the video. Hence, judicious selection of sampling rate is an important design parameter in the process of video summarization. To handle this type of problem, we use a combination of fixed pre-sampling and information-theoretic pre-sampling based on mutual information [3]. The fixed sampling rate is one frame per second. In the process of information-theoretic pre-sampling, frames are chosen corresponding to the significant valleys in the mutual information profile between successive video frames. Information-theoretic pre-sampling can select frames for these types of videos which could be missed during sampling at a fixed rate. The main advantage of Delaunay clustering [4] lies in automatic extraction of key frames. A robust Delaunay clustering is achieved through a dynamic edge pruning strategy where overall reduction in the global standard deviation of edge lengths is maximized with imposition of a constraint on deviation ratio of frames. Furthermore, both color and texture features [5] are considered for the purpose of video summarization. Finally, a comprehensive performance evaluation and comparisons with three well-known existing summarization methods [6-8] are carried out over a collection of 100 videos with different genres as well as durations (downloaded from Open Video project and YouTube) using three subjective measures (clarity, conciseness, overall quality) and three objective measures (fidelity, shot reconstruction degree, compression ratio). The proposed method produces video summaries of acceptable quality for video collections with quite different characteristics. 10
Department of ECE, Haldia Institute of Technology, Haldia
Challenges in Video Summarization
In addition to the above method, a novel Delaunay graph-based clustering algorithm VISUC (Video Summarization with User Customization) is proposed which offers high level of user interaction in the process of video summarization. The proposed method splits the Delaunay graph using a better edge pruning strategy where selection of proper edge is determined using the concept of standard deviation and average edge length. Moreover, the proposed method was designed to offer user customization: users can specify the number of key frames they actually want to view and also specify the time they are willing to wait. Hence, visual dynamics of the frames are captured better and a more informative video summarization is achieved according to the user perception. Future work will focus on implementation of higher order Delaunay graphs for production of both static and dynamic video summaries with the use of a more extensive set of features like color, motion, shape and texture along with a pre-defined set of semantic conditions to obtain even more meaningful video summaries to address various challenges of video summarization. At the same time it is interesting to produce multi-view video summaries for real world surveillance systems. Another direction of future research is to produce personalized video summaries with a focus on unobtrusively sourced user-based information. References:
1. A.S. Chowdhury, S.K. Kuanar, R. Panda and M.N. Das: Video Storyboard Design using Delaunay Graphs, Twenty First IAPR/IEEE Int'l. Conf. on Pattern Recognition (ICPR); Tsukuba City, Japan (2012) (accepted) 2. Padmavathi Mundur, Yong Rao, and Yelena Yesha. Keyframe-based video summarization using Delaunay clustering. International Journal on Digital Libraries, 6(2), pp. 219 – 232, 2006. 3. Cernekova, Z., Pitas, I., Nikou, C. Information theory-based shot cut/fade detection and video summarization. IEEE Transactions on Circuits Systems for Video Technology, 16 (1), pp. 82–91, 2006. 4. Joseph O’ Rourke, Computational Geometry in C, Cambridge University Press, New York, 2005. 5. B. S. Manjunath, J. R. Ohm, V. V. Vasudevan, and A. Yamada. MPEG-7 color and texture descriptors. IEEE Transactions on Circuits and Systems for Video Technology, 6(11), June 2000. 6. Furini, M., Geraci, F., Montangero, M., Pellegrini, M. STIMO: STIll and Moving video storyboard for the web scenario. Multimedia Tools Appl. 46 (1), pp. 47–69, 2010. 7. S.E.F. Avila, A.P.B. Lopes, A. Jr. Luz and A.A. Araujo. VSUMM: A mechanism designed to produce static video summaries and a novel evaluation method. Pattern Recognition Letters, 32 (1), pp. 56–68, 2011. 8. J. Almeida, N.J. Leite and R.S. Torres. VISON: VIdeo Summarization for ONline applications. Pattern Recognition Letters, pp. 397-409, 2012.
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Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
12
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Numerical Analysis of D.C Properties of Si/Si0.9Ge0.1 DDR IMPATT Structure by Double Iterative Technique Arpan Deyasi
Abstract— Electric field, current density and dc to rf conversion efficiency of a Si/Si0.9Ge0.1 DDR IMPATT diode are investigated by double iterative technique. The method is developed on simultaneous numerical solution of Poisson’s equation, carrier diffusion equation, continuity equation in addition with the effect of mobile space charge subject to appropriate boundary conditions for electric field and normalized current density at depletion layer edges. Field and current density profiles are computed throughout the depletion region, and conversion efficiency is calculated for optimized input current density. Junction temperature is set at 300 K, and doping concentration is carefully assumed to obtain higher device efficiency and also punch-through effect. The simulation results presented will be useful to realize experimentally Si/Si0.9Ge0.1 DDR IMPATT for millimeter and sub-millimeter wave bands.
Index
Terms— Double iterative computer method, Multiplication factor, Double drift region, Heterostructure IMPATT
suitable combination of Si1-xGex/Si heterostrucutre. Tripathy [7] etc. suggested that n-SiGe/p-GeSi DDR structure can be realized at 15 and 96 GHz with a very improved conversion efficiency. Its noise performance is compared at 94 GHz [8] for MITATT structure. Its small-signal performance is compared with 4H-SiC device [9] for millimeterwave communication system applications. Its optical characteristic is studied for both flip-chip (FC) and top-mounted (TM) conditions at W-Band [10]. In this paper, DDR IMPATT structure is designed by choosing Si as material for n and n+ regions, whereas Si0.9Ge0.1 for p and p+ regions. Variation of electric field and current density profile in the depletion region are computed using double iterative technique. Extent of avalanche zone can be estimated from the knowledge of current density plot, and it varies with different input current. Conversion efficiency degrades with higher current density and electric field profile becomes distorted, hence choice of input current is very important to achieve rf power.
I. INTRODUCTION IMPATT diode belongs to microwave and millimeter-wave transit-time devices, which offers several advantages due to its smaller size, higher accuracy, lighter weight and lower cost, and an improved propagation characteristic at window frequencies. It is used now-a-days in the field of Remote Sensing, Imaging and Spectroscopy. It is used as a potential microwave source in RADAR systems. In last two decades, development of high-power sources in lower terahertz domain is extensively researched and new materials are proposed for achieving those objectives. In this context, heterostructure IMPATT are now considered as a possible replacement of conventional Si devices. Si1-xGex heterostructure grown on Si substrate is subject of interest in the last decade for its distinguishable physical characteristics and possible potential applications. Drift mobility model of carriers was investigated by Manku [1-2] and Buller [3] for a particular doping level. Its impact ionization coefficient and responsivity characteristic [4] was calculated for optical applications. Resonant tunneling phenomenon was observed for triple barrier structure with better PVR ratio than conventional diodes [5]. Researchers also mentioned that MMIC may be designed [6] by using Arpan Deyasi is Assiant Professor in the Department of Electronics & Communication Engineering of RCC Institute of Information Technology, West Bengal University of Technology (e-mail:
[email protected]).
II. PROCEDURE FOR PAPER SUBMISSION Theoretical investigation of DDR IMPATT structure begins with double iterative technique where computation is initialized from field maximum near the metallurgical junction. D.C field and current profiles for the diode that involves simultaneous solution of Poisson’s equation, current density equations and continuity equations incorporating mobile space charge effecting the depletion layer; where iteration is carried out over magnitude of field maximum and its location in the depletion layer. The fundamental equation that governs the avalanche multiplication and the carrier current flow across the junction of a p+pnn+ diode is the well-known Poisson’s equation
q E ( x) [ N D N A p ( x) n( x)] x
(1) Continuity equations for electron and hole current are given
by
1 J n , p ( n, p ) g U n, p t q x
(2) In this analysis, we excluded the contribution of Un,p because the transit time of carriers in the depletion layer of the device is several orders of magnitude lower than the recombination time. If the diffusion component of current caused by carrier concentration gradient in the space charge
13
Department of ECE, Haldia Institute of Technology, Haldia
Numerical Analysis of D.C Properties of Si/Si0.9Ge0.1 DDR IMPATT Structure by Double Iterative Technique layer is considered, then expressions of Jn and Jp are given by-
J n , p q ( n, p )v n , p qDn , p
( n, p ) x
(3)
Considering contributions of both diffusion current and drift current, former has been considered as a perturbation term over the major drift current in the avalanche region. Using perturbation technique, the expressions for hole and electron concentration in the space charge layer (considering both diffusion and drift) can be written as-
J n, p (n, p)( x) qv n, p Dn, p 2 qv 3 n, p
2 J n , p x 2
Dn , p J n , p qv 2 x n, p Dn , p 3 3 J n , p .. qv 4 x 3 n , p
(4)
Hence the mobile space charge density due to both drift and diffusion components is obtained fro the equation-
D p J p J p J n v p 2 x ( x ) ..... v p v n D n J n 2 v n x
(5)
Boundary conditions for the electric field in the depletion region can be written as
E ( x1 ) E ( x2 ) 0
(6) where -x1 and x2 define the edges of p and n layers respectively. The boundary conditions for normalized current densities are given by
k ( x1 ) 2
1
(7.1)
Mn
(8.2)
Mp
device equations i.e. Poisson’s equation, current density equation and continuity equations involving mobile space charge in the depletion layer, computer simulation method provides electric field profiles and doping profiles for different current densities. From the experimental results, we choose some current density values in different regions, for which electric field profiles and current density profiles are sketched. Nature of these profiles is almost similar to each other and peak of the electric field for any particular current density appears at the metallurgical junction. From the junction boundary, electric field decreases linearly but remains finite outside the depletion region. The variation represents the characteristics of a punch through diode. Doping profiles also exhibit the expected variations which can be explained by solving device equations. III. RESULTS Considering optimized doping concentration as uniform throughout the active region of the diode for best performance, and taken as 4.5×1022m-3, variation of a few fundamental dc parameters are studied along depletion region width. Junction temperature is set at 300 K, and depletion region width as 900 μm. Electric field profile is plotted against depletion width in Fig 1. It is observed from the graph that spatial field attained peak value at junction, as expected from theoretical stand point. It decreases maintaining almost linear slope if one moves away from metallurgical junction. This unperturbed nature of field distribution may be obtained for lower and moderate current density. The variation represents the characteristics of a punch through diode.
and
k(x2 ) 1 2
where M n , p
J0
J ns. ps
are computed considering
J p J n 0.95 J 0 , extension of avalanche zone has been defined as the distance between two points (x1, x2) on either side of avalanche center. Computation starts from the position of field maximum (x0) near metallurgical junction and then proceeds towards edges of depletion layer. Double iterations are then carried out over field magnitude (E0) and position of field maximum (x0) in depletion region to satisfy boundary conditions for field and current densities. Simultaneous satisfaction of boundary conditions at depletion layer edges gives appropriate solution for field and current profiles. Extension of avalanche zone has been defined as the distance between two points (x1, x2) on either side of avalanche center. Once the values of maximum electric field(Em) and its position (x0) for which both the boundary conditions are simultaneously satisfied are computed at a given current density, this computer program provides more accurate profiles of electric field and carrier current. Based on the simultaneous solution of the fundamental
Figure 1: Electric field profile with depletion region width for constant current density
Fig 2 represents normalized current density profile with depletion region width. The sharper the rise of Jdiff/J0 profiles speaks in the favor of the faster growth of the avalanche current and narrower avalanche zone. It is observed from the current profiles that the avalanche zone of the Si/Si1-xGex IMPATT is much narrower than that of conventional device. From the plot, it can be measured that the growth of avalanche current lies within a region of 0.3 µm. The current profile becomes less sharp for higher bias current density, which 14
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
signifies a broader avalanche zone width at higher current. This is shown in Fig 3.
as shown in Fig 4. Increase of electric field will cause the increase of breakdown voltage, and since at a particular junction temperature, breakdown voltage slowly increases; hence due to this combined factor, conversion efficiency drastically decreases with increasing current density. Ultimately it becomes equal to the efficiency of SDR device designed with same doping concentration. The slope with which efficiency falls at higher current density is greater in case of the Si/Si1-xGex IMPATT than that of the Si IMPATT. IV. CONCLUSION
Figure 2: Normalized current density profile with depletion region width
Numerical results provide an insight about variation of different dc parameters with depletion region width and current density, which are very essential for small-signal analysis of the DDR device in microwave and millimeterwave frequency ranges. Optimization of current density becomes essential to nullify the degradation of conversion efficiency. Effect of mobile space charge is considered to make the analysis more realistic. Growth of avalanche current and extent of avalanche zone can be estimated from the normalized current density profile. Moderate conversion efficiency can be obtained by suitable choice of low bias current. Thus heterostructure IMPATT provides a comparative better dc performance and control compared to conventional IMPATT structure. REFERENCES [1]
Figure 3: Normalized current density profile with depletion region width for different input current
Figure 4: Conversion efficiency profile with input current density
The dc-to-rf conversion efficiency of DDR Si/Si1-xGex IMPATT is around 15%, which is moderate, but can be said higher than the conventional IMPATT device as reported in various literatures. The efficiency falls at higher input current,
T. Manku and A. Nathan, “Electron drift Mobility Model for Devices based on Unstrained and Coherently Strained Si1-xGex grown on Silicon substrate”, IEEE Transaction on Electron Devices, vol. 39, pp. 2082-2089, 1992. [2] T. Manku, J. M. McGregor, A. Nathan, D. J. Roulstoa, J. P. Noel and D. C. Houghton, “Drift hole Mobility in Strained and Unstrained Doped Si1-xGex Alloys”, IEEE Transaction on Electron Devices, vol. 40, pp. 1990-1995. [3] F. M. Buller, P. Graf, B. Meinerzhagen, B. Adeline, M. M. Rieger, H. Kibbel and G. Fischer, “Low and High Field Electron Transport Parameters for Unstrained and Strained Si1-xGex”, IEEE Transaction on Electron Devices, vol. 48, 264-266, 1997. [4] J. Lee, A. L. Gtierrez-Aitken, S. H. Li and P. K. Bhattacharyya, “Responsivity and Impact Ionization Coefficients of Si1-xGex Photodiodes”, IEEE Transaction on Electron Devices, vol. 43, pp. 977-981, 1996. [5] Y. Suda and H. Koyama, “Electron resonant Tunneling with a High Peak-to-Valley Ratio at Room Temperature in Si1-xGex/Si Triple Barrier Diodes”, Applied Physics Letters, vol. 79, pp. 2273-2275, 2001. [6] P. Russer, “Si and SiGe Millimeter-Wave Integrated Circuits”, IEEE Transactions on Microwave Theory and Techniques, vol. 46, pp. 590-602, 1998. [7] P. R. Tripathy, M. Mukherjee and S. P. Pati, “Possible Realization of near Optimum Efficiency from n-SiGe/p-GeSi DDR Heterostructure IMPATT Diode”, White paper. [8] A. Acharyya, M. Mukherjee and J. P. Banerjee, “Noise in Millimeter-wave Mixed Tunneling Avalanche Transit Time Diodes”, Archives of Applied Science Research, vol. 3 (1), pp. 250-266, 2011. [9] S. Banerjee, “Dynamic Characteristics of IMPATT Diodes based on Wide Bandgap and Narrow Bandgap Semiconductors at W-Band”, International Journal of Engineering Science and Technology, vol. 3, pp. 2143-2153, 2011. [10] A. Acharyya and J. P. Banerjee, “A Comparative Study on the Effect of Optical Illumination on Si1-xGex and Si Based DDR IMPATT Diodes at W-Band”, Iranian Journal of Electrical & Electronic Engineering, Vol. 7, pp. 179-189, 2011.
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Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
An Analysis of Wave Guide E-Plane Tee as 3dB splitter at X Band Using HFSS Software Pampa Debnath, Snehasis Roy
Abstract—In this paper, HFSS simulation software has been used to design X band E-plane Tee to study the power distribution between port 1 and 2 along with distribution of electric and magnetic fields. Phase of transmission coefficient between collinear arms is observed 180 degree and the power at collinear arms reflect the nature of 3 dB splitter of E plane tee. Simulation results also show the field analysis in collinear, and side arm. The analysis is helpful for designing magic tee and waveguide components using tee structure.
Index Terms— HFSS, E Plane TEE, E-port, Collinear arm, Transmission coefficient, X band
I. INTRODUCTION Waveguide E plane tee is an important passive element in microwave and millimeter wave engineering. Tee junctions are generally used to split the line power into two or combine the power from two lines with proper consideration of phase. However, because of the complicated structure and small size, good performance E plane tee at microwave frequencies such as at X band or higher frequencies is difficult to realize. On the other hand, a precise field analysis on waveguide E plane tee is also difficult. So proper numerical analysis of waveguide tee junctions will help to analyze the power distributions between different ports along with phase of transmission coefficient. Several workers already made significant contributions in this field. Liu [1] made a comparative analysis of planar SIW magic tee with traditional rectangular tee. Novel four planar magic tee was proposed by You et. al. [2] for networking applications using waveguide side-wall slot directional coupler and a double dielectric slab filled waveguide phase shifter. The present author [3] also analyzed magic tee structure in X-band for useful practical applications, which is matched with findings of others [4]. Experimental results [5] are well fitted with the recently available numerical studies. Shen first presented the detailed analytical model [6] for tee structures using hybrid finite-element-modal-expansion method. Pampa Debnath is an Assistant Professor in the Department of Electronics & Communication Engineering, RCC Institute of Information Technology, Kolkata, West Bengal, INDIA. (e-mail:
[email protected]). Snehasis Roy is a Junior Telecom Officer in IT Project Circle of Bharat Sanchar Nigam Limited, Kolkata, West Bengal, INDIA. (e-mail:
[email protected])
As HFSS is an interactive software package for calculating the electromagnetic behavior of a structure, so one can compute basic electromagnetic field quantities, generalized S-parameters and S-parameters renormalized to specific port impedances, the eigenmodes, or resonances, of a structure [7]. HFSS is a high-performance full-wave electromagnetic field simulator for arbitrary 3D volumetric passive device modeling. Proper materials are always chosen prior to the simulation for future experimental works. For a linearly-polarized antenna, the plane containing electric field vector is the E-plane, and is in the direction of maximum radiation. The electric field determines the polarization or orientation of the radio wave. For a vertically-polarized antenna, the E-plane usually coincides with the vertical/elevation plane. For a horizontally-polarized antenna, the E-Plane usually coincides with the horizontal/azimuth plane. II. DESIGN An E plane Tee is a wave guide tee in which the axis of its side arms is parallel to the E field of the main guide. When the waves are fed into the side arm (port 3), the waves appearing at port1 and port 2 of the collinear arm will be in opposite phase and in the same magnitude [9-11]. Fig 1 shows the schematic structure of a E-plane tee. It is called an E type junction because the junction arm extends from the main waveguide in the same direction as the E field in the waveguide.
Figure:1(a) Schematic diagram of E plane Tee
In the design of E plane tee using HFSS software length is to be taken as 9.5 mm and width is 8 mm.
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Department of ECE, Haldia Institute of Technology, Haldia
An Analysis of Wave Guide E-Plane Tee as 3dB splitter at X Band Using HFSS Software
opposite phase.
Figure:1(b) Constructional details of E plane Tee
III. NUMERICAL RESULTS An E plane Tee in X band has been designed using HFSS software as shown in Fig. 2, in which port 2 and port 3 has been assigned to two collinear arms, whereas port 1has been assigned for side arm . Figure 4: Magnitude of field variation when signal entering at port 1
As described earlier when the waves are fed into port 1, the waves appearing at port 2 and port 3 will be in opposite phase and in the same magnitude. Therefore S12= - S13.
Figure 2: Schematic picture of E plane tee in simulation software
In Fig.3 and Fig. 4, it is observed that a wave incident at port 1 (E arm) divides equally between ports 2 and 3 in opposite phase. However powers fed in arms 2 and 3 are subtracted in arm 1.
Figure 5: S12 and S13
Figure: 3 Electric field vector variation when signal entering at port 1
Fig 5 shows the scattering power variation between port 1, 2 and port1, 3 which shows that with variation of frequency transmitted power in port 2 and port 3 is equally distributed when power is given at port 1 whereas Fig 6 shows the phase of the transmission coefficients out the Co-linear ports. It can easily be stated from the figure that when signal entering port 1, it will equally divide and appear at port 2 and 3 with
Figure 6: Phase of the transmission coefficients out the Co-linear ports
17
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September [5]
Figure 7: Port 3assigned to E arm
T.Sieverding and F. Arndt, Modal analysis of the magic tee, IEEE Microwave Guided Wave Lett., Vol. 3,150–152,1993. [6] Z.X.Shen, C.L. Law and C. Qian ,Hybrid finite-element-modal-expansion method for matched magic T-junction , IEEE Trans. Magnetics, Vol. 38,385–388,2002. [7] HFSS: High Frequency Structure Simulator based on the Finite Element Method, v. 9.2.1, Ansoft Corporation, 2004. [8] A.Das and S.K.Das, Microwave Engineering, New Delhi,Tata McGraw Hill,2009. [9] D.M.Pozar, Microwave Engineering, 2nd Edition, and New York: John Wiley &sons Inc,1998. [10] R.E.Collin, Foundation of Microwave Engineering, 2nd Edition McGraw-Hill Book Co, New York,1996. [11] M.L.Sisodia, G.S. Raghuvanshi, Microwave circuits and Passive Devices,2003.
From the simulation results it has been observed at 9.7 GHz frequency the S matrix of E plane tee (where port 3 has been assigned to the side arm and port 1 and 2 to the collinear arms as shown in fig 7) is
S11 S 21 S 31
S12 S 22 S 32
0.40924 S13 0.14423 0.40836 S 23 0.40836 0.25154 0.55261 S 33 0.40924 0.55261 0.05233
For S matrix, it is known that, [b] = [s][a]. If a1 = a2 = 0 and a3 ≠ 0, then simulation gives, b1 = 0.40924 a3, b2 = -0.55261 a3 and b3 = 0.05233 a3 (indicates almost zero power) i.e. an input at port 3, is equally divided between port 1 and 2, but introduces a phase shift of 180° between the two outputs. Hence E plane Tee acts as a 3dB splitter. IV. CONCLUSION Waveguide E plane tee at X band is analyzed by HFSS software. The performance of transmission coefficient is examined and the phase of transmission coefficient which is 180º opposite has been observed in this work. Transmission coefficients vs frequency has been plotted and also numerically calculated from the simulation. The S matrix calculation reflects the nature of 3 dB splitter of E plane tee. Therefore the designed E plane tee has a structure that is convenient for manufacture and its good performance can meet the requirement for designing a Magic tee for practical system such as microwave impedance bridges, antenna duplexer, balance microwave mixer and microwave antenna systems.
REFERENCES [1] [2] [3]
[4]
M.Liu, Z.Feng, A novel hybrid planar SIW magic Tee, , pp. 1-4, APMC 2008. L.Z.You, W.B.Dou, Design and Optimization of Planar Waveguide Magic Tee at W-band, pp. 1- 4, ICMMT-2007. Pampa.Debnath,Snehasis,Roy, An Analysis of Wave guide Magic Tee at X band using HFSS, IJETAE,ISSN 2250-2459, Volume 2, Issue 5,May 2012. P.Dawar, Design and Simulation of Magic Tee and Ring Hybrid Coupler using Ansoft HFSS, IJCST, vol 2, issue1,2011.
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Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Integrated Radar for Smart Vehicle Link D. Mondal, S. Maity,R. Bera, S.Kumar, A. Ghosh M. Mitra
Abstract— This paper addresses the development efforts towards realization of Smart vehicle. Commercial Vehicles with multiple radars has the limitation of more false detection as the detection technology is based on ‘ Skin’ mode of radar[1] operation and the radar receives its transmitted energy after reflection from the body of the target vehicles. The ‘Transponder’ mode of radar operation will definitely improve the false detection leading to CAWAS system (Collision Avoidance and Warning System)[2][3]. The Vehicles will be the ‘friends’ to each other by integrating the local radar mounted on each vehicle with Vehicular Communication. Furthermore, IHCS makes use of facilities to carry out traffic control and transmits the information to drivers and concerned departments, and implements traffic management measures, such as vehicle count, vehicle speed, vehicle range, speed control and so on. Index Terms— Intelligent Highway Control system (IHCS), radar, RADCOM, DAR (Digital Array Radar), STAP (Space Time Adaptive Processing), collision, LFM, OFDM.
area and its range [5]. Therefore the RADCOM model can be used to improve the existing highway control system. It can calculate the velocity with which the vehicle is moving and also its range can be estimated with respect to other vehicles. This information can then be broadcasted to other vehicles so that they can take control actions whether to increase or decrease their speed.
Fig. 1: The CAWAS Model
I. INTRODUCTION
II. THE DESIGN
With the tremendous growth of VLSI, vehicles are now commercially available with multiple collision avoidance radars with both Short range (SRR) and Long range (LRR) versions [4]. SRR are used for nearby vehicle and LRR are used for prediction of remote vehicles. Recent research shows that sensing and communication system can be integrated to develop an Integrated Radar and Communication (RADCOM) system which will involve both detection and communication of the information for IHCS also. The Radio signals of the radar further can be processed to find the velocity of the moving object, its cross sectional
A. Choice of frequency for LRR and SRR mode of radar operation The vehicles should be surrounded by electromagnetic field during SRR mode of radar operation. The antenna pattern should be omni-directional for SRR operation and maximum distance may be 20 meter or so. The authors have chosen 12/11 GHz for such transponder mode of SRR operation. For LRR mode of radar operation, 60 GHz is chosen which exploits the directional beam of 60 GHz by covering a maximum distance of 100 meter. Here authors are interested in SRR only.
Dipak Mondal, Electronics & Communication Engineering Department , Bengal Engineering & Science University, Shibpur, INDIA, Mobile No-9051676536., (e-mail:
[email protected]).
B. 12/11 GHz Transmit and Receive Front End for SRR operation
Somnath Maity, Electronics & Communication Engineering Department , Jadavpur University, Kolkata, INDIA, Mobile No-9433232414., (e-mail:
[email protected]).
a) PIN Modulator at 12/11 GHz
Rabindranath Bera, Electronics & Communication Engineering Department , Sikkim manipal University, Sikkim, INDIA, Mobile No-9475513358., (e-mail:
[email protected]). Suman Kumar ,Electronics & Communication Engineering Department , Future institute of Engineering and management, Kolkata, INDIA, Mobile No-8013082207 Arkaprabha Ghosh, Electronics & Communication Engineering Department , Future institute of Engineering and management, Kolkata, INDIA, Mobile No-9477218072 , (e-mail:
[email protected]). Monojit Mitra, Electronics & Communication Engineering Department , Bengal Engineering & Science University, Shibpur, INDIA, Mobile No-9830010945
One PIN modulator at 12/11GHz is used to modulate the TX_IF signal of 20 MHz and up converted to 12/11 GHz using a GUNN oscillator of 0 dBm power. The output of the Modulator is radiated to the space using a Horn antenna having a gain of 20 dB. b) Low Noise Block Converter (LNBC) in receive Chain LNBC having the best noise performance of 20 degree Kelvin used for satellite reception is utilized here for best signal to noise ratio. The Horn antenna is also embedded with this LNBC and with the help of embedded DRO; it converts the incoming 12/11 GHZ carrier to 1 GHz RX_IF1. c) Satellite Tuner in receive Chain The 1 GHz RX_IF1 is fed to satellite tuner and with proper tuning voltage the IF1 is further down converted to 20 MHz RX_IF2_I and RX_IF2_Q which is fed to SM for further processing.
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Department of ECE, Haldia Institute of Technology, Haldia
Integrated Radar for Smart Vehicle Link
III. DETERMINATION OF TARGET USING MATLAB CODE To predict the dynamic & Static Characteristics of Moving & static object author have taken LFM signal of short pulse width (10-6 sec.) 50 MHz Radar Band Width for very long & short distance communication .From reflected compressed echo signal multi target can be identified and ranging with proper RCS values. The net energy concentration of the incident radiation from the targets will be towards their focus as they are parabolic in nature.A calibration curve is shown in Fig-2 which will be very much useful in quantifying the target classification and also used in finding RCS of multi targets.
V Modeling of DAR with STAP processing and Target Detection using LFM waveform This experiment is carried out for observing the output Target-to-Clutter Ratio w.r.t the different ranges of target but the beam steered orientation is fixed at 36 i.e., the array elements have got such phase shifts that its resultant synthesized beam pattern is looking / directed to an angle of orientation (Azimuthally) 36. Case-1: Target at 1 Km; Clutter Vt=75m/sec; No. of DSP ARRAY Ant in X-direction = 4; No. of DSP ARRAY Antenna in Y-direction = 1
Multi Target identification & Ranging 7
6
Compressedecho
5
4
3
2
1
0 0
5
10
15 20 25 30 35 Target relative position in meters
40
45
50
Fig.-2: Multi Target Identification & Ranging IV Design and Simulation for DAR We have designed a test model to simulate the DBF followed by Linearly Phased Array Antenna where 4 array elements along X-direction and 1 array element along Y-direction have been considered. We have modeled it using Agilent SystemVue. The Simulation schematic has been shown as below:-
Fig.-4: Target detected after STAP and output Target to Clutter Ratio = 19.02 dB obtained. Case-2: Target at 2 Km; Clutter Vt=75m/sec; No. of DSP ARRAY Ant in X-direction = 4; No. of DSP ARRAY Antenna in Y-direction = 1
Fig.-5: Target detected after STAP and output Target to Clutter Ratio = 19.08 dB obtained.
Fig:3 Simulation of DAR
20
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
VI Design and Simulation of an OFDM Radar: The following schematic is showing the designing of an OFDM Radar where 64 subcarriers have been generated among which only 11 Cyclic Prefix have been used for simulation of radar .
Fig 6: Simulation Schematic of the OFDM Radar utilizing Digital Beam Forming (at Tx and Rx). Comparison Target-to-Clu Target-to-Clutter Table tter Ratio Ratio (dB) for Target (dB) for Distance = 2 KM Target Distance = 1 KM Pulsed LFM 19.02 dB 19.08 dB RADAR 64-Multicar 31dB 30.4 dB rier OFDM RADAR Fig.-7: The Target detected at 1 KM by the OFDM Radar and it is almost free from clutter Table: Comparison of LFM and OFDM Radar
Fig.8: The Clutter Free Target is detected at 2 KM by the OFDM radar
Fig.9: The Probability of Target Detection is 100% ambiguity free in case of a Digital Beam Former Radar w.r.t a normal Radar within the negative SNR zone of -12dB to -10dB
21
Department of ECE, Haldia Institute of Technology, Haldia
Integrated Radar for Smart Vehicle Link
So after a lot of experimental work author has concluded that the implementation of OFDM Signal has enhanced the Target Detectability as we observed from the simulation of the Digital Array Radar. The LFM waveform has been replaced by this OFDM signal to attain the betterment in Target-to-Clutter Ratio at the Radar output. Here we have taken 13 bit Barker code is generated at the baseband level which is pulsed to 6% duty cycle using a pulse generator. The baseband signal is then up converted to 20 MHz Tx_IF and then to 10 GHz RF and transmitted through the transmit antenna. The target echo signal is received at the radar receiver and auto correlated to extract the different target [6][7] information like range , velocity, target RCS etc. So, here the essentiality of Waveform Design & Diversity (WDD) in concern with better detection of target can be perceived through our experiments. The Digital Array Radar with 4x1 Linearly Phased Array Antennas have been employed in the design because we can achieve a very lightweight solution for the Antennas. The Digital Beam Forming technology is adopted for beam sharpening so that point scatterer of interest can be illuminated very
deterministically. It ultimately improves the clarity of Radar image. The possibility of on-line imaging is induced in our design by a rotating target so that dynamic RCS measurements could be made visually eventful. Thus, an attempt has been made to explore the SYSTEMVUE, AWG, VSA towards a digital array radar for achieving 'ultimate' performance in radar operation and thereby, target RCS estimation.
VII HARDWARE REALIZATION
The above items are cascaded to form the total embedded system. In the Laboratory, systems are tested for all the modes using 12/11 GHz front end and interesting results are obtained. Efforts are put to implement CAWAS system with local LRR and SRR combined system. Such total system will be tested at the field where both the front ends to be operational
Barker code
I Transmit
generator
PIN
Filter g(t)
IVL
LNBC
RTSA
sampling
Q
Modulator
DATA
Nyquist
TCF
X band
Receive
GUNN
Filter
SIGNALMASTER
‘SFF’ SDR
DUAL SDR
Based
Based Implementation Nyquist
FCF
X band
Implementation
GUNN
TCF
Barker code
sampling PIN
I
FCF
Receive Filter
RTSA
LNBC
Modulator
Q
Transmit
generator
Filter g(t) IVL DATA
OBJECTIVE VEHICLE
TARGET VEHICLE
Fig.10. Realization of CAWAS model having one signal master dual in objective vehicle and SFF SDR in target vehicle along with the IVL communication between vehicles.
VIII Real time implementation. The real time implementation of RADCOM was done using two cars, two laptops and a radar. The entire survey was done in NH-31A from Majhitar to Rangpo. The main aim of the survey was to demonstrate the application of RADCOM for the IHCS. The entire processing of the received signal from the Radar was processed in Matlab to extract the velocity using Doppler RADAR module. The two laptops were connected with the AdHoc network for the transmission and reception of the velocity of the vehicles and the number of vehicles crossing the radar.
Fig.11: Doppler radar Module
22
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
1) Static condition implementation: In this case the vehicle containing the radar was kept in a static position and the radar was placed near the glass window and the velocity of the vehicles passing by along with the vehicle count was obtained and was successfully broadcasted to the other vehicle containing the client laptop. When there was no vehicle on the highway the radar did not sense anything and thus the resultant velocity was zero. But when there was a moving vehicle passing by radar, it sensed the vehicle and velocity of the vehicle was estimated and was transmitted to the client laptop in the other vehicle along with the vehicle count and the time at which the vehicle crossed the radar. The valid reception of the vehicles speed and the vehicle count is shown in the Fig. 12 and 13.
Figure 13: Detection of vehicle with false alarm
If the cluttering problem can be estimated and resolved, RADCOM can be used effectively in the implementation of IHVS. The estimated velocity and the vehicle count will give an idea to the driver of the number of vehicles on the highway along with their speed and can take certain actions to avoid collision.
Figure 12: Valid reception of the vehicle velocity crossing the radar
For the static condition successful results were obtained as it sensed all the vehicles which crossed the radar having velocity greater than 15km/hr. The false alarm in this case was nearly zero and satisfactory results were obtained for this case. 2) Moving condition implementation: In this case the vehicle containing the radar was in motion as shown in the Fig. 14 and the velocity of the vehicles passing by along with the vehicle count was obtained and was broadcasted to the other vehicle containing the client laptop. Since the vehicle was in motion, the static objects in the surrounding like lamppost, trees, etc. had relative motion with respect to the vehicle. This relative motion sometime affected the sensing of the radar causing many false alarms as shown in the Fig. 13. These lamppost and trees are also known as clutters which get added with the received signal.
Figure 14: Real-time implementation of RADCOM
V. CONCLUSION Overall conclusion is that the real time experiment of RadCom and implementation of LFM and OFDM Radar and Doppler module was a successful one. It can be used in the IHVS to provide safety and to avoid collision with other vehicles. It can also be concluded that the collisions from three sides i.e. right-side, left-side and back-side can be prevented using the above technique. Three such radars can be placed on three sides of the vehicles and detection of any vehicle from these three sides can be sensed with the radar and the information can be displayed on the screen for the assistance of the driver. The driver can take preventive measures to avoid collision from the three sides and the number of collisions can be reduced to a great extent. For the detection of front vehicle a 77GHz has to be used. The implementation of the above model can also be used to avoid collision on highway intersections by placing the radar on the roads as shown in the Fig.11 which was the main aim of the project. These radars in this case will be in static condition and will detect all the vehicles passing by without any false alarm as shown earlier. The processing unit will calculate the velocity of the vehicle and in turn will be able to calculate the amount of time required by each vehicle to reach the junction.
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Department of ECE, Haldia Institute of Technology, Haldia
Integrated Radar for Smart Vehicle Link
Further work is going on to solve the cluttering problem and implement the setup described in Fig. 14 in real time environment. VI. ACKNOWLEDGMENT We would like to take this opportunity to express our deep sense of gratitude to Mr. Debasish Bhaskar, Ms. Soumyasree Bera, Mr. Subhankar Shome and Mr. Sumeet Shekhar for their constant support and interest in this project. REFERENCES [1] Skolnik MI.Radar handbook. McGraw-Hill. [2] A. Barrientos et al, ‘CAWAS: Collision Avoidance and Warning system for Automotives based on Satellite’, 8th International IEEE Conference on Intelligent Transportation Systems Vienna, Austria, September 13-16, 2005.
[3] Blake, L. V., A Guide to Basic Pulse-Radar Maximum Range Calculation Part-I Equations, Definitions, and Aids to Calculation, Naval Res. Lab. Report 5868, 1969. [4] ECC REPORT 56, ‘Compatibility of Automotive collision warning short range radar operating at 79 GHz with radio communication services’, Stockholm, October 2004. [5 ] N.B.Sinha, Dipak Mondal,M.Mitra ,and R.Bera “Prediction of Vehicle Classification And Channel Modelling For Intelligent Transportation ” JOURNAL OF ELECOMMUNICATIONS, VOLUME 5, ISSUE 1, OCTOBER 2010
[6]. Marcum, J. I., A Statistical Theory of Target Detection by Pulsed Radar, IRE Transactionson Information Theory. Vol IT-6, pp 59-267. April 1960.
[7]. Swerling, P., Probability of Detection for Fluctuating Targets, IRE Transactions on Information Theory. Vol IT-6, pp 269-308. April 1960
24
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Design of a Miniaturized Dual Wide Band Frequency Selective Structure S. Singh, P.P. Sarkar, D. Sarkar, S. Bhunia, S. Biswas
Abstract- This paper deals with the frequency selective property of a structure comprising of a two dimensional array of patches. This frequency selective surface (FSS) acts like a dual band reject filter. The proposed design has been investigated theoretically using Ansoft Designer® software in which the reflection and transmission band have been predicted by the method known as Method of Moment which is most complicated but its accuracy is best. Efforts have been given to achieve dual high band reject filtering with high band ratio (approx 3.18). Index Terms- Bandwidth (BW), Band Ratio, Dual Band, Frequency Selective Surface (FSS), Resonating Frequency.
I.INTRODUCTION In microwave engineering, Frequency selective surfaces or dichroics can be regarded as filters of electromagnetic waves [1-3]. An array of periodic metallic patches on a substrate, or a conducting sheet periodically perforated with apertures constitutes a frequency selective surface (FSS) [4-6]. Such structures have been well known in antenna theory for over half a century. They exhibit total reflection for patches and total transmission for apertures in the neighborhood of resonant frequency. The reflection and transmission band can be predicted theoretically by different methods viz. Finite Difference Time Domain method (FDTD), Finite Element Method (FEM) & Method of Moment (MOM) [7].
The frequency selective properties of FSS are exploited to make a more efficient use of reflector antennas in satellite communication systems which results weight reduction of the satellite and increases the working life of the satellite. The other application of FSS is to protect the Radar system using radome. FSS is also used in the domestic microwave oven screen window which blocks the microwave from coming out but passes the visible spectrum. II.DESIGN A. First Design: In designing a patch type FSS The reference patch is a square copper patch of side 20 mm from which slot and slits have been etched out (as shown in Fig 1). A two dimensional array of this patch or unit cell has been designed with a periodicity of 24mm at both horizontal and vertical axes (as shown in Fig 2). All dimensions of the proposed design are shown in the fig1. The dielectric is Glass PTFE with permittivity of 2.4 & thickness of 1.6 mm is used.
2mm
4mm
For all Figure
4mm
Shwetanki Singh, DETS, University of Kalyani, Kalyani, India, (e-mail:
[email protected]). Partha Pratim Sarkar, DETS, University of Kalyani, Kalyani, India, (e-mail:
[email protected]). D. Sarkar, DETS, University of Kalyani, India, (email:
[email protected]). Dr. Sunandan Bhunia, Department of ECE, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]). S. Biswas, DETS, University of Kalyani, India, (e-mail: biswas.su.gmail.com).
Department of ECE, Haldia Institute of Technology, Haldia
4mm
4mm
4mm
20mm
Fig.1: unit patch of FSS
25
Design of a Miniaturized Dual Wide Band Frequency Selective Structure
24mm
4mm
24mm
4mm
4mm
4mm Fig2: FSS showing four unit cell and spacing between them. Fig4: FSS showing four unit cell with modified design.
B. Modified Design: In the further modification, small metallic square patches of side 4mm are added between the patches of the first design in the manner shown in Fig4. The unit patch formed out of this modified design is shown in Fig3. Hence, if we arrange the four units patch of Fig3 in the form of array with periodicity of 24mm both in horizontal and vertical axes, the modified FSS will be same as shown in fig 4. The layout of FSS with this modification is shown in Fig 5.
4mm
Fig5: FSS showing two dimensional array of modified patch 4mm
2mm
Fig.3: unit patch of FSS with modified design
Department of ECE, Haldia Institute of Technology, Haldia
III.RESULTS The first designed FSS resonates at three frequencies 5.54GHz, 11.41GHz and 17.24GHz. The -10dB reflection bandwidths recorded are 1.63GHz (wide BW), 0.1GHz (Narrow BW) and 1.43GHz (wide BW) respectively. Size reduction achieved in this structure is 75.75%. The corresponding transmission graph is shown in Fig 6
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2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
IV. CONCLUSION
Fig 6: Normalized Transmitted Electric Field vs. Frequency for the First Design.
The modified designed FSS resonate at two frequencies 5.36GHz and 17.07GHz and the -10dB reflection bandwidths recorded are 1.45GHz and 1.78 GHz respectively. Both are wide band. The corresponding transmission graph is shown in Fig 7.
From the observation of the theoretical results it can be concluded that the proposed FSS structure acts like a Band-Reject Filter. In the First design, the size reduction of 75.75% is achieved. From the simulated results and their corresponding graphs it can be inferred that here in the first design we are getting one vestige band at resonating frequency of 11.41 GHz along with two wide band. In the modified design this band is completely removed while all other features almost remain same. Hence finally we are getting a dual band stop filter with high bandwidths and high Band Ratio which is 3.18 (f2/f1). It totally reflects C band (4-6 GHz) and most of the frequency range of Ku band (12-18GHz). It can be used extensively in satellite communication.
REFERENCES [1] N.D. Agrawal and W.A. imbraile,”Design of a Dichroic Cassegrain Sub Reflector” IEEE Trans, AP- 27(4), pp. 466 473(1979) F2
[2] Sung, G.H. –h, Sowerby, K.W. Neve, M.J.Williamson A.G, “A Frequency selective wall for Interface Reduction In Wireless Indoor Environments” Antennas and Propagation Magazine, IEEE,Vol 48, Issue 5, pp 29-37 (Oct 2006).
F1
[3] D.H. Werner and D. Lee, “A Design Approach for DualPolarised Multiband Frequency Selective Surface using Fractal Elements” IEEE International Symposium on Antennas and Propagation digest vol. 3, Salt Lake City Utah,pp. 1692-1695( July 2000).
Fig 7: Normalized Transmitted Electric Field vs. Frequency for the modified Design.
The Analyzed numerical results of the above two designs are summarized below in TABLE I. TABLE I FSS Design
First Design
Modified Design
Resonating Frequency (GHz) 5.54
5.36
11.41
_
Bandwidth (GHz),
[4] D.H.Lee, Y.J.Yeo, R.Mitra, W.S.Parl, “Design of novel thin Frequency Selective Surface superstrates for dual-band directivity enhancement”, IET Microw. Antennas Propag., pp. 248-254, 2007 [5] P.P Sarkar, D. Sarkar, S.Sarkar, S.Das, S.K. Chowdhury.”Experimental investigation of the Frequency selective property of an array of dual tuned printed dipoles, Microwave Opt. Technol lett.31 (2001), 189-190
%Bandwidth 17.24
17.07
1.63,
0.1,
1.43,
29.3%
0.87%
8.29%
1.45,
_
1.78,
27.05%
[6] Hsing-Yi Chen and Yu Tao, “Bandwidth Enhancement of a USlot Patch Antenna Using Dual-Band Frequency-Selective Surface With Double Rectangular Ring Elements”, MOTL Vol. 53 No. 7, pp 1547-1553, (July 2011). [7] PhD Thesis of P.P.Sarkar, Some Studies on FSS, Jadavpur University, 2002.
10.47%
Dr. P. P.
Department of ECE, Haldia Institute of Technology, Haldia
27
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Optimization of Size Reduction of a Dual-band Frequency Selective Surface by Modifying Slot Dimension Sourav Nandi, Surajit Mondal, Shuvodip Majumdar, Partha Pratim Sarkar
Abstract- Studies have been done in this paper on optimization of the size reduction of a dual band Frequency Selective Surface. The width of the rectangular strips, which are slots actually, have been increased from 0.5mm to 8mm to optimize resonating frequency and hence size reduction. After a certain enhancement of the width, the resonating frequency, instead of being lowered further, has been increased a lot. So, according to the study, for this particular FSS structure, a maximum size reduction of 86.57% has been achieved and this magnitude indicates the optimized value of size reduction. Moreover, in each of the dual band FSS design, the second resonating frequency is almost fixed (around 10.20 GHz), while the first one changes according to the modification of the slot. Index Terms- Frequency Selective Surface, Method of Moment, Resonating Frequency, Size Reduction, Slot
limitations of frequency selective surfaces are narrow bandwidth & high resonating frequencies. On the other hand, FSS structures with lower resonating frequencies lead to larger size. Generally theoretical analysis of the surfaces are done by three methods. Finite Difference Time Domain method (FDTD), Finite Element Method (FEM) & Method of Moment (MOM). Ansoft is the software which works based on method of moment. This procedure is most complicated but the accuracy is the highest. Here in our study, proposed FSS structures have been theoretically analyzed by Ansoft Designer®. II.DESIGN The reference patch is a circular metallic copper patch of radius of 12 mm [fig.1] designed on a dielectric slab. In this study the dielectric slab is
I.INTRODUCTION A Frequency Selective Surface (FSS) screen is comprised of an infinite array of periodically arranged metallic patch or aperture elements that exhibit total reflection or transmission of microwaves, respectively, in the neighbourhood of the element resonance [1]. Frequency selective surfaces (FSSs), working as a spatial filter, is typically used in high performance radomes for radars & communication antennas over the years for both commercial & military applications [2-4]. It offers low profile and ease of manufacturing, which provide a great advantage over traditional spatial filters [5]. But
Fig.1: FSS with reference patch and no slot Sourav Nandi, DETS, University of Kalyani, Kalyani, India, Mobile No.+919831454657, (e-mail:
[email protected]). Surajit Mondal, DETS, University of Kalyani, Kalyani, India, (email:
[email protected]). Shuvodip Majumdar, DETS, University of Kalyani, Kalyani, India, (e-mail:
[email protected]). Partha Pratim Sarkar, , University of Kalyani, Kalyani, India, (email:
[email protected]).
28
Department of ECE, Haldia Institute of Technology, Haldia
Optimization of Size Reduction of a Dual-band Frequency Selective Surface by Modifying Slot Dimension
Fig 4: Study of normalized transmitted electric field vs. frequency (corresponding to Fig.1)
Table 1: SUMMARIZED RESULTS Fig.2: FSS with proposed design (strip-width=0.5mm)
glass PTFE having relative permittivity of 2.4 & thickness of 1.6 mm. The substrate dimension for a single cell is 26mmX26mm. Therefore, the periodicity of single cell is 26mm in both horizontal and vertical directions. A 2dimensional array of these cells is considered for this study & is simulated accordingly. Fig 2 shows the structure of the slot with a strip width of 0.5mm. Next, the width of the four strips have been increased to 1mm. Henceforth the width of the strips have been increased in the interval of 1mm up to 8mm and the transmission characteristics are studied.
III.RESULTS Computed transmission characteristics for proposed FSS [fig.2] using Ansoft is plotted in Fig.3 and exhibits two resonating frequencies (f1 and f2 respectively) at 4.90GHz and 10.17GHz. Before designing the FSS with proposed slot structure, the reference FSS without slot exhibits the first resonating frequency at 9.3GHz [fig.4]. To obtain the first resonating frequency at 4.90GHz it would require the patch of radius of 22.78mm approximately. So a size reduction of [π*(22.782-122)/(π*22.782)]=72.25% (approx.) has been achieved with the help of this proposed design.
Slot [stri p] Wi dth (m m) No slot 0.5 1 2 3 4 5 6 7
8
Resonati ng Frequenc y[f1] (GHz)
Depth of Resona nce at f1 (dB)
Resonati ng Frequenc y[f2] (GHz)
Depth of Resona nce at f2 (dB)
Size Reduc tion (%)
9.3
-57.00
-----
-----
-----
4.90 4.62 4.24 3.93 3.72 3.55 3.41 12.50
-52.47 -51.88 -50.24 -54.11 -53.88 -47.28 -51.30 -23.10
10.17 10.18 10.25 10.25 10.23 10.15 10.01 -----
-40.69 -40.50 -39.69 -40.73 -40.15 -40.74 -40.06 -----
13.08
-18.12
-----
-----
72.25 75.33 79.21 82.21 84.00 85.43 86.56 Size increa sed Size increa sed
In the similar way size reduction for different designs has been calculated. This shows that the first resonating frequency (designated as f1) is changing with the change of the strip-width, while the second resonating frequency (referred as f2) is almost independent of the strip-width. The study shows that, the resonating frequency is decreasing with increasing strip-width, but up to 6mm. When the strip-width becomes 7mm, the resonating frequency (f1), instead of lowering further, jumps to 12.50GHz, indicating a sharp transition [Fig.5]. The size reduction is 86.56% for this particular design and it is the optimized value of size reduction. It means size reduction beyond this value cannot be obtained if the width of the strip is increased further in the interval of 1mm until the slot exceeds the circular copper patch.
Fig 3: Study of normalized transmitted electric field vs. frequency (corresponding to Fig.2)
29
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Surface with dual operating frequency is required where it is needed to stop the signals at two different bands of frequencies. Therefore a single component fulfils the requirement of two separate filters with single stop-band, thus reducing complexity of the system. Moreover, by varying width of the slot, appropriate design can be chosen as per requirement. Whereas the first stop-band is useful for S and/or C band communication, the second stop-band is applicable in case of X band communication. REFERENCES [1] N.D. Agrawal and W.A. Imbraile, Design of a dicroic Cassegrain subreflector, IEEE Trans Antennas Propagation AP-27 (1979), 466 473. Fig 5: Variation of resonating frequencies with that of the strip-width
Table 1 shows the summarized result of the study.
[2] S.W. Lee, et al., Design for the MDRSS tri band reflector antenna. Paper Presented at the 1991 International IEEE AP Symposium, Ontario, Canada, 1991, pp. 666–669. [3] K. Ueno et al., Characteristics of FSS for a multi-band communication satellite, IEEE Int AP-S Symp, Ontario, Canada, 1991.
IV. CONCLUSION The proposed FSS with different slots act like a band-stop filter with two stop-bands in all the cases except after reaching the optimized condition. Frequency Selective
[4] G.H. Schennum, Frequency selective surfaces for multiple frequency antennas, Microwave J 16 (1973), 55 -57. [5] Finite Antenna Arrays and FSS, Ben A.Munk, A John Wiley & sons, Inc., Publication, 2003.
30
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Studies on Compact-Broadband Application of Frequency Selective Surface (FSS) by Modifying the Unique Shaped Slot within Rectangular Patch. Surajit Mondal, Sourav Nandi, Sushanta Sarkar, Shuvodip Majumdar, Partha Pratim Sarkar
Abstract- This paper deals with the theoretical investigation on a reduced size Frequency Selective Surface (FSS). The FSS is designed by cutting a unique shaped slot into rectangular patch keeping same periodicity throughout. It has been shown, how the variation of the height of the slot results in shifting of resonant frequency. Compared to conventional rectangular patch FSS the designed FSS can provide reduction in resonant frequency resulting in size reduction up to 91.32% with the bandwidth of 39.54% corresponding to resonant frequency of 3.54GHz. Theoretical investigations have been done by Ansoft Designer® software.
If the periodic elements within an FSS possess resonance characteristics, the aperture type FSS will exhibit total transmission at wavelengths near the resonant wavelengths, while the patch type FSS will exhibit total reflection. They are used in various applications, such as band pass radomes for radar; sub reflectors for dual frequency reflector system microwave, optical and infrared filters etc[1]. FSS structures are basically analyzed by three methods - Finite Difference Time Domain (FDTD) , Finite Element Method (FEM) and the Method of Moment (MoM)[3]. Here in our paper we have analyzed the proposed FSS structure theoretically by Ansoft Designer® software which based on MoM.
Keywords- Frequency Selective Surface, Rectangular Slot, Multi frequency , Size Reduction.
22mm
20mm
In microwave engineering frequency selective surfaces (FSSs) are the wireless counterpart of electrical filters. A two dimensional array of metallic patches on a dielectric slab, separated by a certain distance from each other constitutes a frequency selective surface (FSS) for electromagnetic waves[2]. In literature two generic geometries are typically discussed. The first geometry, commonly referred to as a patch type FSS, performs similarly to a band-reject filter. The second case, the aperture type FSS, performs similarly to a band-pass filter[1].
The reference patch is a two dimensional metallic copper patch of 20mmx20 mm as shown in fig.1 The patches are considered to be present on one side of a thin dielectric slab of glass PTFE having relative permittivity of 2.4 and thickness of 1.6mm . Periodicity is taken 22 mm both in x and y-directions. The dimensions are shown in the fig1.
22mm
I.INTRODUCTION
II.DESIGN OF FSS
20mm
Fig1. FSS with reference patch
Surajit Mondal DETS University of Kalyani india(email:
[email protected]) Sourav Nandi DETS University of Kalyani india(email:
[email protected] Sushanata Sarkar DETS University of Kalyani India(email:
[email protected]) Shuvodip Majumdar DETS University of Kalyani india(email:
[email protected]) Partha Pratim Sarkar DETS University of Kalyani india(email:
[email protected])
Nadia
The following proposed designs of FSS are obtained by cutting unique shaped slot in the rectangular patch. The height of the middle portion of the unique shaped slot is 10mm. The dimensions of the proposed designed FSS are shown in Fig.2.
Nadia Nadia Nadia Nadia
31
Department of ECE, Haldia Institute of Technology, Haldia
Studies on Compact-Broadband Application of Frequency Selective Surface (FSS) by Cutting Different Unique Shaped Slots Within Rectangular Patch 22mm
22mm
20mm
10mm
20mm
Fig2. FSS with proposed first design
Now we are modifying the slot by increasing the height of the middle portion of the slot by 2mm periodically. The structure of the slot is same but the height is increasing up to 20mm.
Fig.4 Transmission Characteristics of proposed FSS (corresponding to Fig.2).
Table 1: SUMMARIZED RESULTS
III.RESULT Computed transmission characteristics for reference patch [fig.1] using Ansoft is plotted in Fig.3, which shows that the FSS resonates at 12GHz while considering the first frequency band.
Sl N o
Designed FSS
1.
Patch without slot(fig1)
2.
3.
4. Fig.3 Transmission Characteristics of proposed FSS (corresponding to Fig.1).
Computed transmission characteristics for proposed FSS [fig.2] using Ansoft is plotted in Fig.4, which shows that the FSS resonates at 7.54 GHz while considering the first frequency band. Before designing the FSS with proposed grid, the first resonating frequency is obtained at 12GHz [fig.3]. To obtain the resonating frequency at 7.54 GHz it would require the perimeter of the patch is127.32 mm approximately. So the length of each side of the required patch is 31.8mm(approx). so the size reduction of [(31.832-202)/31.832]=60.50% (approx) has been achieved with the help of this proposed design.
5.
6.
7
Patch with slot height 10mm Patch with slot height 12mm Patch with slot height 14mm Patch with slot height 16mm Patch with slot height 18mm Patch with slot height 20mm
Resona ting Freque ncy in GHz
Bandwi dth in GHz
Percent age Bandwi dth
Size Reducti on
12
6.60
54.50%
--------
7.54
4.94
65.51%
60.50%
6.07
3.54
58.32%
74.36%
5.44
2.91
53.50%
79.40%
4.68
2.27
48.50%
84.79%
4.05
1.80
44.44%
88.45%
3.54
1.40
39.54%
91.32%
In the similar way size reduction for different designs has been calculated, which shows, there is a changing resonating frequency and it changes with the varying of the height of middle portion of the slot.
32
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
The study shows that, the resonating frequency is decreasing with increasing the height of the slot. The size reduction is 91.32% for this particular design and it is the maximum value of size reduction.
Fig5. Variation of resonating frequencies with the height of the slot
IV.CONCLUSION All the designs proposed in this paper can be deployed as bandstop filter having less than -10dB transmission gain, in microwave range communication. With the help of the plots and results obtained theoretically, it can be observed that with the increase of the height of the slot the resonant frequency decreases. It reaches minimum of 3.54 GHz. Here size reduction obtained is 91.32% and the percentage of bandwidth is 39.54% which is also large for FSS. We can obtain percentage bandwidth viz. 65.51%,58.32%,53.50%,48.50%,44.44% by varying the height of the slot according to the use of the band , which falls in the range of S,C & J band. V. Acknowledgement The author acknowledges CSIR, New Delhi for assisting Mr. Sushanta Sarkar to carry out the research work at this university REFERENCES [1] N.D. Agrawal and W.A. imbraile,”Design of a Dichroic Cassegrain Sub Reflector” IEEE Trans, AP- 27(4), pp. 466-473(1979) [2] Sung, G.H. –h, Sowerby, K.W. Neve, M.J.Williamson A.G, “A Frequency selective wall for Interface Reduction In Wireless Indoor Environments” Antennas and Propagation Magazine, IEEE,Vol 48, Issue 5, pp 29-37 (Oct 2006). [3] A Novel Dual-Band Frequency Selective Surface (FSS)Xiao- Dong Hu 1, Xi- Lang Zhou 1, Lin- Sheng Wu1, Liang Zhou1, and Wen- Yan Yin 2,1 Center for Microwave and RF Technologies, Shanghai Jiao Tong University, Shanghai 200240, CHINA 2 Center for Optics and EM Research, State Key Lab of MOI, Zhejiang University, Hangzhou 310058, CHINA. [4]R.Ray, A.Ray, S.Sarkar, D.Sarkar, P.P.sarkar, Reduction of Resonant Frequencies of Frequency Selective Surface by Introducing Different Types of Slots, IJCA Special Issue on “2nd National Conference- Computing, Communication and Sensor Network” CCSN,2011 [5]PhD Thesis of P.P.Sarkar, Some Studies on FSS, Jadavpur University 2002.
33
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Compact Multi-frequency Microstrip Antenna S.De, P.Samaddar, S.Sarkar, S.Biswas, D.Sarkar, P.P.Sarkar
Abstract— In this paper, an antenna has been designed with some slots on the ground plane and a T slot on the radiating patch which shows three resonant frequencies. The size of the designed slotted antenna is reduced by more than 92% compared to the reference antenna. Omni-directional good radiation pattern and as well as Return Loss characteristics are done by Ansoft Designer software.
II. ANTENNA DESIGN Fig 1: shows the geometry of the patch of the designed compact linearly polarized antenna.
Index Terms—antenna, multiband, radiation pattern, size reduction, T slot,
I. INTRODUCTION Microstrip patch antennas are widely employed in many practical applications because they have advantages of low profile, light weight, low cost, conformability, ease of fabrication, integration with RF devices, etc. [1]–[4]. Multi-frequency microstrip antennas with a single feed are required in various radar and communications systems, such as synthetic aperture radar (SAR), multi-band GSM/DCS 1800 mobile communications systems, and the Global Positioning System (GPS)[5]. Generally, the multi-frequency Microstrip antennas found in the literature may be divided into two categories: multiresonator antennas and reactively loaded antennas. In the first kind of structure, the multi-frequency operation is achieved by means of multiple radiating elements, each supporting strong currents and radiation at its resonance. This category includes the multilayer stacked-patch antennas using circular, annular, rectangular, and triangular patches [6], [7]. A multiresonator antenna in coplanar structures can also be fabricated by using aperture-coupled parallel microstrip dipoles [8]. As these antenna structures usually involve multiple substrate layers, they are of high cost. Large size is another drawback of the multiresonator antenna, which makes it difficult for the antenna to be installed in hand-held terminals. In this paper a simple slotted rectangular, single layered, defecting grounded and inset fed Microstrip patch antenna has also been presented. This compact patch antenna can radiate three frequencies i.e 1.18GHz, 1.51GHz and 3.35GHz with return losses about 12.2dB, 17.3dB and 13.9dB. This antenna can be used in WiMAX and WLAN application and more than 92% size reduction has been achieved by cutting the unequal slots in patch and ground plane. The resonant frequency ratio of third to second band is 2.22GHz.
Fig 1:- Design of the patch of the antenna A rectangular patch of size 30mm*30mm is fed through a coaxial feed. The feeding point is so positioned to obtain better impedance matching. For better matching of input impedance, the radiating patch is positioned at the centre with respect to ground plane of the antenna. A T shaped slot of width 2mm and length 24mm is embedded on the patch.
Fig 2:- Design of the ground plane of the antenna Srija De, Department of Engineering and Technological Studies, University of Kalyani, Kalyani, India (e-mail:
[email protected]). P.P.Sarkar, Department of Engineering and Technological Studies, University of Kalyani, Kalyani, India , (e-mail:
[email protected]).
The unequal slots are embedded in the ground plane at the centre position. The crossed slot has equal lateral lengths of
34
Department of ECE, Haldia Institute of Technology, Haldia
Compact Multi-Triple-Frequency Microstrip Antenna
77mm with a slot width W=2mm. They are crossed each other at 450 angle. A rectangular slot of length 58mm and width 6mm is embedded at the centre position of the ground plane. These patches are printed on glass-PTFE substrate, of permittivity €=2.4 and thickness 1.6 mm.
III. RESULTS & DISCUSSIONS For the conventional Antenna structure, the return loss vs frequency plot is shown in Fig 3. From this Figure it is shown that there are Three resonant frequencies at 6.06GHz, 6.88GHz and 9.1GHz with return loss of about -22.1dB, -13.3dB and -11.5dB respectively. The simulated resonant frequencies of the slotted antenna are 1.18GHz, 1.51GHz and 3.35GHz with return loss of about 12.2dB, 17.3dB and 13.9dB respectively is shown in Fig 4. From these two figures it is shown that the resonant frequencies are shifted left side for slotted antenna than reference one. The omnidirectional Radiation pattern of this antenna is also shown in Fig: 5, Fig 6 and Fig 7 for the resonant frequency 1.18GHz, 1.51GHz and 3.35GHz respectively. The VSWR value of this antenna is also good which is shown in Fig 8.
Fig 5:- Radiation pattern of the slotted antenna at 1.18GHz
Return Loss Vs Frequency Plot 0
Return Loss(dB)
5
6
7
8
9
10
11
-5 -10 -15
(9.1, -11.5)
(6.88, -13.2)
Fig 6:- Radiation pattern of the slotted antenna at 1.51GHz
-20 (6.02, -22.1)
-25
Frequency(GHz)
Fig 3:- Return Loss Vs Frequency plot for reference antenna Return Loss Vs Frequency Plot 0 Return Loss (dB)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
-5
-10
-15
-20
(1.18, -12.2) (3.35, -13.9) (1.5, -17.3)
Frequency (GHz)
Fig 4:- Return Loss Vs Frequency plot for slotted antenna Fig 7:- Radiation pattern of the slotted antenna at 3.35GHz
35
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September VSWR Vs Frequency Plot 3.5 3 VSWR
2.5 2 1.5 1 0.5 0 1.42
1.44
1.46
1.48
1.5
1.52
1.54
1.56
1.58
Frequency (GHz)
Fig 8:- VSWR curve for the slotted antenna IV. CONCLUSION For the antenna without slot the resonant frequencies are 6.02GHz, 6.88GHz and 9.1GHz. It is also found that the resonant frequencies for the slotted antenna are 1.18GHz, 1.51GHz and 3.35GHz. So, resonant frequencies are significantly decreased for the slotted antenna. Theoretically if we want to design the antenna to operate at first resonant frequency 1.18 GHz then size of the antenna will be around 360mm2. So around 92% size reduction is achieved. REFERENCES [1]
Handbook of Microstrip Antennas, J. R. James and P. S. Hall, Eds., Peter Peregrinus, London, U.K., 1989.
[2]
S. C. Gao and S. S. Zhong, “Analysis and design of dual-polarized microstrip arrays,” Int. J. RF Microwave CAE, vol. 9, no. 1, pp. 42–48, 1999.
[3] “Dual-polarized microstrip antenna array with high isolation fed by coplanar network,” Microwave Opt. Technol. Lett., vol. 19, no. 3, pp.214–216, Oct. 1998. [4] S. C. Gao, Dual-Polarized Microstrip Antenna Elements and Arrays for Active Integration, Shanghai, China: Shanghai Univ. Press, 1999. [5] S. A. Long and M. D. Waton, “A dual-frequency stacked circular-disc antenna,” IEEE Trans. Antennas Propagat., vol. AP-27, no. 3, pp. 281–285, 1979. [6] J. S. Dahele, K. F. Lee, and D. P. Wong, “Dual-frequency stacked annular- ring microstrip antenna,” IEEE Trans. Antennas Propagat., vol. AP-35, no. 11, pp. 1281–1285, 1987. [7] J.Wang, R. Fralich, C.Wu, and J. Litva, “Multifunctional aperture-coupled stacked antenna,” Electron. Lett., vol. 26, no. 25, pp. 2067–2068, 1990. [8]
F. Croq and D. M. Pozar, “Multifrequency operation of microstrip antennas using aperture coupled parallel resonators,” IEEE Trans. Antennas Propagat., vol. 40, no. 11, pp. 1367–1374, 1992.
36
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Design of a Single Layer Frequency Selective Surface with Dual Wide Band P. Samaddar, S. De, S. Sarkar, S. Biswas, D.C. Sarkar, P.P. Sarkar
Abstract: This paper deals with single layer Frequency selective surface (FSS) which acts as a double band reject filter. The two stop bands are really broad with percentage bandwidth 26.67% and 14.53%. The maximum and minimum band separation for this proposed design is around 45 dB and frequency ratio is more than 1.9. This design is investigated theoretically by ANSOFT® Designer software and practically by standard microwave test bench and the both results show a good agreement. Keywords: Frequency Selective Surface; Band reject filter, Band separation, Frequency ratio.
I. INTRODUCTION For more than four decades, Frequency Selective Surfaces (FSSs) have been widely studied for their various applications in spatial microwave and optical filters. They are being used as polarized filters, sub reflectors, band-pass hybrid radomes for radar cross section (RCS) controlling [1-4]. These surfaces are periodic arrays of strip (dipole) on a dielectric slab or slot within a metallic screen, which behave as band stop or band pass filters, respectively. Several such grid geometries have been demonstrated, including arrays of annular and square rings, dipoles, tripoles, crosses, and Jerusalem crosses [5,6]. Ring slot frequency-selective surfaces (FSS) have been widely investigated in recent years [7-9]. In reference [8] they report a four-band FSS design for the NASA CRAF/CASSINI application, that use of multiple RF frequencies for science investigations and data communications links. This paper presents some FSS designs which have square patch with concentric annular ring slots. Effort has been given to make a double band FSS which can stop C and Ku bands with good percentage bandwidth and high band separation. These bands are used in satellite communication and this microwave band stop filter can be used in this field. This paper actually introduces four designs, where every design is the modification of the previous design and the last (fourth design) one is the best among those and nearest to our requirement. P.Samaddar, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India, 9434150677,
[email protected] S.De, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India, 9038093286. S.Sarkar, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India, 9239175075. S. Biswas, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India, 9434451168. D.C. Sarkar, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India, 9433814320. P.P. Sarkar, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India, 9433164063,
[email protected]
Every design is theoretically investigated by ANSOFT Designer / Nexxim v 2.2 software which uses method of Moment (MOM) process to calculate the results. To confirm the simulated result, the FSS is fabricated and experimentally tested. Every FSS is designed with dielectric (Glass PTFE, relative permittivity of 2.4 and 1.6mm thickness) and metal (copper). II. DESIGN OF FSS In this section four FSS designs are introduced with different number of concentric rings and circular slots. The first design has only one ring slot but the fourth has two rings and one circular slot. The size of the metallic square patches increases with the number of ring shaped slots. Single cells of the all four designs are shown in fig. 1. Though the number of rings is changed, the width of the ring and radius of circular slot are kept same as 1mm. By taking infinite array of these single cells (when the cells are kept 2mm apart in both vertical and horizontal direction) the result has been investigated by software. A small part of the fourth FSS is shown in Fig. 2. The periodicity in both horizontal and vertical direction for the first design is 8mm, for second design is 10mm, for third design is 12mm and for fourth design is 14 mm At the time of experiment a 12cm * 12cm (approximately) FSS having eight rows and eight columns is used. Figure 3 shows the fabricated FSS.
Fig. 1. Single Cells of the Four FSS
37
Department of ECE, Haldia Institute of Technology, Haldia
Design of a Single Layer Frequency Selective Surface with Dual Wide Band
Normalized Transmitted Electric Field (dB)
First Design 0 0
5
10
15
20
25
30
-10 -20 -30 -40 -50 -60 Frequency (GHz)
Graph for First Design
Fig. 2. FSS with Concentric Annular Slots (Fourth Design)
Normalized Transmitted Electric Field (dB)
Se cond Design 0 -5 0 -10 -15
5
10
15
20
25
30
-20 -25 -30 -35 -40 -45 -50 Frequency (GHz)
Graph for Second Design Third Design
III. RESULT The simulated results for all the four designs are shown in table 1. A normalized electric field vs. frequency graph for all designs is shown in fig 4. By this graph it can be shown that bands are shifting left with every modification. The fourth design provides the best result, so it is fabricated and practically investigated. The practical investigation is done by standard microwave test bench. Agilent made microwave generator is connected to a transmitting horn. Receiving horn antenna is connected to an Agilent made power meter (model no E4418 B, EPM Series Power Meter) with sensor (model no E4412 A, E Series CW Power Sensor). The horn antennas and generators are changed for different frequencies bands like 4GHz – 6GHz, 6GHz - 8GHz, 8GHz - 12GHz etc. Both the practical and theoretical results for the fourth design are shown in the table 2 and transmission characteristic is shown in Fig.6.
3.5
8.5
13.5
18.5
23.5
-10 -20 -30 -40 -50 Frequency (GHz)
Graph for Third Design Fourth Design 0 Normalized Transmitted Electric Field (dB)
Fig.3. Fabricated FSS
Normalized transmitted Electric Field (dB)
0
3.5
8.5
13.5
18.5
-10 -20 -30 -40 -50 Frequency (GHz)
Graph for Fourth Design Fig. 4 Normalized transmitted Electric field graph for four FSS
38
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Normalized Transmitted Electric Field (dB)
Practical data 0 -5 0 -10 -15 -20 -25 -30 -35 -40 -45 -50
REFERENCE
Theoretical Data
5
10
15
20
Frequency (GHz)
Fig 6. Normalized transmitted Electric field vs. frequency graph for fourth FSS (Simultaneously simulated and measured results )
Parameters Name of FSS First Design Second Design Third Design Fourth Design
Resonating Frequency (GHz) 18.31 12.01 25.31 8.9 18.73 6.9 13.21
Bandwidth (GHz)
Percentage Bandwidth
4.96 3.41 0.53 2.44 2.64 1.84 1.92
27.09 28.39 2.1 27.42 14.09 26.67 14.53
1. H. Zhou, S. Qu, Z. Pei, J. Zhang, B. Lin, J. Wang, H. Ma and C. Gu, Narrowband Frequency Selective Surface Based on Substrate Integrated Waveguide Technology, Progress In Electromagnetics Research Letters, Vol. 22, 19-28, 2011, pp 19-28. 2. N.D. Agrawal and W.A. Imbraile, Design of a dicroic Cassegrain subreflector, IEEE Trans Antennas Propagat AP-27 Ž1979, pp. 466-473. 3. S.W. Lee et al., Design for the MDRSS tri band reflector antenna, IEEE Int AP-S Symp, Ontario, Canada, 1991, pp. 666-669. 4. G.H. Schennum, Frequency selective surfaces for multiple frequency antennas, Microwave J 16,1973, pp. 55-57. 5. Michael E. MacDonald,Angelos Alexanian, Robert A. York, Zoya Popovic and Erich N. Grossman, Spectral Transmittance of Lossy Printed Resonant-Grid Terahertz Band pass Filters, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 48, NO. 4, APRIL 2000, pp 712-718. 6. J. Huang and S.W. Lee,"Tri-Band Frequency Selective Surface with Circular Ring Elements" IEEE Int. AP- Symp., London, Ontario, Canada, June 24-28, 1991. 7. A.E. Martynyuk and J.I. Martinez Lopez, Frequency-selective surfaces based on shorted ring slots, ELECTRONICS LETTERS 7st March 2007 Vol. 37 No. 5. 8. T.K. Wu, K. Woo, S.W. Lee, Multi-ring element Frequency Selective Surface for multi-band application, IEEE, vol- 4, page- 1775-1778, 1992. 9. Parker, E.A.; Hamdy, S.M.A.; Langley, R.J.; , "Arrays of concentric rings as frequency selective surfaces," Electronics Letters , vol.17, no.23, pp.880-881, November 12 1981.
Table. 1. Simulated results for the four FSS designs
Resonating Frequency (GHz) Bandwidth (GHz) Percentage Bandwidth
Theoretical Results 6.9
Practical Results 7
13.21
13
1.84 1.92 26.67 14.53
2.6 2.8 37.14 21.54
Table 2. Theoretical and measured results for Fourth FSS
IV. CONCLUSION Here dual band stop frequency selective structure has been designed. Both the bands are wide. The most important points to mention here are that the separation between transmission and reflection band is around 40 dB and the higher to lower frequency band ratio is 1.9. The novelty of the paper is that four goals (Broad band, multi band, good ratio between higher and lower band, good band separation) are achieved simultaneously in the design of a single layer FSS structure. V. ACKNOWLEDGEMENT The authors acknowledge CSRI, New Delhi for assisting Mr. Sushanta Sarkar to carry out the research work at this university
39
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Compact Wideband Planar Quasi Semiconductor Monopole Antenna S. Mondal, S. Sarkar, S. De, P. Samaddar, S. Bhunia, P.P. Sarkar
Abstract— This paper presents a shorted planar quasi semicircular monopole antenna (SPQSMA) for wideband wireless communication application. The shorting strip reduces the size of the antenna. A modified CPW feed is designed to match with 50Ω input impedance. Simulations have been performed to investigate the different characteristics of the antenna. This antenna has desirable characteristics, such as very wide dual band (865 MHz to 1.42 GHz and 2.17 GHz to 20 GHz), low cost, ease of manufacture, compact size, bidirectional radiation pattern; make the proposed antenna suitable specially for GSM band and ultrawideband (UWB) applications. Index Terms—shorting ultrawideband
strip,
dual
band,
CPW,
I. INTRODUCTION The wideband antennas such as PICA, vivaldi, volcano, log-periodic, spirals and so on have been developed for wireless communication related applications [1-3]. The planar monopole antenna can be formed with different shapes such as circle, square, elliptical, bow tie, trapezoidal, hexagonal and pentagonal [3-8]. Also many non planar metal antennas are reported for wideband application [9-10]. The study of planar circular monopole antenna has been reported [11-14]. In this paper a newly designed shorted planar quasi semicircular monopole antenna (SPQSMA) yields dual band characteristic and compact size. The proposed antenna can cover -10 dB return loss from 865 MHz to 1.42 GHz and 2.17 GHz to 20 GHz. The ground and feed section are in the same plane that makes the antenna completely planar wideband metal antenna.
S. Mondal, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India,
[email protected]. S.Sarkar, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India. S.De, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India,. P.Samaddar, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India,
[email protected]. Dr. Sunandan Bhunia, Department of ECE, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]). P.P. Sarkar, Department Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India,
[email protected]
This antenna provides bidirectional radiation pattern rather than reported omni-directional radiation pattern in azimuth plane [1-6]. The absolute value of gain varies from 1.149 dB to 9.1 dB in the operating frequency band. The signal distortion analysis [13] has been performed in this paper by transfer function and group delay. Another antenna parameter i.e. antenna factor which characterizes the reception properties of the antenna in Electromagnetic compatibility (EMC) applications is analyzed here. Bidirectional radiation pattern makes the antenna suitable for repeater application and this antenna can be used as wearable antenna. II. ANTENNA DESIGN The geometry of the shorted planar quasi semicircular monopole antenna (SPQSMA) is shown in Fig. 1. This antenna is made by a 0.8 mm thick copper plate and the surrounded ground plane consists of the same copper plate. Here a modified CPW feed is designed to match with 50Ω input impedance line. First a planar quasi semicircular monopole antenna (PQSMA) is designed and then a shorting strip with optimized position and width is added to reduce the size of the antenna. All dimensions for the optimized antenna are shown in Fig. 1. The design of proposed planar metal antenna modifies many reported non planar wideband metal antennas [9-10]. The design formula of the proposed antenna has not been developed yet, but the knowledge of design is taken from the study of reported planar monopole antennas [1-14].
Fig. 1 Geometry of SPQSMA: L1= 96 mm, L2 = 130 mm, L3 = 25 mm, W1 = 4 mm, W2 = 1 mm, S1 = 10 mm, S2 = 8 mm, S3 = 8 mm, S4 = 10 mm, S5= 10 mm, S6 = 1.5 mm, R = 50 mm
40
Department of ECE, Haldia Institute of Technology, Haldia
Compact Wideband Planar Quasi Semicircular Monopole Antenna
III. SIMULATED RESULTS The return loss characteristic for PQSMA and SPQSMA is shown in Fig. 2(a). The shorting strip shifts the lower operating frequency to lower side, which indicates the size reduction of the antenna. The zoom part for marked portion of Fig. 2(a) is shown in Fig. 2(b) for better visualization. The lower operating frequency of PQSMA and SPQSMA are at 1.198 GHz and 865 MHz respectively, which implies almost 28% size reduction of the proposed antenna. The operating frequency band of the SPQSMA ranges from 865 MHz to 1.42 GHz and 2.17 GHz to 20 GHz. Actually due to the shorting strip, we get an additional GSM band, which is the most important characteristic of the proposed antenna.
Fig. 3 Farfield radiation pattern at frequencies 1GHz, 6.5 GHz and 18 GHz for (a) Φ = 00 Pand (b) Φ = 900
The far field radiation pattern at θ = 900 is shown in Fig. 4, which demonstrates this pattern is bidirectional. The surrounded ground to the antenna provides for bidirectional radiation pattern in azimuth plane.
Fig. 4 Far field radiation pattern at frequencies 1 GHz, 6.5 GHz and 18 GHz for θ = 900 (a)
The variation of maximum gain at Φ = 900 plane is shown in Fig. 5. This gain of SPQSMA in the operating frequency band ranges from 1.149 dB to 9.1 dB.
(b) Fig. 2 (a) Simulated return loss vs. frequency of PQSMA and SPQSMA and (b) enlarged marked part of Fig. 2 (a) Fig. 5 Variation of maximum gain vs. frequency of SPQSMA
Actually, such shorting strip at the top of antenna provides inductive loading, which increases the effective length of the antenna that shifts the operating frequency to the lower side. The proposed antenna provides bidirectional radiation pattern in E and H plane over the operating frequency band. The far field radiation pattern at Φ = 00 and Φ = 900 for different frequencies at 1 GHz, 7.5 GHz and 15.5 GHz of SPQSMA is shown in Fig. 3.
This computed gain can be used to calculate antenna factor (A.F) of the antenna. A.F = 20 log( 9.73 ) dB/m λ G Where, G = gain of antenna, λ = wavelength The antenna factor in the operating frequency band almost monotonically increases with frequency as shown in Fig. 6 that indicates this antenna can be used as an EMI Sensor.
41
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
return loss agrees well.
Fig. 6 Variation of AF vs. frequency of SPQSMA Fig. 9 Photograph of fabricated SPQSMA
Group delay (GD) describes about the phase response of transmitted signal. Constant and variation of GD means linear and non linear variation of phase of the transmitted signal respectively. So variation of GD for SPQSMA gives the signal distortion characteristic as shown in Fig. 7.
Fig. 10 Simulated and measured return loss characteristic of SPQSMA
V. CONCLUSION
Fig. 7 Variation of group delay vs. frequency of SPQSMA
The variation of phase response of the transfer function is shown in Fig. 8. At the lower side frequency the phase response varies nonlinearly which is good agreement with the plot of GD.
The proposed SPQSMA provides dual band characteristic with smaller in size. The bidirectional radiation pattern and other acceptable characteristics demonstrate that this antenna can be used in various wireless communication applications. A CPW feed is designed to match with 50Ω input impedance line. Also a shorting strip is used to reduce the size of the antenna. The proposed antenna is a completely planar metal antenna that modifies many reported non planar metal antenna.
REFERENCES [1]
Seong-Youp Suh, Stutzman, W.L., Davis, W.A., “A new ultrawideband printed monopole antenna: the planar inverted cone antenna (PICA),” Antennas and Propagation, IEEE Transactions on, Volume: 52, Issue: 5 Digital Object Identifier: 10.1109/TAP.2004.827529, Publication Year: 2004, pp. 1361 – 1364.
[2]
Li Tianming, Rao Yuping, Niu Zhongxia, “Analysis and Design of UWB Vivaldi Antenna,” Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications, 2007 International Symposium on, Digital Object Identifier: 10.1109/MAPE.2007.4393685, Publication Year: 2007, pp. 579 – 581.
[3]
Junho Yeo; Yoonjae Lee; Mittra, R.; “Design of a wideband planar volcano-smoke slot antenna (PVSA) for wireless communications,” Antennas and Propagation Society International Symposium, 2003. IEEE Volume: 2, Digital Object Identifier: 10.1109/APS.2003.1219321, Publication Year: 2003, pp. 655 – 658.
Fig. 8 Variation of phase response vs. frequency of SPQSMA
IV. MEASURED RESULT The photograph of the fabricated antenna is shown in Fig. 9. The simulated and measured return loss characteristic of the antenna upto frequency 8.5 GHz is shown in Fig. 10 due to the frequency limitation of the Agilent E5071B Vector Network Analyzer (VNA). The simulated and measured
42
Department of ECE, Haldia Institute of Technology, Haldia
Compact Wideband Planar Quasi Semicircular Monopole Antenna
[4]
[5]
[6]
[7]
Agarwall, N. P., Kumar G., and Ray K. P., “Wide-Band Planar Monopole Antennas,” IEEE Trans. Antennas Propagation, Vol. 46, No. 2, 1998, pp. 294 – 295. Sharma, M.M., Shrivastava, V., “Printed fractal elliptical monopole antenna for UWB application”, Recent Advances in Microwave Theory and Applications, 2008. MICROWAVE 2008. International Conference on Digital Object Identifier: 10.1109/AMTA.2008. 4763208, Publication Year: 2008, pp. 374 – 376. Chen, Z.N., Ammann, M.J., Chia, M.Y.W., See, T.S.P.; “Annular planar monopole antennas,” Microwaves, Antennas and Propagation, IEE Proceedings, Volume: 149, Issue: 4, Digital Object Identifier: 10.1049/ip-map:20020701, Publication Year: 2002, pp. 200 – 203. Evans, J.A., Amunann, M.J., “Planar trapezoidal and pentagonal monopoles +Evans, with J.A.+Am impedance bandwidths in excess of 10:1,” Antennas and Propagation Society International Symposium, 1999. IEEE, Digital Object Identifier: 10.1109/APS.1999.788241, Issue Date: Aug 1999, vol.3, pp. 1558 – 1561.
[8]
Zhi Ning Chen, “Impedance characteristics of planar bow-tie-like monopole antennas,” Electronics Letters, Volume: 36, Issue: 13, Digital Object Identifier: 10.1049/el: 20000816, Publication Year: 2000, pp. 1100 – 1101.
[9]
Tipsawate, T., Phongcharoenpanich, C., Kosulvit, S., “A wideband bidirectional antenna using truncated circular sector fed by rectangular monopole,” Electrical Engineering/ Electronics, Computer, Telecommunications and Information Technology, 2009. ECTI-CON 2009. 6th International Conference on, Volume: 02 Digital Object Identifier: 10.1109/ECTIC- ON.2009.5137163, Publication Year: 2009, pp. 782 – 785.
[10] Lamultree, S., Phongcharoenpanich, C., Torrungrueng, D., “Design of UWB Bidirectional Rectangular Ring Antenna Fed by Stepped Monopole,” Microwave Conference, 2007. APMC 2007. Asia-Pacific, Digital Object Identifier: 10.1109/APMC.2007.4555121, Publication Year: 2007, pp. 1 – 4. [11] G. P. Gao, M. Li, S.F., Niu, X. J. Li; B. N. Li, “Study of a novel wideband circular slot antenna having frequency band-notched function,” Progress In Electromagnetics Research, volume: 96, 2009, pp. 141-154. [12] Jianxin Liang, Chiau, C.C., Xiaodong Chen, Parini, C.G., “Study of a printed circular disc monopole antenna for UWB systems,” Antennas and Propagation, IEEE Transactions on, Volume: 53, Issue: 11, Digital Object Identifier: 10.1109/TAP.2005.858598 Publication Year: 2005, pp. 3500-3504. [13] Qi Wu, Jin, R., Geng, J., “Ultra-wideband quasi-circular monopole antennas with rectangular and trapezoidal grounds,” Microwaves, Antennas & Propagation, IET, Volume: 3, Issue: 1, Digital Object Identifier: 10.1049/iet-map: 20070215, Publication Year: 2009, pp. 55 - 61. [14] Mondal S., P.P. Sarkar, “Wideband bidirectional planar shorted circular monopole antenna, ” 2nd International conference on computer, control, communication and information Technology (C3IT), Procedia Technology, Vol-4, 2012, pp. 421-426.
43
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Shorting Pin Loaded Compact and Broadband Triangular Microstrip Patch Antenna Avisankar Roy, P. P. Sarkar, Sunandan Bhunia
Abstract— A triangular shaped, shorting pin loaded, compact, dual band microstrip patch antenna with wide bandwidth is presented in this paper. Microstrip antenna with bandwidth of 38.7% with respect to center frequency is also been designed for WLAN application by defecting the ground plane and 82.4% size reduction has been achieved. Microstrip patch antenna with inset feed is simulated with the method of Moment based standard software.
Index Terms— Microstrip antenna, shorting pin, compact, broad band.
reduced by 82.4%. The bandwidth enhancement has been achieved because of the shorted pin which acts like a reactive element, which modifies the frequency variation of the input impedance. By adjusting the radius of the shorting pin and its location along the microstrip patch antenna, a good impedance match over a relatively bandwidth can be achieved. II. ANTENNA DESIGN The microstrip patch antenna radiates at 5.8 GHz has for
been designed from the equation [1], I. INTRODUCTION
Microstrip patch antennas have low profile, light weight and widely used in Portable devices such as mobile phones, laptops with wireless connection, wireless universal serial bus (USB) dongles etc., and Microstrip patch antenna plays a very significant role for the miniaturization of these devices [1-3]. However, there are some limitations on the applications of microstrip antennas due to their inherent narrow bandwidth. Depending on the feeding techniques the band width of the antenna varies slightly. Maximum bandwidth of about 13% can be achieved using proximity coupling method of feeding for a regular microstrip patch antenna structure. A number of bandwidth enhancement methods for microstrip antenna elements have been investigated. Using electrically thick elements, stacked multi patch, multilayer elements, multiple resonator elements [4-10]. All these methods however, increase the complexity and/or enlarge the size of the radiating structures. Shorting pin or shorting wall can also be used to enhance the bandwidth [4]. Wenquan Cao et. al. [5] has proposed a broadband microstrip antenna loaded with shorting pin and 9.5% bandwidth in 2GHz has been achieved. Mahmoud N et al.,[6] proposed a dual frequency antenna with stacking structure with very narrow bandwidth. Sarkar.S et al.,[7] proposed an antenna with about 90% size reduction with only 12.8% BW which radiates in a single frequency. Yikai Chen et al.,[8] proposed an antenna with bandwidth of about 9% of the center frequency. E. A´ vila-Navarro et al.[9], designed a novel antenna operating in a single frequency with about 50%BW. In this paper microstrip antenna with bandwidth of 37.8% has been designed by defecting the ground plane and using shorting pin load. The size of antenna has been also
Mr. Avisankar Roy, Department of Electronics & Communication Engineering, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]). Dr. P. P. Sarkar, Department of Engineering and Technological Studies, University of Kalyani, Kalyani, Nadia, India, (e-mail:
[email protected]) Dr. Sunandan Bhunia, Department of Electronics & Communication Engineering, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]).
the triangular shaped antenna. Each side of the equilateral triangle is L=16mm with the parameters, dielectric constant = 4.4(FR4) and thickness h=1.5875mm.
Figure 1: Antenna 1
Antenna 1 is fed at optimum feeding location with coaxial cable of 0.5mm radius shown in figure 1. Antenna2 structure has been designed by taking finite ground plane. All other parameters of Antenna2 structure are same as Antenna1.The optimum results found for the ground plane of width Wg= 18mm and length Lg= 34mm. Antenna 2 is fed at optimum feeding location with a microstrip line shown in figure 2.
Figure 2: Antenna 2 44
Department of ECE, Haldia Institute of Technology, Haldia
Shorting Pin Loaded Compact and Broadband Triangular Microstrip Patch Antenna
Antenna 3 structure has been designed to get the wide bandwidth with slotted patch and shorting pin. All the parameters of Antenna 3 are same as Antenna 1 and Antenna 3 structure is fed with microstrip line in optimum location. The slot length and widths all are shown in figure 3-4.
achieved on the Antenna 3 structure using shorting pin of 0.16mm radius located at optimum location shown in figure 4. It has been observed that when the shorting pin is used the designed antenna (Antenna 2 & Antenna 3) resonates in two frequencies. Due to the presence of shorting pin the antenna impedance in the reactive part changes in such a way that antennas are resonating in another frequency. The new resonant frequency is also in other band (S band), hence the designed antenna may be used as dual band dual frequency mode. Due the insertion of the shorting pin the impedance matching can be achieved to wide range of frequencies (Antenna-3 with shorting pin) which results enhancement of bandwidth. The simulated results for Antenna 1, Antenna 2 and Antenna 3 structures are given in the table – 1 and table-2. Figure 5-6 show the return loss vs frequency graph for Antenna 1, Antenna 2 and Antenna 3.
Table – 1: Simulated Return Loss Figure 3: Antenna 3 (Without pin)
Antenna
Resonant Frequency (GHz)
Return Loss (dB)
Antenna 1
5.58
35.29
Antenna 2 without pin
5.26
12.4
f1 = 2.5
14
f2 = 5.29
11.62
5.28
11.2
f1 = 2.5
14
f2 = 5.17
14.2
Antenna 2 with pin Antenna 3 without pin Antenna 3 with pin Figure 4: Antenna 3 (With pin)
Table – 2: Simulated Bandwidth III. RESULTS AND DISCUSSION For the Antenna1 structure, the resonant frequency is at 5.58GHz with return loss of about 35.29dB and 10dB bandwidth is 114MHz i.e. 2.04% of the center frequency. The resonant frequency for the Antenna 2 (without pin) structure is at 5.26GHz with return loss 12.4dB and 10dB bandwidth is 1.782GHz i.e. 33.9% of the center frequency. Antenna 2 structure with shorting pin at optimum location resonates at two frequencies such as f1=2.5GHz with return loss 14dB and f2=5.29GHz with return loss 11.62dB. Bandwidths of these two bands are 146 MHz i.e. 5.84% and 1.844 GHz i.e. 34.87% respectively. The resonant frequency for Antenna 3 structure without shorting pin shows almost equal result with Antenna 2 structure without pin. But the resonant frequencies for the Antenna 3 structure with shorting pin at optimum location are at f1=2.5GHz with return loss 14dB and 10dB bandwidth is 138MHz i.e. 5.42% of the center frequency and f2=5.17GHz with return loss 14.2dB with 10dB bandwidth is 2GHz i.e. 38.67% of the center frequency. The bandwidth enhancement has been
Antenna
Resonant Frequency
Simulated Bandwidth (MHz)
Simulated % Bandwidth
Antenna 1
5.58
114
2.04
Antenna 2 without pin
5.26
1782
33.9
f1 = 2.5
146
5.84
f2 = 5.29
1844
34.87
5.28
1793
33.94
f1 = 2.5
138
5.42
f2 = 5.17
2000
38.67
Antenna 2 with pin Antenna 3 without pin Antenna 3 with pin
45
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Figure 5: Return Loss for Antenna 1 and Antenna 2
Figure 8: Radiation pattern for Antenna 3 without pin at 5.28GHz
Figure 6: Return Loss for Antenna1 and Antenna 3
The radiation patterns for E-field and H-field of the reference and designed antennas are shown in Figure-7-10.
Figure 7: Radiation pattern for Antenna 1 at 5.58GHz
Figure 9: Radiation pattern for Antenna 3 with pin at 5.17GHz
Figure 10: Radiation Pattern for Antenna 3 with pin at 2.5GHz
46
Department of ECE, Haldia Institute of Technology, Haldia
Shorting Pin Loaded Compact and Broadband Triangular Microstrip Patch Antenna
The radiation patterns of Antenna 2 are almost same as the radiation patterns of Antenna 3. The absolute gain for Antenna 3 at 2.5GHz is 2dBi and -3dB beamwidth for E-plane is 162.720 and for H-plane is 128.160.
Handsets”, Microwave and Optical Technology Letters, Vol. 53, No. 1 January 2011, pp 118-121. [11] C. A. Balanis, “Advanced Engineering Electromagnetics”, John Wiley & Sons., New York, 1989.
IV. CONCLUSION Single layered, single fed, shorting pin loaded and defecting grounded with slotted triangular patch Microstrip antennas are proposed and designed for broadband operation with compact size. Microstrip antenna with slotted patch and defected ground plane and shorting pin offers a huge bandwidth of about 38.67% of the center frequency suitable for WLAN application in C band which is very much encouraging and the antenna size is also been reduced about 82.4% of its original size. The proposed antenna resonates at dual band (S band) at 2.5GHz and (C band) at 5.17GHz with remarkable return loss which may be used in dual band operation. The antenna gains of the proposed structures are not good but it can be enhanced by using the stacked structures or any other gain enhancement scheme.
REFERENCES [1]
[2] [3] [4]
[5]
[6]
[7]
[8]
[9]
[10]
Garg, Bhatia, Bahl, Ittipiboon, “Micristrip Antenna Design Handbook”, Artech House INC, Norwood, NA 2001. Zhi Ning Chen, “Antennas for Portable Devices”, John Wiley & Sons Ltd., 2007. Kin-Lu Wong, “Planer Antennas for Wireless Communications”, John Wiley & Sons Ltd, 2003. Debatosh Guha, Yahia M. M. Antar, “Circular Microstrip Patch Loaded With Balanced Shorting Pins for Improved Bandwidth”, IEEE Antennas And Wireless Propagation Letters, Vol. 5, 2006, pp 217-219. Wenquan Cao, Bangning Zhang, Hongbin Li, Tongbin Yi, Aijun Liu, “A Broadband Microstrip Dipole Antenna Loaded with Shorted Pin”, International Conference on Microwave and Millimeter Wave Technology (ICMMT), 2010, pp 1035-1037. Mahmoud N. Mahmoud, Reyhan Baktur, “A Dual Band Microstrip-Fed Slot Antenna”, IEEE Transactions on Antennas and Propagation, Vol. 59, NO. 5, MAY 2011, pp 1720-1724. S. Sarkar, A. Das Majumdar, S. Mondal, S. Biswas, D. Sarkar, P. P. Sarkar, “Miniaturization of Rectangular Microstrip Patch Antenna using Optimized Single-Slotted Ground Plane”, Microwave and Optical Technology Letters, Vol. 53, No. 1 January 2011, pp 111-115. Yikai Chen, Shiwen Yang, and Zaiping Nie, “Bandwidth Enhancement Method for Low Profile E-Shaped Microstrip Patch Antennas”, IEEE Transactions on Antennas and Propagation, vol. 58, no. 7,July 2010, pp 2442-2447. E. A´ vila-Navarro, J. Anto´ n, Jose´ M. Blanes, C. Reig, “Broadband Printed Dipole With Integrated Via-Hole Balun for WIMAX Applications”, Microwave and Optical Technology Letters, Vol. 53, No. 1 January 2011, pp 52-55. Gaojian Kang, Zhengwei Du, “A Novel Compact Broadband Printed Monopole Antenna for Mobile
47
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Effects of periodicity on dipole array FSS structure R.K. Maity, A. Roy, S. Mukherjee, T. K. Barik, S. Bhunia
Abstract— This paper focuses the effects of periodicity along X and Y direction of a two dimensional dipole array Frequency Selective Surface (FSS) structure on the characteristics such as transmission loss and bandwidth used in microwave frequency for communication. In this paper FSS structure of 20×20 half-wave dipole elements has been studied. Electromagnetic wave equations solved by Method of Moment (MoM) and mathematical formulation has been programmed using MATLAB. Index Terms—Frequency Selective Surface, Half-Wave Dipole, Periodic Array.
I. INTRODUCTION Two-dimensional planar periodic structure has attracted a great amount of attention because of its frequency filtering property. A periodic array consisting of conducting patch or aperture elements [1-3] is known as a frequency selective surface or dichroic. Similar to the frequency filters in traditional radio frequency (RF) circuit, the FSS may have band-pass or band-stop spectral behavior depending upon the array element type (i.e. patch or aperture). In the last two decades many fascinating FSS applications and sophisticated analytical techniques have emerged. Applications are the multi-band FSS in reflector antennas and the band pass radome. In very recent the application of FSS has also reached into household appliances as in microwave ovens. In a dual reflector antenna system an FSS can be used as the sub reflector. Different frequency feeds are optimized independently and placed at the real and virtual foci of the sub reflector. Hence only a single main reflector is required for multi-frequency operations. For example the FSS on the high gain antenna of the voyager space craft was designed to diplex the S and X bands [4]. Raj Mitra et. al. [3] suggested the basis functions for different FSS structures such as (a) Rectangular aperture or patch, (b) Circular aperture or patch, (c) Thin dipole or slot, (d) Cross dipole or slot, (e) Jerusalem cross etc. will adjust your fonts and line spacing. Numbers of works have been reported taking different
element structures with different orientation [5-6]. All the papers have used the optimum element spacing. But this paper focuses on the variation of FSS structure’s (constitute of simple half wave dipole) different characteristics with the longitudinal & vertical element spacing and with the dipole width. II. THEORETICAL FORMULATION The FSS structure made by the finite-length rods may have a reflection coefficient magnitude equal to one (i.e., when length is λ/2), while for infinitely long rod case will only at “DC.” The equivalent circuits for the long rods are inductors and for finite elements have series capacitances associated with the gaps between the elements, resulting in the equivalent circuit of a series LC circuit as shown. Obviously only the latter will act like a true ground plane at the resonant frequency with no leakage, while the long rod case cannot [10].
Figure: 1(a)
Figure: 1(b) Rajkumar Maity, Department of ECE, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]). Avisankar Roy, Department of ECE, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]). Surajit Mukherjee, Department of ECE, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]). Dr. Tarun Kumar Barik, School of Applied Science, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]). Dr. Sunandan Bhunia, Department of ECE, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]).
Figure-1: Equivalent circuits (a) Infinite length (b) finite length
In this paper the array of half wave dipole elements are used whose equivalent circuit is given in Figure-1(b). The frequency response of this simple circuit is nothing but a band pass filter. The electromagnetic fields equations are 48
Department of ECE, Haldia Institute of Technology, Haldia
Effects of periodicity on Dipole array FSS structure
solved by Method of Moment in spectral domain to find out the transmission coefficient.
From
To formulate this method several assumptions have been made: (a) The FSS is infinite in extent, so that the diffraction from the edges of the surface in a practical situation is ignored. (b) The incident radiation is a monochromatic plane wave and (c) The conducting patches or the conducting screen has been assumed to be infinitesimally thin.
coefficients of the structure of mode mn due to mode kl incident is given by [12, 13].
Starting from the Maxwell’s equations given below (equation-1) and using the Lorenz condition we can achieve equation-2 for the time varying field
these
scattered
s x
s y
E ( x, y ) and
TTM =
jωε 0 Ezt 2 k02 + γ mn
(
)
E ( x, y )
E xs (x, y ) 1 = s (2Π )2 E y (x, y )
+ ∞+ ∞
2 2 1 k 0 − α − αβ 0
∫ ∫ jωε
− ∞− ∞
~ J (α , β ) ~ e jαx e jβy dαdβ − − > (3) ~x ( ) α β G , 2 J (α , β ) k 0 − β 2 y
− αβ
On the conducting patch, the tangential electric field must vanish. s inc So, E + E = 0 [on the conducting patch] i.e. E s = − E inc , Hence ~ 2 2 J (α , β ) E xinc (x, y ) − αβ ~ 1 + ∞+ ∞ 1 k 0 − α e jαx e jβy dαdβ − − > (4) ~x ( ) G α β , = inc 2 J (α , β ) (2Π )2 −∫∞−∫∞ jωε 0 − αβ k 0 − β 2 E y (x, y ) y This formulation is valid for single patch only. To extend the spectral domain method to an infinite regular periodic array of patches in x and y direction satisfying Floquet’s theorem for periodic structure and using the modified current densities equation (10) can be written as ~ J (α , β ) + ∞ + ∞ k 2 − α 2 − α β ~ E inc x 1 1 x m n 0 m m n e jα m x e jβ n y - - > (5) × G (α m , β n ) ~ inc = ∑ ∑ 2 2 2 J (α , β ) k 0 − β n E y jωε 0 (2π ) ab m=−∞ n=−∞ − α m β n y m n
Where αm =
kx
inc
θ φ
2mΠ inc + kx , a
βn =
= k0 sin θ cos φ , k y
inc
2nΠ inc + ky , b
= k0 sin θ sin φ
is the angle of incident wave with the z-axis and
is the angle of the projection of the incident wave on the xy plane with the x-axis (Figure-2). kinc
Z
θ
Y
φ
Projection of kinc on XY plane
X Figure-2
;
the
fields transmission
2 ) − − − − − − > ( 6) γ mn (k02 + γ mn 2 γ kl (k0 + γ kl2 )
Where E zt = j
(α m E xs + β n E ys )
γ mn
,
γ mn = − j (k02 − α m2 − β n2 ) 2 1
(
or , − α m2 + β n2 − k02
where the symbols are their usual meaning. From [11] the incident electric field can be written as
electric
)
1
2
for k02 > α m2 + β n2 for k02 < α m2 + β n2
The equation-6 is programmed in MATLAB and the final solution has been obtained from the equation -6. The Transmission coefficient = (Transmitted Electric Field) / (Incident Electric Field). The incident field is taken as unity so the transmission coefficient is identical with the transmitted field in magnitude. t
MOM method is used to find out E z for easy and faster calculation Raj Mitra et. al. [3] suggested the basis functions for FSS structure comprising of array of dipole element. III. RESULTS & DISCUSSION In this paper the simple half-wave dipole elements are taken as the array element of the FSS structure. The return loss and bandwidth variation of this FSS structure has been studied for different periodicity along horizontal (along X) direction and vertical (along Y) direction for a particular frequency. Table-1 & 2 are the simulated results for the variations of the periodicity along X & Y axes. The variations are shown in Figure-3-4. In Figure-3 it has been found that as the periodicity in both the direction is increased the return loss increased gradually. From the table-1 it is interesting to note that as we increase ‘a’ the higher 10dB cutoff frequency gradually increased whereas the lower 10dB cutoff frequency remain almost same. In table-2 it is found that as we increase ‘b’ the lower 10dB cutoff frequency gradually increased whereas the higher 10dB cutoff frequency remain almost same. Which means the bandwidth is increased gradually with increase of ‘a’ but it is decreases gradually for the increase of periodicity ‘b’ this is shown in Figure-4. The equivalent circuit of the FSS structure is shown in figure-2. Basically the equivalent circuit is a series LC circuit whose frequency response is like a bandpass filter. The upper cut off frequency is controlled by the value of inductor and the lower cut off frequency is depends on the value of the capacitor. If we increased the periodicity ‘a’ along X the value of the inductance is decreased as the electromagnetic waves linkage to the different dipole element is less which results the upper cut of gradually increasing leads to the bandwidth enhancement. But if we increases the periodicity ‘b’ along Y direction the gap between the two dipole element increases which leads to decrease the capacitance value (since C=εA/d). As the capacitance decreases the capacitive impedance increases which leads to increase the lower cutoff frequency but due to the presence of the inductive impedance in the total impedance term the increase of frequency is not so 49
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
high as for change in inductance value. Hence the bandwidth variation with the periodicity along Y is small compared to the variation of periodicity along X.
b=0.75λ, W=L/10 Resonant Frequency=9GHz
Table-1
a (in λ)
Return Loss (dB)
0.5 0.6 0.7 0.8 0.9 0.95
-33.15 -35.18 -36.32 -37.15 -38.06 -38.55
Lower 10 dB cutoff freq. (GHz) 8.82 8.82 8.83 8.84 8.85 8.85
Higher 10 dB cutoff freq. (GHz) 10.12 10.21 10.43 10.67 10.86 11.13
Higher 10 dB cutoff freq. (GHz) 10.26
BW (GHz) 1.3 1.39 1.6 1.83 2.01 2.28
IV. CONCLUSION In this paper return loss & bandwidth of the FSS structure consists of simple half wave dipole structure resonating in a single frequency for different periodicities have been studied. From the basic electromagnetic equations the transmission coefficients (in dB) is plotted against the frequency using the MATLAB programme. In this paper in finding the transmission coefficient the standard basis function for the dipole element has been used. In future this work can be extended for any other type of FSS element such as cross dipole, Jerusalem cross or any other type by using the proper basis functions. REFERENCES [1] [2]
Table-2 a =0.5λ, W=L/10 Resonant Frequency =9GHz
[3]
b (in λ)
Return Loss (dB)
0.5
-51.33
Lower 10 dB cutoff freq. (GHz) 8.45
0.6
-55.91
8.6
10.32
1.72
0.7
-58.96
8.82
10.2
1.38
0.8 0.9 0.95
-55.98 -62.69 -76.66
8.9 8.91 8.95
10.39 10.3 70.35
1.49 1.39 1.4
BW (GHz)
[4] [5]
1.81 [6]
[7]
[8] 80
[9] Return Loss (dB in negative)------>
Return Loss vs Periodicity 70
[10]
60
Periodicity 'b'
[11]
50
[12] Periodicty 'a'
40
[13] 30 0.5
0.6
0.7
0.8
0.9
R. Ulrich, “Far-infrared Properties of Metallic Mesh and its Complementary Structure,” Infrared Physics. vol. 7, pp. 37-55, 1967. S.W.Lee, G. Zarrilo, and C. L. Law, “Simple Formulas for Transmission through Periodic Metal Grids or Plates,” IEEE Transactions on Antennas and Propagation, vol. 30, pp. 904-909, 1982. R. Mittra, C.Chan, and T. Cwik, “Techniques for Analysing Frequency Selective Surfaces—a Review,” IEEE Proc. 76 (23, pp. 1593-1615), 1988. G. H. Schennum, “Frequency-Selective Surfaces for Multiple Frequency Antennas,” Microwave Journal. 16(5), 1973, pp. 55-57. P. P. Sarkar, D. Sarkar, S. Das, S. Sarkar, and S. K. Chowdhury, “Experimental investigation of the frequency-selective property of an array of dual tuned printed dipoles,” Microwave & Optical Technology Letters, vol. 31, no. 3, pp.189–190, Nov. 5, 2001. D. Sarkar, P. P. Sarkar, S. Das and S. K. Chowdhury, “An array of stagger-tuned printed dipoles as a broadband frequency selective surface”, Microwave & Optical Technology Letters, Vol. 35, No. 2, pp. 138 – 140, 2002. John P. Gianvittorio et al., “Self-Similar Pre fractal Frequency Selective Surfaces for Multiband and Dual-Polarized Applications” IEEE Transactions on Antennas and Propagation, Vol. 51, No.11, pp 3088-3096, November 2003. M.K.Pain et.al, “A Novel Investigation on Size Reduction of a Frequency Selective Surface” Microwave & Optical Technology Letters. Vol. 49, No.11, pp.2820-2821, November 2007. Douglas J. Kern et al., “The Design Synthesis of Multiband Artificial Magnetic Conductors Using High Impedance Frequency Selective Surfaces” IEEE Transactions on Antennas and Propagation, Vol. 53, No.1, pp 8-17, January 2005. B.A. Munk, “Frequency Selective Surfaces, Theory and Design” John Willey & Sons, 2000. T.K.Wu “Frequency Selective Surface and Grid Array” John Willey & Sons, 1995 Raj Mittra, R.C. Hall, C. H. Tsao “Spectral domain analysis of circular patch frequency selective surfaces”, IEEE Transactions on Antennas and Propagation, vol. 32 , pp. 533-536, May 1984. R.F.Harrington, “Time-Harmonic electromagnetic Fields”, McGraw-Hill, New York, 1961, pp. 130 and pp. 365.
1.0
Periodicity interms of wavelength (a,b along X & Y )---->
Figure-3 2.4
Bandwidth (in GHz)-------->
Bandwidth vs Periodicity 2.2 2.0 1.8
Periodicity 'a'
1.6 1.4
Periodicity 'b' 1.2 1.0 0.5
0.6
0.7
0.8
0.9
1.0
Periodicity in terms of wavelength (along X & Y direction)----->
Figure-4 50
Department of ECE, Haldia Institute of Technology, Haldia
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
51
Optimized ISA Based Microcontroller for Small Scale Applications Magnanil Goswami
Abstract— Microcontrollers find extensive use in various control applications in the modern world. A microcontroller has the CPU, Memory, I/O Interface and much of the remaining circuitry of a basic computing system within the same Integrated Circuit (IC). A microcontroller can also be implemented on a programmable logic device (PLD) using a Hardware Description Language (HDL) to carry out the intended operations. Such microcontrollers are termed as soft-core microcontrollers. This study includes the development of a 4 bit soft-core microcontroller with an optimized design style in terms of chip area utilization and internal signal requirement. The system blocks and the behavior of these blocks are instantiated in the form of independent design modules and finally they are brought together under a single high-level module to make the whole system deliver the intended operations in the form of a fully functional microcontroller, when implemented on any programmable logic device. All the sub-modules are simulated separately, in turn the whole microcontroller to ensure correct functionality within a host environment such as a personal computer; prior to loading the design on the target device. Finally, all the design files are placed together in the floorplan for hardware implementation. The internal resources of the microcontroller indicate that it has a 4 bit buffered output port and can operate on 11 general purpose instructions, which can be very easily scaled-up or scaled-down according to the hardware resource availability of the target device and prescribed application needs; by exploiting the simple maneuverability of this design. The relevant properties of this microcontroller, the design steps and the functionalities are tested by means of a tiny benchmark program in this paper. Keywords- Microcontroller, Soft-Core, Programmable Logic Device, Hardware Description Language, Integrated Circuit, Benchmark.
I. INTRODUCTION The modern day IC based conventional microcontrollers sweep a wide range of applications. But the major constraints associated with such microcontrollers are issues like component obsolescence, device incompatibility, and lack of flexibility. These issues can be duly addressed by a soft-core microcontroller, which affords the liberty to its users to bring necessary changes to the microcontroller by simply altering the underlying code as proposed in the earlier works [1-4].
Magnanil Goswami, Department of Electronics & Communication Engineering, Supreme Knowledge Foundation Group of Institutions, Mankundu, India, Mobile No. +919733007844, (e-mail:
[email protected]).
While addressing issues related to implementation of the soft-core design, there have been many proposals such as Field Programmable Gate Array (FPGA) based approach. But FPGAs have got certain setbacks, making them unfit for small scale applications: (a) the number of segments required by interconnect signals is not predictable in an FPGA, resulting in fluctuating delays, (b) due to fine granularity of logic cells in most FPGA structures, more logic cells are required to implement any function, (c) initial investment is very high. These problems can be efficiently resolved with a Complex Programmable Logic Device (CPLD) based implementation. Themed on the merits of a soft-core design, this paper represents a novel approach of developing an optimized 4-bit soft-core microcontroller, to meet the requirements of small scale applications. The design flow can be segmented into two lobes: (a) Hardware Design: It commences with the preparation of design specification; keeping in mind the size and area constraints of the PLD [1],[3] followed by iterative HDL coding, synthesis, compilation and simulation, as stated in [5],[6], till error-free code is obtained within the host environment. (b) Hardware Implementation: Here the design is downloaded into the PLD [1-4] using any standard interface such as Joint Test Action Group (JTAG) to ensure its operability under physical (target) environment by means of benchmark [6]. A module based hierarchical approach is adopted here while constructing this microcontroller; initially every hardware unit to implement is introduced as a distinct low-level module in the design and finally all modules are cumulated under a single high-level module. In order to harness optimization, in terms of chip-area utilized and number of internal-signals used, the Control Unit, the Arithmetic and Logic Unit, and the Status Flag Unit are clubbed together to form a single module named Controller in this design, without affecting the correctness of operability of the soft-core microcontroller. II. SYSTEM SPECIFICATION The microcontroller block-diagram along with a simplified bus structure is illustrated in Figure 1. Each block depicted here represents a module to be designed. These modules are designed separately using top-down design approach. Buses provide connections between modules. There are basically two types of buses used in the design, direct bus and common bus. Direct bus connects two modules and it is strictly shared between the connected modules. There are two direct buses used in this design: (i) the one shared between Program Counter and ROM, and (ii) the one shared between RAM and Controller. Common bus is a one shared between several modules. There are two common buses used in this 51
Department of ECE, Haldia Institute of Technology, Haldia
52
Optimized ISA Based Microcontroller for Small Scale Applications
design: (i) Data bus: It is used to connect the Output Port and RAM modules to the Controller, and (ii) Opcode bus: It is used to connect the Program Counter, RAM, and Controller modules to the ROM. Separate control signals are required to keep track of the data-flow through these buses.
op-code and the four least significant bits (LSB) represent operand. It is the job of Program Counter Unit to keep track of the instruction being executed. The instruction-set comprises 11 instructions in total of arithmetic and logical, data transfer, conditional and unconditional branching type. Figure 3 shows the instruction set summary.
Figure 1: Microcontroller Block-Diagram
Figure 3: Instruction Set Summary
Control Unit, Arithmetic and Logic Unit, and Status Flag Unit are clubbed to form a single module called Controller in the design. The Controller performs its actions by means of a Finite State Machine. The microcontroller has a RAM in the form of four 4-bit registers and a ROM of sixteen locations, each 8-bit wide. Due to the static nature of the CPLD, both RAM and ROM show non-volatile characteristics. It has a 4-bit buffered output port for transmitting outbound data. The whole design is synchronized to a Clock signal fetched from the in-system clock of the CPLD and there is an active-low asynchronous Reset signal; which is used to set the internal parameters of the microcontroller to their initial conditions. The complete structure of this microcontroller can be concluded in the form of a design hierarchy with a top-level design module (entity-architecture pair) comprising of several low-level sub-modules (entity-architecture pairs) as depicted in Figure 2.
In the Machine Code column two ‘S’ bits indicate the source register and two ‘D’ bits indicate the destination register. The four ‘A’ bits are used to point towards the offset address for any conditional or unconditional branch instruction. The ‘X’ bits stand for Don’t Care values, i.e., these bits can be either zero or one. The Carry Flag column indicates whether the relevant instruction affects the carry flag or not. The result obtained from any arithmetic and logic instruction is stored back to the destination register specified in that instruction by default.
Figure 2: Design Hierarchy III. INSTRUCTION SET ARCHITECTURE The term Instruction Set Architecture (ISA) signifies that the operation of this microcontroller is determined by the instructions it executes. It defines the data-path, control-path and everything else inside. The microcontroller can process 4-bits of data at a time. The overall length of an instruction is 8-bits, where the four most significant bits (MSB) represent
IV. SIMULATION AND RESULTS The soft-core microcontroller is coded in Very high speed integrated circuit Hardware Description Language (VHDL) within Xilinx Integrated Simulation Environment (ISE) and synthesized using Xilinx XST. Then the design is implemented on XC95108-7PC84 CPLD using Xilinx iMPACT and Xilinx PACE tools. The final implementation is simulated further with a preloaded tiny program inside the ROM of the microcontroller. The program used here as benchmark is given in Figure 4.
Figure 4: Benchmark Program Complying to the primary objective of evaluating the functionality of the designed microcontroller the program represents the following operations to perform: two RAM registers namely R0 and R1 are pre-fetched with 4-bit binary values “1001 in binary” and “0110 in binary” respectively. At first, these values are added. If the result of this addition generates a carry, then the value stored in register R2 (i.e. “0011 in binary) is sent to the output port else the value of 52
Department of ECE, Haldia Institute of Technology, Haldia
53
2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
register R3 (i.e. “1100 in binary”) appears at the output port (i.e. which is reflected at the ‘prt’ in Figure 5). Op-codes and operands have to be fed to their respective memory locations prior to downloading the design into the target system. The instruction mnemonics mentioned in the program are simply indicative in nature. So they cannot directly be attached with the design. Rather, to make the microcontroller perform any intended operation, it is mandatory to feed the appropriate Machine Code (as mentioned in Figure 3) that represents the associated task. The simulation result obtained using ModelSim simulator is provided in Figure 5.
Figure 5: Simulation Waveform According to the values fed to the RAM & ROM, and the operations being performed, the microcontroller is expected to show the value “1100” (in binary) at its output port after the completion of program execution. Result obtained through simulation exactly conforms to the expected values. Table 1 summarizes the hardware resources utilized by the microcontroller in terms of the number of macrocells, product terms, functional blocks, registers, and pins used with respect to the maximum available resources, while implementing on XC95108 CPLD device with a PC84 type package variant and a speed grade of -7.
Table 1: Hardware Resource Summary The clock and reset signals used by this microcontroller are automatically mapped onto the global clock net (GCK) and global set/reset net (GSR) by the Xilinx iMPACT floorplanning tool respectively.
From the power data obtained through the fitter report generated by Xilinx ISE, it can be inferred that all the macrocells used by this design are operating in a high performance mode (MCHP) and every occupied functional block is in a saturated state. V. CONCLUSION & FUTURESCOPE Apart from combating conventional problems like component obsolescence and restoration to backward compatible versions this approach of developing soft-core microcontroller has got some added advantages too: the policy of merging Control Unit, Arithmetic and Logic Unit, and Status Flag Unit within a single design module significantly reduces the number of interconnecting signals utilized within the microcontroller as well as the amount of PLD chip-area occupied by the design. This optimization does not take toll on the microcontroller’s performance. Perhaps reconfiguration of the device becomes much simpler with this approach. Due to its structural compactness, the microcontroller can be implemented on low-end CPLDs as well, which makes it ideal for cost-effective prototyping. The design is highly portable too, i.e. it can be incorporated to a wide range of programmable logic devices. Hence it can be inferred straightaway that ‘this design approach of CPLD based optimized general purpose soft-core microcontroller’ is ideal for small-scale applications where cost-optimization stands to be one of the foremost criterion along with due functionality of the device. The implementation is not just confined to the limited periphery of small-scale applications, i.e. the device can not only be scaled down (miniaturized) but also it can be scaled up (maximized) in accordance with the hardware resource availability of the target device and the user application needs. All these scaling issues can be duly addressed by bringing minute changes only in the basic design code of the microcontroller. By means of advanced optimization strategies, if an Object-Oriented approach (by using Enumerated Data-types and User-defined libraries) can be incorporated to this design; then cumbersome issues like ‘Binary Machine Code Loading’ can be dealt in a pellucid manner. This will certainly increase the acceptability of the device and make it a popular alternative in the consumer arena. Although the concepts like Enumerated Data-types and User-defined libraries already exist in the domain of hardware description languages but the prime design challenge is how to encapsulate such techniques to fit within a very limited resource environment like CPLDs. It is worthy to mention that despite of the constraint in the level of approximation of VHDL, confined up to gate-level only; still each aspect associated with this microcontroller can be utilized with further efficiency and flexibility by devising prudent design strategies and smarter coding techniques. By the dint of Verilog coding, which has a design approximation capability extended up to the transistor-level, several internal parameters associated with this design can be redefined in a more optimized manner for the sake of imparting a more flexible and optimized design strategy in order to harness a better end-product from all regards.
53
Department of ECE, Haldia Institute of Technology, Haldia
54
Optimized ISA Based Microcontroller for Small Scale Applications ACKNOWLEDGMENT
The author tenders due obeisance to the whole sanctum of Haldia Institute of Technology and Supreme Knowledge Foundation Group of Institutions for providing all necessary aids during the course of work. A special note of gratitude goes to Mr. Asim Kumar Jana, Dr. Jaydeb Bhaumik, Prof. Malay Kumar Pandit, Dr. Sunandan Bhunia of Haldia Institute of Technology and Prof. Baidyanath Biswas, Sri. Goutam Kumar Das, Dr. Soumen Khatua, Prof. Tarun Kumar Dey of Supreme Knowledge Foundation Group of Institutions for nurturing the zeal of excellence. REFERENCES [1] [2]
[3]
[4]
[5] [6]
Alan E. Clapp, and Thomas L. Harman, “Combining Microcontroller Units and PLDs for Best System Design”, IEEE Journal, 1994. Nalan Edards, and Mustafe Gunduzalp, “Design of an 8 Bit General Purpose Microcontroller with Sea-of-Gates Design Style”, IEEE Journal, 1997. Christian Piguet, Jean-Marc Masgonty, Claude Arm, Christian Iseli, Serge Durand, Thierry Schneider, Jean Paul Bardyn, Flavio Rampogna, R. Pache, Ciro Scarnera, and Evert Dijkstra, “Low-Power Design of 8 bit Embedded CoolRisc Microcontroller Cores”, IEEE Journal, 1997. Amit Dhir, and Saeid Mousavi, “Using the Spartan™-II Family in combination an 8-bit microcontroller Soft IP to effectively penetrate Industrial instruments and Consumer Applications”, IEEE Journal, 2000. K. Kuusilinna, V. Lahtinen, T. Hamalainen, and J. Saarinen, “Finite State Machine Encoding for VHDL Synthesis”, IEEE Journal, 2001. Lara Simsic, “Using Programmable Logic for Embedded Systems”, Altera Corporation, 2003.
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Department of ECE, Haldia Institute of Technology, Haldia
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2nd National Conference on Advanced Communication Systems and Design Techniques NCACD 2012, 29 – 30th September
Real-time control of a DC Motor using Open Source Code Tools Ujjwal Mondal, Parthasarathi Satvaya, Sourav Kumar Das
Abstract— The presented work envisaged to explore the possibility of developing ultra-low cost experimental setup for teaching and learning Real-Time systems. The presented work demonstrates, in steps, the development of a real-time control system with free open source code softwares. The free suite utilized and experimented within the present work composed by Linux operating system and the Real Time Application Interface (RTAI) add-on, the Scilab Computer Aided Control System Design (CACSD) software and the Control & Measurement Device Interface (COMEDI) drivers. Scilab/Scicos, a free scientific software package for numerical computations and control system simulation is used with RTAI to provide hard real-time extensions in to Linux environment. The development and deployment platform are the same and consisted of the (i) Linux, (ii) Scilab/ Scicos (iii) RTAI and (iv) COMEDI drivers running in a PC. The investment is reduced to the hardware as well as in software cost, which consists of a standard PC, dc motor and a COMEDI compatible acquisition board. The most obvious advantage of the proposed solution is that all the software or codes are free & available in the web. The whole ides is demonstrated by real time speed control of a dc motor using Pulse Width Modulation (PWM). Keywords—RTAI, CACSD, COMEDI, SCILAB/ SCICOS, PWM
I. INTRODUCTION Rapid Control Prototyping (RCP) requires two components [1, 2] Viz. Computer Aided Control System Design (CACSD) software and a dedicated hardware with a hard real-time operating environment. Popular & widespread RCP environments are based on the commercial software Matlab/Simulink/Realtime-Workshop (RTW) - Real Time Windows Target (RTWT) CACSD software or LABVIEW which can be used to generate and compile codes for different targets. The main disadvantage of this solution is the cost of the software. The proposed solution overcomes the said problem as it can be freely downloaded from the web. Development system is based on Scilab/Scicos and Linux RTAI, a hard real-time extension of the Linux operating system [3]. This environment allows to quickly creating real-time controllers for real plants by generating and compiling the full control application directly from the Scicos scheme.
Ujjwal Mondal, Department of Electrical Engineering, Haldia Institute of Technology, Haldia, India, Mobile No.9433716321, (e-mail:
[email protected]). Parthasarathi Satvaya, ,Department of Electrical Engineering, Haldia Institute of Technology, Haldia, India, Mobile No.9433556439, (e-mail:
[email protected] ) Sourav Kumar Das, Department of Electrical Engineering, Haldia Institute of Technology, Haldia, India, Mobile No.9433436800, (e-mail:
[email protected] )
A real time system must respond to a signal, event or request fast enough to satisfy some time constraints with extreme reliability. In order to get a real-time operation a standard kernel must be configured in a Linux base and before this configuration it will include the patching of Hardware Abstraction Layer (HAL) or Adaptive Domain Environment for Operating Systems (ADEOS) with the kernel. After patching and configuring the kernel (to make it real time compatible), installation of the RTAI package must be carried out including rtai-lab and comedi. After this whole process, a set of kernel modules are created in the user specified directory (“/usr/realtime”). Loading these modules, the real-time functionality is obtained [4]. In this stage keeping the entire previous configuration we should include COMEDI support over RTAI. The RTAI package with rtai-lab and COMEDI can be access through Scilab, when RTAI with COMEDI add-ons to Scilab and loads COMEDI modules. Scilab/Scicos gives the GUI to make RT simulation and as well as to generate codes and executable for RT operation [5]. In our experiments a COMEDI supported DAQ card is taken to set the RT target. Running the created RT executable in a Linux terminal we can observe the RT simulated signal through a CRO. Farther work may be the generating of RT control signal for a small plant. II. DEVELOPMENT SYSTEM A. Hardware 1. A P4 or equivalent processor 2. Minimum 512MB RAM 3. DC motor 4. Driver electronics circuit 5. Data Acquisition Card (DAQ) B. Softwares or codes 1. Operating System: Functional GNU/Linux environment, better with a Debian or a Debian-like (e.g. Ubuntu) distribution. 2. A Kernel: it is necessary to ensure the best when the kernel version of the Linux-OS is as close as possible to the kernel we are going to compile and to merge with the RTAI. 3. RTAI source code 4. Scilab source code 5. COMEDI and COMEDI-LIB source Another two supporting source codes are required to install. First one is “Mesa 3D” graphical library from and second one is the “EFLTK” graphic widgets library. Some software packages may have to upgrade and those are 55
Department of ECE, Haldia Institute of Technology, Haldia
56
Real-time control of a DC Motor using Open Source Code Tools
Automake, autoconf ,bison (for comedi) cpp, ftgl-dev (for efltk), gcc, g77, g++, gtk, libbind, libglu1-mesa-dev, libglut-dev, libfltk, libgtk-dev, libdrm-dev, libncurses, libperl-dev ,mesa ( related all packages ),tcl8.4, tk8.4, tcl-8.4-dev, tk8.4-dev, tcllib-1.9, x11-proto. III. DEVELOPMENT PROCESS A. Software development process in steps 1. Operating System: Functional GNU/Linux environment, (experimented with Ubuntu 6.06) 2. Unpacking of kernel and RTAI source codes in the directory “/usr/src” in the installed Linux. To ensure the best performance, the kernel version we are going to compile and to merge with the RTAI, should be as close as possible to the kernel version of the Linux-OS. 3. Patching of the HAL or ADEOS over the kernel under configuration. 4. Configuring the kernel for real time applications. 5. Compilation and Installation of the newly configured kernel. 6. Updating of the boot loader to access newly installed kernel. 7. Mesa and EFLTK installation 8. Installation of COMEDI and COMEDI-LIB 9. Configuration, compilation and Installation of RTAI. 10. Installation of Scilab & RTAI add-on to it [6]. 11. Creating shared memory inodes for the activation of RTAI and COMEDI. 12. Loading RTAI, COMEDI and DAQ modules. B. Hardware development process 1) DC Motor Specifications A dc motor is taken for real time experimentation purpose with following details: Model name: RF-500TB-12560 Voltage: Operating range: 6 volts to 12 volts. Nominal=12 volts constant. At No load: Speed=5600 rpm. Current=0.03 amp. At maximum efficiency: Speed=4653 rpm. Current=0.11 amp. Torque=18 g-cm.(1.76 mN-m) Efficiency=67% At stall: Current=0.6A Torque=12 g-cm(11.76 mN-m).
Fig. 1 dc motor driver electronics
3) Data Acquisition Card A data acquisition card plugs directly into a personal computer's bus. All the power required for the A/D converter and associated interface components on the data acquisition card is obtained directly from the PC bus. For the presented work, RTAI with COMEDI provides a built-in graphical tools and libraries for data acquisition and analysis. “Advantech PCI-1711” data acquisition card is used which is a powerful and multifunction cards for the PCI bus and supported by COMEDI library. IV. EXPERIMENTATION A. Creating block diagram for Square wave generation Open the TERMINAL and type “scilab”, it will open scilab window and in the scilab window type ‘scicos’ and it will open untitled window shown in Fig. 2. Then open menu “edit” and Select palettes. In the Palettes, select Sources at the top of the pop-up window [7, 8]. This will open a window with a group of source blocks as shown in Fig. 3. Take the red clock on the Scicos diagram page. Open the RTAI-Lib palette in a similar way as before and it will look like Fig. 4. From the RTAI-Lib palette, take the “Square” block, “Scope” block & “COMEDI D/A” block and place it in the main Scicos window. Connect those blocks. After drawing the Block diagram, we should make the “super block”. So we should go to menu “Diagram” and select “Region to super block”. Cover al the blocks excluding the Clock and dragging the mouse i.e. we must draw an elastic frame around all the blocks as in Fig. 5 and it will make the required super block as shown in Fig. 6.
2) DC Motor Driver Electronics As a digital driver of the dc motor model RF-500TB-12560, we have taken L293D push-pull four channel driver. A little modification is done in the input section. For the safety of data acquisition card and PC, Optocoupler PC817 is used in the input section to keep Data Acquisition Card and dc motor driver circuitry optically coupled or isolated from direct contact (Fig. 1). Fig.2 Scicos Interface
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Fig.3 Scicos Source Blocks Fig.6 RTAI Super block
Double clicking on the super block we can again open those basic blocks to set parameters as shown in Fig. 7.
Fig.4 RTAI-Lib palette
Fig.7 Inside of Super block
Set parameters of Super-blocks: Square block- “Val[0]/amplitude=1”, “Val[1]/time period=1” and “Val[2]/On time=0.5” & leave other parameter to default value. Comedi block- Keep default value (channel 0) Scope block- Keep default value. Close the window and set clock parameter. Clock: Set “Period =0.001” and “Init Time=0” Connect the analog output (Channel 0) and analog ground of the signal acquisition card to a real oscilloscope. For example: with the “advantech PCI-1711” DAQ card, connect pins 58 (DAC0OUT) and 57 (AOGND).
Fig.5 Making of RTAI Super block
B. Checkout of RT signal through X-rtailab and Oscilloscope Now going to the “RTAI” menu select “Set Target” and click over super block. Now we have to compile using “RTAI-Code gen” again through menu “RTAI”. If 57
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Real-time control of a DC Motor using Open Source Code Tools
compilation is properly done then on the scilab prompt a group of information will come with the lat line “Created Executable” as in Fig. 8.
Fig.10 xrtailab Interface
Fig.8 Compilation Information
Let the new executable is renamed as “rt_square” and saved in the current directory. • In one terminal type: “rt_square –v” to run the executable in Hard RTS mode with verbose output as in Fig. 9. • In another terminal type: “xrtailab” to open a GUI & from “File” menu select “Connect” and it will give the option to set the target. Click on “OK” as shown in Fig. 10. • A square wavelike wave form can be seen on the Oscilloscope. In xrtailab going to “View” select “parameters” and “scope”. Now visualization parameters can be adjusted in the “xrtailab” to see the square wave properly in to the oscilloscope as shown in Fig. 11, 12.
Fig.11 Square wave in the scope of xrtailab
Fig.9 Running the Executable Fig.12 Square wave in the Oscilloscope
C. Real-time control of dc motor using PWM Pulse-width modulation (PWM) or duty-cycle variation methods are commonly used in speed control of DC motors. 58
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The duty cycle is defined as the percentage of digital ‘high’ to digital ‘low’ plus digital ‘high’ pulse-width during a PWM period i.e. PWM the output voltage is the average of the supplied voltage over ON/OFF time. Vav =Vs*D= (Ton*Vs)/(Ton+Toff) When Vav=average voltage, D= duty cycle, Vs =Supply Voltage, Ton=On time of the signal, Toff=Off time of the Signal. Controlling the period (Ton+Toff) and on time (Ton) of input pulses, the speed of the dc motor can be controlled as the dc motor speed varies with the variation of the average amplitude of input voltage to it. Steps to control the dc motor are as follows: Generate a real time square wave (Sec-IV). Take that output signal from DAQ. Fed that signal to the input section of a DC motor driver (Sec. III). Connect the DC motor driver output to the input of DC motor (SEC. III). Change the parameters on the fly in “xrtailab” interface (Fig. 11). Choose the “source” block parameter and set values as : Val (0) = 1 (amplitude of pulses) Val (1) = 0.0009 (Ton + Toff = Period of pulse) Val (2) = 0.0002 (Ton) Now varying Val (2) = 0.0002 to 0.0009 (Pulse Width Modulation) on the fly, speed of the motor can be changed. It has been successfully experimented and variation in speed of the motor is observed. The dc motor with following details is connected to the driving circuit. Supply voltage to driver circuit= 5V. Voltage across motor=5 volts. Current=0.03 amps Short circuit current=0.5 amps. A set of results is tabulated in Table 1.
some of the difficulties by tracing through the development steps and pitfalls. In conclusion, this paper shows that with some adjustments and moderate additional effort, control system designing tools Scilab/Scicos and RTAI with COMEDI can successfully replace the costly commercial alternatives for teaching and learning Real Time Systems. REFERENCES [1]
[2]
[3] [4] [5] [6]
[7]
[8]
R. Bucher and L. Dozio, Paolo Mantegazza, “Rapid Control Prototyping with Scilab/Scicos and Linux RTAI”, The Vlsi Journal (2004) pp. 739-744 J. Jang, C. K. Ahn, S. Han, and W. H. Kwon, “Rapid Control Prototyping for Robot Soccer System using SIMTool,” in ProcSICE-ICASE International Joint Conference 2006, Busan, Korea, Oct. 2006, vol. 2, pp. 3035–3039. R. Bucher and L. Dozio, “CACSD with Linux RTAI and RTAI-Lab,” in Real Time Linux Workshop, Valencia, 2003. Giovanni Racciu and Paolo Mantegazza. RTAI 3.3 User Manual, 2006. URL www.rtai.org. “RTAI-Lab Tutorial” by Roberto Bucher, Simone Mannori and Thomas Netter, 2006 Ramine Nikoukhah and Serge Steer, SCICOS - A Dynamic System Builder and Simulator, User’s Guide, 1998. http://www.scilabsoft.inria.fr/doc/scicos/scicos.htm Stephen L. Campbell, Jean-Philippe Chancelier, and Ramine Nikoukhah. Modeling and Simulation in Scilab/Scicos. Springer, Berlin, Germany, 2006. URL www.scicos.org Roberto Bucher and Silvano Balemi “Scilab/Scicos and Linux RTAI –A unified approach” 2005 IEEE Conference on Control Applications Toronto, Canada, August 28-31, 2005
TABLE 1
Sl. No.
Duty cycle ( %)
Voltage across motor (V)
Current through motor (A)
1 22.22 1.11 0.007 2 33.33 1.67 0.010 3 44.44 2.20 0.014 4 55.55 2.78 0.017 5 66.66 3.34 0.021 6 77.77 3.91 0.025 7 88.89 4.44 0.028 8 99.99 4.91 0.031 Table 1: Parameters reading during RT control of dc motor V. CONCLUSIONS Successful implementation of the real-time system development and deployment were demonstrated by Speed Control of a DC Motor using Pulse Width Modulation. The advantage of the proposed solution is that all the softwares are freely available on the web. However, unlike the (costly) commercial packages, the information available about these free softwares is scanty or sometimes confusing. The contribution of this work is the attempt to remove 59
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Modeling and Performance Analysis of Ballistic 1-D Carbon Nanotube Field Effect Transistor (CNTFET) Sudipta Bardhan and Hafizur Rahaman, Senior Member, IEEE
Abstract— This paper deals with the compact modeling of an ballistic carbon nanotube field-effect transistor (CNTFET) and the performance analysis of the developed model using various characteristics We propose design-oriented compact models for ballistic CNTFET. We are interested more particularly to the drain current and the quantum capacitance as a function of the gate voltage (VGS) and drain voltage (VDS) for various values of the nanotube diameter. These models have been simulated and the results that are obtained were in excellent agreement with the theoretical calculations. Index Terms— CNTFET, diameter, ballistic transport, compact modeling
I.
INTRODUCTION
The miniaturization has always a key role in electronic evolution: at each generation the miniaturization allows to obtain higher speed, lower power dissipation, lower costs, and higher number of gates on chip. Nowadays, the known devices are very smaller, and a further reduction in size would give rise to tunnel effects thus degrading the whole performances. Therefore, the scientific community is looking for a new kind of devices, able to work better at nanometer scale, which is the ultimate limit in miniaturization. Carbon nanotube field effect transistors (CNTFETs) are a new kind of molecular device. They are field effect transistors, using a CNT as channel and are regarded as an important contending device to replace conventional silicon transistors [1]. As it is known, the CNTs consist in a hexagonal mesh of carbon atoms wrapped in cylinder shapes, some time with closing hemispherical meshes on the tips These tubes could have various radii, lower than two nanometers and since they could be extended also several millimeters, they have a huge length/diameter ratio, making them unidimensional structures. Depending on the mesh torsion denoted as chirality electronic band structure of CNT changes bandgap may appear making them semiconductors or may not appear making them conductors. Furthermore, the CNT behavior as semiconductor has an energy gap inversely proportional to their radius. S.Bardhan, Electronics & Instrumentation, Haldia Institute of Technology, Haldia, India, (e-mail:
[email protected]). H. Rahaman , School of VLSI Technology, Bengal Engineering and Science University, Shibpur, Howrah 711102, India (e-mail:
[email protected]).
This paper presents a novel surface potential based modeling technique for carbon nanotubes in their ballistic limit of performance with 1-D electrostatics. The model uses suitable approximations necessary for developing any quasi-analytical, circuit-compatible compact model. Both I-V and C-V characteristics have been modeled and performances have been changed with diameter of carbon nanotube.
II. BALLISTIC CNTFETS The CNFET can typically be used in the MOSFET-like mode of operation with near ballistic transport [2]. This paper models ballistic CNFET with 1-D electrostatics in the upper limit of performance and uses the proposed model to simulate digital logic blocks. The computational procedure for CNFETs is given below[3]. A particular value of drain voltage VDS and beginning-of channel control potential ψS . The control voltage is the amount by which the energy bands move up or down due to the application of a gate voltage VG. The total charge on the nanotube have to compute for a given VDS and ψS . The charge at the top of the barrier has contributions fiom both the source and the drain. All the +k states at the barrier-top are filled by the source while the -k states are populated by the drain [3]. Thus
D(E) [ f (E S) f (E D)].dE 2 EC
nCNT
(1)
where n-CNT is the number of carriers in the channel, µS (µD) is the source (drain) Fermi level, ES is the bottom of the conduction band, f(E) is the probability that a state with energy E is occupied (Fermi-Dirac distribution) and D(E) is the nanotube density-of-states (DOS). Thus the total charge for each sub-band can be thought of as the sum of the charges contributed by the source and the drain, individually. Also let us assume the source Fermi level as the reference level and hence, µS = 0 and µd = -qVDS where q is the electronic charge. Drain current ID for each sub-band [6] is obtained as:
ID 4eKBT [ln(1 exp( S )) ln(1 exp( D ))] h S 1 where ( ) KT
(2)
The gate bias VG, required to produce the ψs assumed based on the electrostatic capacitance relations of the capacitance model is determined as: 60
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Modeling and Performance Analysis of Ballistic 1-D Carbon Nanotube Field Effect Transistor (CNTFET) 61
S VG
QCNT CINS
(3)
where CINS is the insulator capacitance. Finally, we obtain the gate potential applied VG’ to determine the effective gate bias VG from VG ' VG VFB (4) where VFB, is the flat-band voltage. From a circuit engineering point of view, it is important to obtain device characteristics in terms of the terminal voltages, namely the drain voltage (VD), the gate voltage (VG) and the source voltage (VS), and to be able to obtain closed or quasi closed approximate analytical expressions for the drain current and the input capacitance.
suitable approximations necessary for developing any quasi analytical, circuit-compatible compact model (Fig. 1). Quasi static characteristics (I-V) have been modeled and validated against numerical models, with an excellent agreement. The computational procedure to evaluate the drain current ID and the total channel charge QCNT The main quantities used in the model are the surface potential ψS (or control potential) and the specific voltage ξ S(D) that depends on the surface potential, the subbands energy level Δ p and the source (drain) Fermi level µS(D).
III. QUANTUM CHARGE COMPUTATION With the knowledge of charge and surface potential as functions of gate bias, the gate input capacitance CG can be computed in terms of the device parameters and terminal voltages. The gate-input capacitance is given by
CG
QCNT QCNT S CG . VGS S VGS
(5)
The total charge can be split up into QS and QD and, hence, the total gate capacitance can also be split up into CGS and CGD (see Fig. 1).
IV. DETERMINATION OF THE SURFACE POTENTIAL The next step in the model development is to relate the control potential ψs with the effective gate bias VGS can be noted that when the gate bias VGS is less than the first equilibrium conduction band minima, ∆1, the total charge across the CINS, is very low and the control potential ψS follows the gate voltage VGS. Once the gate voltage exceeds ∆1 there is considerable charge buildup across CINS and the surface potential can no longer follow the gate voltage VGS. Thus ψS and VGS can be approximately related by the following simple equations[4].
VGS S 0
for VGS 1
VGS 1 for VGS 1
(6)
Where ∆1 is the equilibrium sub-band minima of the first subband. However the slope of the curve, α is a function of the applied VDS and the device parameters can be expressed as a polynomial of VDS as shown below:
0 1VDS 2VDS2
(7)
V. COMPACT MODEL DESCRIPTION First, we present a compact model [4,5] for CNTFETs with a classical behavior. The model is applicable to a wide range of CNTFETs with diameters varying from 1 to 3 nm and for all chiralities as long as they are semiconducting. The model uses
Figure 1. Schematic of the CNTFET compact model
CGD gate-drain capacitance, RD drain resistance CGS gate-source capacitance, VFB flatband voltage RS source resistance, ID drain current. The conduction band minima for the first subband are set to half the nanotube bandgap Δ1 with Δ1 _ 0.45/diam (in eV) [5]. The physical parameter diam is the nanotube diameter (in nm); it is one of the only three intrinsic parameters of our model, with the flatband voltage VFB and the TYP parameter (= +1/−1 for n- or p-type device) [5]. VI. RESULTS AND DISCUSSIONS The simulation results are obtained by using numerical simulator for ballistic CNTFET using a simple top-of –the barrier (Natori) approach. The I-V characteristics of Ballistic CNTFET has been successfully simulated and analyzed. As the voltage across the gate and the source of ballistic CNTFET is increased from 0 volts, the Fermi level of the nanotube moves closer to the conduction band. This band lowering effect causes barriers to develop at nanotube-metal junctions. The electrons which have enough potential will cross the barrier and flow into the tube, causing leakage current. The limiting value of current through the nanotube is described by the thermionic current component. In Transfer characteristics [Fig.2b,Fig.3b,Fig.4b,Fig.5b] for an applied drain voltage, the drain current will increase almost quadratically as soon as a gate voltage is applied & change of diameter, the current will be different. We can see from [Fig.2a, Fig.3a, Fig4a, Fig5a] that for a given Vgs, the current saturates at the region, i.e., when the applied Vds ≈ barrier height. At this point the barrier is entirely suppressed and there is maximum current flow through the channel & drain current will be function of diameter.
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Fig. [2c,3c,4c,5c] shows that Quantum capacitance Vs Gate voltage. The “quantum capacitance” is used by Luryi in order to develop an equivalent circuit model for devices that incorporate a highly conducting.
A. d =1.5nm and tOX =1.5 nm
Fig.3a
Fig.2a
Fig.3b
Fig.2b
Fig.3c Fig. 3: a- drain current ID VS. drain voltage VGS, b- drain current ID VS. gate voltage VGS ,c-Quantum capacitance VS. VGS for d=2 nm and tOX = l.5nm
C. d =2.5nm and tOX =1.5 nm
Fig.2c Fig. 2: a- drain current ID VS. drain voltage VGS, b- drain current ID VS. gate voltage VGS ,c-Quantum capacitance VS. VGS for d=1.5 nm and tOX= l.5nm
B. d =2nm and tOX =1.5 nm
Fig.4a
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Fig.5c Fig.4b
Fig. 5: a- drain current ID VS. drain voltage VGS, b- drain current ID VS. gate voltage VGS ,c-Quantum capacitance VS. VGS for d=3 nm and tOX = l.5nm
VII. CONCLUSION
Fig.4c Fig. 4: a- drain current ID VS. drain voltage VGS, b- drain current ID VS. gate voltage VGS ,c-Quantum capacitance VS. VGS for d=2.5 nm and tOX = l.5nm
D. d =3nm and tOX =1.5 nm
In this paper the compact model has been developed for the 1D ballistic Carbon Nanotube Field Effect Transistor. The performance of the empirical model developed was evaluated using various characteristics for variation of diameter. This model adequately explains the working of the ballistic CNTFET & diameter is one of very important scaling parameter for designing field.
REFERENCES [1] P. Avouris, M. Radosavljevi´c, and S. J.Wind, “Carbon nanotube electronics and optoelectronics,” in Applied Physics of Carbon Nanotubes. Fundamentals of Theory, Optics and Transport Devices, S. V. Rotkin and S. Subramoney, Eds.Berlin.Germany/Heidelberg,Germany:Springer-Verlag, 2005, ISBN: 978-3-540-23110-3 [2] A.Javey, et. al, “High K Dielectrics For Advanced Carbon Nanotube Transistors and Logic,” Nature Materials, 2002. [3] J. Guo et. al., “Assessment of Silicon MOS and Carbon Nanotube FET Performance Limits Using a General Theory of Ballistic Transistors”, ZEDM 02, Digest, pp.711-7 15.
Fig.5a
[4] A. Raychowdhury, S. Mukhopadhyay, and K. Roy, “Acircuit-compatible model of ballistic carbon nanotube field-effect transistors, ” IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 23, no. 10, pp. 1411–1420 ,Oct. 2004. [5] F. Pr´egaldiny, C. Lallement, and J. B. Kammerer, “Design-oriented compact models for CNTFETs,” Int. Conf. Des. Test Integr. Syst. Nanoscale Technol., 2006, pp. 34–39. [6]S. Datta, “Electronic transport in mesoscopic systems,” in Cambridge Studies in Semiconductor Physics and Microelectronic Engineering. vol. 3, New York: Cambridge University Press, 1995, ISBN 978-0-521599943-6.
.
Fig.5b
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Stability Analysis in CNT and GNR Interconnects Sandip Bhattacharya Bhattacharya, Subhajit Das, Debaprasad Das
Abstract—This paper analyzes the stability of carbon nanotube (CNT) and graphenenanoribbon (GNR) based interconnects for future VLSI technology node. In this paper we have analyzed the Bode stability of ofsingle-wall CNT, multi-wall wall CNT, GNR, and copper based interconnect systems. To analyze the Bode stability of different interconnect systems first we have used the RLC parameters of different interconnect systems for 16nm ITRS technology node. It is shown that densely packed single-wall CNT bundle based interconnect has highest gain margin for a wide range of intercon interconnect length (1 m length 100 m) as compared to the other interconnect systems. Index Terms—Carbon Carbon nanotube graphenenanoribbon (GNR), stability.
interconnect ect system by a bundle of single-wall CNT, multi-wall wall CNT, and GNR. The dimensions of the interconnectare are obtained from the ITRS corresponding to 16 nm technology node. Fig. 1illustrates 1 the RLC networkinterconnect systems.. The RLC equivalent circuit model is constituted with series connected resistance (R), ( inductance (L), ), and capacitance (C). (
(CNT),
I. INTRODUCTION With ith the advancement of VLSI Technology the interconnect dimensions are reduced from micron to submicron range and submicron to nanometer range. In the nanometer regime the traditional copper based interconnects will suffer serious problems due to increased resistivity and susceptibility to electromigration. The carbonnanotub carbonnanotube (CNT) and graphenenanoribbon (GNR) areproposed as the possible replacement for traditional copper (Cu) based interconnect systems [1]. CNT and GNR cansupport large current densities and have long mean freepaths. In this paper we have analyzed Bode stability ity in different CNT and GNR interconnect systems and compared the results with that of Cu based interconnects. The paper is organized as follows. Section II describes the formulation of transfer function of interconnect system systems in s-domain. Analysis off Bode stability is presented in Section III. The results are presented in Section IV, followed by conclusions in Section V. II. TRANSFER FUNCTION FORMULATION To investigate the stability of CNT and GNR based interconnect system, we have formulate formulated the transfer function of the interconnect system. We have modeled the Sandip Bhattacharya, Dept. of Electronics and Communication Engineering, Bengal College of Engineering and Technology Technology, Durgapur, India, Phone/ Mobile No. +91-9563559472 63559472, (e-mail:
[email protected]). Subhajit Das, Dept of Electronics and Communication Engineering Engineering, ADAMAS Institute of Technology, Barasat, India India, Phone/ Mobile No. +91-9800245339, (e-mail:
[email protected]). Debaprasad Das, Dept. of Electronics and Communication Engineering, MeghnadSaha Institute of Technology, Kolkata, India India, Phone/ Mobile No. +91-9433322395, (e-mail:
[email protected] yahoo.co.in).
Fig. 1: Equivalent circuit of CNT/GNR interconnects. The transfer function of the RLC circuit is given by
V ( s) 1 H ( s ) out V ( s ) ( LCs 2 RCs 1) in
(1)
whereR is the series combination of imperfect contact resistance (RC), quantum resistance (RQ), and ohmic resistance (RO), L is the series combination of kinetic inductance LK/4 and magnetic inductance (LM), and C is the series combination of electrostatic capacitance (CE) and quantum capacitance (CQ). The RLC parameters are obtained from [24] for SWCNT bundle, MWCNT and GNR based interconnects for 16 nm technology node. Substituting Sub the RLC values into (1) we have obtained obtain the transfer function of the interconnect system. III. BODE STABILITY ANALYSIS We have used the stability analysis model as shown in Fig.2 [5].A A single horizontal interconnect segment connected with load and driver is considered.We considered have applied a step input to the system to check the step response of the system. system To investigate the stability of the system we have considered three different conditions for stability: (i) whether the system is over damped, (ii) under damped, or (iii) critically damped. Generally damping condition is determined by damping ratio (ζ). If ζ> > 1, the system is over damped, ifζ if = 1, the system is critically damped, and if 0