chapter 4 pv inverter - system structure and control design

PV INVERTER-SYSTEM STRUCTURE AND CONTROL DESIGN

CHAPTER 4.

CHAPTER 4 PV INVERTER - SYSTEM STRUCTURE AND CONTROL DESIGN 4.1

PV

FED

THREE-LEVEL

INVERTER

FOR

UTILITY

INTERFACE In this chapter, the design of the single phase PV inverter power stage with MPPT capability is described, as shown in Fig. 4.1. Firstly, the inverter design specifications are given. Secondly, based on the specifications, the choice of the switching scheme is briefly described. Thirdly, the selection of the DC-link capacitor is discussed based on its lifetime and size. Following this, the design equations on DC-link capacitance are developed based on the power balance and double-line frequency ripple voltage. Following, the design guide for the output filter is discussed based on the IEEE-1547 standard [14] and the filter configuration is described. The system is applied with two main and important types of damping schemes.

Fig. 4.1.

Power stage configuration of the single phase PV inverter.

SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

49

CHAPTER 4.


The power circuit topology includes an LCL filter as a interface between the inverter and grid. Sinusoidal pulse width modulation (SPWM) with unipolar switching, LCL filter is employed to achieve decreased switching ripple with only a small increase in filter hardware as compared to that of the L or LC filter with bipolar switching. The voltage controller produces the gird current reference by comparing the actual dc link voltage with the maximum power point voltage given by the MPPT algorithm, which is then multiplied with the grid voltage template provided by the grid synchronizer. The control voltage produced by the injected grid current regulator is used to generate pulses for the grid connected PV inverter. The basic specifications used in simulation for the inverter design are listed in Table 4.1. Rated grid voltage* Rated grid current Switching frequency Nominal DC-link voltage Percentage DC-link voltage ripple TABLE 4.1 :

10V (RMS) 6A (RMS) 10kHz 21.1V 10%

Specifications of PV inverter.

A conventional method of grid synchronization for grid connected DC/AC inverter is to duplicate the grid voltage so that output current reference has the same phase as the grid voltage. While this method is simple, it carries the distortions and transients from the grid to the output current, which is undesirable for grid connected applications. In addition, this method of grid synchronization cannot provide inverters the ability of controlling reactive power flow. A full bridge configuration with SPWM unipolar voltage switching scheme is used (as the switching circuit of the inverter. By selecting the full bridge configuration, the minimal allowed DC-link voltage can be set to be the peak value of the AC grid voltage (plus margins). Thus, power MOSFETs, instead of higher voltage IGBTs, can be used as the switching devices which enable use of a high switching frequency (> 10 k Hz ) without introduction of excessive switching loss. Using unipolar voltage switching scheme effectively moves the first major harmonic of the bridge output voltage from order m f  1 to the order of 2m f  1 , where m f is the frequency modulation ratio - the ratio between the switching frequency and the fundamental frequency. The output filter thus reduces its size for “free”. Since this full bridge configuration with SPWM unipolar voltage switching scheme is SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

50


CHAPTER 4.

commonly used in voltage sourced inverters. The DC-link capacitor is important for the power decoupling between the input power to the inverter and their output power to the utility grid. Normally, electrolytic capacitors are used for their large capacitance and low cost. However, in PV applications where the inverters are usually exposed to outdoor temperatures, the lifetime of such electrolytic capacitors is shorten drastically. Film capacitors are a clear the alternative given their long life expectancy and wide operating temperature range. Unfortunately, film capacitors are far more expensive than the electrolytic ones in term of cost per farad, hence the size of the capacitance has to be smaller to keep the price of the capacitor acceptable. However, smaller capacitance would weaken the power decoupling ability of the DC-link capacitor which may cause DC-link voltage fluctuations that lead to distortion of the inverter output current to the grid. There are two factors that can cause undesirable DC-link voltage variations. The first one, which can be referred to as the transient DC fluctuation is caused by the rapid increase/decrease of the input power flowing into the DC-link capacitor. However, in PV application, the chance of rapid DC input power variation is little due to the nature of the sun. Therefore, the transient DC fluctuation is not a major concern when designing a VSI for PV application. The second factor, which can be referred to as the AC fluctuation of the DC-link voltage is caused by the double-line frequency ripple power generated from the grid side (refer to equation (3.15)). This double-line frequency ripple component can couple through the DC voltage control loop to cause a significant amount of distortion on the current reference signal. A notch filter or an average filter can be applied to the feedback signal of the DC-link voltage in the voltage control loop, so that this double-line frequency ripple component is filtered out before entering the voltage controller. This prevents the output current from having distortions that are resulted from the DC voltage control loop. Then the capacitance of the DC-link capacitor can be easily obtained given the magnitude of the maximum allowed ripple voltage.

C DC 

S 2 g V dcVdcmax , ripple n

(4.1)

Finally, substituting, these parameters from the inverter specifications

C DC 

60  2.16 mF 2  314  21  2.1

Based on this, a 2.2mF capacitor is selected for the simulation study. SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

51

CHAPTER 4.

4.2 4.2.1


CONTROL SYSTEM COMPONENTS DESIGN LCL FILTER DESIGN

Traditionally, the grid interface filter was a simple first-order L filter. However, such a filter is bulky and inefficient, and it cannot meet the regulatory requirements specified in [14] and [15] for the switching range of mid- to high-power inverter applications. Hence, there has been a significant interest in higher order filters, particularly LCL filters, to meet the grid interconnection standards at significantly smaller size and cost. The dynamic performance of the grid-connected voltage source converter with a third-order LCL filter was comparable to the performance of the grid-connected voltage source converter with a first-order L filter. However, selecting the parameters of the LCL filter is a more complicated process compared to those of an L filter. A step-by-step procedure and the basic guideline for the selection of the LCL filter parameters for damping the LCL filter of a front end 3-phase active rectifier was proposed in [16]. The design of filter from the point of view of efficiency considering the current harmonic requirements of IEEE 1547 (which are derived from IEEE 519-1992 [15]) as the primary criteria for the design of the filter, but with a goal to reduce the size and weight (and therefore cost) of the individual filter components was proposed in [17]. The lowest order harmonics that appeared on the harmonic spectrum of the output voltage of the full-bridge are at the sidebands of 2 m f .Since the inverter switching frequency is set to be greater than the audible frequency (10 k Hz ), the lowest order of the harmonics of the inverter is

2m f  1  399 .

According to the IEEE Distributed Resource (DR)

interconnection standard, IEEE-1547, any current harmonic which has an order that is greater than 35 must have a magnitude that is no greater than 0.3% of the rated current of the DR output. (The original harmonic regulation table in IEEE-1547 can be found in Appendix A). Thus, the primary design guide for the inverter output filter is to make the magnitude of the major harmonic current of the inverter less than 0.3% of the rated current. A third order LCL filter, Fig. 4.2(a), was used to meet the aforementioned harmonic reduction target. Assumption made here is that the ac supply voltages contain only positivesequence fundamental component, which then means that they can be treated as short circuits with zero impedance when performing system stability and harmonic analyses, Fig. 4.2(b). SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

52

CHAPTER 4.


(a)

(b)

Fig. 4.2.

Output LCL filter of the inverter.

v in stands for the terminal voltage or the output voltage of the full bridge, which consists

of a fundamental component and higher order harmonics components. Solving the grid current in Laplace domain using superposition yields the following transfer functions: I g s 

Vin s  V

g

sC d Rd  1 s L1 L2 C d  s C d Rd L1  L2   s L1  L2 

(4.2)



s 2 L1C d  sC d Rd  1 s 3 L1 L2 C d  s 2 C d Rd L1  L2   s L1  L2 

(4.3)

0

I g s 

V g s 



Vin  0

3

2

From the above equation (4.2) and (4.3), one can observe that the grid current i g t  depends on both the terminal voltage vin t  and the grid voltage v g t  . As discussed before, the output filter design will not take harmonic grid voltage distortion into consideration because IEEE-1547 allows the presence of harmonic current distortion caused by grid voltage distortion. Therefore, equation (4.3) will not be taken into consideration in output filter design. The terminal voltage vinv t  contains a fundamental component and higher frequency components which could result in higher frequency distortions on the grid current i g t  . Therefore, Equation (4.2) is used as the output filter transfer function as:

H f s  

I g s 

Vin s  V

 g 0

sC d Rd  1 s L1 L2 C d  s C d Rd L1  L2   s L1  L2  3

2

(4.4)

The RMS value of the higher order frequency components of vt(t) can be calculated using the look up table (refer to Appendix A), given the nominal DC-link voltage V dcn . SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

53

CHAPTER 4.


Vin  jh g  

1 2

 

The VˆAo

h

Vˆ  2

Vdcn 1    k h Vdcn 2 1 / 2V 2 Ao h n dc

(4.5)

is the peak value of each harmonic voltage between one leg of the bridge and

the center point of the DC-link. k h  

Vˆ 

Ao h n dc

1 / 2V

is tabulated as a function of m a and the

orders of harmonics (refer to Appendix B for details about the harmonics table). table). Therefore, combining equation (4.4) and (4.5), the RMS value of the harmonic current can be expressed as: I g  jh g  

1 2

 H f  jh g   k h   Vdcn

(4.6)

Remember that I g  jh g  cannot exceed 0.3% of the rated current of the inverter. Therefore, given the RMS value of the rated grid current the following relationship can be derived: H f  jh g  

0.3%  2  I grated

(4.7)

Vdcn  k h 

Given from Appendix B, the worst case k h  at 2m f  1 is 0.37. Then, substituting the parameters from the inverter specification and using a switching frequency of 10kHz, we get the magnitude of the filter transfer function H f  jh g  at 2m f  1 . H f  j 2m f  1314   H f  j 125286  

0.3%  2  6  3.27  10 3  50 dB 21  0.37

(4.8)

At   125286 , the magnitude of H f  j 125286  from the magnitude plot of H f  j  should at most be -50dB. This is the guideline of choosing the values for L1 , L2 , C d

and R d .Selection of damping resistor value for passive damping must be sufficient to avoid oscillation, but losses cannot be so high as to reduce efficiency. Hence a careful design is required which takes into consideration the losses and the stability margin. The tuning of different passive damping methods and an analytical estimation of the damping losses allowing the choice of the minimum resistor value resulting in a stable current control and SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

54

CHAPTER 4.


not compromising the LCL-filter effectiveness has been proposed in [18]. So initially the damping resistor value is considered to be zero and the value total sum of the inverter side and grid side inductance L1  L2   0.1 p.u as proposed by [16]. Finally, the LCL filter components are chosen following this guideline and the values of each component are shown in Table 4.2 and the MATLAB magnitude plot is shown in Fig. 4.4.

Generic magnitude plot of the output filter transfer function H f s  .

Fig. 4.3.

The value of damping resistor is selected based on the criteria

Rd  Rdsw Rdsw 

(4.9)

1 C f 2f sw

L1 [mH] 1

L2 [mH] 0.5

TABLE 4.2 :

Fig. 4.4.

C d [µF]

R d [Ω]

2.5

4

LCL filter parameters.

Magnitude plot of using selected filter component values.


55

CHAPTER 4.


The consequent resonant frequency is 5.5 kHz, which is approximately one-half of the switching frequency and thus satisfying the criteria that 10   g    res   sw .The impedance of the filter capacitor at the resonant frequency is 12Ω. The damping value is chosen as onethird, i.e., 4Ω which also satisfies the equation (4.8). For an application with a stiff grid, a passive damping method is often preferred for its simpleness and low cost. In [19] a new passive damping scheme with low power loss for the LLCL filters is proposed. Also, a simple engineering design criterion is proposed to find the optimized damping resistor value, which is both effective for the LCL filter and the LLCL filter. Compared with the LCL filter, the proposed passive damped LLCL filter can not only save the total filter inductance and reduce the volume of the filter but also reduce the damping power losses for a stiff grid application. Fig. 4.5 and Fig. 4.6 shows the different topological circuits for passive damping proposed by [18] and [19].

Fig. 4.5.

Different configurations for passive damping [5].


56

CHAPTER 4.


Fig. 4.6. 4.2.2

Different configurations for passive damping [6].

CURRENT CONTROLLER

The current controller is used to regulate the current injected into the grid. The grid current injected has to be kept in phase with the grid voltage since only active power has to be transferred from the PV generation system. There are various controllers that are discussed in literature for such a control; some of the popular controllers are [20]. A. The dq Control The dq control structure is using the abc → dq transformation module to transform the control variables from their natural frame abc to a frame that synchronously rotates with the frequency of the grid voltage. As a consequence, the control variables are becoming dc signals. Specific to this control structure is the necessity of information about the phase angle of utility voltage in order to perform the transformation. Normally, proportional–integral (PI) controllers are associated with this control structure. A typical transfer function of a PI controller is given by.

G PI s   K p 

Ki s

(4.9)

Where K p is the proportional and K i is the integral gain of the controller


57

CHAPTER 4.


B. Stationary Frame Control Since in the case of stationary reference frame control, the control variables, e.g., grid currents, are time-varying waveforms, PI controllers encounter difficulties in removing the steady-state error. As a consequence, another type of controller should be used in this situation. The transfer function of resonant controller is defined as

G PR s   K p  K i

s s 2

(4.10)

2

Because this controller acts on a very narrow band around its resonant frequency ω, the implementation of harmonic compensator for low-order harmonics is possible without influencing at all the behavior of the current controller. The transfer function of the harmonic compensator is given by GHC s  

K

h 3, 5, 7

s

ih

s  h  2

2

(4.11)

C. The abc Frame Control Historically, the control structure implemented in abc frame is one of the first structures used for pulse width modulation (PWM) driven converters. Usually, implementation of nonlinear controllers such as hysteresis controller has been used. The main disadvantage of these controllers was the necessity of high sampling rate in order to obtain high performance. Nowadays, due to the fast development of digital devices such as microcontrollers (MCs) and DSPs, implementation of nonlinear controllers for grid-tied applications becomes very actual. In this thesis, a proportional resonant (PR) compensator is used to track a sinusoidal current reference signal since, with the PR controllers, the converter reference tracking performance can be enhanced and previously known shortcomings associated with conventional PI controllers can be alleviated. These shortcomings include steady-state errors in single-phase systems and the need for synchronous d–q transformation in three-phase systems [21]. Another advantage associated with the PR controllers and filters is the possibility of implementing selective harmonic compensation without requiring excessive SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

58


CHAPTER 4.

computational resources. The plant modeling, PR compensator design and the closed loop stability is discussed in this section. The block diagram of the LCL filter as a interface between inverter and grid is as shown in the Fig. 4.7.

Fig. 4.7.

Block diagram of LCL filter.

From the above block diagram and combining the equation (4.2) and (4.3) the expression for the grid current can be derived as follows

 s 2 L1C d  sC d Rd  1 I g s   G p s  V g  Vinv sC d Rd  1 

  

(4.12)

Where, G p s  

sCd Rd  1 s L1 L2 C d  s C d Rd L1  L2   sL1  L2  3

2

Since the magnitude and phase response of

(4.13)

s 2 L1Cd  sCd Rd  1 are 0dB and 0o at the sCd Rd  1

fundamental frequency of the grid. Therefore, equation (4.12) can be simplified to equation (4.14). I g s   G p s Vinv  V g 

(4.14)

Given the plant model, a PR compensator, Gc s  is then added to the closed loop and the equivalent closed loop diagram can be seen in Fig. 4.8.


59


CHAPTER 4.

Fig. 4.8.

Block diagram of the current controller.

From Fig. 4.8 the relationship between the input and the output of the current loop can be derived as: I g s   H 1 s   I g* s   H 2 s   V g s 

(4.15)

Where, H 1 s  

H 2 s  

G c s   G p s 

G c s   G p s   1 G p s 

1  Gc s   G p s 

(4.16)

(4.17)

To successfully track the i g* t  signal without steady state errors, the magnitude of

H 1  j  in equation (4.15) has to equal to 1 at the fundamental frequency of the i g* t  .Thus, it is clear that if Gc  j  has a infinite gain at the fundamental frequency, H 1  j  would have a unity gain. On the other hand, if Gc  j  has a infinite gain at the fundamental frequency, H 2  j  in equation (4.17) would results in 0 at the fundamental frequency so that the H 2  j  term can be neglected. Therefore, it is not necessary to have the grid voltage feed-forward in the current control loop. To conclude, the controller, Gc  j  has to have an infinite gain at the fundamental frequency in order to track the current reference, i g* t  . A


60

CHAPTER 4.


proportional-resonant (PR) controller meets the aforementioned controller requirement. An ideal PR controller which has an infinite gain at  g has a transfer function shown in equation (4.10) and a generic bode plot is shown in Fig. 4.9. However, the infinite gain of the controller leads an infinite quality factor of the system, which cannot be achieved in either analog or digital controller implementation. Furthermore, since the gain of an ideal PR controller at other frequencies is low, it is no adequate either to eliminate the higher order harmonics influenced by the grid voltage or to react to slight grid frequency variation.

Bode plot of ideal PR controller, K p  1 and K i  20 .

Fig. 4.9.

This is undesirable because the harmonic grid voltage distortion would results in a significant amount of harmonic grid current distortion. Therefore, a damping term ζ is introduced to form a non-ideal PR controller transfer function shown in equation (5.7). This damping term ζ reduces the infinite gain at the fundamental frequency to a finite large gain but increases the bandwidth of the controller. Gc s   K p 

K i  2    o  s s  2     o  s   02 2

(4.18)

Where  o  2f o , K i is the fundamental harmonic gain, and ξ is the damping factor. The harmonic compensator G HC s  is responsible for the attenuation of the low-frequency harmonics injected into the grid. In view of that, the compensator includes a bank of damped bandpass filters tuned to resonate at odd multiples of the grid frequency


61

CHAPTER 4.


K n  2    n  o  s

h

G HC s    n 3

s  2    n   o  s  n o  2

(4.19)

2

where n can take the values 3, 5, . . . , h, h being the highest current harmonic to be attenuated, and K n is the n-harmonic gain. Notice that, in a situation in which no harmonic attenuation is required, then h = 0 and the compensator transfer function can be written as G HC s   1 . Fig. 4.10 shows the Bode diagram of the controller Gc s  for different values

of K i and ξ with K p  0 .

(a)

(b)

(c) Fig. 4.10.

Bode diagram of the current controller with (a) constant

damping factor

ξ, (b) constant harmonic gain K i , and (c) constant product K i ξ.


62

CHAPTER 4.


The following properties can be observed: 1) the magnitude peak value is given by 20 log K i (dB); 2) the magnitude bandwidth and the phase shape are governed by ξ ; and 3) for

constant value of the product K i ξ, the magnitude diagrams overlap for practically all frequencies, except for anarrow range around the grid frequency. PR controller can provide large gain at f o , but it also introduces negative phase shift at the frequencies higher than the selected frequency, especially at the frequencies close to the selected resonance frequency, which damages the PM of the system. To avoid this side effect, the crossover frequency fc is suggested to be set far away from the selected resonance frequency [22]. Where the proportional gain is tuned in the same way as that for a PI controller, and it basically determines the dynamics of the system in terms of bandwidth, phase, and gain margin. The closed loop gain of the current control loop with the PR compensator can be simply obtained by equation (4.20). Fig. 4.11 shows the bode plot uncompensated current loop with three main frequencies indicated; resonant frequency f r , grid fundamental frequency f o and the gain cros over frequency f c . The values of the PR controller for improving the performance of the inner current loop and the improved parametres ( f c and gain at fundamental frequency T fo ) are as shown in TABLE 4.3.

T s  = GC s   Ginv s   G P s   K  2     o  s  Vdc sC d Rd  1    K P  2 i  3 (4.20) 2  2 s  2     o  s   0  Vtri s L1 L2 C d  s C d Rd L1  L2   s L1  L2  

Fig. 4.11.

Bode diagram of the uncompensated system.


63

CHAPTER 4.


Ki

Kp



100

10

0.1

Before compensation After compensation T fo [dB] T fo [dB] f C [Hz] f C [Hz] 106

TABLE 4.3 :

10

1.24 10 3

80

Parameters of PR controller.

Fig. 4.12 shows the bode plot compensated current loop with three main frequencies indicated and with the improved system performance parameters marked.

Fig. 4.12.

Fig. 4.13.

Bode diagram of the compensated system.

Step response of the inner current loop.

Fig. 4.14 shows the 50Hz response of the PR current control system. The control loop is exhibiting a overshoot of 20% and however the transient and steady state response is satisfactory.


64

CHAPTER 4.


Fig. 4.14. 4.3.2

50Hz response of the PR current control system.

VOLTAGE CONTROLLER

The DC-link voltage can be regulated by a closed loop voltage controller. The variation or imbalance in the PV power and the power being injected into grid is reflected on the DC link of the inverter. When the PV power is more than the power injected, the dc link voltage increases and vice-versa. Thus regulation of the dc link voltage requires the amount of current to be injected and thus a simple PI controller can be used for generation of required grid current for maintaining the DC link voltage stiff at the reference value. Grid voltage has to be sensed for the synchronization of the PWM inverter and to maintain the injected grid current in phase with it. If the grid voltage is sensed directly without any filtering then during weak grid situation the reference current generated will involve the harmonics and the current injected gets distorted. Hence a proper grid synchronization method is required for having unity power factor (UPF) operation of the inverter. A low complexity method of grid synchronization is introduced in [23]. Effort has been taken to minimize the computational processes of reproducing a parallel component and an orthogonal component of the grid voltage by means of using only a two by two state matrix. The grid voltage synchronizer consists of two parts:  

A grid voltage estimator An amplitude identifier

The grid voltage estimator takes the grid voltage as its input and outputs one signal which is aligned with the grid voltage (parallel component) and the other signal which is 90 leading the grid voltage (orthogonal component). This estimator has a state space form of: SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

65

CHAPTER 4.


A B      o   x1   K sync   x1   0    x    0  v g  x1   x    0 o   2   2  

(4.21)

C    v g   y1  1 0   x1  v          g   y 2  0 1   x 2 

The term K sync introduces damping to the oscillator which widens the estimator’s bandwidth and reduces the gain at  o . As a result, x1 tracks the input v g ,at its fundamental frequency while also rejecting other harmonics that appeared on the grid voltage. The behaviour of this grid synchronizer is analyzed by means of studying its responses in time domain. Normally, the harmonics that appeared on the grid voltage are predominately low order odd harmonics due to thyristor bridges and diode rectifiers in the system. The harmonics that are multiple of three are mainly trapped inside the delta connection of distribution transformers so that they are not presented in the local grid. Therefore, the predominate harmonics that appeared on the local grid are in the order of 5th, 7th, 11th, 13th. Fig. 4.15 shows the parallel component of the grid voltage produced by the synchronizer with grid voltage having a %THD of 5%. For grid connected PV system only active (parallel) component of the grid current control is required.

Fig. 4.15.

Time domain response of x1 t  v/s v g t 

The outer voltage loop is modeled which is required for controlling the DC link voltage to a value corresponding to the VMPP .The differential equation on the DC side is: SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

66

CHAPTER 4.

C DC


dvdc t   i dc t  dt

(4.22)

idc t  consists of two components, a DC component, I dc and a double-line frequency AC

component, i dc , ripple t  . Both of them can be obtained from the power balance equation

vdc t   idc t   Vˆg  cos g t  Iˆg  cos g t   

vdc t   I dc  vdc t   idc,ripplet  

Vˆg  Iˆg 2

cos  

Vˆg  Iˆg 2

(4.23)

cos2 g t   

(4.24)

From (6.3), the two components of the DC current can be expressed as:

I dc 

Vˆg  Iˆg

2vdc t 

idc ,ripple t  

cos  

Vgrms

2vdc t 

Iˆg cos 

Vˆg  Iˆg  cos2 g t    2v dc t 

(4.25)

(4.26)

Since we align the parallel component of the current reference signal with the grid voltage using a grid synchronization function block, the grid current i g t  has its parallel component aligned with the grid voltage. Therefore equation (4.25) can be rewritten to be

I dc 

V grms

2v dc t 

Iˆg

(4.27)

The complete model of the voltage loop can be drawn and is shown in Fig. 4.16. A notch filter, H n s  has a form of equation (4.28) is applied to the voltage loop to filter out the double-line frequency current ripple component idc , ripple t  because the double-line frequency ripple current produces a double-line frequency ripple voltage on the DC-link. This is undesirable because this ripple signal would couple through the voltage controller and


67

CHAPTER 4.


cause undesirable high frequency component would appear on the current reference signal of the current control loop.

H n s  

s 2  2   1   n  s   n2

(4.28)

s 2  2   2   n  s   n2

Fig. 4.16.

Outer voltage loop of the inverter.

Where  n is twice the fundamental frequency,  1 is chosen to be 0.006 and  2 is chosen to be 1. The current loop, GCCL s  has the form of

GCCL s  

GC s   G P s  GC s   G P s   1

(4.29)

A simple PI controller is used as the DC voltage loop compensator, which has the form of:

GV s   K P 

KI s

(4.30)

The bode plot of uncompensated and compensated outer voltage loop are as shown in Fig. 4.17 and Fig. 4.18 respectively. A selection of K P = 0.2 and K I = 3 yields a phase margin of 64.6 0 and the gain cross over frequency f C  9.65 Hz which matches with the design that the

voltage closed-loop

bandwidth should be approximately equal to 1/150th of the closed current loop to reduce, at minimum, oscillation in the dc voltage and in the ac current [24]. The reference DC link voltage to be maintained is generated by the MPPT controller.


68

CHAPTER 4.


Fig. 4.17.

Fig. 4.18.

Bode plot of uncompensated outer voltage loop.

Bode plot of compensated outer voltage loop.

The scheme of DC link voltage reference generator is shown in Fig. 4.19. When

signp / v   0 the integrator increases its output Vdc , and the dc link voltage reference Vdc , ref moves toward the MPP. When signp / v   0 the integrator decreases its output

Vdc , and the dc link voltage reference Vdc , ref moves back toward the MPP. The input signal Vdc** represents the initial voltage reference; i.e., the starting value of the integrator. When the

control system is enabled, the quantity Vdc computed by the MPPT algorithm is added to Vdc** , giving the actual reference of the dc link voltage Vdc , ref .Then, the regulation of the

current I g injected into the mains allows the dc link voltage to be controlled around the reference value. In this way, all the power coming from the PV generator is transferred to the grid.


69

CHAPTER 4.


Fig. 4.11.

4.3

DC link voltage reference generator.

ACTIVE DAMPING OF LCL FILTER

A direct way to damp the resonance of the LCL filter is introducing a passive resistor to be in series or parallel with the filter inductors or filter capacitor, which is called passivedamping method. Among which, adding a resistor in series with the filter capacitor has been widely adopted for its simplicity and relatively low power loss. However, it will weaken the switching harmonic attenuation ability. Adding a resistor in parallel with the filter capacitor will not impair the low-and high-frequency characteristics of the LCL filter, but the power loss brought by this resistor is too large to be accepted. In order to avoid the power loss resulted from the passive resistor, the concept of virtual resistor was proposed in place of the passive resistor, and the virtual resistor can be realized through proper control schemes. Such methods are called active damping methods. In recent years, the design of current regulator and capacitor– current-feedback active-damping for LCL-type grid-connected inverter has been extensively discussed. A step-by-step controller design for LCL-type grid-connected inverter with capacitor–current-feedback active-damping has been proposed in [25]. A hybrid passive-active damping solution with improved system stability margin and enhanced dynamic performance is proposed for high power grid interactive converters [26]. In this thesis, a novel current control strategy based on a new current feedback for grid-connected voltage source inverters with an LCL-filter proposed in [27] has been applied to grid connected PV system and the performance is compared with that of the passive damped LCL filter. The system structure for such a novel current control strategy based grid connected PV is as shown in Fig. 4.20. In the novel control strategy the capacitor of LCLfilter is split into two parts, and the current flowing between these two parts is measured and used as the feedback of a current controller. In this way, without any damping resistor, the inverter control system is degraded from third-order to first-order, as a first-order system with L-filter. Consequently, the control loop gain and bandwidth can be increased and many existent current control methods can be implemented to minimize steady-state error and current harmonic distortion. SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

70


CHAPTER 4.

Fig. 4.21.

System structure for active damping of LCL filter.

Capacitor is split into two parts and the current flowing between them is used as the feedback current for the current controller. Assuming C1    C and C1  1     C with then the current i12 between the two capacitors is given as i12  i2  1     iC

or

i12  1     i1    i2

(4.31)

Where i2 the total currents of filter capacitor and the current is i12 is the weighted average of the inverter current and the grid current. The transfer function for vinv and i12 as follows.

I 12 s  1     1     L  C  s 2  1  Vinv s    1     L2  C  s 3  L  s

(4.32)

Where L = L1  L2 and  

L2 L1

Considering   1   the equation (4.32) becomes I 12 s  1  Vinv s  L  s

Considering the ESRs of inductor in LCL-filter the transfer function becomes SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

71


CHAPTER 4.

I 12 s  1  Vinv s  L  s  R1  R2

Thus the transfer function of the LCL filter is degraded from order three to one which makes the loop gain and the cross-over frequency with new control strategy much higher than those with conventional control strategies, resulting in minor steady-state error and a better dynamic response in close-loop control. The design of the PR current controller for controlling the injected grid current and the voltage controller for regulating the voltage is same as that of the passive damping. The MSX-60W panel specifications are considered for the simulation study of the inverter system. The summary of parameters of the PV inverter system used for simulation of the passive and active damped LCL filter is shown in TABLE 4.4. Passive damping PR Ki

100

Active damping

PI

PR

PI

L2 L1 [mH] [mH] 10 0.1 0.2 3 120 14 0.06 0.5 5 0.5 1 TABLE 4.4 : Summary of parameters of the PV inverter system.

Kp

4.4



Kp

Ki

Ki

Kp



Kp

Ki

C

[µF] 2.5



0.5

PERFORMANCE EVALUATION USING MATLAB/SIMULINK

Simulation was conducted in MATLAB/SIMULINK environment to verify the effectiveness of the proposed design approach, and all the parameters are chosen to be the same as those in the aforementioned design. Simulation of the three level inverter with MPPT for grid connected PV system incorporated with passive and active damped LCL filter has been carried out. The performance of the power conditioning system connected to the photovoltaic array has been evaluated both in steady state and transient operating conditions determined by startup and solar irradiance variations. The transient and steady state response of the system is tested dynamically for changes in irradiation and also in temperature. Ripple correlation control MPPT is used for tracking the maximum power available. The variation in the irradiation and temperature over the PV array is as shown in Fig. 4.21.


72


CHAPTER 4.

Fig. 4.21.

System structure for active damping of LCL filter.

Step change in irradiation and temperature is done at t =1s and t =2s. The variation in the power extracted from the PV array, active and reactive power injected into grid, array current and DC link voltage is shown in Fig. 4.22 (a)-(e). It can be seen that the reactive power injected into grid is almost zero ensuring the unity power factor operation of the three level grid tied inverter. The variation in the array voltage, current is smooth and also the transient response exhibits fast dynamic behaviour of the control system designed with satisfactory performance.

Fig. 4.22.

MATLAB/SIMULINK simulation results of the proposed topology on the PV and grid side.


73

CHAPTER 4.


The variation in the injected grid current for step change in irradiation is as shown in Fig. 4.23 (a). Fig. 4.23 (b)-(d) shows the magnified view of the selected portion in the Fig. 4.23 (a). The %THD of the grid current for all the selected portion is shown in Fig. 4.23 (e)-(g) and it can be seen that the injected current %THD is less than 5% for all the variations in the irradiations which complies with the IEEE STD 1547-1992.

Fig. 4.23.

Injected grid current variations for step change in irradiation.


74

CHAPTER 4.


The variation in the injected grid current for step change in temperature with irradiation level maintained at 800 W / m2 is as shown in Fig. 4.24 (a). Fig. 4.23 (b)-(d) shows the magnified view of the selected portion in the Fig. 4.24 (a). The %THD of the grid current for all the selected portion is shown in Fig. 4.24 (e)-(g) and it can be seen that the injected current %THD is less than 5% for all the variations in the temperature which complies with the IEEE STD 1547-1992.

Fig. 4.24.

Injected grid current variations for step change in temperature.


75

CHAPTER 4.


(a)

(b) Fig. 4.25.

Transient response of grid current.


76


CHAPTER 4.

Fig. 4.26 shows the performance of the PV generation system in tracking the maximum power point of the PV panels during a transient of solar irradiance. From the starting operating point, the system reaches the MPP in 1. Then, as a consequence of a 30% increase of the solar irradiance, the operating points move to the new MPP in 2. Then, as a consequence of a 50% decrease of the solar irradiance, the operating points move to the new MPP in 3.

Fig. 4.26.

PV array power versus voltage curve during step change in irradiation.

Fig. 4.27 shows the performance of the PV generation system in tracking the maximum power point of the PV panels during a transient of temperature on PV array. From the starting operating point, the system reaches the MPP in 1. Then, as a consequence of a 60% increase of the temperature, the operating points move to the new MPP in 2. Then, as a consequence of a 40% decrease of the temperature, the operating points move to the new MPP in 3 and the irradiation level is maintained at 800 W / m 2 .

Fig. 4.27.

PV array power versus voltage curve during step change in temperature.


77

CHAPTER 4.


The variation in efficiency of the proposed configuration, as it operates from low power to rated power condition is determined by noting down the power fed extracted from the PV array and the power fed into the grid. For obtaining variations in the power generated the irradiation level was changed in a step of 100 W / m 2 . Fig. 4.28 shows the efficiency versus the power extracted from the PV array for both passive and active damped LCL based grid tied PV inverter. From the curves it can be seen that the efficiency of power transfer is more with active damping due to the absence of the damping resistor to damp the inherent resonance effect of the filter and the efficiency increases with the increase in the power generated.

Fig. 4.20.

Efficiency versus input PV power.

The variation in the %THD of the grid current injected for both passive and active damping method with respect to the power injected into the grid is as shown in Fig. 4.29. The active damping method shows a reduced %THD as compared to passive damped LCL. However in both the methods the %THD of the grid current is less than 5% and it decreases with the increase in the amount of power being injected.

Fig. 4.29.

%THD of the current versus output power fed into the grid.


78

CHAPTER 4.

4.5


HARDWARE IMPELEMENTATION OF PV INVERTER

Prototype system configuration for testing the three-level PV inverter with an output LCL filter is as shown in the Fig. 4.30. The block diagram of the circuit configuration is shown in Fig. 4.31. The prototype includes the following components 1)

PV array

2)

Three-Level inverter

3)

Controller

4)

Passive damped LCL filter

5)

Fundamental grid voltage extractor

6)

Signal sensing circuit

Fig. 4.30.

Experimental rig of the three-level PV inverter.

A load of 110Ω is used for testing the performance of the PV inverter. The variation in efficiency of the configuration, as it operates from low power to rated power condition, a number of experiments were performed using a resistive load of 110Ω (in place of the grid). The gating pulses are generated by the DSP, which senses the fundamental grid voltage extracted using notch filter. A unipolar PWM technique of gating the inverter switches is employed. SINGLE-PHASE THREE-LEVEL INVERTER WITH MPPT FOR GRID CONNECTED PV SYSTEMS

79

CHAPTER 4.


Fig. 4.31. 4.5.1

System configuration of the three-level PV inverter.

PV ARRAY

The solar array used in the hardware is consists of 74Wp PV module manufactured by WAREE industry. The panels are kept at 36° on the terrace of Electrical Engineering Department, VNIT Nagpur. Fig. 4.32 shows the PV array used for the experiment.

Fig. 4.32. 4.5.2

Photograph of the PV module used for experimentation.

THREE-LEVEL INVERTER AND LCL FILTER

The three-level inverter implemented consists of four power switches which are pulse width modulated for controlling the power flow. Fig. 4.33 shows the configuration of the inverter and the LCL filter. Power MOSFET IRFP250N is used as the power switch. A


80


CHAPTER 4.

Toroid core T-16 is used for the design of inductor, consisting of number of turns wound using SWG-17 wire. A damping resistor of 5Ω with the capacitor is used

Fig. 4.33. 4.5.3

Photograph of the three level inverter used for experimentation.

GATE DRIVER CIRCUIT

The switch between the source and the load is known as high side switch. When the MOSFET turns on the drain and source terminals are at the same voltage. In order to turn the MOSFET on, and keep it turned on; the gate to source voltage must be between 10V20V. The pulses from the DSP are given to the gate driver circuit which provides isolation and the amplified pulses that are used for gating the power switches. A TLP 250 IC is used for gating the switches. The photograph of the driver circuit is as shown in the Fig. 4.34.

Fig. 4.34.

Photograph of the gate driver.


81

CHAPTER 4.

4.5.4


NOTCH FILTER

When the grid voltage is sensed and feedback is taken directly without any filter, then during weak grid situation (when voltage consists of harmonics) the current reference wave gets distorted and there by the actual current. Hence a band pass filter (BPF) tuned to extract the fundamental component of the grid voltage is implemented for reference current generation by sensing the grid voltage [14]. The circuit configuration is as shown in Fig. 4.35

Fig. 4.35. 4.5.5

Circuit diagram of the analog implementation of BPF.

SIGNAL SENSING CIRCUIT

The MPPT controller needs two input parameters I PV and V PV for deciding the modulation index at a particular insolation. So sensor circuits give a proportional output of these voltage and current from the PV array and the output signals from the sensor circuits are given to ADC channels of DSP. The Winson WCS2702 provides economical and precise solution for both DC and AC current sensing in industrial, commercial and communications systems. The output from the current sensor is proportional to the current output from the PV array. The sensitivity of the sensor is 1mV/mA and the maximum current that can be measured using WCS 2702 is 2A. The photograph of the voltage and current signal sensing circuit is as shown in the Fig. 4.36.

Fig. 4.36.

Photograph of the voltage and current signal sensing circuit.


82

CHAPTER 4.

4.6


GENERATION OF GATING PULSES USING TMS320F28027

DSP TMS320F28027 from Texas Instrument is used as the core controller for producing the control pulses of the three level inverter. The grid voltage is sensed through BPF and is given to the adc input of the DSP which is taken as the reference carrier wave for the production of gate pulses. Some of the features of the controller are  High-Efficiency 32-Bit CPU ( TMS320C28027)  60 MHz (16.67-ns Cycle Time)  50 MHz (20-ns Cycle Time)  40 MHz (25-ns Cycle Time)  16 x 16 and 32 x 32 MAC Operations Module  16 x 16 Dual MAC  Harvard Bus Architecture – Flash, SARAM, OTP, Boot ROM Available  Atomic Operations  Fast Interrupt Response and Processing  Unified Memory Programming Model  Code-Efficient (in C/C++ and Assembly)  Low Cost for Both Device and System: – One SCI (UART) Module  Single 3.3-V Supply – One SPI Module  No Power Sequencing Requirement  Integrated Power-on and Brown-out Resets  Small Packaging, as Low as 38-Pin Available  Low Power – High-Resolution PWM (HRPWM) Module  No Analog Support Pins – Enhanced Capture (eCAP) Module Clocking)  Two Internal Zero-pin Oscillators  On-Chip Crystal Oscillator/External Clock Input  Dynamic PLL Ratio Changes Supported  Watchdog Timer Module  Missing Clock Detection Circuitry  Up to 22 Individually Programmable, – 38-Pin DA Thin Shrink Small-Outline  Multiplexed GPIO Pins With Input Filtering  Peripheral Interrupt Expansion (PIE) Block That Supports All Peripheral Interrupts  Three 32-Bit CPU Timers The DSP is linked to MATLAB through Code Composer Studio (CCS V5) and the gating signals are produced using the two PWM blocks. Since the two switches of the inverter on the same leg should not be turned on at a time, the dead band unit inside the


83

CHAPTER 4.


controller is used for providing the dead band of 2µs. The values of the components used for experimental work is as tabulated in TABLE 4.5. f s [kHz]

V dc [Volts]

3

20

TABLE 4.5 :

4.7

L1 [mH] 1

L2 [mH] 1.5

C d [µF]

R d [Ω]

2.5

2.5

Summary of parameters used in experimental work.

EXPERIMENTAL RESULTS

The time response of the band pass filter used for sensing the grid voltage is as shown in the Fig. 4.37.

Grid voltage (0.5V/div) BPF o/p (0.5V/div)

Fig. 4.37.

Time response of BPF.

However the range of voltage that can be sensed through the Analog to Digital Converter (adc) of the DSP ranges from 0 to 3.3V max, therefore a dc offset is added to the output of the BPF and the offsetted signal is given as i/p to the adc. Fig. 4.38 shows the o/p of BPF after adding offset. BPF o/p (1V/div)

Grid voltage (0.5V/div)

Fig. 4.38.

Time response of BPF with dc offset added.


84

CHAPTER 4.


It can be seen from the Fig.s that the grid voltage is somewhat distorted and contains harmonics in it; however the o/p of the BPF is harmonic free, exhibits fast dynamic response and is in phase with the grid voltage. A load of 110Ω, 5A was used for testing the performance of the PV inverter and was fixed at a constant value. The modulation index of the inverter was varied and the resulting current waveforms are as shown in Fig. 4.40 (a)-(b).

current given to the resistive load (0.5A/div) with M=0.6

(a)

current given to the resistive load (0.5A/div) with M=0.9

(b)

Fig. 4.39.

Experimental results: current waveform through a resistive load (M=0.6).

Fig. 4.40 shows the PV inverter o/p voltage and the current fed into the grid for modulation index M=0.8. It can be seen from the magnified plot of the current that it is has a high frequency ripple super imposed due to the inverter switching, and spikes in the current is due to the LCL filter inherent resonance. However the current %THD is found to be 3.8% which is well below the IEEE-1547 (

chapter 4 pv inverter - system structure and control design

chapter 4 pv inverter - system structure and control design

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