Comparison of Voltage-Controlled-Oscillator

Comparison of Voltage-Controlled-Oscillator Architectures for Implementation in 180 nm SiGe Technology Giuseppe Macera

Contents 1 Introduction 1.1 Oscillators: principle of operating . . . . . . . . . . . . . . . . . . 1.2 Performance Parameters . . . . . . . . . . . . . . . . . . . . . . . . 1.2.1 Frequency Range . . . . . . . . . . . . . . . . . . . . . . . . 1.2.2 Output Voltage Swing . . . . . . . . . . . . . . . . . . . . . 1.2.3 Drive Capability . . . . . . . . . . . . . . . . . . . . . . . . 1.2.4 Phase Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.5 Output waveform . . . . . . . . . . . . . . . . . . . . . . . . 1.2.6 Supply Sensitivity . . . . . . . . . . . . . . . . . . . . . . . 1.2.7 Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . 1.3 CMOS Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3.1 Ring Oscillators . . . . . . . . . . . . . . . . . . . . . . . . Calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . Amplitude Limiting . . . . . . . . . . . . . . . . . . . . . . Differential implementation . . . . . . . . . . . . . . . . . . Ring oscillators with CMOS inverters . . . . . . . . . . . . Cadence simulation . . . . . . . . . . . . . . . . . . . . . . . 1.4 LC oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.1 LC tanks . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.2 Tuned stage . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.3 Cross-Coupled Oscillator . . . . . . . . . . . . . . . . . . . Open-loop voltage gain and phase, and oscillation frequency Supply sensitivity . . . . . . . . . . . . . . . . . . . . . . . Choice of gm . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.4 Colpitts oscillator . . . . . . . . . . . . . . . . . . . . . . . 1.4.5 One-Port Oscillators . . . . . . . . . . . . . . . . . . . . . . How to create a negative resistance? . . . . . . . . . . . . . Negative resistance Oscillators . . . . . . . . . . . . . . . . 1.4.6 Hartley Oscillator . . . . . . . . . . . . . . . . . . . . . . . 1.4.7 Armstrong Oscillator . . . . . . . . . . . . . . . . . . . . . . 1.5 RC oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.1 Wien bridge oscillator . . . . . . . . . . . . . . . . . . . . . 1.5.2 ”Twin-T” oscillator . . . . . . . . . . . . . . . . . . . . . . Phase-shift oscillator . . . . . . . . . . . . . . . . . . . . . . 1.6 Crystal Controlled Oscillator . . . . . . . . . . . . . . . . . . . . . 1.6.1 Pierce and Miller oscillators . . . . . . . . . . . . . . . . . . 1.7 Oscillator Design Techniques . . . . . . . . . . . . . . . . . . . . .

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1 1 3 3 3 3 4 4 4 4 5 5 7 7 8 9 10 11 13 13 16 17 18 18 18 18 20 20 22 22 24 26 27 29 29 30 31 32

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BJT Colpitts oscillator 2.1 Feedback BJT Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Tapped Resonant Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.1 Tapped-Capacitor Circuit . . . . . . . . . . . . . . . . . . . . . . . . Design procedure for Qp < 10 . . . . . . . . . . . . . . . . . . . . . . Design Procedure for Qp > 10 . . . . . . . . . . . . . . . . . . . . . . 2.3 Common Base Colpitts Oscillator analysis and design . . . . . . . . . . . . 2.3.1 Practical design procedure for High-Resistance Loads . . . . . . . . 2.3.2 Low-Resistance Loads . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 The problem with purely linear oscillators . . . . . . . . . . . . . . . . . . . 2.4.1 Describing Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . Describing functions for MOS and BJT . . . . . . . . . . . . . . . . Colpitts oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 Design example and Cadence simulation of a common-base BJT Colpitts oscillator for high-resistance loads . . . . . . . . . . . . . . . . . . . . . . . .

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Integrated VCOs 3.1 Voltage-Controlled oscillators . . . . . . . . . . . 3.2 Tuning in Ring Oscillators . . . . . . . . . . . . . 3.3 Tuning in LC oscillators . . . . . . . . . . . . . . 3.3.1 Tuning using pn junction-based varactors 3.3.2 Tuning using MOS varactors . . . . . . . Tuning Range Limitations . . . . . . . . . Effect of Varactor Q . . . . . . . . . . . . 3.4 Mathematical model of VCOs . . . . . . . . . . . 3.5 BJT Colpitts Voltage-Controlled Oscillators . . .

64 64 66 68 68 70 71 73 74 75

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4 Noise and phase noise in LC BJT oscillators 79 4.1 Noise due to active and passive components and Noise Figure . . . . . . . 80 4.1.1 Bipolar transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Heterojunction Bipolar Transistor . . . . . . . . . . . . . . . . . . . 86 4.2 Phase noise basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 4.3 Oscillator Noise Spectrum: Linear Model . . . . . . . . . . . . . . . . . . . 91 4.3.1 Leeson model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 Effect of the Quality factor and output power . . . . . . . . . . . . . 95 Effect of the resonator’s transfer function . . . . . . . . . . . . . . . 95 Phase noise in ideal LC oscillator . . . . . . . . . . . . . . . . . . . . 97 Advantages and disadvantages of Leeson’s model . . . . . . . . . . . 99 Phase noise in VCOs . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 How to select a transistor and its bias for designing a low phase noise oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 4.3.2 A revisit to Phase Noise Model of Leeson . . . . . . . . . . . . . . . 100 Loaded Quality Factor . . . . . . . . . . . . . . . . . . . . . . . . . . 101 4.4 Colpitts oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 4.5 Oscillator Noise Spectrum: Nonlinear Models . . . . . . . . . . . . . . . . . 107 4.5.1 Kurokawa approach . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 4.5.2 A Linear Time-Varying Phase Noise Theory: Impulse Response Model 110 Varactor-Controlled oscillator . . . . . . . . . . . . . . . . . . . . . . 115 4.5.3 Impulse Sensitivity Function . . . . . . . . . . . . . . . . . . . . . . 116 4.5.4 Modeling of Phase Noise with the ISF: Lee and Hajimiri’s model . . 119 Design implications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 4.5.5 Calculation of the Impulse Sensitivity Function with Hajimiri and Lee’s model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 Direct measurement of Impulse Response . . . . . . . . . . . . . . . 125 2

4.6 4.7 4.8

Closed-Form Formula for the ISF Noise of Bias Current Source . . . . . . 4.6.1 AM/PM Conversion . . . . . . . Figures of Merit of VCOs . . . . . . . .

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Appendix: Differential-algebraic equations for oscillators . . . . . . . . . . . 130 5 Comparative Analyses of Performances in VCOs designed in 180 nm SiGe HBT: Models and Simulations 132 5.1 State of the art . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 5.2 Common Base Differential Colpitts VCO . . . . . . . . . . . . . . . . . . . . 133 5.2.1 Single Biasing Network . . . . . . . . . . . . . . . . . . . . . . . . . 134 5.2.2 Single Common-Base Colpitts VCO . . . . . . . . . . . . . . . . . . 136 Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 Varactor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 Optimization for low phase noise . . . . . . . . . . . . . . . . . . . . 141 Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 5.2.3 Differential Colpitts VCO . . . . . . . . . . . . . . . . . . . . . . . . 145 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 Small signal model and frequency prediction . . . . . . . . . . . . . 147 Phase noise prediction using Leeson’s model . . . . . . . . . . . . . . 153 5.3 Differential Armstrong VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . 156 5.3.1 Small signal model and frequency prediction . . . . . . . . . . . . . 157 Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 Comparison between Differential Colpitts and Differential Armstrong VCOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 5.4 Differential Vackar VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 5.4.1 Small signal model and frequency prediction . . . . . . . . . . . . . 164 5.4.2 Performances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168 5.5 A varactor configuration minimizing the Amplitude-to-phase noise conversion in VCOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 6 Conclusions

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A mamma e pap´ a che, avendo appoggiato da sempre i miei studi, sono guida e stimolo per la mia crescita personale e professionale. A nonno, guida di ogni futura scelta, modello di vita da imitare. A tutti i miei Amici, che sono stati i miei compagni di viaggio in questi anni.

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Abstract This thesis deals with the design of low phase-noise, low-power and wide tuning range differential Colpitts, Armstrong and Vackar Voltage Controlled Oscillator (VCOs) in 180 nm SiGe HBT technology. The central operating frequency is 5 GHz operations. SpectreRF Cadence Virtuoso is used for the simulations. A VCO is an oscillator whose frequency of oscillation is controllable over a range of frequencies by varying a control voltage. One of the major applications of VCOs is in frequency synthesizers. A frequency synthesizer provides sinusoidal/pulse signals at a predetermined frequency that is precisely controllable by a digital word: it is the core building block of any system such as wireless communication transceiver that have to work at multiple frequencies. Phase noise is the most crucial performance parameter of a VCO since the phase noise of the frequency synthesizer is mainly determined by the contribution of the VCO, especially outside the loop bandwidth of the Phase Locked Loop (PLL). The large demand for low-power portable battery-operated electronic devices also make the dissipated power a key parameter to evaluate the performance of an oscillator. The tuning range of the VCO is another important issue that needs to be addressed. With multiple standards co-existing in the wireless industry today, one single VCO covering the wide frequency range required by multiple standards is preferred for smaller chip area and easy system configuration. SiGe BiCMOS is considered one of the most promising and competitive technologies for system-on-a-chip design of telecommunications ICs. It combines transistor performance that is competitive with III-V technologies and the advantages of the low cost, process maturity and high integration levels common to silicon CMOS technology. SiGe BiCMOS technology offers many benefits for integrated VCO design, especially with respect to phase noise performance. Both the phase noise floor and close-in phase noise can benefit from using the SiGe BiCMOS Heterojunction Bipolar Transistor (HBT). The main contributors to the phase noise floor of a VCO are the shot noise of the active devices, thermal noise from the passive and active devices connected with the tank, and noise injected from the bias circuitry. The SiGe HBT offers a high cut-off frequency while achieving a low noise figure and is well suited for low phase noise VCO designs. The minimum noise figure of the active device is the dominant factor in establishing the noise floor level of the VCO. The close-in phase noise is decided mainly by the loaded quality factor (Q) of the VCO tank circuit, the flicker noise, and the corner frequency of the VCO’s active device: SiGe HBTs have low flicker noise and very low corner frequency; these features make them very attractive for achieving low phase noise in the close-in offset frequency region. For these reasons, SiGe technology has proven to be a good candidate for low phase noise integrated VCO designs. The thesis is organized as follows: Chapters 1 and 2 deal with the working principles of oscillators and the most typical oscillator topologies, while in Chapter 3 some VCO topologies are shown. In these chapters, some insight into integrated inductors and varactors is given as well. The entire Chapter 4 presents the theory of noise and phase noise in BJT VCOs. In Chapter 5, the designed VCOs are shown. In particular, the simple linear and time invariant Leeson’s model is used to predict qualitatively the phase noise given by the simulations, while the small signal model of each oscillator, including all the parasitics of the transistors, is used to predict the oscillation frequency. The predicted results evaluated in Matlab confirm the simulated ones, and both are shown in the chapter.

Chapter 1

Introduction In this chapter we present an introduction to oscillators and their main features. As systems that, spontaneously and without external input, generate a periodic signal indefinitely, they are omnipresent in electronic circuits; for example, they are an integral part of phaselocked loops, clock recovery circuits and frequency synthesizers. Before dealing with voltage controlled oscillators (VCOs), it’s important to show representative oscillator topologies, in order to understand in what way it’s possible to vary some circuit’s parameters to adjust the frequency of oscillation. A VCO is defined as an oscillator whose frequency of oscillation is controllable over range of frequencies by varying of a control voltage. After having analyzed a LC oscillator for example, it will be clear that an LC VCO could be realized by varying the value of Ctank 1 ; regarding ring oscillators, it’s possible to vary the delay time of each stage in order to vary the output frequency. The high demand on data and bandwidth requires that oscillators for RF work at higher frequencies to process more data and provide more bandwidth. Higher data rates also require that oscillators have low phase noise.

1.1

Oscillators: principle of operating

An oscillator is a mechanical or electronic device that works on the principles of oscillation: a periodic fluctuation between two things based on changes in energy. It has a unique property that distinguishes it from all other electronic circuits in that it is an autonomous circuit. A simple oscillator produces a periodic output, usually in the form of a voltage. As such, the circuit has no input (apart from the DC supply), while sustaining the output indefinitely, and must involve a self-sustaining mechanism that allows its own noise to grow and eventually become a periodic signal. Let’s consider the unity-gain negative feedback circuit shown in Fig. 1.1. We can distinguish three fundamental parts:

Figure 1.1: Basic negative-feedback system.

ˆ An amplifier: this will usually be a voltage amplifier and may be biased in class A, B or C; 1 see

Chapter 3

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ˆ A wave shaping network: this consists of passive components such as filter circuits that are responsible for the shape and frequency of the wave produced; ˆ A positive feedback path: part of the output signal is fed back to the amplifier input in such a way that a signal is regenerated, re-amplified and fed back again to maintain a constant output signal.

The closed-loop transfer function of the system in Fig. 1.1 is: Vout H(s) (s) = Vin 1 + βH(s)

(1.1)

If the amplifier itself experiences so much phase shift at high frequencies that the overall feedback becomes positive, then oscillations may occur. We can see from the relation above that, if for s = jω0 , β=1 and H(jω0 ) = −1, then the closed-loop gain approaches infinity at ω0 . From this point of view, an oscillator may be viewed as a badly-designed negative feedback amplifier, so badly designed that it has a zero or negative phase margin. How can we find an output if no input is applied? Let’s examine Fig. 1.2. A noise component at ω0

Figure 1.2: evolution of oscillatory system with time experiences a total gain of unity and a phase shift of 180°, returning to the subtractor as a negative replica of the input. Upon subtraction, the input and the feedback signals give a large difference. Thus, the circuit continues to “regenerate”, allowing the component at ω0 to grow. Let’s express the subtractor’s output as a geometric series: Vx = V0 + |H(jω0 )|V0 + |H(jω0 )|2 V0 + |H(jω0 )|3 V0 + ...

(1.2)

If |H(jω0 )| > 1, the above summation diverges, whereas if |H(jω0 )| < 1, converges, and the sum of the series is V0 VX = . (1.3) 1 − |H(jω0 )| This means that for the oscillation to begin, a loop gain of unity or greater is necessary: we have obtained the “Barkhausen criteria”:

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|H(jω0 )| ≥ 1

(1.4)

H(jω0 ) = 180°.

(1.5)

Due to the fact that these conditions are necessary but not sufficient [1], in order to ensure oscillation in the presence of temperature and process variations, a loop gain of at least twice or the three times the required minimum value is typically chosen in practice. For the system in Fig. 1.1 to oscillate, the noise component at ω0 can be anywhere in the loop, not necessarily at the input. This leads to a general and powerful analytical point: in the small-signal model of an oscillator, the impedance seen between any two nodes (one of which is not ground) in the signal path goes to infinity at the oscillation frequency, ω0 , because a noise current at ω0 injected between these two nodes produces an infinitely large swing. This observation can be used to determine the oscillation condition and frequency.

2

Our study thus far allows us to predict the frequency of oscillation: we seek the frequency at which the total phase shift around the loop is 360° and determine whether the loop gain reaches unity at this frequency. This calculation, however, does not predict the oscillation amplitude. In a perfectly linear loop, the oscillation amplitude is simply given by the initial conditions residing on the storage elements if the loop gain is equal to unity at the oscillation frequency. Note that, to excite a circuit into oscillation, the stimulus can be applied at different points. This is because the natural frequency of a linear (observable) system does not depend on the location of the stimulus. Of course, the type of stimulus (voltage or current) must be chosen such that when it is set to zero, the circuit returns to its original topology.

1.2

Performance Parameters

An oscillator used in an RF transceiver must satisfy two sets of requirements: (1) system specifications, e.g., the frequency of operation and the purity of the output, and (2) interface specifications, e.g., drive capability or output swing. In this section, we study the oscillator performance parameters and their role in the overall system.

1.2.1

Frequency Range

An RF oscillator must be designed such that its frequency can be varied (tuned) across a certain range, taking into account also additional margin to cover process and temperature variations and errors due to modeling inaccuracies. How high a frequency can one expect of a CMOS oscillator? While oscillation frequencies as high as 300 GHz have been demonstrated [2], in practice, a number of serious trade-offs emerge that become much more pronounced at higher operation frequencies.

1.2.2

Output Voltage Swing

The oscillators in an RF system drive mixers and frequency dividers. As such, they must produce sufficiently large output swings to ensure nearly complete switching of the transistors in the subsequent stages. Furthermore, excessively low output swings exacerbate the effect of the internal noise of the oscillator. With a 1-V supply, a typical single-ended swing may be around 0.6 to 0.8 Vpp. A buffer may follow the oscillator to amplify the swings and/or drive the subsequent stage.

1.2.3

Drive Capability

Oscillators may need to drive a large load capacitance. Fig. 1.3 depicts a typical arrange-

Figure 1.3: Circuits loading the LO.

ment for the receive path. In addition to the downconversion mixers, the oscillator must

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also drive a frequency divider, denoted by a divide-by-N block. This is because a loop called the frequency synthesizer must precisely control the frequency of the oscillator, requiring a divider. In other words, the LO must drive the input capacitance of at least one mixer and one divider. The issue of capacitive loading becomes more serious in transmitters. In fact, the PA input capacitance propagates to the LO port of the upconversion mixers. To alleviate the loading presented by mixers and dividers and perhaps amplify the swings, we can connect the LO with a buffer, e.g., a differential pair. The buffers consume additional power and may require inductive loads, owing to speed limitations or the need for swings above the supply voltage. The additional inductors complicate the layout and the routing of the high-frequency signals.

1.2.4

Phase Noise

The spectrum of an oscillator in practice deviates from an impulse and is broadened by the noise of its constituent devices. Called phase noise, this phenomenon has a profound effect on RF receivers and transmitters. Unfortunately, phase noise bears direct trade-offs with the tuning range and power dissipation of oscillators, making the design more challenging. Since the phase noise of LC oscillators is inversely proportional to the Q of their tank(s), we will pay particular attention to factors that degrade the Q (see Chapters 3 and 4).

1.2.5

Output waveform

What is the desired output waveform of an RF oscillator? If abrupt LO transitions reduce the noise and increase the conversion gain (see Chapter 4), effects such as direct feedthrough are suppressed if the LO signal has a 50% duty cycle. Sharp transitions also improve the performance of frequency dividers. Thus, the ideal LO waveform in most cases is a square wave. In practice, it is difficult to generate square LO waveforms. This is primarily because the LO circuitry itself and the buffer(s) following it typically incorporate (narrowband) resonant loads, thereby attenuating the harmonics. There are basically two types of oscillators ˆ Sinusoidal Oscillators: these are known as Harmonic Oscillators and are generally LC Tuned-feedback or RC tuned-feedback type Oscillators that generate a purely sinusoidal waveform which is of constant amplitude and frequency. ˆ Non-Sinusoidal Oscillators: these are known as Relaxation Oscillators and generate complex non-sinusoidal waveforms that change very quickly from one condition of stability to another such as Square-wave, Triangular or Sawtooth type waveforms.

1.2.6

Supply Sensitivity

The frequency of an oscillator may vary with the supply voltage. This is an undesirable effect because it translates supply noise to frequency (and phase) noise. For example, external or internal voltage regulators may suffer from substantial flicker noise which cannot be easily removed by bypass capacitors due to its low-frequency content. This noise therefore modulates the oscillation frequency: in Fig. 1.4 is shown that the noisy output of the regolator, being the input of the VCO, modulates the oscillation frequency of the VCO itself.

1.2.7

Power dissipation

The power drained by the LO and its buffer(s) proves critical in some applications as it trades with the phase noise and tuning range. Thus, many techniques have been introduced that lower the phase noise for a given power dissipation.

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Figure 1.4: The regulator noise as input of an oscillator.

1.3

CMOS Oscillators

CMOS oscillator in today’s technology are typically implemented as “ring oscillator” or “LC oscillators”. Both these types are studied in the following sections.

1.3.1

Ring Oscillators

A ring oscillator is a cascaded combination of delay stages, connected in a closed loop chain. Ring oscillators designed with a chain of delay stages have created great interest because of their numerous useful features: ˆ they can easily be designed with state-of-art integrated circuit technology (CMOS, BiCMOS): due to their integrated nature, ring oscillators become an important building block in many digital and communication systems; ˆ they can achieve oscillations at low voltage; ˆ they can provide high frequency oscillations while dissipating low power; ˆ they can be electrically tuned, providing wide tuning range; ˆ they can provide multiphase outputs because of their basic structure: these outputs can be logically combined to realize multiphase clock signals, that are often needed in communication systems.

To arrive at the actual implementation, let us first see why a single common-source stage (Fig. 1.5) does not oscillate if it is placed in a unity-gain loop. The open-loop circuit con-

Figure 1.5: Common-source stage tains only one pole, thereby providing a maximum frequency-dependent phase shift of 90° (at a frequency of infinity). Since the common-source stage exhibits a dc phase shift of 180° due to signal inversion from the gate to the drain, the maximum total phase shift is 270°, not satisfying the Barkhausen criteria. It’s clear that oscillation may occur if the circuit contains multiple stages and hence multiple poles. We therefore surmise that if the circuit of Fig. 1.5 is modified as shown in Fig. 1.6, two significant poles appear in the signal path, allowing the frequency5

Figure 1.6: Two-pole feedback system

dependent phase shift to approach 180°. Unfortunately, this circuit exhibits positive feedback near zero frequency due to the signal inversion through each common-source state. It could be demonstrated that it simply latches up rather than oscillates. An idea could therefore consist of cascading an additional signal inversion, to obtain the circuit shown in Fig. 1.7, The ideal inverting stage provides zero phase shift at all frequencies; then it pro-

Figure 1.7: Two-pole feedback system with additional signal inversion

vides negative feedback near zero frequency and eliminates the problem of latch-up. Thanks to the two poles at E and F, the frequency-dependent phase shift can therefore reach 180°, but at a frequency of infinity. Since the loop gain vanishes at very high frequencies, the circuit doesn’t satisfy both of (1.4) and (1.5) at the same frequency, and thereby fails to oscillate. The foregoing discussion points to the need for a greater phase shift around the loop, suggesting the possibility of oscillation if the third inverting stages in Fig. 1.7 contains a pole that contributes significant phase. A typical three-stage ring oscillator is depicted in Fig. 1.8. Suppose for simplicity that the three stage are identical: the total phase shift

Figure 1.8: Three-stage ring oscillator around the loop reaches -135° at ω = ωp,E = ωp,F = ωp,G and -270° at ω = ∞. This means that the circuit works as a ring oscillator if the loop gain is sufficient.

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Calculations Let us calculate the minimum voltage gain per stage in Fig. 1.8 that is necessary for oscillation. The transfer function of the overall system is 2 (Fig. 1.9)

Figure 1.9: Linear model of three-stage ring oscillator.

H(s) =

−A30 , (1 + ωs0 )3

(1.6)

where A0 is the gain per stage. The circuit oscillates only if the frequency-dependent phase shift equals 180° ,i.e., if each stage contributes 60°. This means that: arctan

ωosc = 60° ω0

from which: ωosc =

√

3ω0 .

(1.7)

(1.8)

The minimum voltage gain per stage must be such that the magnitude of the loop gain at ωosc is equal to unity: A30 (1.9) q 3 =1 2 ) 1 + ( ωωosc 0 Substituting (1.8) in (1.9) we obtain A0 = 2. In summary, a three-stage ring √ oscillator requires a low-frequency gain of 2 per stage, and it oscillates at a frequency of 3ω0 where ω0 is the 3-dB bandwidth of each stage. Waveforms The circuit begins to oscillate at a frequency at which the loop gain is higher than unity, thereby experiencing an exponential growth in its output amplitude. Considering Fig. 1.10, if the circuit is released with X,Y, and Z at the trip points of the inverters, then each

Figure 1.10: Ring oscillator and its waveforms

stage operates as an amplifier, leading to an oscillation frequency at which each inverter contributes a frequency-dependent phase shift of 60°, as shown. With the high loop gain, the oscillation amplitude grows exponentially until the transistors enter the triode region at the peaks, thus lowering the gain. In steady state, the output of each inverter swings from nearly zero to nearly VDD . 2 Neglecting

the effect of gate-drain overlap capacitance.

7

It is useful to examine the waveform at the three nodes of the oscillator in Fig. 1.8. From the figure, it should be clear that the waveform at each node is 240°(or 120°) out of phase with respect to its neighboring nodes (Fig. 1.11). This ability to generate multiple phases

Figure 1.11: Multiple phases of a three-stage ring oscillator is a very useful property of ring oscillators. Amplitude Limiting From Barkhausen’s criteria, we know that if A0 < 2, the circuit fails to oscillate, and for A0 = 2 as seen, the circuit starts to oscillate. In a Re-Im plane, the situation is like that in Fig. 1.12. To examine what happens if A0 > 2, let us refer to Fig. 1.9 and compute the

Figure 1.12: Poles of three-stage ring oscillator for A0 < 2 and A0 = 2 closed-loop transfer function: −A30

(1+ ωs )3 −A30 Vout 0 = (s) = . 3 A Vin (1 + ωs0 )3 + A30 1 + (1+ 0s )3

(1.10)

ω0

Expanding the denominator:  
s
3 s s 2 s 3 2 1+ + A0 = 1 + + A0 (1 + ) − (1 + )A0 + A0 . ω0 ω0 ω0 ω0

(1.11)

Thus, the closed/loop system exibits three poles:

s2,3

s1 = (−A0 − 1)ω0 √   A0 (1 ± j 3) = − 1 ω0 . 2

8

(1.12) (1.13)

Figure 1.13: Poles of three-stage ring oscillator for A0 > 2

It can be seen that if A0 > 2, the two complex poles exhibit a positive real part and hence give rise to a growing sinusoid (Fig. 1.13). Computing the inverse Laplace transformation, the output is approximately: 3 √

A0 3 A0 − 2 ω0 t cos ω0 t . (1.14) Vout (t) = a exp 2 2 We surmise that, as the oscillation amplitude increases, each stage in the signal path experiences nonlinearity and eventually saturation, limiting the maximum amplitude. The poles begin in the right half plane, and eventually “move” to the imaginary axis to stop the growth. If the small-signal loop gain is greater than unity, the circuit must spend enough time in saturation so that the “average” loop gain is still equal to unity. Differential implementation It’s known that an important advantage of differential operation over single-ended signaling is higher immunity to “environmental” noise: considering that noise is an important issue for oscillators (see Chapter 4), it’s useful to consider also the differential version of Fig. 1.8, depicted in Fig. 1.14. Other useful properties of differential circuits over single-ended coun-

Figure 1.14: Differential implementation of the three-stage ring oscillator and waveforms terparts include: ˆ simpler biasing; 3 Neglecting

the first pole.

9

ˆ higher linearity; ˆ the increase in maximum achievable voltage swings.

While it may seem that differential circuits occupy twice as much area as single-ended alternatives, in practice this is a minor drawback. Also, the suppression of nonideal effects by differential operation often results in a smaller area than of a brute-force single-ended design. Furthermore, the numerous advantages of differential operation outweigh the possible increase of area. Ring oscillators with CMOS inverters Implementations in Fig. 1.15 are useful because they don’t require resistors. Suppose the

Figure 1.15: Ring oscillator using CMOS inverters circuit is released with an initial voltage at each node equal to Vtrip 4 . Supposing identical stages and no noise in the device, the circuit would remain in this state indefinitely (one of the nodes must be initialized at a different voltage), but noise components disturb each node, yelding waveforms like that in Fig. 1.16. Let now assume that the circuit begins

Figure 1.16: Waveforms after initializating nodes

with Vx = VDD . Under this condition, VY = 0 and VZ = VDD . Thus, when the circuit is released, VX begins to fall to zero, forcing VY to rise to VDD after one inverter delay TD and VZ to fall to zero after another inverter delay 5 . The circuit therefore oscillates with a delay of TD between consecutive node voltages, yielding a period of 6TD ( Fig. √ 1.17). Considering equation (1.14), the small-signal oscillation frequency is given by A0 3ω0 /2, but the large-signal analysis done in this subsection reveals that the value is 1/6TD . These two values are not necessarily equal 6 .This means that when the circuit is released with all √ inverters at their trip points, the oscillation begins with a frequency of A0 3ω0 /2 but, as the amplitude grows and the circuit becomes nonlinear, the frequency shifts to 1/6TD (a lower value). 4 The

trip point of an inverters the input voltage that results in an equal output voltage. a balanced CMOS inverter, tP HL = tP LH = tD , where HL means High to Low, and LH means Low to High. 6 After all, ω is determined by the small-signal output resistance and capacitance of each inverter near 0 the trip point whereas TD results from the large-signal nonlinear current drive and capacitance of each stage. 5 In

10

Figure 1.17: Waveforms of ring oscillator when one node is initialized at VDD

The differential implementation can utilize an even number of stages simply by configuring one stage such that it does not invert. Shown in Fig. 1.18, this flexibility demonstrates

Figure 1.18: Four-stage differential ring oscillator

another advantage of differential circuits over their single-ended counterparts. Doing the same √ analysis shown in the calculation subsection, it could be seen that ωosc = ω0 and A0 = 2. As expected, this value is lower than that required in a three-stage ring. The number of stages in a ring oscillator is determined by various requirements, including speed, power dissipation, noise immunity, etc. In most applications, three to five stages provide optimum performance [3]. Cadence simulation A simulation of the behavior of a 15-stage ring oscillator was performed in Cadence Virtuoso. First, a CMOS inverting stage is instantiated, then a symbol is created to make our schematic more readable, as shown in Fig. 1.19. Each inverting stage is characterized as follows: ˆ PMOS has 100 nm of length, 400 nm of total width, one 400 nm finger; ˆ NMOS has 100 nm of length, 240 nm of total width, one 240 nm finger.

VDD is set to 1V. A .trans analysis is done (stop time:1.5 ns), and the result is depicted in Fig. 1.20. Peaks are given by parasitic capacitance that are taken into account in a realistic simulation. The oscillation period is computed in Cadence as well (Fig. 1.21). The result is 400ps. In terms of gate delay, the period T has a total of 15 low-to-high and 15 high-to-low transitions. T = N (tP LH + tP HL )

(1.15)

(tP LH + tP HL ) . 2

(1.16)

T 2N

(1.17)

tP = Therefore:

tP =

11

Figure 1.19: Cadence schematic of a 15-stage ring oscillator

Figure 1.20: Simulation result

Figure 1.21: Computation of the oscillation period

12

For N = 15, tP = 400/30 = 13.3 ps. This is the delay of an inverter whose output is loaded with an identically sized inverter. This is also called the delay of a fanout-of-one (FO1) inverter. In circuits optimized for speed, the typical fanout is about 4, so designers often use a fanout-of-four (FO4) inverter as the normalization unit to compare the quality of their designs. It is therefore of interest to evaluate the FO4 delay for a given technology [4].

1.4

LC oscillators

Thanks to several techniques for the optimization of monolothic inductors in bipolar and CMOS technologies [5] introduced in the past 10 years, oscillators based on passive resonant circuits have became dominant. LC oscillators are widely used as VCOs 7 because they can provide much less phase noise than ring oscillators, which is critical for good sensitivity and selectivity in a transceiver. With the continued down-scaling of feature sizes in IC technology, designing very low phase noise monolithic LC oscillators is a challenge since it requires expertise in oscillator design, device modeling, layout, and chip characterization and testing. A comprehensive top-down LC oscillator design methodology starts by oscillator topology selection subject to design constraints such as power dissipation, tank amplitude, tuning range, and diameters of spiral inductors. The optimization search requires LC oscillator models which span the simplest equation-based oscillator characteristics to the more involved behavioral models. It also covers some of the practical implementation limitations which can affect the topology selection and might result in a less optimal solution. Inductor, varactor, and capacitor modeling is another essential component that is done either at the same stage or right after it. Let’s see all these issues in the following subsections.

1.4.1

LC tanks

As shown in Fig. 1.22 an inductor L1 placed in parallel with a capacitor C1 resonates at

Figure 1.22: (a) Ideal and(b) realistic LC tanks a frequency ωres = √L1 C . At this frequency, the impedances of the inductor jL1 ωres , 1 1 1 and the capacitor jωres C1 are equal and opposite (Fig. 1.23), thereby yielding an infinite impedance. It’s said that the circuit has an infinite quality factor Q, and a lossless tank with its nonzero initial condition is viewed as an oscillator with infinite Q. In practice, inductors and capacitors suffers from resistive losses [5]. For example, the series resistance of the metal wire used in the inductor can be modeled as in Fig. 1.22 (b), and in this case we define the Q of the inductor as LR1Sω . A series resistance can embody both low-frequency and skin resistance [6], but with a constant RS , the model is valid for a limited frequency 7 See

Chapter 3 and 4.

13

Figure 1.23: resonance frequency of a LC tank

range. Since |Zeq (s = jω)|2 =

RS2 + L21 ω 2 , (1 − L1 C1 ω 2 )2 + RS2 C12 ω 2

(1.18)

the impedance does not go to infinity at any s = jω, and so the circuit has a finite Q. Expecially for inductors, Q plays a critical role in various RF circuits. For example, the phase noise of oscillators is proportional to Q12 and the voltage gain of “tuned amplifiers” is proportional to Q. In typical CMOS technologies, and for frequencies up to 5 GHz, a Q of 5 is considered moderate and a Q of 10 relatively high. Some definitions of Q can be found in the literature [5], but for now we consider Q as follows: Q=

Im{Z1 } Re{Z1 }

(1.19)

meaning a measure of how much energy is lost in an inductor when it carries a sinusoidal current. Since only resistive components dissipate energy, the loss mechanism of inductors relate to various resistances within or around the structures that carry when the inductor does. We must recognize however that, in general, the analysis of a circuit does not require a knowledge of the Q’s of its constituent devices. Each component can be modelled with a circuit, simple or complex depending on what we should take into account, and this circuit represents the property of the device completely. A detailed discussion of loss mechanism of inductors and capacitors, whith their equivalent circuits can be found in [5]. The circuit of Fig. 1.22 can be transformed to an equivalent topology that more easily lends itself to analysis and design. Shown in Fig. 1.24, we can see that the loss can be modelled by

Figure 1.24: Conversion of a series combination to a parallel combination a parallel resistance, but still for a narrow range if RP is constant. For the two impedances to be equivalent: RP LP s L1 s + Rs = . (1.20) RP + LP s Considering only the steady state response, we assume that s = jω and rewrite the above equation as (L1 RP + LP RS )jω + RS RP − L1 LP ω 2 = RP LP jω. (1.21) 14

This relationship must hold for all values of ω (in a narrow range), mandating that L1 RP + LP RS = RP LP ,

(1.22)

RS RP − L1 LP ω 2 = 0.

(1.23)

Calculating RP from the latter and substituting in the former, we have LP = L1 1 +

RS2
. L21 ω 2

(1.24)

Recall that L1 ω/Rs = Q, whose value is typically greater than 3 for monolithic inductors. Thus, LP ≈ L1 , (1.25) and RP ≈

L21 ω 2 ≈ Q2 RS . RS

(1.26)

In other words, the parallel network has the same reactance, but a resistance Q2 times the series resistance. This concept holds valid for a first-order RC network as well if the Q of the series combination is defined as 1/(Cω)/RS . Note that in general, the quality-factor of the capacitor is much higher than the quality-factor of the inductor. Therefore, the resulting parallel resistance of the oscillator tank is mainly determined by the inductor. The significance of this series-to-parallel resistance conversion is that the oscillator tank reduces to a parallel loss resistance Rp at the resonance frequency. The above transormation allows the conversion illustrated in Fig. 1.25, where CP = C1 . The

Figure 1.25: Conversion of a tank to three parallel components. √ insight gained from the parallel combination is that at ω1 = 1/ LP CP the tank reduces to a simple resistor; i.e., the phase difference between the voltage and current of the tank drops to zero. In this case too, the behavior is inductive for ω < ω1 and capacitive for ω > ω1 , meaning that the phase of the impedance is positive for ω < ω1 and negative for ω > ω1 . We can compute the Q for the circuit in Fig. 1.25; using equation (1.19), we have Z1 (s) =

RP LP s . RP LP CP s2 + LP s + RP

(1.27)

Computing the equation for s = jω , it follows that: Q=

  RP (1 − LP CP ω 2 ) RP ω2 = 1− 2 , LP ω LP ω ωSR

(1.28)

√ where ωSR = 1/ LP CP . At frequencies well below ωSR , we have Q ≈ RP /(L1 ω). On the other hand, as the frequency approaches fSR , Q falls to zero, as shown in Fig. 1.26. By analogy with LP = impedance/ω = (LP ω)/ω, the equivalent inductance of a structure is sometimes defined as Im{Z1 (jω)}/ω. Referring to Fig. 1.25 we have: R2 LP (1 − LP CP ω 2 Im{ZP (jω} = 2 P . ω RP (1 − LP CP ω 2 )2 + LP ω 2 15

(1.29)

Figure 1.26: Behaviour of one definition of Q

Figure 1.27: Magnitude-phase plots for a typical bandpass parallel RLC circuit

This expression simplifies to LP at frequencies well below fSR but falls to zero at resonance. A typical magnitude and phase plot for a more realistic filter is shown in Fig. 1.27, which shows that an RLC resonant circuit has a bandpass characteristic. At ω = ω0 , the impedances of the inductor and capacitor have the same magnitude but opposite phase angle, thus canceling each other and yielding |Z(jω0 )| = Rp and 6 Z(jω0 ) = 0. As ω is decreased from ω0 , the inductor’s impedance dominates the overall parallel RLC circuit impedance, causing |Z(jω)| to approach ωLp and 6 Z(jω) to approach π/2. Similarly, as ω is increased beyond ω0 , the capacitor’s impedance dominates the overall parallel RLC circuit impedance, causing |Z(jω)| to approach ωCp and 6 Z(jω) to√approach −π/2. The two half-power (-3dB) frequencies ω1 and ω2 (at which |Z(jω)| = Rp / 2 and 6 Z(jω) = π/4 and −π/4, respectively) are often used to specify the bandwidth of the filter. The −3dB bandwidth of the parallel RLC circuit is ω0 /Q. Therefore, there is an inherent filtering action in the LC-tank oscillator which substantially reduces the phase noise of the oscillator.

1.4.2

Tuned stage

Let us now consider the “tuned”stage of Fig. 1.28, where an LC tank operates as the load. At resonance, jLP ω = 1/(jCP ω) and the voltage gain equals −gm1 RP . At resonance, the total phase shift around the loop is equal to 180° rather than 360°. Thus, the circuit does not oscillate. Anyway, before modifying the circuit for oscillatory behavior, let us observe another interesting property of the gain stage of Fig. 1.28(a) that distinguishes it from a common-source topology using a resistive load. Suppose, as shown in Fig. 1.29, that the stage is biased at a drain current I1 . If the series resistance load of the inductor is small, the dc level of Vout is close to VDD . If a small sinusoidal voltage at the resonance frequency is applied to the input, we expect Vout to be an inverted sinusoid with an average value near VDD because the inductor cannot sustain a large dc drop. In other words, if the average 16

Figure 1.28: (a) Tuned gain stage, (b) stage of (a) in feedback.

Figure 1.29: Output signal levels in a tuned stage.

value of Vout deviates significantly from VDD , then the inductor’s series resistance must carry an average current greater that I1 . Thus, the peak output level in fact exceeds the supply voltage, an important and often useful attribute of the LC load.

1.4.3

Cross-Coupled Oscillator

Examining the circuit in Fig. 1.28, we simply need to increase the phase shift to 360°, perhaps by inserting another stage in the loop. As depicted in Fig. 1.30, the idea is to

Figure 1.30: Two tuned stage in a feedback loop.

cascade two identical LC-tuned stages so that, at resonance, the total phase shift around the loop is 360°. This configuration does not latch up because its low frequency gain is very small; furthermore, at resonance, the total phase shift around the loop is zero because each stage contributes zero frequency-dependent phase shift. That is, if (gm1 RP )(gm2 RP ) ≥ 1, then the loop oscillates, and both VX and VY are differential waveforms (Fig. 1.31). This last observation suggests that M1 and M2 can be converted to a differential pair, as depicted in Fig. 1.32. This circuit is called a “cross-coupled” oscillator due to the connection of M1 and M2 . Forming the core of most RF oscillators used in practice, it is useful to show some features of this configuration.

17

Figure 1.31: Differential waveforms during startup transient.

Figure 1.32: Redrawing of the oscillator in Fig. 1.30 with a tail current source to lower its supply sensitivity.

Open-loop voltage gain and phase, and oscillation frequency Let us compute the oscillation frequency of the circuit. The capacitance at X includes CGS2 , CDB1 , and the effect of CGD1 and CGD2 . We note that (a) CGD1 and CGD2 are in parallel, and (b) the total voltage change across CGD1 + CGD2 is equal to twice the voltage change at X (or Y), because VX and VY vary differentially. Thus: 1 ωosc = p . L1 (CGS2 + CDB1 + 4CGD + C1 )

(1.30)

Here, C1 denotes the parasitic capacitance of L1 plus the input capacitance of the next stage. Supply sensitivity The circuit of Fig. 1.32 is constructed in fully differential form. The supply sensitivity of the circuit, is nonzero however, even with perfect simmetry (if the tail current source is ideal). This is because the drain junction capacitances of M1 and M2 vary with the supply voltage. This property is important for VCOs (see Chapter 3). Choice of gm The foregoing studies may suggest that the gm of the cross-coupled transistors should be chosen slightly greater than the resistance RP of the tank to ensure oscillation. However, this choice leads to small voltage swings; if the swings are large, e.g., if M1 and M2 switch completely, then the gm falls below 1/RP for part of the period, failing to sustain oscillation. That is, with gm ≈ 1/RP , M1 and M2 must remain linear to avoid compression. In practice, therefore, we design the circuit for nearly complete current steering between M1 and M2 , inevitably choosing a gm that is much larger than 1/RP .

1.4.4

Colpitts oscillator

An LC oscillator may also be realized with only one transistor in the signal path. Consider again the tuned gain stage in Fig. 1.28 and recall that the drain voltage cannot be applied 18

to the gate because the overall phase shift at resonance equals 180° rather than 360°. Also recall that the phase shift from the source to the drain in a common-gate stage is zero. We then surmise that if, as shown in Fig. 1.33, the drain voltage is returned to the source

Figure 1.33: Tuned stage with feedback applied from drain to source. rather than the gate, the circuit may oscillate. The coupling must incorporate a capacitor to avoid disturbing the bias point of M1 . Unfortunately, owing to insufficient loop gain, the circuit of Fig. 1.33 does not oscillate. So we then add a capacitor from the source of M1 to ground, as shown in Fig. 1.34, seeking

Figure 1.34: (a)Colpitts oscillator, (b) equivalent circuit of (a) with input stimulus.

conditions of oscillation. This topology is known as the Colpitts oscillator. Note that the capacitor in parallel with LP is removed (the reason will be clear later). Colpitts oscillators are widely used in RF VCOs due to their low phase-noise at high frequencies, so an entire chapter8 is dedicated to this topology. At this point, only some relations are shown, reminding the reader that a more detailed analysis will be presented in the following chapter. From some calculations using the equivalent circuit in Fig. 1.34 (b), we have: 2 ωR =

and gm RP =

1 C2 LP CC11+C 2

,

C1 C2 2 (1 + ) . C2 C1

(1.31)

(1.32)

Recognizing that gm RP is the voltage gain from the source of M1 to the output9 , it could be prooven that the minimum ratio C1 /C2 necessary to achieve the minimum gain is 1, requiring that: gm RP ≥ 4 (1.33) Equation (1.33) demonstrates an important disadvantage of the Colpitts oscillator with respect to the cross-coupled topology: the former demands a voltage gain of at least 4 at 8 Chapter

2.

9 Neglecting

the body effect.

19

resonance, and the latter, only unity. If CP had not been removed from the parallel circuit, Eq. (1.31) would be: 2 ωR =

1 LP (CP +

C1 C2 C1 +C2 )

,

(1.34)

whereas (1.33) remains unchanged. Thus, CP is simply included in parallel with the series combination of C1 and C2 .

1.4.5

One-Port Oscillators

An alternative view that provides more insight into the oscillation phenomenon employs the concept of negative resistance. To arrive at this view, let us first consider a simple tank that is stimulated by a current impulse (Fig.1.35). The tank responds with a decaying

Figure 1.35: Decaying impulse response of a tank. oscillatory behavior because, in every cycle, some of the energy that oscillates between the capacitor and the inductor is lost in the form of heat in the resistor. Now suppose a resistor equal to −RP is placed in parallel with RP and the experiment is repeated (Fig. 1.36). Since the impedance is infinite, the tank oscillates indefinitely. Thus, if a one-port circuit

Figure 1.36: Addition of negative resistance to cancel loss in RP . exibiting a negative resistance is placed in parallel with a tank (Fig. 1.37), the combination

Figure 1.37: Use of an active circuit to provide negative resistance. may oscillate. Such a topology is called a one-port oscillator. How to create a negative resistance? We know that feedback multiplies or divides the input and output impedances of circuits by a factor equal to one plus the loop gain [7]. Thus, if the loop gain is sufficiently negative, i.e., the feedback is sufficiently positive, a negative resistance is achieved. As an example, let us apply positive feedback around a source follower. The follower introduces no signal inversion and neither must the feedback network. As shown in Fig. 1.38, we implement

20

Figure 1.38: (a) Source follower with positive feedback to create negative input imedance, (b) equivalent circuit of (a) to calculate the input impedance.

the feedback with a common-gate stage and add the current source Ib to provide the bias current for M2 . From the equivalent circuit in Fig. 1.38 (b)10 , we have IX = gm2 V2 = −gm1 V1 and Vx = V1 − V2 = −

IX IX − . gm1 gm2

(1.35)

(1.36)

Thus,

and, if gm1 = gm2 = gm , then

  1 1 Vx =− + IX gm1 gm2

(1.37)

Vx −2 = . IX gm

(1.38)

Seen as an incremental quantity, a negative resistance indicates that if the applied voltage increases, the current drawn by the circuit decreases. As another method of creating negative resistance, consider the topology depicted in Fig. 1.39. The impedance Zin can be obtained by noting that C1 carries a current equal to IX , gen-

Figure 1.39: (a) Circuit providing negative resistance, (b) equivalent circuit.

erating a gate-source voltage of IX /(C1 s) and hence a drain current of −IX gm /(C1 s). The difference between IX and the drain current flows through C2 , producing a voltage equal to [IX + IX gm /(C1 s)]/(C2 s). This voltage must be equal to VGS + VX . After some algebra, 1 1 gm VX (jω) = + − . IX jωC1 jωC2 C1 C2 ω 2

(1.39)

Thus, the input impedance can be viewed as a series combination of C1 , C2 , and a negative resistance equal to −gm /(C1 C2 ω 2 ) as depicted in Fig. 1.39 (b). Interestingly, the negative impedance varies with frequency. 10 Neglecting

channel-length modulation and body effect.

21

Negative resistance Oscillators With a negative resistance available, we can now construct an oscillator as illustrated in Fig. 1.40. Here, RP denotes the equivalent parallel resistance of the tank and, for oscillation

Figure 1.40: Oscillator using negative input resistance of a source follower with positive feedback. to build-up, RP − 2/gm ≥ 0. Note that this configuration is similar to the Colpitts one, but with the feedback capacitor replaced by a source follower. More interestingly, the circuit can be redrawn as in Fig. 1.41. These observations make clear that one port oscillators are

Figure 1.41: Differential version.

only a different point of view of feedback oscillators. Using the other method of obtaining a negative resistance (Fig. 1.39), we can build an oscillator if an inductor is placed as shown in Fig. 1.42. Of the three nodes in the circuit,

Figure 1.42: Oscillator using.

one can be an ac ground, resulting in the three different topologies illustrated in Fig. 1.43.

1.4.6

Hartley Oscillator

The Hartley Oscillator is a particularly useful circuit for producing good quality sine wave signals in the RF range (30kHz to 30MHz) although at the higher limits of this range and above, the Colpitts oscillator is usually preferred. Although both these oscillators use an LC tuned (tank) circuit to control the oscillator frequency, the Hartley design can be recognised by its use of a tapped inductor (L1 and L2 in Fig. 1.44). The frequency of oscillation can

22

Figure 1.43: Oscillator topologies derived from the circuit of Fig. 1.42 .

Figure 1.44: Hartley oscillator.

be calculated in the same way as any parallel resonant circuit, using: fr =

1 √ , 2π LC

(1.40)

where L = L1 + L2 . This basic formula is adequate where the mutual inductance between L1 and L2 is negligible, but needs to be modified when the mutual inductance between L1 and L2 is considerable. Mutual inductance is an additional effective amount of inductance caused by the magnetic field created around one inductor (or one part of a tapped inductor) inducing a current in the other inductor. When both inductors are wound on a common core, as shown in Fig. 1.45, the effect of mutual inductance M can be considerable and the total inductance

Figure 1.45: Centred tapped inductors on a common core . is calculated using the formula: LT OT = L1 + L2 ± 2M.

(1.41)

The actual value of M depends on how effectively the two inductors are magnetically coupled which, among other factors, depends on the spacing between the inductors, the number of turns on each inductor, the dimensions of each coil, and the material of the common core. 23

The Hartley configuration is not so popular for IC implementations due to the fact that capacitors are easier to realize than inductors.

1.4.7

Armstrong Oscillator

The Armstrong oscillator is used to produce a sine-wave output of constant amplitude and of fairly constant frequency within the RF range. It is generally used as a local oscillator in receivers, as a source in signal generators, and as a radio-frequency oscillator in the mediumand high-frequency range. The identifying characteristics of the Armstrong oscillator are that: ˆ it uses an LC tuned circuit to establish the frequency of oscillation; ˆ feedback is accomplished by mutual inductive coupling between the tickler coil and the LC tuned circuit; ˆ it uses a class C amplifier with self-bias.

Its frequency is fairly stable, and the output amplitude is relatively constant [8]. The oscillator’s schematic is shown in Fig. 1.46. R2 provides the forward bias for Q1 , C2 is a

Figure 1.46: Basic Armstrong oscillator circuit.

coupling capacitor, and L1 and R1 form the collector load impedance. This is a commonemitter configuration which provides the 180° phase shift between the base and collector. The frequency-determining circuit is composed of inductor L2 and capacitor C1 . The latter is a variable tuning capacitor which is used to adjust the resonant frequency to the desired value. Fig. 1.47 shows the feedback network which uses L1 (the collector load) as the

Figure 1.47: Feedback Network of Armstrong oscillator. primary and L2 as the secondary winding of a coupling transformer to provide a 180° phase shift. Variable resistor R1 controls the amount of current through L1 . When R1 is adjusted for maximum resistance, most of the current flows through L1 . The transformer 24

now couples a maximum signal which represents a large feedback amplitude into the tank circuit (L2 , C1 ). If R1 is adjusted for a smaller resistance, less current flows through L1 , and less energy is coupled to the tank circuit; therefore, the feedback amplitude decreases. R1 is normally adjusted so that the L1 current is adequate to sustain tank oscillations. Let us analyze the circuit in Fig. 1.46. Connecting the feedback network through coupling capacitor C2 to the base of Q1 forms a ”closed loop” for feedback (shown by the solid arrows). Let’s verify that the feedback is regenerative. Assume a positive signal on the base of Q1 . The transistor conducts heavily when forward biased. This current flows through L1 and R1 and causes the voltage across L1 to increase. The voltage increase is inductively coupled to L2 and inverted. This action ensures that the voltage is positive at the base end of L2 and C1 and in phase with the base voltage. The positive signal is now coupled through C2 to the base of Q1 . The regenerative feedback offsets the damping in the frequency-determining network and has sufficient amplitude to provide unity circuit gain. When VCC is applied to the circuit, a small amount of base current flows through R2 which sets the forward bias on Q1 . This forward bias causes collector current to flow from ground through Q1 , R1 , and L1 to +VCC . The current through L1 develops a magnetic field which induces a voltage into the tank circuit. The voltage is positive at the top of L2 and C1 . At this time, two actions occur. First, the resonant tank capacitor C1 charges to this voltage; the tank circuit now has stored energy. Second, coupling capacitor C2 couples the positive signal to the base of Q1 . With a positive signal on its base, Q1 conducts harder. With Q1 conducting harder, more current flows through L1 , a larger voltage is induced into L2 , and a larger positive signal is coupled back to the base of Q1 . While this is taking place, the frequency-determining device is storing more energy and C1 is charging to the voltage induced on L2 . The transistor will continue to increase in conduction until it reaches saturation. At saturation, the collector current of Q1 is at a maximum value and cannot increase any further. With a steady current through L1 , the magnetic fields are not moving and no voltage is induced into the secondary. With no external voltage applied, C1 acts as a voltage source and discharges. As the voltage across C1 decreases, its energy is transferred to the magnetic field of L2 . Now, let’s look at C2 . The coupling capacitor, C2 , has charged to approximately the same voltage as C1 . As C1 discharges, C2 discharges. The primary discharge path for C2 is through R2 (shown by the dashed arrow). As C2 discharges, the voltage drop across R2 opposes the forward bias on Q1 and the collector current begins to decrease. This is caused by the decreasing positive potential at the base of Q1 . A decrease in collector current allows the magnetic field of L1 to collapse. The collapsing field of L1 induces a negative voltage into the secondary which is coupled through C2 and makes the base of Q1 more negative. This, again, is regenerative action; it continues until Q1 is driven into cutoff. When Q1 is cut off, the tank circuit continues to flywheel, or oscillate. The flywheel effect not only produces a sine-wave signal, but it aids in keeping Q1 cut off. Without feedback, the oscillations of L2 and C1 would dampen out after several cycles. To ensure that the amplitude of the signal remains constant, regenerative feedback is supplied to the tank once each cycle, as follows: as the voltage across C1 reaches maximum negative, C1 begins discharging toward 0 volts. Q1 is still below cutoff. C1 continues to discharge through 0 volts and becomes positively charged. The tank circuit voltage is again coupled to the base of Q1 , so the base voltage becomes positive and allows collector current to flow. The collector current creates a magnetic field in L1 , which is coupled into the tank. This feedback action replaces any lost energy in the tank circuit and drives Q1 toward saturation. After saturation is reached, the transistor is again driven into cutoff. The operation of the Armstrong oscillator is basically this: power applied to the transistor allows energy to be applied to the tank circuit, causing it to oscillate. Once every cycle, the transistor conducts for a short period of time (class C operation) and returns enough energy to the tank to ensure a constant amplitude output signal. Class C operation has high efficiency and low loading characteristics. The longer Q1 is cut off, the less the loading on the frequency-determining device.

25

A series-fed, tuned collector Armstrong oscillator is illustrated in Fig. 1.48. The dc path

Figure 1.48: Series-fed tuned-collector Armstrong oscillators.. is from the negative side (ground) of VCC through RE , Q1 , T1 , and back to the positive side of VCC . The figure clearly illustrates that both the ac and dc components flow through the tank circuit. By modifying the circuit slightly, it becomes a shunt-fed, tuned collector Armstrong oscillator, as shown in Fig. 1.49. The dc component flows from ground through RE to Q1

Figure 1.49: Shunt-fed tuned-collector Armstrong oscillators. to positive VCC . The dc is blocked from the tank circuit by capacitor C2 . Only the ac component flows in the tank circuit.

1.5

RC oscillators

An oscillator circuit which uses an RC network, a combination of resistors and capacitors, for its frequency selective part is called an RC oscillator. The low pass filter in Fig. 1.50 provides a phase shift that depends on the frequency: A=

1/jωC 1 − jωRC = 1/jωC + R 1 + ω 2 R2 C 2 φ = arctan(−ωRC).

(1.42) (1.43)

Interestingly, an RC oscillator can be seen as an inductorless synthesis of an LC oscillator [9]. Let us consider two typical configurations. 26

Figure 1.50: RC filter.

1.5.1

Wien bridge oscillator

A Wien bridge oscillator is a sinusoidal oscillator based on a so called RC lead-lag network, as shown in Fig. 1.51 We can see this network as a pass-low filter (R1 and C1 ), together

Figure 1.51: Lead-lag network. with a high-pass filter (R2 and C2 ). The transfer function of this setup is easily computed: H(jω) =

Vout R2 ||(−jXC2 ) . = Vin R1 − jXC1 + R2 ||(−jXC2 )

(1.44)

The most interesting case is when R1 = R2 and C1 = C2 . After some algebra: H(jω) =

RX , 3RX + j(R2 + X 2 )

B=q

1 X R

9+

X φ = arctan

R

− − 3


R 2 X R X

,

(1.45) (1.46)

 .

(1.47)

Fig. 1.52 shows both the gain in voltage (B) and the phase shift (φ) as a function of the

Figure 1.52: Lead-lag network gain and phase shift for RC = 1/2π. frequency. The oscillating frequency is: fr =

1 , 2πRC 27

(1.48)

and, for this frequency, we have that B = 1/3 and φ = 0°. This means that the amplifier should have a gain A = 3 and introduce a phase shift φ = 0°. Fig. 1.53 shows the base schematic of a Wien oscillator, based on an operational amplifier.

Figure 1.53: Wien-bridge, base setup. Positive feedback is created by the lead-lag network, and the negative feedback creates a non-inverting amplifer with gain: A=1+

R1 = 3. R2

(1.49)

Thus R1 = 2R2 .

(1.50)

At startup, the gain of the negative feedback should be greater than 3, and later, once the output amplitude has been achieved, go back to 3. There are various methods to accomplish this in an automatic way: ˆ The most easy and classical method is to use a low power incandescent lamp instead of R2 . When swicthed on, the resistance of the lamp is small, giving an amplification greater that 3. Once the oscillations grows in amplitude the resistance also goes up, arriving to a value R0 in the desired amplitude. If the feedback resistance is chosen to be R1 = 2R0 , we will automatically obtain a gain A = 3, giving stable oscillations; ˆ Another method consists of adding a third resistor R3 in parallel with two zener diodes connected back to back, as shown in Fig. 1.54. When switched on, the zener

Figure 1.54: Wien with zeners. diodes are in open circuit, giving the value of the gain as: A=1+

R1 + R3 R3 =3+ . R2 R2

(1.51)

Once the output arrives at the zener voltage, the diodes short circuit the resistor, restoring the gain A = 3, and the output signal becomes stable. 28

1.5.2

”Twin-T” oscillator

The second common design is called a ”Twin-T” oscillator as it uses two ”T” RC circuits operated in parallel (Fig. 1.55). One circuit is an R-C-R ”T” which acts as a low-pass filter.

Figure 1.55: Twin-T filter. The second circuit is a C-R-C ”T” which operates as a high-pass filter. Together, these circuits form a bridge which is tuned to the desired frequency of oscillation. The signal in the C-R-C branch of the Twin-T filter is advanced, in the R-C-R - delayed, so they may cancel one another at the frequency 1 , (1.52) 2πRC if x = 2. If the filter is connected in the negative feedback path of an amplifier, and x > 2, the amplifier becomes an oscillator. f=

Phase-shift oscillator A phase-shift oscillator is a linear electronic oscillator circuit that produces a sine wave output. It consists of an inverting amplifier element such as a transistor or operational amplifier with its output fed back to its input through a phase-shift network consisting of resistors and capacitors. The feedback network ’shifts’ the phase of the amplifier output by 180° at the oscillation frequency to give positive feedback [9]. Phase-shift oscillators are often used at audio frequency as audio oscillators. The filter produces a phase shift that increases with frequency. It must have a maximum phase shift of more than 180 ° at high frequencies so that the phase shift at the desired oscillation frequency can be 180°. The most common phase-shift network cascades three identical resistor-capacitor stages that produce a phase shift of zero at low frequencies and 270° at high frequencies. One of the simplest implementations of this type of oscillator uses an operational amplifier (op-amp), three capacitors and four resistors, as shown in Fig. 1.56. The mathematics for calculating the oscillation frequency and oscillation criterion for this circuit are surprisingly complex, due to each RC stage loading the previous ones. The calculations are greatly simplified by setting all the resistors (except the negative feedback resistor) and all the capacitors to the same values. In the diagram, if R1 = R2 = R3 = R, and C1 = C2 = C3 = C, then [12]: fosc =

1 √ , 2πRC 6

(1.53)

and the oscillation criterion requires that: Rf b = 29R.

(1.54)

Without the simplification of all the resistors and capacitors having the same values, the calculations become more complex [10]. 29

Figure 1.56: A simple example of a phase-shift oscillator.

As with other feedback oscillators, when power is applied to the circuit, thermal electrical noise in the circuit or the turn-on transient provides an initial signal to start oscillations. The oscillations grow rapidly in amplitude until saturation of the op-amp or transistor limits the gain, and they stabilize at a constant amplitude at which the loop gain of the circuit is unity.

1.6

Crystal Controlled Oscillator

The most accurate and state of art oscillator is one that uses a piezoelectric crystal in the feedback loop to control the frequency [11]. Quartz is one type of crystalline substance that is found in nature that exhibits the piezoelectric effect. When a changing mechanical stress is applied to the crystal, it vibrates and a voltage is developed at the frequency of mechanical vibration. If ac voltage is applied, it vibrates at the frequency of the applied voltage. The crystal has a natural resonant frequency which is determined by its physical dimensions and the way the crystal is cut. A quartz crystal can be represented by the symbol and circuit shown in Fig. 1.57. A piezoelectric crystal can oscillate in two modes, which are the

Figure 1.57: (a)Symbol, (b) Electrical equivalent circuit of quartz crystal. fundamental and overtone modes. The fundamental mode is the lowest frequency, which is its natural frequency. The fundamental frequency depends on the crystal’s dimension and the type of cut, and is inversely proportional to the thickness of the crystal slab. Most crystals can operate up to 20 MHz. Thus, it is necessary to overtone at the odd multiple of the fundamental frequency. Assuming that RS is small, the impedance Z(jω) of the crystal will be: Z(jω) =

1 −ω 2 + 1/Ls Cs . jωCm −ω 2 + [(Cm + Cs )/(Ls Cm Cs )]

(1.55)

A basic crystal oscillator is shown in Fig. 1.58. Capacitor CC is used to fine tune the frequency of the oscillator.

30

Figure 1.58: (a)Symbol, (b) Crystal oscillator.

1.6.1

Pierce and Miller oscillators

One of the most commonly used oscillator circuits is the Pierce oscillator, shown in Fig. 1.59. This is basically a common-source Colpitts circuit with the crystal (inductive part) forming

Figure 1.59: Pierce oscillator circuit. a resonant circuit with CG , CD , and the internal capacitance of the FET. The circuit can be tuned by varying both CG and CD , or by adding a small variable capacitance across the crystal. Only slight variations in frequency are possible with any one crystal because fs and fp are so close together. The RF load resistance is RD ; it could be bypassed with an RF choke, if necessary, to keep direct current out of the load. The blocking capacitor CB is intended to be a short circuit at RF. The Pierce circuit lacks an inductor, and its frequency may be changed by replacing the crystal. This is important in applications that require transmitters and receivers that are capable of rapid switching between several crystal-controlled channels. The Miller oscillator in Fig. 1.60 is the crystal equivalent of a Hartley oscillator with no mutual inductance effects. Both the crystal and the output tank circuit look like inductive reactances at the oscillation frequency. The principal advantage of this circuit is that one side of the crystal, along with one side of any parallel frequency-adjustment capacitor, is grounded. Many others crystal oscillator circuits exist, and there is a considerable body of literature covering crystal oscillator types and performance [12].

31

Figure 1.60: The Miller oscillator.

1.7

Oscillator Design Techniques

Oscillator design is more of an art than an exact science. The circuits used reach steadystate operation only when a transistor has been driven so far into its nonlinear operation that its gain averaged over each output cycle drops by a small fraction from the nominal small-signal value. Datasheet tabulations of transistor parameters define only the initial conditions of an oscillator circuit; the transitional and final values are usually unknown. Equivalent circuits and most of the analytical tools of circuit analysis are based upon linearity, a condition that does not exist in most oscillators. This means that the steady-state operating conditions of an oscillator in general cannot be predicted accurately by simple mathematical techniques. In order for oscillations to start, the output of an amplifying device must be fed back to the input with a gain greater than unity and a phase shift of 0° or some multiple of 360° . In an ideal oscillator, this can occurr at only one frequency; this will be the frequency of oscillation. If the phase shift through the feedback network and transistor is independent of the transistor’s operating conditions, the frequency of oscillation will be the same at steady state as it was when oscillations began and it may be predicted accurately by small-signal analysis of the initial circuit. It is also possible to predict the minimum transistor gain that will initiate oscillation, but this and an estimate of the operating frequency are about all that small-signal analysis can yield. Frequency dependence of passive component values is another complicating factor. Capacitors larger than a few hundred picofarads tend to look inductive above about 10 M Hz, and stray capacitance between turns may cause inductors to become capacitive. These effects are difficult to model using conventional circuit theory, and they may allow a circuit to satisfy the conditions for oscillation at frequencies that are not predicted by circuit analysis. A practical result is that a circuit which looks good on paper may oscillate simultaneously at the intended frequency, at a low frequency (“motorboarding”) and at one or more high frequencies (“parasitics”). Usually these can be cured by employing high- quality inductors [4] and by connecting small (100 to 300 pF) capacitors in parallel with all bypass and coupling capacitors. At frequencies where the larger capacitors become inductive, the small ones provide effective short circuits. In extreme cases, ferrite beads may have to be slipped over the transistor leads to kill VHF oscillations. Circuit analysis of an oscillator is thus only the beginning of the design process. It will yield values for perhaps all of the frequency-determining components in the circuit, but it can say little or nothing about such things as power output, efficiency, waveform purity, frequency stability, and sensitivity to temperature and supply voltage variations [10]. These points are most often resolved by taking the small-signal computations as a starting point, and then building the circuit and adjusting component values until the desired performance is achieved.

32

Chapter 2

BJT Colpitts oscillator Silicon-Germanium (SiGe) technology is the driving force behind the explosion in low-cost, lightweight, personal communications devices like digital wireless handsets, as well as other entertainment and information technologies like Direct Broadcast Satellite (DBS), automobile collision avoidance systems, and personal digital assistants. SiGe extends the life of wireless phone batteries, and allows smaller and more durable communication devices. Products combining the capabilities of cellular phones, global positioning, and Internet access in one package, are being designed using SiGe technology. At the heart of SiGe technology is a SiGe heterojunction bipolar transistor (HBT), which offers advantages over both conventional silicon bipolar and silicon CMOS for the implementation of communications circuits. A SiGe HBT is similar to a conventional Si bipolar transistor except for the base. SiGe, a material with a narrower bandgap than Si, is used as the base material. The Ge composition is typically graded across the base to create an acclerating electric field for minority carriers moving across the base, typically 30-50 kV/cm. A direct result of the Ge grading in the base is higher speed, and thus higher operating frequency. The transistor gain is also increased compared to a Si BJT, which can then be traded for a lower base resistance, and hence lower noise. For the same amount of operating current, a SiGe HBT has a higher gain, lower RF noise, and low 1/f noise than an identically constructed Si BJT. The higher raw speed can be traded for lower power consumption as well. Since the oscillator designed in the thesis is made with this technology, in this chapter we present a detailed analysis of a BJT Colpitt oscillator. This topology has been encountered in Chapter 1 as well, but with MOSFET technology, and will be analyzed and simulated in this chapter, and in Chapter 5, in a more detailed way. The distinguishing feature of a Colpitts oscillator is the capacitively tapped resonator, with positive feedback provided by the active device (BJT or FET) to make oscillation possible. The Colpitts oscillator is commonly used in applications that require a simple yet reliable oscillator topology and where harmonic distortion is not critical. In general, simply generating some periodic output is not sufficient for modern highperformance RF receivers and transmitters. Issues of spectral purity and amplitude stability must also be addressed. In this chapter, we consider several aspects of oscillator design. First, we show why purely linear oscillators are a practical impossibility. We then present a linearization technique that uses describing functions to develop insight into how nonlinearities affect oscillator performance, with particular emphasis on predicting the amplitude of oscillation.

2.1

Feedback BJT Oscillators

The circuits shown in Figs. 2.1 through 2.4 represent the most common feedback BJT oscillators [13], already encountered in Chapter 1 in the context of MOSFETs. 33

Figure 2.1: Colpitts oscillator[13].

Figure 2.2: Hartley oscillator [13].

Figure 2.3: Tuned-output oscillator[13].

Figure 2.4: Tuned-input oscillator [13].

34

They usually employ a junction transistor operating in the common-base configuration, but other transistor connections and other active devices (such as operational amplifiers) can also be used. For analysis as a feedback system, the Colpitts oscillator of Fig. 2.1 has been redrawn in Fig. 2.5 as a connection of a gain element, a load, and a feedback

Figure 2.5: Colpitts oscillator separated into functional blocks.

network. Capacitor Cf is sometimes added for ease of tuning and Re minimizes the effects of varying the transistor’s input admittance. A voltage Vi at the transistor input port produces an output voltage V0 . The complex voltage gain V0 /Vi is determined by the transistor’s parameters together with the total load presented to the output. The total load is the parallel combination of the “load block” admittance looking into terminal 3 of the feedback network. For stable oscillation the feedback circuit must deliver the voltage Vi back to the transistor input. This requires a gain of unity and an effective phase shift of 0°(0°, 360°, and 720°, etc) around the loop 1-2-3-4-1. The circuit will oscillate at the frequency (or frequencies) that produces this phase shift, provided that the loop gain before oscillations start is greater than 11 . Ideally the frequency of oscillation would be determined by L, Cf , C1 , and C2 , but the input and the output susceptances of the transistor and the phase angle of its gain can have an appreciable effect, since, for the common-base configuration (as an example), we have α0 α= , (2.1) 1 + j ffα where α0 is the reverse current gain of the BJT, at dc and fT is its cutoff frequency. To understand this key point better, let us consider a different, but more clear, point of view of the feedback resonator-based oscillator shown in Fig. 2.6 [14]. According to the Barkhausen criteria for oscillation at frequency ω0 , Gm Z(jω0 ) = 1 and, assuming Gm is purely real2 , Gm Z(jω0 ) must also be purely real. A root locus plot allows us to view the closed loop pole locations as a function of the open loop poles/zero and open loop gain (Gm Rp ): as the gain (Gm Rp ) increases, the closed loop poles move into the right half S-plane. In particular, we have: ˆ if Gm Rp < 1, the closed loop poles end up in the left half S-plane, an underdamped response occurs and oscillation dies out (Fig. 2.7); 1 From

Barkhausen criteria encountered in Chapter 1. parasitic capacitances.

2 Neglecting

35

Figure 2.6: Modeling of a feedback resonator-based oscillator.

Figure 2.7: Root locus plot and closed loop step response ifGm Rp < 1.

ˆ if Gm Rp > 1, the closed loop poles end up in the right half S-plane, an unstable response occurs, and the waveform blows up (Fig. 2.8);

Figure 2.8: Root locus plot and closed loop step response ifGm Rp > 1.

ˆ if Gm Rp = 1, the closed loop poles end up on jω axis, and oscillation is maintained (Fig. 2.9).

In other words, once begun, oscillations begin to grow in amplitude until the transistor is in saturation and cut off during part of each cycle and the loop gain averaged over each cycle is one. Although any one of the three transistor terminals can be “grounded”, most oscillator circuits utilize either common-base or common-emitter circuits. With junction transistors the common base configuration is generally preferred for RF oscillators because: ˆ feedback within the transistor is minimized, allowing better control of the overall feedback by external circuit elements;

36

Figure 2.9: Root locus plot and closed loop step response ifGm Rp = 1.

ˆ the current gain has little phase shift and is nearly constant in amplitude up to a frequency of about fα /2 = fT /2.

In the common-emitter configuration, on the other hand, the current gain (β) drops off at 6 dB per octave in the upper RF region and its phase shift approaches 90°as shown in Fig. 2.10 [15].

Figure 2.10: Typical Common Emitter current gain versus frequency.

2.2

Tapped Resonant Circuits

Consider all the design equations of a typical RLC circuit shown in Fig. 2.11 and Fig. 2.12. The circuit’s bandwidth and Qt are fixed once the values of Rt and R are specified. In order to gain an extra degree of freedom so that the bandwidth and impedance ratio can be chosen indipendently, an extra circuit element is required. One way to do this is to divide either the inductor or capacitor side of the circuit into two series components with the low-resistance load across one of them, as shown in Figs. 2.13 and 2.14. Tapped circuits are used extensively in oscillators and narrow-band high-frequency amplifiers. Although the tapped resonant circuit provides more flexibility, the design process becomes more complicated. An exact analysis of these circuits provides no obvious clue as to the choice of L and C values; hence approximations of some sort must be made in order to arrive at useful solutions.

2.2.1

Tapped-Capacitor Circuit

The tapped-capacitor circuit, shown in Fig. 2.13, is frequently used in Colpitts oscillators. It is to be designed for specified values of R2 , Rt , resonance frequency f0 , and bandwidth B. The values of L, C1 and C2 are to be found. Coil loss will be neglected in the design3 . 3 However, it can be accounted for by reflecting the coil resistance r as an equivalent parallel resistance c equal to Q2L rc across the Rt port.

37

Figure 2.11: Design formulas for the resonant RL||C circuit [16].

Figure 2.12: Design formulas for the resonant RC||L circuit [16].

Figure 2.13: A tapped capacitor circuit.

38

Figure 2.14: A tapped inductor circuit.

By the use of the parallel-to-series conversion in Fig. 2.15, the equivalent circuit of Fig. 2.16

Figure 2.15: Parallel-series conversion formulae for RC networks [16].

is obtained. The capacitance C is the value of C1 and Cse in series, that is, C=

C1 Cse . C1 + Cse

(2.2)

For this circuit, the approximate relations in Fig. 2.12 show that a specification of f0 and B fixes the value of Qt , f0 Qt ≈ . (2.3) B From Fig. 2.12, the exact relationship between Rt and Rse is found to be Rse =

Rt , Q2t + 1 39

(2.4)

Figure 2.16: Equivalent circuit for the capacitive branch.

which shows that the value of Rse is fixed by Rt and Qt . From Fig. 2.15, using Qp = ω0 C2 R2 ,

(2.5)

R2 . Q2p + 1

(2.6)

it is also apparent that Rse =

Since Qp must be positive, it is clear from (2.4) that the value of R2 cannot be less than the value of Rse . It is useful to remember that when a resistance is paralleled with a capacitor or inductor, the resulting equivalent series resistance is always smaller than the original value. By equating (2.4) and (2.6), the value of Qp is found in terms of design parameters: r  2  R2 (Qt + 1) Qp = −1 . (2.7) Rt Furthermore, the impedance-transforming property of the circuit at resonance is equivalent to that of an ideal transformer with turns ratio N or impedance ratio N 2 , as shown in Fig. 2.17.

Figure 2.17: An ideal transformer equivalent. The use of

Rt = N2 (2.8) R2 in (2.7) gives an alternate expression for Qp , namely r Q2t + 1 Qp = − 1. (2.9) N2 Since this type of circuit is used primarily in narrow-band applications, the assumption will be made that the overall Qt of the circuit (seen at the Rt port) is greater than 10. Thus: r Q2t Qp ≈ − 1, (2.10) N2 or, for Qt /N > 10, which implies that Qp > 10, Qp ≈

40

Qt . N

(2.11)

Design procedure for Qp < 10 1. From specified values of Rt , R2 , f0 and B, use previously derived relationship to find Qt ≈

f0 (Qt ≥ 10), B

1 , 2πBRt 1 L≈ 2 , ω0 C

C≈

and N2 =

Rt . R2

(2.12) (2.13) (2.14)

(2.15)

2. If Qp ≈ Qt /N shows that Qp < 10, find the correct value of Qp from (2.9). 3. By the use of (2.5), Qp ω0 R2

(2.16)

C2 (Q2p + 1) . Q2p

(2.17)

C2 = and from Fig. 2.15, Cse =

4. Finally, C1 is found by solving (4.160) to get C1 =

Cse C . Cse − C

(2.18)

Design Procedure for Qp > 10 1. Values of Qt , C, L, and N are determined as in the previous procedure. 2. If Qt /N > 10, use this value for Qp . Refer to Fig. 2.15 for the approximate expressions for equivalent series resistance Rse and capacitance Cse . 3. C2 = Qp /ω0 R2 , as before, but if Qt /N is substituted for Qp and if the approximate relation Rt ≈ Qt /ω0 C is used for Rt , it is found that C2 ≈ N C.

(2.19)

Cse ≈ C2 .

(2.20)

From Fig. 2.15, for Qp > 10,

4.

From the foregoing relation, C1 C2 . C1 + C2

(2.21)

NC C2 = . N −1 N −1

(2.22)

C= Substitution of C2 = N C yields for C1 : C1 =

When C2 = N C is substituted into the impedance-transformation ratio, we obtain  2  2  2 Rt C2 C1 + C2 XC . = N2 = = = . (2.23) R2 C C1 XC2 41

2.3

Common Base Colpitts Oscillator analysis and design

The common-base Colpitts circuit is frequently used as an RF oscillator because it offers the advantages of operating nearly up to the fα of the transistor (achieved by the common-base configuration) and avoiding a tapped inductor (as used in the Hartley oscillator circuit). Feedback. The key to understanding this circuit (Fig. 2.23) is knowing how the feedback circuit produces its 180° phase shift: let us consider (1) that the amplifier output voltage is developed across C1 , (2) the feedback voltage is developed across C2 and (3) as each capacitor causes a 90° phase shift, the voltage at the top of C1 (the output voltage) must be 180° out of phase with the voltage at the bottom of C2 (the feedback voltage). Point (3) is explained using the circuit in Fig. 2.18, which shows the equivalent representation of the tank circuit in the Colpitts oscillator.

Figure 2.18: Colpitts oscillator frequency determining circuit.

Let us assume that the inductor is a voltage source and that it induces a current in the circuit. With the polarity shown across the inductor, the current causes potentials to be developed across the capacitors with the polarities shown in the figure. Note that the capacitor voltages are 180°out of phase with each other. When the polarity of the inductor voltage reverses, the current reverses, as does the resulting polarity of the voltage across each capacitor (keeping the capacitor voltages 180° out of phase). Transistor modeling. In the small-signal analysis, the transistor will be modeled by the equivalent circuit of Fig. 2.19. This is derived [17] from the hybrid pi-model, but let us

Figure 2.19: Transistor equivalent circuit used for Colpitts oscillator analysis. present an intuitive explanation of the equivalence between this model and the typical one. The elements of the bipolar transistor small-signal equivalent circuit considered so far may be considered basic in the sense that they arise directly from essential processes in the device. However, technological limitations in the fabrication of transistors give rise to a number of parasitic elements that must be added to the equivalent circuit for most integrated-circuit

42

transistors. A cross section of a typical npn transistor in a junction isolated process is shown in Fig. 2.20. All p-n junctions have a voltage-dependent capacitance associated with

Figure 2.20: Integrated-circuit npn bipolar transistor structure showing parasitic elements. (Not to scale.)

the depletion region. In the cross section of Fig. 2.20, three depletion-region capacitances can be identified. The base-emitter junction has a depletion-region capacitance Cj , and the base-collector and collector-substrate junctions have capacitances Cµ and Ccs respectively. The final elements to be added to the small-signal model of the transistor are resistive parasitics. These are produced by the non-zero resistance of the silicon between the top contacts on the transistor and the active base region beneath the emitter. As shown in Fig. 2.20, there are significant resistances rb and rc , in series with the base and collector contacts, respectively. There is also a resistance re , of several ohms in series with the emitter lead that can become important at high bias currents. Note that the collector resistance rc , is actually composed of three parts labeled rc1 , rc2 and rc3 . The values of these parasitic resistances can be reduced by changes in the device structure. For example, a large-area transistor with multiple base and emitter stripes will have a smaller value of rb . The value of rc , is reduced by inclusion of the low-resistance buried n+ layer beneath the collector. The complete small-signal equivalent circuit of Fig. 2.20 is given in Fig. 2.21 [18] but for

Figure 2.21: Complete bipolar transistor small-signal equivalent circuit. our analysis we can consider the simplified one in Fig. 2.22. Let us now show the equivalence of models in Figs 2.22 and 2.19. The parallel combination of rx and Cb is 1 rx Zeqp = rx || = , (2.24) jωCb 1 + jωrx Cb

43

Figure 2.22: Symplified model of Fig. 2.21.

while the series combination of Li and rx is Zeqs = re + jωLi .

(2.25)

Equating Zeqp and Zeqs , we obtain re + jωLi =

rx (1 − jωrx Cb ) , 1 + ω 2 rx2 Cb2

(2.26)

and supposing (ωrx Cb )2  1, we obtain Li ≈ Cb rx2 =

rx 1 Cb rx

≈

rx ωT

(2.27)

Practical implementation and design equations. The complete oscillator circuit appears in Fig. 2.23. In this circuit, RL is the load resistor; Cf is a tuning capacitor

Figure 2.23: Practical Colpitts oscillator showing all components used for frequency adjustment; C1 and C2 determine the feedback ratio; Re stabilizes the circuit against variations in transistor input impedance; RE , R1 and R2 estabilish the bias conditions (Q point), and Lt is the tank circuit inductance. Note that Lt is in parallel with RL , Cf and C0 , and the series combination of C1 and C2 . The RF choke4 in the emitter 4 Chokes for higher frequencies often have iron powder or ferrite cores. They are often wound in complex patterns (basket winding) to reduce self-capacitance and proximity effect losses. Chokes for even higher frequencies have non-magnetic cores and low inductance. A modern form of choke used for eliminating digital RF noise from lines is the ferrite bead, a cylindrical or torus-shaped core of ferrite slipped over a wire. These are often seen on computer cables. A typical RF choke (RFC) value could be 2 mH.

44

lead prevents RF power dissipation in RE . Capacitor CB shorts the base to ground at the operating frequency, and CC is a low impedance coupling capacitor that keeps direct current out of the load. The series resistance rc of the coil Lt is important in circuit operation; it is best included by defining an equivalent parallel resistance RP = Q2c rc (Qc is the quality factor of the coil) and representing the coil as RP in parallel with a lossless inductor with an inductance equal to Lt . Resistor Re should be made large enough5 to swamp out the transistor’s input impedance. This simplifies the analysis and reduces the dependence of the operating frequency on the transistor parameters, at the expense of some RF power loss in Re . To facilitate the analysis, define RL Rp (2.28) Rt = RL + Rp Ri = Re + re = Re +

1 . gm

(2.29)

Let us introduce the equivalent circuit for the transistor shown in Fig. 2.19 and assume for simplifying the analysis that: ˆ the reactance of the RF choke is infinite, ˆ the reactances of CB and CC are zero.

Then we can consider the equivalent circuit of Fig. 2.24, in which the ficticious source IS

Figure 2.24: Colpitts oscillator equivalent circuit.

represents the momentary noise pulse that initiates oscillation. From KCL, and for complex frequency s, we have: IS = gi Vi + sC2 Vi + sC1 (Vi − V0 ), (2.30) = gi Vi + sC2 Vi + sC1 Vi − sC1 V0 ,

(2.31)

= gi Vi + s(C1 + C2 )Vi − sC1 V0 .

(2.32)

From KCL as well: 0 = −αgi Vi − sC1 Vi + gt V0 + sC1 V0 + sC0 V0 + sCf V0 + The node equations of the circuit take the form:    gi + s(C1 + C2 ) −sC1 IS = −αgi − sC1 gt + s(C1 + C0 + Cf ) + 0

1 V0 sLt

 1 sLt

Vi V0

(2.33)

 (2.34)

where gi = 1/Ri and gt = 1/Rt . Putting the KCL equations in the form shown in Eq.(2.34), we can derive some properties of 5 Typical

values are on the order of 100 Ω.

45

the circuit simply by calculating the network’s determinant [19]. For example, the output voltage is: V0 = Is

6

∆(s) and its cofactor ∆12 (s)

∆12 (s) . ∆(s)

(2.35)

With an infinitesimal noise pulse IS at the input, a finite output V0 results if ∆(s) = 0. Hence setting ∆(s) = 0 provides the criterion for the onset of oscillation. Thus, ∆(s) = [gi + s(C1 + C2 )][gt + s(C1 + C0 + Cf ) + 1/sLt ] − [sC1 (αgi + sC1 )],

(2.36)

resulting in ∆(s) =

sLt gi gt + s2 gi Lt (C1 + Co + Cf ) + gi + s2 Lt (C1 + C2 )gt + sLt s3 Lt (C1 + C2 )(C1 + C0 + Ct ) s(C1 + C2 ) − s2 Lt C1 αgi − s3 Lt C12 + + sLt sLt

(2.37)

After some algebra: gi + s(Lt gi gt + Ca ) + s2 (Lt gi Cb + Lt gt Ca − Lt C1 αgi ) + s3 (Lt Ca Cb − Lt C12 ) = 0 (2.38) where Ca = C1 + C2

(2.39)

Cb = C1 + C0 + Cf .

(2.40)

and If the conditions for oscillation are satisfied, Eq.(2.38) will have a complex-coniugate pair of roots in the right half of the s plane. The limiting conditions for the onset of oscillation occur if the roots lie on the jω axis (Fig. 2.9). Hence these conditions are determined by the solution of Eq.( 2.38) with s = jω. When this substitution is made, the even-power terms represent a real quantity, and the odd-power terms an imaginary quantity. These must separately equal zero if ∆(jω) vanishes. Thus, Re ∆(jω) = gi − ω 2 Lt (Cb gi + Ca gt − C1 αgi ) = 0

(2.41)

Im ∆(jω) = Lt gi gt + Ca − ω 2 Lt (Ca Cb − C12 ) = 0

(2.42)

Since (2.41) contains both α and ω as unknowns, whereas (2.42) contains only ω as an unknown, the solution of (2.42) yields the oscillation frequency ω0 = 2πf0 . This value can be substituted into (2.41) to obtain the minimum value of α required for the oscillation to start. This process results in the relations: Lt gi gt + Ca − ω02 Lt (Ca Cb − C12 ) = 0

(2.43)

ω02 Lt (Ca Cb − C12 ) = Lt gi gt + Ca

(2.44)

ω02 =

gi gt + (Ca /Lt ) . Ca Cb − C12

(2.45)

After substituting the values of Ca and Cb and some algebra: ω02 =

1 1 + . Lt [C0 + Cf + (C1 C2 /C1 + C2 )] Rt Ri [(Cf + C0 )(C1 + C2 ) + C1 C2 ]

(2.46)

6 The term network determinant is usually used for the determinant of the loop-impedance matrix, the node-admittance matrix or, more generally, the cutset-admittance matrix. The value of the network determinant is dependent on the formulation of the network equations, even within the same framework of impedance or admittance consideration.

46

The first term in (2.46) should predominate, because this term is due to the LC tank circuit (the second term is due to the transistor and the load). In this way, changes in loading the transistor Q point7 , and so on, will not affect the oscillation frequency f0 . Note that high coil Q and minimum loading will increase Rt and decrease the magnitude of the second term. By rewriting (2.46) as 1 1 + , Lt [C0 + Cf + (C1 C2 /C1 + C2 )] Rt Ri (C1 + C2 )[Cf + C0 + (C1 C2 /C1 + C2 )] (2.47) it becomes apparent that if the second term is to be minimized, the condition ω02 =

Lt  Rt Ri (C1 + C2 )

(2.48)

must be satisfied. If so, then ω02 ≈

1 , Lt [C0 + Cf + (C1 C2 /C1 + C2 )]

(2.49)

and the circuit oscillates at a frequency determined essentially by Lt in parallel with the effective capacitance that results from the parallel combination of Cf , C0 , and C1 and C2 in series. The operating frequency is one of the two things that small-signal analysis can determine for an oscillator circuit. The other is the minimum gain necessary for the oscillation to begin. The solution of (2.41) for α with ω = ω0 yields C1 αmin gi = −

gi + Cb gi + Ca gt . ω02 Lt

(2.50)

Remembering (2.39) and (2.40), we obtain αmin

  Cf + C0 Ri C2 1 =1+ + 1+ − 2 . C1 Rt C1 ω0 Lt C1

(2.51)

With the assumption that ω02 has the approximate value given in (2.49), αmin can be written as   C2 Ri C2 αmin ≈ 1 + + 1+ (2.52) C1 + C2 Rt C1   Ri 1 C2 + αmin ≈ 1+ . (2.53) 1 + (C2 /C1 ) Rt C1 In order for oscillation to start, the α of the transistor should be greater than αmin . This is not a serious restriction; with modern transistors it would be hard to find a device with insufficient gain so long as (1) the operating frequency is at or below fα /2 and (2) Rt is greater than about 1000 Ω.

2.3.1

Practical design procedure for High-Resistance Loads

Usually, oscillator design is built around some major requirements: the frequency of oscillation f0 , the power P0 (or voltage or current) that must be delivered to a specific load resistance, the phase noise of the output waveform, etc. Let us examine the first two constraints, since the other one will be analyzed in detail in the following sections and in Chapter 4. 7 The operating point of a device, also known as bias point or quiescent point (or simply Q-point), is the DC voltage and/or current which, when applied to a device, causes it to operate in a certain desired fashion.

47

Oscillation frequency and power delivered to a load provide obvious guidelines for transistor selection, since the device must be able to amplify at the operating frequency and must be capable of handling the required power dissipation. Consider the power problem first. The transistor in a common-base Colpitts oscillator behaves like a current source in parallel with: ˆ the equivalent parallel resistance of the tank coil Rp ; ˆ the transformed value of effective emitter resistance Ri ; ˆ the load resistance RL .

If this combination is called Ro , then Ro =

1 , (1/Rp ) + (1/N 2 Ri ) + (1/RL )

(2.54)

where N is the “turns ratio” of the capacitive voltage divider N=

C1 + C2 . C1

(2.55)

Consider the idealized output characteristic in Fig. 2.25. Under quiescent conditions the

Figure 2.25: Idealized transistor output characteristic for Colpitts oscilllator design. transistor operates at ICQ and VCBQ . The dynamic load line passes through the point (VCBQ , ICQ ) and has a slope of 1/Ro . The quiescent point is determined by the biasing network, and it lies on both the static and dynamic load lines. If the variations in iC and vCB are sinusoidal when oscillations occur, the operating point moves on a dynamic load line with slope −1/Ro . The collector current ranges between 0 and some peak value Ip during each cycle and the collector-base voltage varies between 0 and a maximum value Vp . It can be shown by analytical geometry that VP = VCBQ + ICQ Ro IP = ICQ +

VCBQ . Ro

(2.56) (2.57)

If the operating point is chosen such that VCBQ /ICQ = Ro , then Vp = 2VCBQ and Ip = 2ICQ . Assuming that ic varies sinusoidally between 0 and Ip , the rms value of the sinusoidal component of the collector current is 0.707ICQ . Under conditions for maximum power transfer to the load, 1 1 1 = + 2 RL RP N Ri 48

(2.58)

and Ro = Rl /2. Then the power delivered to the load is given by: 2 PL,max = ICQ

RL . 8

(2.59)

If the operating point does not shift during oscillation, the direct current power drawn by the transistor under these conditions is 2 Pdc = VCBQ ICQ = ICQ Ro =

2 ICQ RL . 2

(2.60)

The maximum efficiency predicted by this analysis is 25 %. Therefore: ˆ step 1 in Colpitts oscillator design is to choose a transistor capable of dissipating at least 4 times the desired output power. The transistor also should be capable of handling the required current and voltage swings. If the transistor also has an fT that is twice the intended operating frequency, sufficient gain to initiate oscillations is assured, providing that (2.53) is satisfied; ˆ once a transistor has been chosen, the biasing network should be designed. It should incorporate a large RE and a relatively large bleed current to minimize operating point shift. A suitable bypass capacitor should be included. In many practical circuits, RE is effectively bypassed by C2 and the RF choke is unnecessary; ˆ the total tank capacitance Ct should be chosen next. It’s given by

Ct = C0 + Cs + Cf where

C1 C2 . C1 + C2

Cs =

(2.61)

(2.62)

If an overall tank circuit Q of 50 is desired, then 50 ; 2πfo Ro

(2.63)

1 (2πfo )2 Ct

(2.64)

Ct = ˆ this calculation also determines Lt :

Lt =

ˆ the Q of Lt determines Rp which, along with RL and Ri , specifies N . For a typical transistor8 , 1 re ≈ 40ICQ

and Ri = Re + re . For maximum power transfer to the load, s RL Rp N= ; Ri (Rp − RL )

(2.65)

(2.66)

ˆ the next step in the design is to choose Cf , C1 , and C2 . Using an estimated value for Co (usually only a few picofarads), (2.61) will yield Cs + Cf . It is convenient to choose a midrange value of an available capacitor for Cf . Then

Cs = Ct − Co − Cf 8V T

≈ 25mV at room temperature.

49

(2.67)

The values of Cs and N determine C1 and C2 . N Cs N −1

(2.68)

C2 = N Cs .

(2.69)

C1 =

Let us note that the design procedure outlined here (as an example) and in the following section is approximate and that a circuit so designed will require some adjustment to optimize its performance.

2.3.2

Low-Resistance Loads

When the load resistance RL is smaller than about 1000 Ω, this one should be connected in parallel with C2 through a suitable blocking capacitor, as in Fig. 2.26. This circuit

Figure 2.26: Colpitts oscillator for low-resistance loads.

is inherently less efficient than the previous one because the power dissipated in the coil resistance is approximately equal to the power delivered to the load. The design procedure for this type of oscillator is similar to that developed in the previous subsection. First, RL and the effective transistor input resistance Ri are in parallel, and the transistor output circuit is shown in Fig. 2.27. To ensure sufficient base drive to mantain

Figure 2.27: Effective output circuit of the Colpitts oscillator for low-resistance loads.

50

oscillations, let Ri be equal to RL . Under this condition, the maximum power transfer to the loads occurs when N e RL Rp = (2.70) 2 and N is given by: r 2Rp N= (2.71) RL If (2.70) is satisfied, the load receives only one-quarter of the transistor’s output power. Half goes to RP and the other quarter goes to Ri . In the high-resistance Colpitts connection, the load received one-half of the transistor output power and the transistor dissipates four times the load power. Therefore, a transistor used in the low-resistance Colpitts connection must be capable of dissipating 8 times the load power. As in the high-resistance case, the transistor operating point is given by s PL , (2.72) ICQ = 4 Rp ICQ Rp . (2.73) 2 Once the operating point is determined, a bias network can be designed. The procedure is otherwise similar to the high-resistance Colpitts design. VCBQ =

2.4

The problem with purely linear oscillators

In negative feedback systems, we aim for large positive phase margins to avoid instability. To make an oscillator, then, it might seem that all we have to do is shoot for zero or negative phase margins. Let’s examine this notion more carefully using the root locus for the positive feedback system sketched in Fig. 2.9. As seen in the locus, the closed-loop poles lie exactly on the imaginary axis for some particular value of loop transmission magnitude. The corresponding impulse response is therefore a sinusoid that neither decays nor grows with time, and it would seem that we have an oscillator. There are a couple of practical difficulties with this scenario, however. First, the amplitude of the oscillation depends on the magnitude of the impulse (it is a linear system, after all). This behavior is generally undesirable; in nearly all cases, we want the oscillator to produce a constant-amplitude output that is independent of the initial conditions. Another problem is that if the closed-loop poles don’t lie precisely on the imaginary axis, then oscillations will either grow or decay exponentially with time. These problems are inherent in any purely linear approach to oscillator design. The solution to these problems therefore lies in a purposeful exploitation of nonlinear effects [20]; all practical oscillators depend on nonlinearities. To understand just how nonlinearities can be beneficial in this context, and to develop intuition that is useful for both analysis and design, we now consider the subject of describing functions.

2.4.1

Describing Functions

We have seen that linear descriptions of systems often suffice, even if those systems are nonlinear. For example, the incremental model of a bipolar transistor arises from a linearization of the device’s inherent exponential transfer characteristic. As long as the excitations are sufficiently small, the assumption of linear behavior is well satisfied. An alternative to linearizing an input-output transfer characteristic is to perform the linearization in the frequency domain. Specifically, consider exciting a nonlinear system with a sinusoid at some particular frequency and amplitude. The output will generally consist

51

of a number of sinusoids of various frequencies and amplitudes. A linear description of the system can be obtained by discarding all output components except the one whose frequency matches that of the input. The collection of all possible input-output phase shifts and amplitude ratios for the surviving component comprises the describing function for the nonlinearity. If the output spectrum is dominated by the fundamental component, results obtained with a describing function approximation will be reasonably accurate. To validate our subsequent analyses further, we will also impose the following restriction on the nonlinearities: they must generate no subharmonics of the input (dc is a subharmonic). The reason for this restriction will become clear in the following discussion. For RF systems, this requirement is perhaps not as restrictive as it initially appears because bandpass filters can often be used to eliminate subharmonic and harmonic components. As a specific example of generating a describing function, consider an ideal comparator whose output depends on the input as follows: Vout = B sgn(Vin ).

(2.74)

If we drive such a comparator with a sine wave of some frequency ω and amplitude E, then the output will be a square wave of the same frequency but of a constant amplitude B, independent of the input amplitude. Furthermore, the zero crossings of the input and output will coincide (so there is no phase shift). Hence, the output can be expressed as the following Fourier series:9 N 4B X sin ωnt (2.80) Vout = π 1 n Preserving only the fundamental term (n = 1) and taking the ratio of output to input yields the describing function for the comparator: GD (E) =

4B . πE

(2.81)

Since there is no phase shift or frequency dependence in this particular case, the describing function depends only by the input amplitude. Note that the describing function for the comparator shows that the effective gain is inversely proportional to the drive amplitude, in contrast with a purely linear system in which the gain is independent of the drive amplitude. This inverse gain behavior can be extremely useful in providing negative feedback to stabilize the amplitude. A huge list of describing functions for common nonlinearities can be found in [21]. 9 We should remember that a square wave varying from +V dc and −Vdc , period T and a duty cicle of 0.5 is described from the following relations: ( Vdc , if mT < t < (m + 12 )T (2.75) v(t) = −Vdc , if (m + 12 )T < t < (m + 1)T

with m ≥ 0. Using Fourier series: V (t) =

∞ X

an cos(nωt) +

n=1

bn =

bn sin(nωt)

(2.76)

n=1

with: an =

∞ X

T /2

2 T

Z

2 T

Z

v(t) cos(nωt) dt,

(2.77)

v(t) sin(nωt) dt.

(2.78)

−T /2 T /2

−T /2

The bn coefficients are all equal to zero because v(t) is an odd function. In the frequency domain, we have: ( 0, if m even bn = 4Vdc (2.79) , if m odd π

52

It is important to emphasize that describing functions themselves are linear even though the functions they describe may be nonlinear. Hence, the describing function for a sum of nonlinearities is equal to the sum of the individual describing functions. Describing functions for MOS and BJT To illustrate a general approach, consider the circuit in Fig. 2.28, that has an input V1 cos ωt. The capacitor is assumed large enough to behave as a short at frequency ω, and the tran-

Figure 2.28: Large-signal transconductor (LT-Spice schematic).

sistor is ideal. Before embarking on a detailed derivation of the large-signal (i.e., describing function) transconductance, let’s anticipate the qualitative outlines of the result. As the amplitude V1 increases, the source voltage VS is pulled to higher values, reaching a maximum roughly when the input does. Soon after the gate drive heads back downward from the peak, the transistor cuts off as the input voltage falls faster than the current source can discharge the capacitor. Because the current source discharges the capacitor between cycles, the gate-source junction again forward-biases when the input returns to near its peak value, resulting in a pulse of drain current. The cycle repeats, so the drain current consists of periodic pulses. Remarkably, we do not need to know any more about the detailed shape of the drain current waveform in order to derive quantitatively the large-signal transconductance in the limit of large drive amplitudes. The only relevant fact is that the current pulses consist of relatively narrow slivers in that limit, as in the plot simulation shown by simulation in Fig. 2.29. Whatever the current waveform, KCL demands that its average value equals IBIAS . That is, Z 1 T hiD i = iD (t) dt = IBIAS . (2.82) T 0 Now, the fundamental component of the drain current has an amplitude given by Z 2 T I1 = iD (t) cos ωt dt. T 0

(2.83)

Although we may not know the detailed functional form of iD (t), we do know that it consists of narrow pulses in the limit of large drive amplitudes. Furthermore, these current pulses occur roughly when the input is a maximum, so that the cosine may be approximated there by unity for the short duration of the pulse. Then, Z Z 2 T 2 T I1 = iD (t) cos ωt dt ≈ iD (t) dt = 2IBIAS (2.84) T 0 T 0 53

Figure 2.29: Gate voltage(VN002), and drain current(ID(M1) for large input voltage (LTSpice simulation).

That is, the amplitude of the fundamental component is approximately twice the bias current, again in the limit of large V1 . The magnitude of the describing function is therefore Gm =

2IBIAS I1 ≈ . V1 V1

(2.85)

It is important to note that the foregoing derivation does not depend on the detailed transistor characteristics at any step along the way. Because no device-specific assumptions are used, (2.85) is quite general and applies to MOSFETs (both long and short-channel), as well to bipolars, JFETs, and GaAs MESFETs. In deriving (2.85), we have assumed that the drive amplitude, V1 , is large. To quantify this notion, let us compute the Gm /gm ratio for long and short-channel devices. For longchannel devices, the ratio of gm to drain current IBIAS may be written as

so that

gm 2 = IBIAS Vgs − VT

(2.86)

Gm Vgs − VT = . gm V1

(2.87)

Evidently, “large” V1 is defined relative to (Vgs −VT ) for long-channel MOSFETs. Repeating these calculations for short-channel devices10 yields gm 2 1 = − , IBIAS Vgs − VT Esat L + (Vgs − VT )

(2.88)

which, in the limit of very short channels, converges to a value precisely half that of the long-channel case. Thus, Vgs − VT Gm 2(Vgs − VT ) ≤ < . V1 gm V1

(2.89)

Finally, for bipolar devices we have

so that

10 See

gm 1 = , IBIAS VT

(2.90)

Gm 2VT = . gm V1

(2.91)

the approximate analytic model for short-channel MOSFETs in [18].

54

In a bipolar device, large V1 is therefore defined relative to the thermal voltage. Although the equation for Gm is valid only for large V1 , practical oscillators usually satisfy this condition and so the restriction is much less constraining than one may think. We will also see in Chapter 4 that large V1 is highly desirable for reducing phase noise, so one may argue that well-designed oscillators automatically satisfy the conditions necessary to validate the approximations used. Colpitts oscillator From our describing function derivation, we know that the transistor may be characterized by a large-signal transconductance Gm . For the sake of simplicity, we will ignore all dynamic elements of the transistor, as well as the parasitic resistances. The circuit is shown in Fig. 2.30: for this analysis (as seen before), we don’t care about the active device being a BJT or a MOSFET, since the model does not change. Thus, we can model the oscillator

Figure 2.30: Colpitts oscillator (biasing details not shown).

with the circuit of Fig. 2.31. To simplify the analysis further, first reflect the input resistance

Figure 2.31: Describing function model of Colpitts oscillator.

Ri across the main tank terminals by treating the capacitive divider as an ideal transformer (see 2.2.1), so that we end up by a simple RLC tank embedded with a positive feedback loop. Note that the resulting circuit has zero phase margin at the resonant frequency of the tank; that will be the oscillation frequency in this particular case. Note also that the dependent current generator produces an output (sinusoidal) whose amplitude is Gm V1 = 2IBIAS at all times, so it may be replaced with an independent sine generator of this amplitude. Acting on these observations leads to the circuit of Fig. 2.32, where Ceq is the series combination of the two capacitors, C1 C2 , (2.92) Ceq = C1 + C2

55

Figure 2.32: Simplified model of Colpitts oscillator.

and

1 ω=p . LCeq

(2.93)

Similarly, Req is the parallel combination of the original tank resistance R and the reflected large-signal input resistance of the transistor: Req ≈ R||

1 N 2 Gm

.

(2.94)

The amplitude V1 is simply the amplitude Vtank of the tank voltage multiplied by the capacitive divide factor, so V1 . (2.95) Vtank ≈ N The amplitude of the tank voltage at resonance is simply the product of the current source amplitude and the net tank resistance:   1 R Vtank ≈ 2IBIAS Req ≈ (2IBIAS ) R|| 2 , (2.96) = (2IBIAS ) 2 N Gm N Gm R + 1 which ultimately simplifies to Vtank ≈ 2IBIAS R(1 − N ).

(2.97)

Thus, the amplitude of oscillation is directly proportional to the bias current and the effective tank resistance. The loading of the tank by the transistor’s input resistance is taken into account by the (1 − N ) factor and is therefore controllable by choice of the capacitive divide ratio. Since R also controls Q, it is usually made as large as possible, and adjustment to IBIAS is consequently the main method of defining the amplitude. Start-up. In the case of the example just considered, let us identify the minimum acceptable transconductance for guarenteeing start-up. That minimum gm , together with the given value of bias current, defines the width of the device (for a BJT, the calculations would include β). We use the model in Fig. 2.33. The amplitude of the voltage across the tank at resonance is   V1 1 , (2.98) Vtank = = gm V1 Req = gm V1 R|| 2 N N gm which reduces to the following expression for the minimum transconductance: gm >

1 . R(N − N 2 )

(2.99)

Note that merely having enough transconductance to achieve net unit loop gain with no oscillations is not sufficient to make a good oscillator. In addiction, the describing function is accurate only in the limit of large amplitudes, and therefore only if the small-signal transconductance is larger than the large-signal value. A resonable choice for a first-cut design is to select gm to be five times the minimum acceptable value. 56

Figure 2.33: Start-up model of Colpitts oscillator.

Separate amplitude control In very stubborn cases, it may be necessary to impose external amplitude control, (for example, by expliciting measuring the amplitude, comparing it with a reference voltage, and then appropriately adjusting the bias current; see Fig. 2.34. This decoupling of amplitude control from fundamental oscillator operation not

Figure 2.34: Oscillator with separate amplitude control.

only permits the exercise of additional degrees of freedom to solve the stability problem, it also allows one to design the oscillator without having compromises for such factors as start-up reliability (or speed) and amplitude stability.

2.5

Design example and Cadence simulation of a commonbase BJT Colpitts oscillator for high-resistance loads

A simulation of the behavior of a common-base Colpitts oscillator for high-resistance loads (see 2.3.1) was performed in Cadence Virtuoso. This example is for a didactic aim, and the specifications are: ˆ fosc =1.5 GHz; ˆ load resistance RL = 5371Ω; ˆ power delivered to the load resistance PL = 1mW .

We should note that the oscillator’s requirements also involve other parameters such as phase noise, spectral purity etc. (see Chapter 1), but here we will consider a simple design and simulation example using equations derived in section 2.3.1; we will focus on low phase noise design in the following chapters.

57

BJT characterization. A transistor is required that will dissipate PD = 4 × 1mW = 4mW and has a cut-off frequency of fT = 3GHz. While the first requirement is almost satisfied by every BJT, the cut-off frequency should be calculated taking into account the BJT’s parasitics or can be taken from the “PDK documentation”. From the last one, we deduce that fT is almost 78 GHz 11 (nominal value). However, a characterization of the BJT model used in the project is needed. A simple characterization could be performed by showing IC − Vce curves, using the schematic in Fig. 2.35 Performing a parametric analysis with the following features, ˆ Variable = Vbe ; ˆ Sweep From = 0; ˆ Sweep To = 1.5V ; ˆ Step Mode = linear; ˆ Total Steps = 20.

we obtain IC − VBE curves in Fig. 2.36. From these curves and from the schematic in Fig. 2.35, β = 12012 , confirming the value reported in the PDK. Circuit Design and simulation. r ICQ =

By ( 4.42), r 8PL 8 × 10−3 = 1.2mA. = RL 5371

This makes Ro =

RL = 2686Ω, 2

(2.100)

(2.101)

and VCBQ = ICQ Ro = 3.28V.

(2.102)

For Lt an existing coil was selected that had an inductance of 1nH and an equivalent parallel resistance of 100kΩ at 1GHz. The corresponding value of Q is given by Q=

RP 100 × 103 ≈ 10. = −6 ωLt 10 × 1.5 × 2π × 109

(2.103)

For an ICQ of 1.2mA, equation (2.65) indicates that re is re ≈

1 = 20.83Ω. 40 × 1.2 × 10−3

Arbitrarily choosing Re = 50Ω makes Ri = Re + re = 70, 83Ω. Then, by (2.66), s s RL RP 5371 × 100 × 103 = N= ≈ 1.1. Ri (RP − RL ) 70.83(100 × 103 − 5371)

(2.104)

(2.105)

Since Lt is known, (2.64) requires that CT =

1 1 = ≈ 25pF. (2πfo )2 Lt (2π × 1.5 × 109 )2 × 10−9

(2.106)

Choosing C1 = 15pF , by (2.68) C2 = 120pF . To satisfy (2.67), Cf = 11.7pF . Assuming a bleed current of Ibl = 1/10ICQ , from KVL we can obtain R1 and R2 as follows: V (R2 ) − VBE − V (RE ) − V (Re ) = 0, 11 Pictures 12 at

cannot be included in this work as they are confidential. Vbe = 0.550mV

58

(2.107)

R2 Ibl − 0.7 − 50 × 1, 2 × 10−3 − 700 × 1, 2 × 10−3 = 0.

(2.108)

From (4.1) we get R2 = 14kΩ. Then, VCC = Ibl , R2 + R1

(2.109)

gives R1 = 27kΩ. The reader can repeat the same calculations assuming for example that Ibl = 1/4ICQ , to obtain R1 = 11kΩ and R2 = 5.5kΩ. The schematic is shown in Fig. 2.37. The vpulse generator of the supply voltage was set as follows13 : ˆ Voltage 1 = 0V ; ˆ Voltage 2 = 5V ; ˆ Period = 1s; ˆ Delay time = 100ps; ˆ Rise time = 10ps; ˆ Fall time = 10ps; ˆ Pulse width = 1 − 1ns.

A .tran simulation was performed, with the stop time set to 1ns. After the transient shown in Fig. 2.38, the oscillation settles to steady-state sinusoidal oscillation with a measured frequency of 1.5GHz (Fig. 2.39). The power delivered to the load is 0.918 mW, almost the predicted design value (Fig. 2.40). The output spectrum is shown in Fig. 2.41 and confirms that the output oscillation frequency is as predicted. The example shown in this paragraph is simple, and realized with all the components taken from the “AnalogLib” and so ideal components. In Chapter 6, more detailed simulations are performed, with all real components, and models that also take account of the parasitics; phase noise simulations will be presented as well.

13 To make the oscillation start, Cadence allows to step the supply voltage by the use of a vpulse generator, or equivalently set a convergence aid, that consists in assigning an initial condition to the output node.

59

Figure 2.35: Schematic used to perform IC − VBE curves.

Figure 2.36: IC − VBE curves.

60

Figure 2.37: Schematic of the circuit.

Figure 2.38: Transient simulation.

61

Figure 2.39: Regime simulation.

Figure 2.40: Power delivered to RL .

62

Figure 2.41: Output spectrum.

63

Chapter 3

Integrated VCOs In Chapter 1, the most common oscillator configurations have been presented and analyzed. Most oscillators must be tuned over a certain frequency range. We therefore wish to construct oscillators whose frequency can be varied electronically. Voltage-controlled oscillators (VCO) are an example of such circuits: VCOs are “tunable”, i.e., their output frequency is a function of a control input, usually a voltage. In this chapter, starting from some configurations of oscillators seen in Chapter 1, it is shown how to build a VCO. Then, a mathematical model of a VCO is presented and a brief overview of how to realize an integrated varactor is given. One of the major applications for VCOs is in frequency synthesizers. A frequency synthesizer provides sinusoidal/pulse signals at a predetermined frequency that is precisely controllable by a digital word: it is the core building block of systems such as wireless communication transceivers that have to work at multiple frequencies.

3.1

Voltage-Controlled oscillators

An ideal VCO is a circuit whose output frequency is a linear function of its control voltage (Fig. 3.1):

Figure 3.1: Definition of a VCO.

ωout = ω0 + KV CO Vcont .

64

(3.1)

In (3.1), ω0 represents the intercept corresponding to Vcont = 0 and KV CO denotes the rad/s “gain” or “sensitivity” of the circuit (expressed in ). The achievable range, ω2 − ω1 , V is called the “tuning range”. It is desirable that KV CO does not change significantly across the tuning range. As an example, consider the cross-coupled oscillator shown in Fig. 3.2. Let us assume that CP = 0, and consider only the drain junction capacitance, CDB , of M1 and M2 . Since CDB

Figure 3.2: Cross-coupled oscillator.

varies with the drain-bulk voltage, if VDD changes, so does the resonant frequency of the tank. The average voltage across CDB is approximately equal to VDD , since the voltage drop across Rp is negligible and Vx and Vy vary from VDD ± a value. Thus, we write CDB = and KV CO = √ With ωout = 1/ LP CDB we have

CDB0 (1 + VφDD )m B

(3.2)

∂ωout ∂ωout ∂CDB = · . ∂VDD ∂CDB ∂VDD

−1 −mCDB m KV CO = √ · = VDD 2 LP CDB CDB φB (1 + φB ) 2φB (1 +

(3.3)

VDD φB )

· ωout .

(3.4)

Note that the relationship between ωout and Vcont is nonlinear because KV CO varies with VDD and ωout . Important performance parameters of VCOs are: ˆ Center Frequency This parameter is determined by the environment in which the VCO is used. Today’s CMOS VCOs achieve center frequencies as high as 10 GHz. ˆ Tuning Range The required tuning range is dictated by two parameters: (1) the variation of the VCO center frequency with process and temperature and (2) the frequency range necessary for the application. For a given noise amplitude, the noise in the output frequency is proportional to KV CO because ωout = ω0 + KV CO Vcont . Thus, to minimize the effect of noise in Vcont , the VCO gain must be minimized, a constraint in direct conflict with the required tuning range. The tuning range must span at least ω1 to ω2 , so KV CO must satisfy the following requirement:

KV CO ≥

65

ω2 − ω1 . V2 − V1

(3.5)

Note that, for a given tuning range, KV CO increases as the supply voltage decreases, making the oscillator more sensitive to noise on the control line. The tuning range of the VCO is given by the frequency range normalized to the average frequency:   fmax − fmin TR = 2 . (3.6) fmax + fmin A typical VCO might have a tuning range of 15 % – 20% to cover a band of frequencies (over process and temperature). ˆ Tuning Linearity As exemplified in Eq(3.4), the tuning characteristic of a VCO exhibits nonlinearity, i.e., its gain KV CO is not constant. Such nonlinearities could degrade the settling behavior of a phase-locked loops. For this reason, it is desirable to minimize the variation of KV CO across the tuning range. For a given tuning range, nonlinearity inevitably leads to higher sensitivity for some regions of the characteristic. ˆ Output Amplitude It is desirable to achieve a large output oscillation amplitude, thus making the waveform less sensitive to noise. The amplitude trades with power dissipation, supply voltage, and even tuning range. Also, the amplitude may vary across the tuning range; this is an undesirable effect. ˆ Power dissipation Typical oscillators in modern technologies consume 10 to 50 mW of power. ˆ Supply and Common-Mode Rejection Oscillators are quite sensitive to noise, expecially if they are realized in single-ended form. The design of oscillators for high noise immunity is a difficult challenge. Note that noise may be coupled to the control line of a VCO as well. For these reasons, it’s preferable (but not always possible) to employ differential paths for both the oscillation signal and the control line. ˆ Output Signal Purity Even with a constant control voltage, the output waveform of a VCO is not perfectly periodic. The electronic noise of the devices in the oscillator [22] and supply noise lead to noise in the output phase and frequency. These effects are quantified by jitter and phase noise, and are determined by the requirements of each application.

3.2

Tuning in Ring Oscillators

Recall from Chapter 1 that the oscillation frequency fosc of an N-stage ring oscillator equals (2N TD )−1 , where TD denotes the large-signal delay of each stage. Thus, to vary frequency, TD can be adjusted. As a simple example, consider the differential pair of Fig. 3.3 as one stage of a ring oscillator. Here, M3 and M4 operate in the triode region, each acting as a variable resistor controlled by Vcont . As Vcont becomes more positive, the on-resistance of M3 and M4 increases, thus raising the time constant at the output, τ1 , and lowering fosc . If M3 and M4 remain in deep triode region, τ1 = Ron3,4 CL =

CL . − Vcont − |VT HP |)

µP Cox ( W L )3,4 (VDD

(3.7)

In the above equation, CL denotes the total capacitance seen at each output to ground (including the capacitance of the following stage). The delay of the circuit is proportional to τ1 , yielding µP Cox ( W L )3,4 (VDD − Vcont − |VT HP |) fosc ∝ . (3.8) CL

66

Figure 3.3: Differential pair with variable output time constant.

Interestingly, fosc is linearly proportional to Vcont . The differential pair of Fig. 3.3 suffers from a critical drawback: the output swing of the circuit varies considerably across the tuning range. With complete switching, each stage provides a differential output swing of 2ISS Ron3,4 . Thus, a tuning range of, say, two to one translates to a twofold variation in the swing. In order to minimize the swing variation, the tail current can be adjusted by Vcont as well such that, as Vcont becomes more positive, ISS decreases. The circuit nonetheless requires a means of keeping ISS Ron3,4 constant. To this end, let us consider the circuit in Fig. 3.4, where M5 operates in the deep triode region and amplifier A1 applies negative feedback to the gate of M5 . If the loop gain is

Figure 3.4: Simple feedback circuit defining VP . sufficiently large, the differential input voltage of A1 must be small, giving VP ≈ VREF and |VDS5 | ≈ VDD − VREF . Thus, the feedback ensures a relatively constant drain-source voltage even if I1 varies. This approach can be used to build a “replica circuit” for the stages of a ring oscillator, as shown in Fig. 3.5. Without going into details, there are other tuning techniques consisting of delay variation by positive feedback and delay variation by interpolation, as well as advanced techniques to build wide tuning-range ring oscillators. For further information, the reader is invited to read [23].

67

Figure 3.5: Replica biasing to define voltage swings in a ring oscillator

3.3 3.3.1

Tuning in LC oscillators Tuning using pn junction-based varactors

√ The oscillation frequency of LC topologies is equal to fosc = 1/(2π LC), suggesting that only the inductor and capacitor values can be varied to tune the frequency and other parameters such as bias currents and transistor transconductances affect fosc negligibly. Since it is difficult to vary the value of monolithic inductors, we change the tank capacitance instead to tune the oscillator. A voltage-dependent capacitor is called “varactor” or “varicap”. A reverse-biased pn junction can serve as a varactor. The voltage dependence is expressed as Cvar =

C0 , R m (1 + φVB )

(3.9)

where C0 is the zero-bias value, VR the reverse-bias voltage, φB the built-in potential of the junction, and m a value typically between 0.3 and 0.4. The above formula is easily derived by observing that a positive increment in reverse bias voltage requires an increment of growth of the depletion region width. Since charge must flow to the edge of the depletion region, the structure acts like a parallel plate capacitor for small voltage perturbations. Depending on the doping profile, one can design capacitors with n = 1/2 (abrupt junction), n = 1/3 (linear grade), and even n = 2 (Fig. 3.6). The m = 2 case is convenient as it leads to a linear relationship between the frequency of oscillation and the control voltage. Let us now add varactor diodes to a cross-coupled LC oscillator (Fig. 3.7). To avoid forward-biasing D1 and D2 significantly, Vcont must not exceed VX or VY by more than a few hundred millivolts. Thus, if the peak amplitude at each node is A, then 0 < Vcont < VDD − A + 300 mV , where it is assumed that a forward bias of 300 mV creates negligible current. Interestingly, the circuit suffers from a trade-off between the output swing and the tuning range; this effect appears in most LC oscillators. Note that, since the swings at X and Y are typically large (e.g., 1 Vpp at each node), the capacitance of D1 and D2 varies with time. Nonetheless, the “average” value of the capacitance is still a function of Vcont , providing the tuning range. Let us see briefly how varactor diodes are realized in CMOS technology. Fig. 3.8 shows two types of pn junctions. In view (a), the anode is inevitably grounded whereas in view (b), both terminals are floating. For the circuit of Fig. 3.7, only the floating diode can be used. To increase the capacitance of the junction, the p+ and n+ areas are enlarged. Upon closer examination, the structure of Fig. 3.8 (b) suffers from a number of drawbacks. 68

Figure 3.6: PN Junction Doping.

Figure 3.7: LC oscillator using varactor diodes.

First, the n-well material has a high resistivity, creating a resistance in series with the reverse-biased diode and lowering the quality factor of the capacitance. Second, the n-well displays substantial capacitance to the substrate, contributing a constant capacitance to the tank and limiting the tuning range. The diode is therefore represented as shown in Fig. 3.9, where Cn represents the voltage-dependent capacitance between the n-well and the substrate. In order to decrease the series resistance of the structure shown in Fig. 3.8 (b), the p+ region can be surrounded by an n+ ring so that the displacement current flowing through the junction capacitance sees a low resistance in all four directions and the total Q factor of the varactor increases (see Fig. 3.10 (a)). Since a single minimum-size p+ area has a small capacitance, many of these units can be placed in parallel (Fig. 3.10 (b)). The n-well, however, must accommodate the entire set, exhibiting a large capacitance to the substrate. There are unwanted capacitances in the circuit of Fig. 3.7, i.e., the components that are not varied by Vcont . We identify three such capacitances: (1) the capacitance between the n-well and the substrate associated with D1 and D2 ; (2) the capacitances contributed by the transistor to each node and (3) the parasitic capacitance of the inductor itself. In Fig. 3.7, it is desirable to connect the anodes of the diodes to nodes X and Y , thereby eliminating the parasitic n-well capacitances from the tank. Fig. 3.11 shows a topology which allows such a modification. Here, the cross-coupled pair incorporates PMOS devices, providing swings around the ground potential. However, owing to their lower mobility, the PMOS transistors must be wider than their NMOS counterparts so as to exhibit the same transconductance. This increases the second component mentioned above.

69

Figure 3.8: Diodes realized in CMOS technology.

Figure 3.9: Circuit model of the varactor shown in Fig. 3.8 (b)

These observations have been useful to make the reader understand that the design of a low-noise LC oscillator with acceptable tuning range is so hard that is still a topic of active research. Issues such as phase noise, inductor and varactor design continue to intrigue researchers. In general, balanced topologies exhibits lower sensitivity to noise than their single-output counterparts; this is why the circuit analysed and simulated in Chapter 2 is just the “core” of the final object of the thesis, that consists of two of these stages in parallel. In Chapter 4, phase noise and computational issues are discussed, and simulations of the phase noise of the circuit simulated in Chapter 2 are shown. We’ll see that the balanced-Colpitts oscillator exhibit lower phase noise than its single-stage counterparts.

3.3.2

Tuning using MOS varactors

Equation (3.9) reveals an important drawback of LC oscillators: at low supply voltages, VR has a very limited range, yielding a small range for Cvar and hence for fosc . We also note that to maximize the tuning range, constant capacitances in the tank must be minimized in order. For this reason, in modern RF IC design, MOS varactors have supplanted their pn-junction counterparts. Called an “accumulation-mode MOS varactor’, and shown in Fig. 3.12, this structure is obtained by placing an NMOS transistor inside an n-well. Without explaining the structure in detail, we notice that a MOS varactor can tolerate both positive and negative voltages: in fact, the characteristic shown in Fig. 3.12 (d) suggests that MOS varactors should operate with positive and negative biases so as to provide maximum tuning range. The C/V plot is approximated well by the following formula:   Cmax − Cmin VGS Cmax + Cmin Cvar (VGS ) = tanh a + + . (3.10) 2 V0 2

70

Figure 3.10: (a) Reduction of series resistance by surrounding the p+ region by an n+ ring, (b) several diodes in parallel.

Figure 3.11: Negative-Gm oscillator using PMOS devices to eliminate the n-well capacitance from the tanks.

Here, a and V0 allow fitting of the intercept and the slope, respectively, and Cmin and Cmax include the gate-drain and gate-source overlap capacitance. Other details regarding these concepts can be found in [24]. The MOS varactor counterpart of Fig. 3.7 is shown in Fig. 3.13. MV 1 and MV 2 appear in parallel with the tank (if Vcont is provided by an ideal current source). Note that the gates of the varactors are tied to the oscillator nodes and the source/drain/n-well terminals to Vcont . This avoids loading X and Y with the capacitance between the n-well and the substrate. Since the gates of MV 1 and MV 2 reside at an average level equal to VDD , their gate-source voltage remains positive and their capacitance decreases as Vcont goes from zero to VDD . This behavior persists, even in the presence of large voltage swings at X and Y and hence across MV 1 and MV 2 . The key point here is that the average voltage across each varactor varies from VDD to zero as Vcont goes from zero to VDD , thus creating a monotonic decrease in its capacitance. The oscillation frequency can thus be expressed as ωosc = p

1 L1 (C1 + Cvar )

,

(3.11)

where Cvar could be evaluated by using (3.10). Symmetric spiral inductors excited by differential waveforms exhibit a higher Q than their single-ended counterparts. For this reason, L1 and L2 in Fig. 3.13 are typically realized as a single symmetric structure (this structure will be used in our final configuration as well). Fig. 3.14 illustrates the idea and its circuit representation. The point of symmetry of the inductor (its “center tap”) is tied to VDD . Tuning Range Limitations The reader may wonder why capacitors C1 have been included in the oscillator of Fig. 3.13. It appears that, without C1 , the varactors can vary the frequency to a greater extent, 71

Figure 3.12: (a) MOS varactor, (b) operation with negative gate-source voltage, (c) operation with positive gate-source voltage, (d) resulting C/V characteristic

Figure 3.13: (a) VCO using MOS varactors, (b) range of varactor capacitance used in (a)

thereby providing a wider tuning range. This is indeed true, and we rarely need to add a constant capacitor to the tank. In other words, C1 simply models the inevitable parasitics capacitances appearing at X and Y . Since in (3.11), Cvar tends to be a small fraction of the total capacitance, we make a crude approximation, Cvar f0 /2QL . S∆φ (fm ) is determined as follows. The phase noise at the input of the power amplifier is added to a signal as the sum of every bandwidth ∆f = 1Hz, each producing an available phase noise at the input of the noise-free amplifier. Maximum power delivery can be achieved when the internal impedance of the source is conjugate-matched to the input impedance of the amplifier. As a result, only one-half of the root-mean-square noise voltage appears across the amplifier input and is equal to √ 4F kT R √ en ein = = = F kT R, (4.49) 2 2 where R is the equivalent resistance, which can be represented as the input resistance for the input root-mean-square noise voltage. The input phase noise produces a root-mean-square √ phase deviation ∆φrms = ∆φ/ 2 at each frequency ±fm from the carrier f0 , as shown in Fig. 4.16, for which a total power-wise sum can be written for small phase perturbations as r √ √ ein 2 F kT ∆φ = ∆φrms 2 = = , (4.50) Vin Pin 92

Figure 4.16: Simplified feedback oscillator noise model. √ where Vin = 2Pin R is the signal voltage amplitude at the power amplifier input. As a result, the double sideband spectral power density of the thermal noise in a frequency bandwidth ∆f = 1Hz can be written as S∆φ = ∆φ2 =

F kT Pin

(4.51)

To take into account the effect of signal degradation due to the low-frequency flicker noise close to the carrier, Leeson corrected Eq. (4.51) empirically as follows:   fc F kT 1+ (4.52) S∆φ (fm ) = Pin fm where fc is the corner frequency. The parameter F in Eq. (4.52) is associated with the active device’s noise figure and is called an effective noise factor because, generally, it should represent the effect of the device noise sources and the cyclostationary noise resulting from periodically varying processes in practical oscillators. Due to the inherent nonlinear nature of the active device, the effects of intermodulation between the wideband white noise and various harmonics of the fundamental frequency (for example, nonlinear transformation of the noise near the third harmonic downconverted to the near carrier region due to mixing with the second harmonic) must be included [28]. Also, the effect of low-frequency noise modulation of the current, resulting in reactance modulation of the input impedance of the circuit (for example, variation of the phase angle of the device’s forward transfer function versus emitter current), cannot be neglected. Hence, it is impossible to calculate F accurately without taking into account the effect of the oscillator’s resonant circuit [42]. Therefore, for such a linear model, the effective noise factor F , as well as the corner frequency fc , can be considered more like fitting parameters, based on measured data. The corresponding combined expression to calculate the normalized double-sideband phase noise power density or the double-sideband noise-to-carrier ratio at the input of the feedback oscillator can be obtained from    2  F kT fc f0 Sφ (fm ) = 1+ 1+ , (4.53) Pin fm 2QL fm which gives an asymptotic model showing noise reduction of 9dB/octave in the offset region with predominant low-frequency 1/f noise, 6dB/octave in the offset region due to the feedback loop and 0dB/octave representing the thermal or white noise spectrum. The single sideband noise-to-carrier ratio at the input of the feedback oscillator can be described by    2  1 F kT fc f0 L(fm ) = 1+ 1+ , (4.54) 2 Pin fm 2QL fm 93

whose idealized sideband spectral behavior for different values of the loaded quality factors 3 2 is illustrated in Fig. 4.17. For the low-QL case, there are regions with 1/fm and 1/fm

Figure 4.17: Single sideband oscillator phase noise behavior: (a) fc < f0 /2QL , (b) fc = f0 /2QL , (c) fc > f0 /2QL . dependencies for spectral power density close to carrier, as shown in Fig. 4.17(a). For 3 the moderate-QL case, Fig. 4.17(b) demonstrates only 1/fm dependence as far as the in3 tersection with thermal noise floor. For the high-QL case, regions with 1/fm and 1/fm dependencies are observed near the carrier, as shown in Fig. 4.17(c). Closest to the carrier, 3 1/fm phase noise behavior is a result of random frequency modulation of the oscillator by 2 low-frequency 1/f noise. In the region of 1/fm phase noise behavior, white noise causes random frequency modulation. The 1/fm dependence is due to mixing up of the 1/fm noise with the oscillation frequency. Finally, the phase noise becomes constant, which is a result of the mixing-up of the white noise around the oscillation frequency. To calculate the phase noise power spectral density at the oscillator output, we need a power gain factor G: according to [43], it can be computed as GF kT L(fm ) = 8Q2L Pout 94



f0 fm

2 ,

(4.55)

where

1

G=  1−

QL Q0

2

(4.56)

is considered the transducer power gain and Q0 is the unloaded quality factor. Effect of the Quality factor and output power From Equations (4.53) and (4.55) it follows that, in order to minimize the oscillator phase noise, it is necessary to reduce the noise figure F and to increase the input power Pin (or the output power Pout for a fixed power gain G of the amplifier) as much as possible. In addition, for frequency offsets inside the resonator bandwidth, it is desirable to maximize the oscillator’s loaded quality factor QL . However, the resonator insertion loss and loaded QL are interrelated, and one cannot arbitrarily increase QL without increasing the insertion loss, otherwise a larger power gain G is needed. The two competing effects result in an optimum loaded QL of approximately one-half the unloaded Q0 , corresponding to an insertion loss of about 6dB [43]. Thus, the minimum noise occurs when QL /Q0 = 0.5, resulting in  2 f0 2F kT (4.57) L(fm ) = Pout 2QL fm Note that the difference in the optimum noise performance predicted by different definitions of the output power (power dissipated in the resonant circuit or power available at the amplifier output) is small [43]. Since P represents the total or dc power dissipated in the oscillator with an ideal lossless active device (for example, a device operating in switching Class E mode), the power delivered to the load is PL = ηP , where η is the efficiency of the oscillator. Thus, we have  2 2ηkT f0 L(fm ) = (4.58) PL 2QL fm Effect of the resonator’s transfer function As Razavi also showed, the open-loop Q, defined as ω0 dφ Q= 2 dω

(4.59)

indicates how much an oscillator “rejects” the noise. We know that a high Q signifies a sharper resonance, i.e., a higher selectivity. From (4.59) it is clear that the larger the slope of φ(jω), the greater is this “restoration” force, i.e., oscillators with a high open-loop Q tend to spend less time at frequencies other than ω0 . In [44], he confirmed these observations with the following relation 2  2 Y ω0 (jω0 + j∆ω) = 1 (4.60) X 4Q2 ∆ω that gives the same conclusions as (4.53) and (4.55) in terms of the Q of the circuit. The idea is that the transfer function of the resonator affects the output phase noise of the oscillator, but Razavi’s model doesn’t show exactly in which way. Another representation of the Leeson model with a phase feedback loop is shown in Fig. 4.18. Suppose that phase noise modulation occurs in the oscillator’s active element as ∆φ(t), and it is necessary to define how the oscillator reacts to this internal noise. From [45], the Leeson formula for the double-sideband phase noise power spectral density of the feedback oscillator given by (4.53) can be expressed in a more general form Sφ (ωm ) = S∆φ (ωm ){[H(jωm ) − 1][H(jωm )∗ − 1]}−1 , 95

(4.61)

Figure 4.18: Second equivalent representation of Leeson model

where H(jωm ) is the equivalent low-pass transfer function and the asterisk denotes the complex-conjugate. Thus, by representing the transfer function of the first order low-pass filter as α , (4.62) H(jωm ) = α + jωm where α = ω0 /2QL is the half-bandwidth of the resonator, and ωm = 2πfm , (4.61) can be rewritten as   2  α , (4.63) Sφ (ωm ) = S∆φ (ωm ) 1 + ωm which is similar to (4.53). Now consider the second-order low-pass filter case based on two coupled resonators having the transfer function H(jωm ) = where α =

√

α1 α2 = α1 + jωm α2 + jωm 1−

1
ωm 2 α

,

(4.64)

+ 2jωm δ

√ α1 α2 and δ = (α1 + α2 )/2 α1 α2 . In this case, (4.61) can be rewritten as   2  1 − 2( ωαm )2 α Sφ (ωm ) = S∆φ (ωm ) 1 + ωm 2 , ( α ) + 4δ 2 ωm

(4.65)

which shows better phase noise performance in the near vicinity of the carrier frequency for the case of loosely coupled resonators when δ > 1. Let us compare quantitatively both cases of the Leeson phase noise models using first order and second order low-pass filters in the oscillator feedback loop for the same arbitrarily chosen technical data: ˆ oscillation (carrier) frequency f0 = 2GHz; ˆ offset frequency fm = 10 kHz; ˆ oscillator resonant circuit loaded quality factor QL = 10; ˆ noise figure of the active device F = 6dB; ˆ input power of the active device Pin = 10mW ; ˆ corner frequency for flicker noise fc = 3 kHz.

Substituting these parameters into (4.61) for a single-sideband phase noise spectral density of the oscillator with the first-order low-pass filter gives L(fm ) ≈ 10 log(1.05 × 10−10 ) = −99.7dBc/Hz

96

(4.66)

For the case of the oscillator with two coupled resonators, let us assume that the loaded QL of the second resonator is five times as large as the first one, that is α1 = 6.2 × 108 and α2 = 1.2 × 108 . Then L(fm ) ≈ 10 log(2.9 × 10−12 ) = −115.3dBc/Hz,

(4.67)

which clearly shows a significant phase noise improvement compared to the oscillator having a first-order low-pass filter in its feedback loop. The typical oscillator output power spectrum is shown in Fig. 4.19. The noise distribution

Figure 4.19: Oscillator output power spectrum

on each side of the oscillator signal is subdivided into a large number of strips of width ∆f located at the distance fm away from the carrier. It should be noted that, generally, the spectrum of the output signal consists of both amplitude and phase noise components. Hence, to measure the phase noise close to the carrier frequency, one needs to make sure that any contributions of parasitic amplitude modulation to the oscillator output noise spectrum are negligible compared with those from frequency modulation. Note that oscillator harmonics can be filtered out by a simple low pass filter, when the spurious tones close to the carrier can be minimized by careful oscillator design. Phase noise in ideal LC oscillator Leeson’s model can also be obtained simply by calculating the phase noise in an ideal LC oscillator (Fig. 4.20). From [46]   1 (1 − ω 2 LC) Y (ω) = G + jωC + − Gact = (4.68) jωL jωL Z(ω0 + ∆ω) ≈

j(ω0 + ∆ω)L ω0 L
≈ −j ∆ω 1 − (ω0 + ∆ω)2 LC 2 ω0

(4.69)

|Z(ω0 + ∆ω)| =

ω0 L ω0 L 1 ω0 =R =R ∆ω R 2Q∆ω 2 ∆ω 2 ω0 ω0

(4.70)

and

97

Figure 4.20: Ideal LC oscillator

Then, the rms value of the voltage noise sources is  2  2 vn2 i2 ω0 1 ω0 = n |Z(ω0 + ∆ω)|2 = 4kT G R = 4kT R ∆f ∆f 2Q∆ω 2Q ∆ω

(4.71)

The phase noise is defined as half the above expression, normalized to the output signal power (in dB below the carrier per Hertz, dBc/Hz):  L(∆ω) = 10 log10

vn2 /2 A2pk /2



 = 10 log10

 2  2kT R 1 ω0 A2pk /2 2Q ∆ω

(4.72)

In Fig. 4.21 we can recognize (4.72) in the empirical Leeson’s formula and see noise contributions in the phase noise. In Fig. 4.21, Phase Noise in dBc/Hz is plotted as a function of

Figure 4.21: Comparison between (4.72) and empirical Leeson formula, and noise contributions [46] frequency offset (fm ), with the frequency axis on a log scale. Note that the actual curve is approximated by a number of regions, each having a slope of 1/f x , where x = 0 corresponds to the ”white” phase noise region (slope = 0 dB/decade), and x = 1 corresponds to the ”flicker 1/f ” phase noise region (slope = 20 dB/decade). There are also regions where x = 2, 3, 4, and these regions occur progressively closer to the carrier frequency. Leeson’s equation assumed that the 1/f 3 and 1/f 2 corner occurred precisely at the 1/f corner of the device. In measurements, this is not always the case. The phase noise of an oscillator depends on the noise of the open-loop amplifier and on the half-bandwidth of the resonator. If the amplifier has no 1/f noise region, the oscillator will have 1/f 2 noise 98

below the half-bandwidth. Unfortunately, all active devices have some sort of 1/f region. If the 1/f flicker corner frequency is low, the oscillator will have a 1/f 2 noise slope until that corner frequency is reached. This is the case with many LC oscillators. Transistors made in different processes have different 1/f noise corners. JFETs are the best (≈ 1kHz), followed by BJTs (≈ 5kHz), then MOSFETS ( ≈ 1M Hz), and GaAs devices are the worst (≈ 10M Hz). Advantages and disadvantages of Leeson’s model Despite some limitations of the linear Leeson model, when a device is operated in a largesignal conduction angle mode and the output signal is not purely sinusoidal, which have an effect on the active device noise factor and low-frequency flicker noise up-conversion, such an approach gives a sense of the phase noise performance for oscillators with different resonant circuits. This applies especially if the theoretical results can be supported by sufficiently accurate measurements of the resonant circuit’s loaded quality factor and simulations of the effective noise figure based on the modeled active device parametres and operating conditions. In addition, such a simple model indicates the basic factors and provides the design rules which are necessary to follow in order to minimize the oscillator phase noise [47]: ˆ choose the resonator with a maximum unloaded quality factor Q0 and optimize the loaded quality factor QL of the oscillator resonant circuit by proper load coupling; ˆ maximize the output power PL delivered to the load by maximizing the RF voltage amplitude across the resonant circuit with limitations due to active device breakdown voltage and operation in the saturation mode; ˆ choose a device with the lowest noise figure F and corner frequency fc for lowfrequency flicker noise; ˆ use active components with low 1/f -noise; ˆ maximize the output signal power versus noise power of the oscillator; ˆ avoid saturation of the active devices at all costs, and try to have either limiting or automatic gain control (AGC) without degradation of the Q of the resonator. Saturation of the active device can also lower the loaded-Q since the device losses will then add to those of the resonator.

There are other factors that can minimize phase noise that are not apparent in this model, and are generally determined experimentally [47]. These includes minimizing frequency pushing by the gate (or base) voltage. Frequency pushing is a shift in the oscillation frequency caused by a change in the transistor bias voltage. There are also pins, RF grounding, layout and routing considerations, for which the reader is invited to refer to [47]. Phase noise in VCOs In VCOs, phase noise has two components: phase noise resulting from direct upconversion of white noise and flicker noise (1/f noise), and phase noise resulting from the changing phase of the noise sources modulating the oscillation frequency. In VCO design other sources of phase noise increase with respect to its oscillator counterpart such as the nonlinear capacitors (varactors) used in the LC resonator and its control lines. There are some precautions that can be taken in designing a low noise VCO:

99

ˆ maintain the Q of the resonator by avoiding forward bias on the varactor tuning diodes, limiting the signal swing across the tuning diodes to prevent heating and thermal effects. This can be achieved by placing the varactor circuit in the gate or base if possible; ˆ the noise from the varactor diode resistance can also become the dominant noise source. For good phase noise, the carrier signal effectively appearing across the varactor noise resistance should be maximized to maintain good signal-to-noise ratio at this point. By transforming the noise load resistance seen by the oscillating device to a lower value in the matching circuit, the power-to-noise ratio across the varactor can be maximized, although at the expense of tuning bandwidth since the matching circuit will restrict the obtainable capacitance variation; ˆ using of back-to-back varactor diodes in the tuning circuits has been found to eliminate the effects of tuning circuit diode noise on oscillator signal spectral performance [47].

How to select a transistor and its bias for designing a low phase noise oscillator The best oscillator transistor is a device with the lowest possible noise figure and biggest fT . A commonly used criterion is: fT ≥ 10fosc . Meantime it’s good to use a high frequency transistor having small junction capacitance and to operate at moderately high bias voltage to reduce phase modulation due to junction capacitance noise modulation. The 1/f noise is directly related to the current density in the transistor. Transistors with high Icmax used at low currents have the best 1/f performance. For low phase noise operation it’s better to use a medium power transistor. In BJTs, as VCE increases, the flicker corner increases as the white noise increases, but the magnitude of the 1/f noise is constant [42]. As base current increases, the flicker corner frequency increases with the magnitude of the 1/f noise and increased shot noise current. The effect of flicker noise can be reduced through RF feedback. An unbypassed emitter resistor of 10 − 30 Ω in a BJT circuit can improve the flicker noise by as much as 40 dB. The proper bias point of the active device is important. Precautions should be taken to prevent modulation of the input and output dynamic capacitances of the transistor which will cause amplitude-to-phase conversion and therefore introduce noise. If phase shift in the transistor changes, the oscillation frequency will change until the loop phase shift returns to zero. Thus phase modulation in the amplifier causes frequency modulation of the oscillator. Other important features to be guaranteed are: ˆ low noise figure combined with a small correlation coefficient; ˆ relative high output power; ˆ low output conductance; ˆ reasonably high input impedance.

4.3.2

A revisit to Phase Noise Model of Leeson

Leeson’s is one of the most famous models for predicting the phase noise in feedback oscillators. But it suffers from several limitations and drawbacks. Leeson’s equation involves some key parameters, often determined by the oscillator structure and the oscillation circuit itself. A direct application of Leeson’s model without care can lead to erroneous results. Leeson’s also assume that the amplifier gain remains constant versus frequency close to the carrier frequency, and that the filter transfer function is considered symmetrical on both sides of the carrier frequency. Remember also that Leeson’s model is based on a linearization assumption, but an oscillator is a nonlinear system, so that approximation would bring 100

some deviations to the measured results; it also ignores the conversion of AM noise into PM noise, resulting from nonlinearities, and the amplitude effect of a resonator, and the base-collector varactor effect. So, even if this model is powerful for a first order prediction of phase noise, a successful application requires a careful identification of the parameters included in the formula, according to the real oscillator structure and the circuit. For example, fc (flicker noise corner frequency) should be determined by the whole oscillator circuit, not the BJT itself. This meas that it could be measured by simulations using Cadence Virtuoso, running a pnoise analysis, or calculated by the relation [48] s r Qf0 α Qf0 αP = , (4.73) fc = β 4kT FN where α is the flicker noise coefficient, β is white phase noise coefficient, P is the carrier power in dBm, T is the absolute temperature, k is Boltzmann’s constant, and FN is the respective noise factor. As regards F , it’s almost a fitting parameter, but for some simple configurations, it’s possible to find closed formulas for F , as we will see in the following example and in [49]. Loaded Quality Factor The loaded quality factor QL of the oscillator’s resonant circuit is determinant for circuit behavior, being a key parameter of the complete resonant system. Several definitions of QL are in general use. All definitions are valid when correctly applied. The classical definition applicable to any simple oscillatory system is QL = 2π

total energy stored in the system , energy lost per cycle f rom the system

(4.74)

where the numerator is taken as the average of the energy stored during the period of one full cycle. In steady-state, the lost energy is supplied by the external source, and the above is applicable, provided that the denominator is interpreted as the energy supplied. For a negative resistance oscillator with a series LC resonant circuit, by applying this definition, we can write LI 2 ωL QL = 2π = , (4.75) RL I 2 /f RL where I is the root-mean-square amplitude of the current flowing into the load resistance. This expression is the dual of the familiar ωCRL of the parallel resonant circuit. In the oscillator with a multi-resonant circuit, each distinct mode of oscillation has a distinct value of QL . However, when coupling is present, there is an interchange of energy accompanied by beats which make it difficult or impossible to apply any concept of QL . Normal modes are free from this difficulty and therefore have uniquely defined values of QL . Now let us understand the applicability of the conventional definition of the loaded quality factor obtained by (4.74) to the feedback oscillator shown in Fig. 4.22 by following the derivation given by Razavi [50]. The closed-loop voltage transfer function of such an oscillator system T (jω) = Vout (jω)/Vin (jω) can be written as T (jω) =

H(jω) , 1 − H(jω)

(4.76)

where H(jω) is the open-loop voltage transfer function. For offset frequencies close to the carrier, ωm = ω − ω0 , the open-loop transfer function H(jω) can be represented by a linear Taylor series expansion around ω0 as H(jω) ≈ H(jω0 ) + 101

dH ωm , dω

(4.77)

Figure 4.22: Equivalent models of oscillators circuit.

the substitution of which into (5.30) results in T (jω) =

dH dω ωm . H(jω0 ) − dH dω ωm

H(jω0 ) + 1−

(4.78)

According to the steady-state oscillation condition known as the Nyquist criterion, if in a feedback system the open-loop gain has a total phase shift of 180 ° at some frequency ω0 , such a system will oscillate at that frequency provided that the open-loop gain is unity, i.e., H(jω0 ) = 1 at the oscillation frequency ω0 . Since |(dH/dω)ωm |  1 for most practical cases, the above equation reduces to T (jω) ≈

1 dH dω ωm

.

(4.79)

By representing the open-loop transfer function as H(jω) = A(ω) exp[jφ(ω)] in differential form   dA dφ dH = + jA exp(jφ), (4.80) dω dω dω and taking into account that A ≈ 1 for ω ≈ ω0 , the oscillation noise power spectral density can be written as 1 1 |T (jω)2 | = 2 (4.81)

. 2 ωm dA + dφ 2 dω

dω

By introducing the definition of the oscillator loaded quality factor as s 2  2 ω0 dA dφ QL = + 2 dω dω we have 2



|T (jω)| =

ω0 2QL ωm

(4.82)

2 ,

(4.83)

representing a similar form of the Leeson model. Similarly, consider the negative resistance oscillator shown in Fig. 4.22(b) where X = Xout + XL is the total circuit reactance. The voltage transfer function of such an oscillator system T (jω) = Vout (jω)/Vin (jω), where Vout (jω) = Iout (jω)RL , can be written as T (jω) =

RL . Z(jω)

(4.84)

where Z(jω) = R(ω) + jX(ω), R = Rout + RL . The steady-state oscillation conditions are estabilished at ω = ω0 when X = 0 and Z(jω0 ) = 0. 102

The noise shaping function of such an oscillation system can be written as |T (jω)|2 =

2 RL . |Z(jω)|2

(4.85)

For offset frequencies close to the carrier, ωm = ω − ω0 , the total circuit impedance Z(jω) can be represented by a linear Taylor series expansion around ω0 as Z(jω) ≈ Z(jω0 ) +

dZ ωm . dω

(4.86)

Since Z(jω0 ) = 0 at the oscillation frequency, substituting (5.24) into (5.25) results in |T (jω)|2 =

2 RL . 2 | dZ dω ωm |

(4.87)

By representing the total circuit impedance Z(jω) through its real and imaginary parts, (4.87) can be rewritten as |T (jω)|2 =

1 2 ωm

2 RL


dR 2 dω

+


dX 2 dω

where both derivatives are evaluated at the oscillation frequenct ω0 . As a result, introducing the definition of the loaded quality factor QL as s 2  2 ω0 dR dX QL = + 2RL dω dω

(4.88)

(4.89)

leads to exactly the same expression for the oscillator noise shaping function obtained by (4.83). The oscillator power spectral density can be generally rewritten using the noise shaping function |T (jω)|2 as Sφ = S∆φ |T (jω)|2 (4.90) As a simple example, let us derive a relationship between the oscillator loaded quality factor QL and the phase slope of the circuit impedance dφ/dω for the case of a negative resistance oscillator with a series LC resonant circuit and frequency-independent load resistance RL , as shown in Fig. 4.23. The loaded resonant circuit impedance ZL and phase φ can be written respectively, as   2 ω LC − 1 Z L = RL + j (4.91) ωC  2  ω LC − 1 −1 φ = tan . (4.92) ωCRL The derivative of the phase with respect to frequency ω results in 1 + ω 2 LC dφ = CRL . dω (ωCRL )2 + (ω 2 LC − 1)2 √ At the resonant frequency ω0 = 1/ LC, the above equation can be rewritten as dφ 2 = 2 . dω ω0 CRL

(4.93)

(4.94)

Since the loaded quality factor of this series single-resonant circuit at the resonant frequency can be also defined as 1 QL = , (4.95) ω0 CRL 103

Figure 4.23: Negative resistance oscillators with different resonant circuits.

then (4.94) can finally be rewritten as QL =

ω0 dφ . 2 dω

(4.96)

A similar expression can be applied to a feedback oscillator with a parallel or series tuned tank [51, 52]. Comparison of (4.95) and (4.96) shows that, in the case of a single-resonant circuit, both definitions of QL are equivalent. The double-resonant circuit consisting of a parallel resonant circuit connected in series with a series resonant circuit is shown in Fig. 4.23(b). Such a resonant circuit provides susceptance compensation when the susceptance slope of the series-tuned circuit compensates for the susceptance slope of the parallel-tuned circuit. At the resonant frequency ω0 when ω02 Ls Cs = ω02 Lp Cp = 1

(4.97)

these two basic definitions of the oscillator’s loaded quality factor can be represented by QL =

2 ω0 (Ls + Cp RL ) RL

(4.98)

and

2 ω0 (Cp RL − Ls ) ω0 dφ = , (4.99) 2 dω RL Note that theseare not identical. This means that the classical definition of QL based on the average stored energy is not appropriate to characterize the dynamic behavior of this circuit and correctly calculate the phase noise spectrum. Figure Fig. 4.23(c) shows the oscillator resonant circuit with distributed parameters consisting of a transmission line of electrical length θ loaded by a parallel resonant circuit. In this case, when Z0 = RL , at the resonant frequency ω0 corresponding to the electrical length θ0 , we can write   θ0 (4.100) QL = ω0 RL C + ω0 RL

and

ω0 dφ = ω0 RL C| cos(2θ0 )| 2 dω 104

(4.101)

that are also not identical. Thus, the classical definition of QL based on the average stored energy is not able to properly characterize the distributed resonant circuit having a periodic behavior in its spectral performance.

4.4

Colpitts oscillator

As an example, let us define the linear phase noise model for the Colpitts oscillator, whose simplified circuit schematic is shown in Fig. 4.24. The power loss in the tank inductor L

Figure 4.24: Equivalent circuits of the Colpitts oscillator.

is included in the load resistance RL . The transistor equivalent circuit with voltage and current noise sources is shown in Fig. 4.24(b). The noise voltage and current sources are defined by their mean-square values as i2nR =

4kT ∆f RL

2 = 4kT r ∆f vnb b

(4.102) (4.103)

2qIc ∆f β

(4.104)

i2nc = 2qIc ∆f,

(4.105)

i2nb =

where the input noise current source i2nb is related to shot noise at the emitter-base junction due to electrons which recombine with holes inside the neutral base and i2nc represents the shot noise generated at the collector-base junction due to the collector electrons. The mean-square values of these noise sources in a bandwidth ∆f are given as i2nb = 2qIb ∆f = 2kT nb gπ ∆f

(4.106)

i2nc = 2qIc ∆f = 2kT nc gm ∆f,

(4.107)

105

where gπ = 1/rπ and nb and nc are the ideality factors of the emitter-base and collectorbase junction, respectively [22]. The admittance Y -parameters of the internal transistor, excluding the base resistance rb , can be obtained as   1/rπ + jω(Cπ + Cc ) −jωCc [Y ] = (4.108) gm − jωCc jωCc where gm = β/rπ is the device transconductance. For a Colpitts oscillator with feedback capacitors C1 and C2 , it is convenient to represent all noise sources in a parallel configuration with input and output noise current sources. Fig. 4.25 shows the transformation of the device noise model with the series thermal voltage

Figure 4.25: Transformation of the base resistance thermal voltage noise. noise source due to the base resistance into the equivalent device noise model with two parallel current noise sources at the input and output only, using the transmission ABCD parameters. By using formulas for the transformation from the admittance Y -parameters to the transmission ABCD-parameters, one can write 1 = −Y21 = −(gm − jωCc ) B

(4.109)

D = Y11 = 1/rπ + jω(Cπ + Cc ). (4.110) B By also neglecting the contribution of the collector capacitance Cc , the analytical calculations are simplified, and we can write  2   2 2qIc ∆f 4kT ∆f rb 2f 2 ini = + 1+β 2 (4.111) β rb rπ fT  2 4kT ∆f βrb i2no = 2qIc ∆f + , (4.112) rb rπ where f is the operating frequency, fT = gm /2πCπ is the transition frequency, and it is assumed that the dc and small-signal values of the current gain β are equal. To calculate the noise figure of the oscillator, the noise current sources i2ni and i2no should be transformed in parallel with i2nR . By using (4.106) and (4.107) for the case of ideal junctions when nb = nc = 1, the total equivalent noise source i2nEQ connected in parallel with the resonator and load can now be written as    2 2 4kT ∆f 4kT ∆f 2rb C1 2f 2 inEQ = + 1+ 1+β 2 + (4.113) RL 2rπ rπ fT C1 + C2 106

  2 4kT β∆f 2βrb C2 . + 1+ 2rπ rπ C1 + C2

(4.114)

The noise figure F of the oscillator is defined as the ratio of the total noise power due to all noise current sources and the noise power from the loaded resonator due to the noise source i2nEQ . As a result, F =1+

   2 RL 2rb C1 f2 + 1+ 1 + β2 2 2rπ rπ fT C1 + C2 +

  2 RL 2βrb C2 . 1+ 2rπ rπ C1 + C2

(4.115)

(4.116)

In most cases, the contribution of the collector shot noise dominates the contribution of the shot noise caused by the base current. Consequently, for rb  rπ and f  fT , the expression for the oscillator noise figure is simplified to   2 RL 2βrb C2 F =1+ 1+ . (4.117) 2rπ rπ C1 + C2 Finally, the single sideband noise-to-carrier ratio at the output of the Colpitts oscillator in a linear consideration, can be defined by  2    2  kT f0 RL 2βrb C2 L(fm ) = 1+ 1+ . (4.118) 2PL QL fm 2rπ rπ C1 + C2

4.5

Oscillator Noise Spectrum: Nonlinear Models

The foregoing derivations have all assumed linearity and time invariance. Let us reconsider each of these assumptions in turn. Nonlinearity is a fundamental property of all real oscillators, as it is necessary for amplitude limiting. Several phase-noise theories have consequently attempted to explain certain observations as a consequence of nonlinear behavior. One observation is that a single-frequency sinusoidal disturbance injected into an oscillator gives rise to two equal-amplitude sidebands, symmetrically disposed about the carrier [44]. Since LTI systems cannot perform frequency translation but nonlinear systems can, nonlinear mixing has occasionally been proposed to explain phase noise. Unfortunately, the amplitude of the sidebands must then depend nonlinearly on the amplitude of the injected signal, and this dependency is not observed in practice. One must conclude therefore that memoryless nonlinearity cannot explain the discrepancies. As we shall see momentarily, amplitude-control nonlinearities certainly do affect phase noise, but only incidentally, by controlling the detailed shape of the output waveform. An important insight is that disturbances are just that: perturbations superimposed on the main oscillation. They will always be much smaller in magnitude than the carrier in any oscillator worth designing or analyzing. Thus, if a certain amount of injected noise produces a certain amount of phase disturbance, we ought to expect doubling the injected noise to produce double the disturbance. Linearity would therefore appear to be a reasonable assumption as far as the noise-to-phase transfer function is concerned. It is therefore particularly important to keep in mind that, when assessing linearity, it is essential to identify explicitly the input-output variables. Linear relationships may exist between certain variable pairs while nonlinear ones exist between others. Linearization of some of these relationships need not imply linearization of the fundamentally nonlinear behavior of the active devices. Indeed, we will perform a linearization around the steady-state solution which automatically takes the effect of device nonlinearity into account. There is therefore no contradiction here with the prior acknowledgment of nonlinear amplitude control. We are left to reexamine the assumption of time invariance. In the previous derivations, we 107

have extended time invariance to the noise sources themselves, meaning that the measures that characterize noise (e.g., spectral density) are time invariant (stationary). By contrast with linearity, the assumption of time invariance is less obviously defensible. In fact, it is surprisingly simple to demonstrate that oscillators are fundamentally time-varying systems. Recognizing this truth is the key to developing a more accurate theory of phase noise.

4.5.1

Kurokawa approach

The one-port negative resistance oscillator can generally be represented by the circuit shown in Fig. 4.26. The active device is characterized by its output impedance Zout = Rout +jXout

Figure 4.26: Equivalent negative resistance oscillator noise models. and the load RL which are coupled through a multiple-resonant reciprocal circuit. Looking from the active device, the circuit can be expressed equivalently through a series connection of the active impedance Zout and the load impedance ZL shown in Fig. 4.26(b), where en (t) is the noise voltage. A similar representation of an oscillator circuit can be obtained in terms of admittances. For a particular case of a single series resonant circuit, R = RL . Consider the equivalent negative resistance oscillator circuit shown in Fig. 4.26(b), where the active device output impedance Zout (A) with negative real part is a function of the oscillation amplitude and the load impedance ZL (ω) is a frequency dependent function [53]. Let the current flowing through the active device be i(t) = A(t) cos[ωt + φ(t)],

(4.119)

where A(t) and φ(t) are assumed to be slowly varying functions of time. The voltage drop across the active device is given by v(t) = Rout A cos(ωt + φ) − Xout A sin(ωt + φ),

(4.120)

where Rout and Xout are functions of the current amplitude. By calculating the first- and higher-order derivatives of i(t) and assuming dφ/dt  ω0 and (1/A)(dA/dt)  ω, the two equations for slowly varying amplitude and phase can be obtained in the form R(ω) + Rout (A) +

∂R(ω) dθ ∂X(ω) 1 dA 1 + = ecn (t) ∂ω dt ∂ω A dt A 108

(4.121)

−X(ω) − Xout (A) +

∂X(ω) dθ ∂R(ω) 1 dA 1 + = esn (t), ∂ω dt ∂ω A dt A

where ecn (t) = esn (t) =

2 T0

Z

2 T0

Z

(4.122)

t

en (t) cos(ωt + φ)dt

(4.123)

en (t) sin(ωt + φ)dt,

(4.124)

t−T0 t

t−T0

where T0 is the oscillation period, and ecn (t) and esn (t) represent the cosine and sine components of the noise voltage en (t). Equations (4.121) and (4.122) both contain the derivatives dφ/dt and dA/dt. However, by multiplying (4.121) by ∂R/∂ω and (4.122) by ∂R/∂ω and adding, as well as by multiplying (4.121) by ∂R/∂ω and (4.122) by −∂X/∂ω and adding, we obtain the basic equations for the amplitude and phase of the oscillating current 2 ∂R ∂ZL (ω) 1 dA ∂X − [X(ω) + Xout (A)] + = (4.125) [R(ω) + Rout (A)] ∂ω ∂ω ∂ω A dt   1 ∂X c ∂R s = en (t) + en (t) , (4.126) A ∂ω ∂ω ∂ZL (ω) 2 dφ ∂RL ∂X [R(ω) + Rout (A)] + [X(ω) + Xout (A)] + + = (4.127) ∂ω ∂ω ∂ω dt   1 ∂R c ∂X s = en (t) − en (t) . (4.128) A ∂ω ∂ω The deviation of the current amplitude A from its steady-state value A0 by a small value ∆A, can be obtained by writing R(ω0 ) + Rout (A) = A0

∂Rout (A0 ) ∆A ∂A A0

(4.129)

X(ω0 ) + Xout (A) = A0

∂Xout (A0 ) ∆A ∂A A0

(4.130)

where all derivatives are evaluated in a steady-state mode characterized by the oscillation frequency ω0 and oscillation amplitude A0 . By substituting (4.129) and (4.130) into (4.121) and (4.122) respectively, and assuming the deviation of the phase φ from its initial value φ0 by a small value ∆φ, the frequency spectra of ∆A and ∆φ can be obtained as L (ω) 2 |en |2 2 ∂Z∂ω 2 (4.131) |∆A| = 4 2  ∂ZL (ω) ∂R(A0 ) ∂Xout (A0 ) ∂Rout (A0 ) ∂X(A0 ) 4 2 ω ∂ω + A0 − ∂A ∂A ∂A ∂A

|∆φ|2 =

2|en |2 ω 2 A20

2

L (ω) ω 2 ∂Z∂ω



(A0 ) A20 ∂Rout ∂A

2



(A0 ) A20 ∂Xout ∂A

+ + 4  L (ω) + A4 ∂Rout (A0 ) ∂X(A0 ) − ω 2 ∂Z∂ω 0 ∂A ∂A

2

∂R(A0 ) ∂Xout (A0 ) ∂A ∂A

2

(4.132)

Equations (4.131) and (4.132) were obtained by Kurokawa for a particular case of the negative resistance oscillator, where the device impedance is a function only of the oscillation amplitude and the load impedance depends only on the oscillation frequency; they can be extended for the negative conductance oscillator. In a generalized case, the device and 109

load immitances both depend on the oscillation frequency and amplitude. As a result, the double-sideband power spectral densities for the amplitude and phase fluctuations can be rewritten as S∆φ(fm ) ∆A Sa ( (4.133) , fm ) =  2 A0 2QL fm 2 p + f0 

f0 Sφ (∆θ, fm ) = S∆φ (fm ) 2QL fm where

2 "

q2

1+

 p2

+

2QL fm f0

# 2 ,



 ∂ Re W ∂ Im W ∂ Im W ∂ Re W − , ∂A ∂f ∂A ∂f   A0 f0 ∂ Re W ∂ Re W ∂ Im W ∂ Im W q= + , 2QL (Re WL )2 ∂A ∂f ∂A ∂f

A0 f 0 p= 2QL (Re WL )2

and QL =

(4.134)

f0 2 Re WL

s

∂ Re W ∂f

2

 +

∂ Im W ∂f

(4.135) (4.136)

2 (4.137)

is the oscillator loaded quality factor. S∆φ is the spectral power density of the noise voltage source en normalized to the output power delivered to the load PL , W = Wout + WL is the overall circuit immitance, f0 is the oscillation or carrier frequency, fm is the offset frequency from the carrier, fc is the corner frequency where the level of the low-frequency noise becomes equal to the level of the noise floor. The parameter p is a function of the oscillator stability conditions, given in parentheses, characterizing the velocity of the establishment of the steady-state self-sustained oscillations under small perturbations. The parameter q illustrates the dependence of the oscillation frequency on the oscillation amplitude in a large-signal mode of operation. From the above equations it follows that the oscillation becomes very noisy as one approaches the boundary of the stable region, that is, as the parameter p becomes close to zero. In addition, the greater the value of the parameter q, the higher the phase noise level is expected in the oscillator spectrum due to amplitude-to-phase conversion.

4.5.2

A Linear Time-Varying Phase Noise Theory: Impulse Response Model

The behavior of autonomous second order weakly nonlinear oscillator systems with low damping factor close to linear conservative systems and small-time varying external force f (t) can be described by d2 x + x = n(t), (4.138) dτ 2 where x is the time-dependent variable, voltage or current, and τ = ω0 t is the time normalized by the angular resonant frequency ω0 . The phase plane method is one of the theoretical approaches that allows one to analyse qualitatively and quantitatively the dynamics of the oscillation systems described by second order differential equations such as the one above [54]. By setting the small external force equal to zero, the solution of the linear second order differential equation takes the form x = A cos(τ + φ) = A cos ψ, (4.139) dx = −A sin(τ + φ) = −A sin ψ, dτ

110

(4.140)

Figure 4.27: Phase portrait of second-order oscillation systems and effect of injected impulse.

where A is the amplitude of the oscillation and φ is the phase of the oscillation. The phase portrait shown in Fig. 4.27 represents the family of circular trajectories enclosing each other with radii r = A (cycles) depending on the energy stored in the system. Let us define the variations of the amplitude A(t) and phase φ(t) under the effect of the ecternal force applied to the oscillation systems. Assuming that the effect of the external force is small and that these variations are slow, the amplitude and phase can be considered constant during a natural period of the oscillation. Then, (4.138) can be rewritten in the form of two first-order equations by [54] dx = y, dτ

(4.141)

dy = −x + n(t). (4.142) dτ From those equations, it follows that the instantaneous change of the ordinate y by a value of dn y = ndτ will occur due to the small external force injected into the oscillation system. This corresponds to a step change in the representative point M0 from the position K to the position L, resulting in amplitude and phase changes, as shown in Fig. 4.27 (b). These changes can be determined by consideration of a triangle KLN as dA = −dn y sin ψ = −n sin ψdτ

(4.143)

dn y n cos ψ = − cos ψdτ. (4.144) A A Thus, separate first-order differential equations for the time-varying amplitude and phase can be obtained from the above equations dφ = −

dA = −n sin ψ dτ

(4.145)

dφ n = − cos ψ. dτ A

(4.146)

111

Since the right-hand sides of the above equations are small, time-averaged differential equations can be used instead of the differential equations for instantaneous values of the amplitude and phase. Hence, the changes of the amplitude and phase for a time period t ≤ T are defined as Z ω0 t ∆A(t) = − n(τ ) sin τ dτ, (4.147) Z

0 ω0 t

n(τ ) cos τ dτ. (4.148) A 0 Fig. 4.28 shows the equivalent circuit of the negative resistance oscillator with an injected ∆φ(t) = −

Figure 4.28: Second-order LC oscillator and effect of injected impulse. small perturbation current i(t). In steady-state, when the losses in the resonant circuit are compensated by the energy injected into the circuit by the active device, the second-order differential equation of the oscillator is written as d2 v 1 di + ω02 v = . (4.149) dt2 C dt If a current impulse i(t) is injected, the amplitude and phase of the oscillator will have time-dependent responses. According to (4.147) and (4.148), the resultant amplitude and phase changes have quadrature dependence with respect to each other. When an impulse is applied at the peak of the voltage across the capacitor, there will be a maximum amplitude deviation with no phase shift, as shown in Fig. 4.28(b). On the other hand, if the current impulse is applied at the zero crossings, it will result in a maximum phase deviation with no amplitude response, as shown in Fig. 4.28(c). The linearity of the tank allows the use of superposition for the injected currents (the inputs) and the voltage waveforms (the outputs). The output waveform consists of two sinusoidal components, one due to the initial condition2 (the oscillation waveform) and the other due to the impulse. Fig. 4.28 illustrates these components for two cases: if injected at a time t1 , the impulse leads to a sinusoid exactly in phase with the original component and, if injected at t2 , the impulse produces a sinusoid 90 out of phase with respect to the original component. In the former case, the peaks are unaffected, and in the latter, the zero crossings. Let us compute the phase impulse response model for the lossless LC tank of Fig. 4.29 We invoke the superposition perspective discussed above, and wish to calculate the phase change resulting from a current impulse at an arbitrary time t1 . The overall output voltage can be expressed as Vout (t) = V0 cos(ω0 t) + ∆V [cos ω0 (t − t1 )]u(t − t1 ),

(4.150)

where ∆V is given by the area under the impulse (I1 in Fig. 4.30) divided by πsC. For 2 The initial condition in the tank can also be created by a current impulse and hence does not make the system nonlinear.

112

Figure 4.29: Ideal tank with a current impulse.

Figure 4.30: Effect of impulse injection at peak and at zero crossings of waveform.

t ≥ t1 , Vout is equal to the sum of two sinusoids: Vout (t) = V0 cos ω0 t + ∆V cos ω0 (t − t1 ) for t ≥ t1

(4.151)

which, upon expansion of the second term and regrouping, reduces to Vout (t) = (V0 + ∆V cos ω0 t1 ) cos ω0 t + ∆V sin ω0 t1 sin ω0 t for t ≥ t1 .

(4.152)

The phase of the output is therefore equal to φout = tan−1

∆V sin ω0 t1 . V0 + ∆V cos ω0 t1

(4.153)

Interestingly, φout is not a linear function of ∆V in general. But, if ∆V  V0 , then φout ≈

∆V sin ω0 t1 for t ≥ t1 . V0

(4.154)

If normalized to the area under the input impulse (I1 ), this result yields the impulse response: 1 h(t, t1 ) = sin ω0 t1 u(t − t1 ). (4.155) C1 V0 As expected, h(t, t1 ) is zero at t1 = 0 (at the peak of V0 cos ω0 t) and the maximum occurs at t1 = π/(2ω0 ) (at the zero crossing of V0 cos ω0 t). Let us suppose that in (t) has a white spectrum Si (f ) that is injected into the tank. We have Z +∞ 1 φn (t) = in (τ ) sin ω0 τ u(t − τ )dτ (4.156) C 1 V0 −∞ 113

1 = C1 V0

Z

t

in (τ ) sin ω0 τ dτ.

(4.157)

−∞

If in (t) is white, so is g(t) = in (t) sin ω0 t, but with half the spectral density of in (t) Sg (f ) =

1 Si (f ). 2

(4.158)

Our task therefore reduces to finding the transfer function of an integrator, with a multiplying constant equal to 1/C1 V0 . To this end, we note that (i) the impulse response of this system is simply equal to (C1 V0 )−1 u(t) and (ii) the Fourier transform of u(t) is given by (jω)−1 + πδ(ω). We ignore πδ(ω) as it contains energy only at ω = 0 and write Sφn (f ) = |H(jω)|2 Sg (f ) =

1 C12 V02

1 Si (f ) . (2πf )2 2

(4.159)

As expected, the relative phase noise is inversely proportional to the oscillation peak amplitude, V0 . Suppose now that a perturbation current i(t), injected into the oscillation circuit, is a periodic function that can generally be expanded into a Fourier series (continue referring to Fig. 4.28) i(t) = I0 cos ∆ωt +

∞ X

{Ikc cos[(kω0 + ∆ω)t] + Iks sin[(kω0 + ∆ω)t]},

(4.160)

k=1

where I0 is the dc current, Ikc is the kth cosine current harmonic amplitude, Iks is the kth sinusoidal current harmonic amplitude, and ∆ω  ω0 . In this case, the small external force can be redefined as di 1 di =L . (4.161) n= ω0 C dt dt Consequently, substituting (4.160) into (4.147) and (4.148) and taking into account that ω0 + ∆ω ≈ ω0 results in I1s cos(∆ωt) − 1 ∆V (t) = − (4.162) 2C ∆ω I1c sin(∆ωt) ∆φ(t) = − , (4.163) 2CV ∆ω where V is the amplitude of the voltage across the capacitor C. In this case, only the fundamental component in the injected current i(t) can contribute to the amplitude (sine amplitude) and phase (cosine amplitude) fluctuations given by (4.162) and (4.163) because, for the dc and kth-order current components, the arguments for all their integrals in (4.147) and (4.148) are significantly attenuated by averaging over the integration period. The output voltage of an ideal cosine oscillator with constant amplitude V and phase fluctuations ∆φ can be written as v(t) = V cos[ω0 t + ∆φ(t)] = V cos[∆φ(t)] cos ω0 t − V sin[∆φ(t)] sin ω0 t,

(4.164)

resulting in an output spectrum of the oscillator with sidebands close to the oscillation frequency ω0 . Since, for a narrowband phase modulation with small phase fluctuations, sin[∆φ(t)] ≈ ∆φ(t) and cos[∆φ(t)] ≈ 1, the phase modulation spectrum given by the above equation can be rewritten using (4.163) as v(t) = V cos ω0 t +

I1c I1c cos[(ω0 − ∆ω)t] − cos[(ω0 + ∆ω)t], 4C∆ω 4C∆ω

(4.165)

which is similar to the single-tone amplitude modulation spectrum containing the spectral components corresponding to the carrier frequency ω0 and two close sideband frequencies 114

ω0 − ∆ω and ω0 + ∆ω. The injection of the current in (4.160) has similar effects, resulting in twice the noise power at the sidebands. Therefore, an injected total current i(t) results in a pair of equal sidebands at ω0 ± ∆ω with a sideband power Psb relative to the carrier power Pc given by  2 I1c Psb (ω0 ± ∆ω) =2 . (4.166) Pc (ω0 ) 4CV ∆ω Now let’s assume that a stationary thermal noise current with a power spectral density i2n is injected into the oscillator circuit close to the carrier. Then, by exchanging the amplitude 2 and root-mean-square current values when I1c /2 = i2n , the single-sideband power spectral density for the phase fluctuations at ∆ω offset from the carrier ω0 in 1/f 2 region can be written using the above equation as L(fm ) =

i2n 2 4C V 2 ∆ω 2

(4.167)

Taking into account that i2n = 4F kT /RL for ∆f = 1Hz, QL = ω0 CRL and PL = V 2 /2RL , where RL is the tank parallel or load resistance, the above equation results in  2 ω0 2kT F (4.168) L(fm ) = PL 2QL ∆ω which is once again the Leeson model for the negative resistance oscillator. Varactor-Controlled oscillator Now consider a varactor-controlled oscillator with the varactor as a nonlinear element, whose capacitance depends not only on the applied dc bias voltage (as seen in Chapter 3), but also on the amplitude of the self-sustained oscillations. The basic VCO circuit consists of the varactor with a nonlinear capacitance C, an inductance L, and a noise voltage en (t), as shown in Fig. 4.31. The voltage en (t) can represent all the noise coming from both inside

Figure 4.31: Varactor-controlled oscillator. and outside the circuit, including any thermal noise from the resistors, flicker noise from the active device and noise from the power supply. The electrical behavior of the oscillator can be described by di v + L = en (t), (4.169) dt   dC dv i= C +v (4.170) dv dt By expanding a nonlinear capacitance C into a power series C = C0 +

∞ X k=1

115

Ck v k

(4.171)

with small coefficients Ck , applying an asymptotic perturbation procedure with decomposition of the perturbed and unperturbed equations, the first-order differential equation for phase fluctuations with the slowly time-varying noise voltage en can be derived as [55]     dφ ω0 3 2 =− C 1 en + C 2 V + 3e2n + C3 en (3V 2 + 4e2n ) + ... , (4.172) dt C0 4 where V is the amplitude of the voltage across the varactor [55]. Note that nonlinear capacitance has no impact on the amplitude noise of the oscillator. From (4.172) it follows that ˆ the first order capacitance nonlinearity described by the coefficient C1 contributes to the up-conversion of low-frequency noise en (t) to the sideband noise near the carrier frequency ω0 ; ˆ the second-order nonlinearity described by the coefficient C2 generates phase noise, due to both amplitude-to-phase conversion and low-frequency noise up-conversion; ˆ the higher-order nonlinearities described by the coefficients Ck , k = 3, 4, 5, . . . , cause a more complicated noise behavior of the oscillator based on hybrid upconversion and amplitude-to-phase conversion due to cross-terms of V and en .

In the case of a single-frequency LC oscillator, the main contributor to the phase noise is the nonlinear collector capacitance of the bipolar device or the gate-source capacitance of the FET device. In a general case, the equivalent circuit of the active device is very complicated, including both nonlinear intrinsic and linear parasitic external elements. This means that it is difficult to evaluate analytically the impact on the up-conversion mechanism of each nonlinear element. Moreover, the joint effect of different nonlinear circuit elements will result in both amplitude and phase fluctuations. To gain more insight, the reader is invited to read [56].

4.5.3

Impulse Sensitivity Function

In view of the multiharmonic representation of the oscillator output spectrum due to the device and resonant circuit nonlinearities, the total phase fluctuations can be represented by a superposition integral as a result of each harmonic contribution. This is similar to the Fourier harmonic expansion in the frequency domain of the voltage waveform, when the phase trajectory on the phase plane is a result of the phase trajectories with different radii and velocities corresponding to the dc shift and harmonic amplitudes. In this case, Equation (4.148) can take the general form 1 ∆φ(t) = − A where

Z

ω0 t

n(τ )Γ(τ )dτ,

(4.173)

0

∞

Γ(τ ) =

c0 X + cn cos(nω0 t + φn ) 2 n=1

(4.174)

is a dimensionless periodic function that characterizes the shape of the limit cycle or phase trajectory corresponding to the oscillation waveform and depends on the oscillator topology. Γ() is called the impulse sensitivity function (ISF) for an approximate model for the oscillator phase behavior and serves a similar role as the perturbation projection vector (PPV, see Appendix) for the exact model [57, 58]. The initial phase φn in the above equation is not important for random noise sources and can be neglected. For the ideal case of a purely sinusoidal oscillator, c1 = 1 and Γ(t) = cos ω0 t. Now if any stationary noise current with a white power spectral density i2n /∆f is injected 116

into the oscillator circuit close to any harmonic nω0 + ∆ω or nω0 − ∆ω, it will result in a pair of equal sidebands at ω0 ± ∆ω. Then, the total single-sideband power spectral density for the phase fluctuations in a bandwidth ∆f = 1 Hz can be written, based on Equation (4.167), as ∞ P i2n c2n i2n Γ2rms n=0 L(fm ) = = , (4.175) 4C 2 V 2 ∆ω 2 2C 2 V 2 ∆ω 2 where Γrms is the root-mean-square value of Γ(t) 3 [46]. Thus, the total noise power near the carrier frequency of the oscillator is a result of the up-converted 1/f noise near dc, weighted by coefficient c0 , noise near the carrier weighted by coefficient c1 , and down-converted white noise near the second- and higher-order harmonics weighted by coefficients cn , n = 2, 3, .... The converted phase noise due to the conversion from one sideband to another can be of the order of 6 dB higher than the additive noise in the oscillator. The Impulse Sensitivity Function model describes approximate phase noise behavior, compared with the accurate equation [57], where the phase φ(t) also appears on its right-hand side. Such a simplified phase noise model is valid for the case of stationary noise sources such as white noise. However, when the noise sources are no longer stationary, it can be accurate only in the limits of an assumption of the small phase shifts for which cos ∆φ is close to unity. This implies that the approximate model is not accurate enough to analyse either the injection-locking phenomenon or related issues such as behavior of phase differences of coupled oscillators. The response of the oscillation system to impulsive noise can be provided by its direct measurement with a SPICE simulator, when an impulse is injected into the node of interest of the oscillator circuit and the oscillator is simulated for a few cycles afterwards [46]. By substituting the equivalent current noise source at each individual node in Equation (4.167), the phase contribution of each node can be calculated [59]. Fig. 4.32. shows a simplified single-ended common gate CMOS Colpitts oscillator configura-

Figure 4.32: Simplified Colpitts oscillator schematic. tion where the required regeneration factor for the start-up oscillation conditions is chosen using a proper ratio of the feedback capacitances C1 and C2 . The idealized voltage and current waveforms corresponding to the large-signal operation in idealized Class B with zero saturation voltage are shown in Fig. 4.33. The equation for the time-varying drain 3 According

to Parseval’s relation ∞ X n=0

c2n =

1 π

2π

Z

|Γ(x)|2 dx = 2Γ2rms

0

117

(4.176)

Figure 4.33: Ideal Class B drain voltage and current waveforms.

current can be written in the form   ∞ X i(t) = Imax α0 + αn cos(nω0 t) ,

(4.177)

n=1

where αn is the ratio of the nth current harmonic amplitude to the peak output current Imax , expressed through half the conduction angle θ as αn =

In γn (θ) , = Imax 1 − cos θ

(4.178)

where γn (θ) is called a coefficient of expansion of the output current cosinusoidal pulse or the current coefficients and are defined as follows: 1 γ0 (θ) = (sin θ − θ cos θ) (4.179) π   1 sin 2θ γ1 (θ) = θ− (4.180) π θ   1 sin(n − 1)θ sin(n + 1)θ γn (θ) = − . (4.181) π n(n − 1) n(n + 1) Fig. 4.34. shows a schematic definition of the conduction angle, that comes from a piecewiselinear approximation of the active device’s current-voltage transfer characteristic. In addition to the periodically time-varying nature of the system itself, another complication is that the statistical properties of some of the random noise sources in the oscillator may change with time in a periodic manner. These sources are referred to as cyclostationary. For instance, the channel noise of a MOS device in an oscillator is cyclostationary because the noise power is modulated by the gate source overdrive which varies periodically with time. There are other noise sources in the circuit whose statistical properties do not depend on time or the operating point of the circuit, and these are therefore called stationary. The thermal noise of a resistor is an example of a stationary noise source. To account for the cyclostationary drain noise source as a result of the total noise sources injected at frequencies nω0 ± ∆ω, (4.175), can be rewritten as

L(fm ) =

∞ P

(αn cn )2 n=0 , 4C 2 V 2 ∆ω 2

i2nd

118

(4.182)

Figure 4.34: Schematic definition of conduction angle.

where i2nd = 2qImax is the drain current noise power density in a frequency bandwidth ∆f = 1 Hz. The Fourier components for the current waveform close to half-cosinusoidal show that the drain’s shot noise is mixed mostly with the fundamental and second harmonics to contribute to the total phase noise of the oscillator. To minimize the oscillator phase noise, it is very important to choose the optimum value of feedback ratio k = C2 /C1 for the same total capacitance C = C1 C2 /(C1 + C2 ). This is because different values of the conduction angle correspond to different harmonic contributions to the output spectrum. In the case of Class B with θ = 90 , the third-, fifth- and higher-order harmonics can be eliminated since their current coefficients γn (for n = 3, 5, ...) become equal to zero. As a rule-of-thumb, the optimum feedback ratio for a Colpitts oscillator can be chosen in the range 3.5 ≤ k ≤ 4 [46].

4.5.4

Modeling of Phase Noise with the ISF: Lee and Hajimiri’s model

With the above discussion, we have established the essential time-variant nature of oscillators, and we have also understood that they can be reasonably treated as linear systems for all practical purposes, so that their impulse responses hφ (t, τ ) and hA (t, τ ) can characterize them completely, and that hA (t, τ ) can be neglected. The amount of excess phase is proportional to the ratio of the injected charge to the maximum charge swing across the capacitor on the node, i.e., ∆q/qmax . Furthermore, as shown in Fig. 4.35. the phase

Figure 4.35: Phase and amplitude impulse response model. impulse response of the system is a step whose amplitude depends periodically on the time 119

τ at which the impulse is injected. Therefore, the unit response for excess phase can be expressed as Γ(ω0 τ ) hφ (t, τ ) = u(t − τ ), (4.183) qmax where qmax is the maximum charge displacement across the capacitor on the node and u(t) is the unit step. From this point of view, the ISF Γ(x) is a dimensionless, frequency- and amplitude-independent periodic function with period 2π which describes how much phase shift results from applying a unit impulse at time t = τ . Γ(x) is a function of the waveform or, equivalently, the shape of the limit cycle which, in turn, is governed by the nonlinearity and the topology of the oscillator. Given the ISF, the output excess phase φ(t) can be calculated using the superposition integral Z +∞ Z +∞ 1 Γ(ω0 τ )i(τ )dτ, (4.184) hφ (t, τ )i(τ )dτ = φ(t) = qmax −∞ −∞ where i(t) represents the input noise current injected into the node of interest. Since the ISF is periodic, it can be expanded in a Fourier series ∞

Γ(ω0 τ ) =

c0 X + cn cos(nω0 τ + θn ), 2 n=1

(4.185)

where the coefficients cn are real-valued coefficients and θn is the phase of the nth harmonic. Using the above expansion in the superposition integral, and exchanging the order of summation and integration, we obtain  Z t  Z t ∞ X c0 1 cn i(τ )dτ + i(τ ) cos(nω0 τ )dτ . (4.186) φ(t) = qmax 2 −∞ −∞ n=1 This equation allows computation of φ(t) for an arbitrary input current i(t) injected into any circuit node, once the various Fourier coefficients of the ISF have been found. As an illustrative special case, suppose that we inject a low frequency sinusoidal perturbation current i(t) into the node of interest at a frequency of ∆ω  ω0 i(t) = I0 cos(∆ωt),

(4.187)

where I0 is the maximum amplitude of i(t). The arguments of all the integrals in (4.186) are at frequencies higher than ω0 and are significantly attenuated by the averaging nature of the integration. The exception is the term arising from the first integral, which involves c0 . Therefore, the only significant term in φ(t) will be Z t I0 c0 I0 c0 sin(∆ωt) cos(∆ωτ )dτ = φ(t) ≈ . (4.188) 2qmax −∞ 2qmax ∆ω As a result, there will be two impulses at ±∆ω in the power spectral density of φ(t), denoted as Sφ (ω). As an important second special case, consider a current at a frequency close to the carrier injected into the node of interest given by i(t) = I1 cos[(ω0 + ∆ω)t)]. A process similar to the previous case occurs, except that the spectrum of i(t) consists of two impulses at ±(ω0 + ∆ω), as shown in Fig. 4.36. This time only the integral in (4.186), which will have a low frequency argument, is for n = 1. Therefore, φ(t) is given by φ(t) ≈

I1 c1 sin(∆ωt) , 2qmax ∆ω

(4.189)

which again results in two equal sidebands at ±∆ω in Sφ (ω). More generally, (4.186) suggests that applying a current i(t) = In cos[(nω0 + ∆ω)t] close to 120

Figure 4.36: Conversion of the noise around integer multiples of the oscillation frequency into phase noise.

any integer multiple of the oscillation frequency will result in two equal sidebands at ±∆ω in Sφ (ω). Hence, in the general case φ(t) is given by φ(t) ≈

In cn sin(∆ωt) . 2qmax ∆ω

(4.190)

In synthesis, we have presented a method for determining how much phase error results from a given current i(t) using (4.186). Computing the power spectral density (PSD) of the oscillator output voltage Sv (ω) requires knowledge of how the output voltage relates to the excess phase variations. As shown in Fig. 4.36, the conversion of device noise current to output voltage may be treated as the result of a cascade of two processes. The first corresponds to a linear time variant (LTV) current to- phase converter discussed above, while the second is a nonlinear system that represents a phase modulation (PM), which transforms phase to voltage. To obtain the sideband power around the fundamental frequency, the fundamental harmonic of the oscillator output cos[ω0 t + φ(t)] can be used as the transfer function for the second system in Fig. 4.36. Note that this is a nonlinear transfer function with φ(t) as the input. Therefore an injected current at nω0 + ∆ω results in a pair of equal sidebands at ω0 ± ∆ω with a sideband power relative to the carrier given by  2 In cn PSBC (∆ω) = 10 log . (4.191) 4qmax ∆ω Appearance of the frequency deviation ∆ω in the denominator of the above equation underscores the fact that the impulse response hφ (t, τ ) is a step function and therefore behaves as a time-varying integrator. Note that it is necessary to use an LTV because an LTI model cannot explain the presence of a pair of equal sidebands close to the carrier arising from sources at frequencies nω0 + ∆ω , because an LTI system cannot produce any frequencies except those of the input and those associated with the systems poles. Furthermore, the amplitude of the resulting sidebands, as well as their equality, cannot be predicted by conventional intermodulation effects. This failure is to be expected since the intermodulation terms arise from nonlinearity in the voltage (or current) input/output characteristic of the active de2 3 vices of the form Vout = α1 Vin + α2 Vin + α3 Vin + ....This type of nonlinearity does not directly appear in the phase transfer characteristic and shows itself only indirectly in the 121

ISF. Next we consider the case of a random noise current in (t) whose power spectral density has both a flat region and a 1/f region, as shown in Fig. 4.37. As can be seen from (4.191)

Figure 4.37: Conversion of noise to phase fluctuation and phase-noise sidebands. and the foregoing discussion, noise components located near integer multiples of the oscillation frequency are transformed to low frequency noise sidebands for Sφ (ω), which in turn become close-in phase noise in the spectrum of Sv (ω), as illustrated in Fig. 4.37. It can be seen that the total Sφ (ω) is given by the sum of phase noise contributions from device noise in the vicinity of the integer multiples of ω0 , weighted by the coefficients cn .The theory predicts the existence of 1/f 3 , 1/f 2 and flat regions for the phase noise spectrum. The low-frequency noise sources, such as flicker noise, are weighted by the coefficient c0 and show a 1/f 3 dependence on the offset frequency, while the white noise terms are weighted by other cn coefficients and give rise to the 1/f 2 region of the phase noise spectrum. It is apparent that if the original noise current i(t) contains 1/f n low frequency noise terms, such as popcorn noise, they can appear in the phase noise spectrum as 1/f n+2 regions. To carry out a quantitative analysis of the phase noise sideband power, now consider an input noise current with a white power spectral density i2n /∆f . Note that In in (4.191) represents the peak amplitude. Based on the foregoing development and (4.191), the total single sideband phase noise spectral density in dB below the carrier per unit bandwidth due to the source on one node at an offset frequency of ∆ω is given by  i2n /∆f L{∆ω} = 10 log

∞ P n=0

c2n  .

(4.192)

 Γ2rms i2n /∆f . 2 qmax 4∆ω 2

(4.193)

2 8qmax ∆ω 2

From Parseval’s relation  L{∆ω} = 10 log

This represents the phase noise spectrum of an arbitrary oscillator in the 1/f 2 region of the phase noise spectrum. Now let’s investigate quantitatively the relationship between the device’s 1/f corner and the 1/f 3 corner of the phase noise. The device noise in the flicker noise dominated portion of the noise spectrum(∆ω < ω1/f ) can be described by i2n,1/f = i2n

122

ω1/f . ∆ω

(4.194)

This equation, together with (4.191) results in the following expression for the phase noise in the 1/f 3 portion of the phase noise spectrum:  L{∆ω} = 10 log

 c20 i2n /∆f ω1/f . 2 qmax 8∆ω 2 ∆ω

(4.195)

The phase noise 1/f 3 corner, ω1/f 3 , is the frequency at which the sideband power due to the white noise given by (4.193) is equal to the sideband power arising from the 1/f noise given by the above equation. Solving for ω1/f 3 gives ω1/f 3 = ω1/f

 2 c20 c0 ≈ ω . 1/f 2Γ2rms c1

(4.196)

This equation, together with (4.193), describes the phase noise spectrum. As can be seen, the 1/f 3 phase noise corner due to internal noise sources is not equal to the 1/f device noise corner, but is smaller by a factor equal to c20 /2Γ2rms . The coefficient c0 depends on the waveform and can be reduced significantly if certain symmetry properties exist in the waveform of the oscillation. Thus, poor 1/f device noise need not imply poor close-in phase noise performance. Let us next examine the cyclostationary noise sources. It can be demonstrated that a white cyclostationary noise current in (t) can be decomposed as in (t) = in0 (t)α(ω0 t)

(4.197)

and, using the above approach, it can be shown that the cyclostationary noise can be treated as a stationary noise applied to a system with an effective ISF given by Γef f (x) = Γ(x)α(x),

(4.198)

where α(x) can be derived easily from device noise characteristics and the operating point. Hence, this effective ISF should be used in calculations. Note that there is a strong correlation between the cyclostationary noise source and the waveform of the oscillator. The maximum of the noise power always appears at a certain point of the oscillatory waveform. Thus, the average of the noise may not be a good representation of the noise power. Generally, the effect of cyclostationarity is very significant for LC oscillators and cannot be neglected. The situation is different for ring oscillators, for which the cyclostationary properties of the noise are less important in the treatment of the phase noise. This unfortunate coincidence is one of the reasons why ring oscillators in general have inferior phase noise performance compared to LC oscillators. The other important reason is that ring oscillators dissipate all the stored energy during one cycle. Design implications Several design implications emerge from the above discussion that offer important insight into reducing phase noise in oscillators. First, they show that increasing the signal charge displacement qmax across the capacitor will reduce the phase noise degradation due to a given noise source. In addition, the noise power around integer multiples of the oscillation frequency has a more significant effect on the close-in phase noise than at other frequencies, because these noise components appear as phase noise sidebands in the vicinity of the oscillation frequency, as described by (4.191). Since the contributions of these noise components are scaled by the Fourier series coefficients cn of the ISF, the designer should seek to minimize spurious interference in the vicinity of nω0 for values of n for which cn is large. Criteria for the reduction of phase noise in the 1/f 3 region are suggested by (4.196), which

123

shows that the 1/f 3 corner of the phase noise is proportional to the square of the coefficient c0 . Recalling that this is twice the dc value of the (effective) ISF function, namely Z 1 2π c0 = Γef f (x)dx, (4.199) π 0 it is clear that it is desirable to minimize the dc value of the ISF. The value of c0 is closely related to certain symmetry properties of the oscillation. One such property concerns the rise and fall times; the ISF will have a large dc value if the rise and fall times of the waveform are significantly different. A limited case of this for odd-symmetric waveforms has been observed [60]. Although odd-symmetric waveforms have small c0 coefficients, the class of waveforms with small c0 is not limited to odd-symmetric waveforms. Since the asymmetry is due to the voltage dependent conductance of the load, reduction of the upconversion might be achieved through the use of a perfectly linear resistive load, because the rising and falling behavior is governed by an RC time constant and makes the individual waveforms more symmetrical. This was first observed in the context of supply noise rejection[61] where using more linear loads can reduce the effect of supply noise on timing jitter. Our treatment shows that it also improves low-frequency noise upconversion into phase noise. Another symmetry-related property is due to the duty cycle. Since the ISF is waveform-dependent, the duty cycle of a waveform is linked to the duty cycle of the ISF. Non-50% duty cycles generally result in larger cn for even n . The high-Q tank of an LC oscillator is helpful in this context, since a high Q will produce a more symmetric waveform and hence reduce the upconversion of low-frequency noise. Another consideration that could be done regards the current bias. Generally, a properly biased transistor is used as a current tail, as it is a high-impedance source. In this way, 1/f noise upconversion would be present: by using a resistor instead, the 1/f noise would be absent. This also helps the oscillator to work in the current limited region. An oscillator works in the current limited region if the amplitude of the oscillation grows more or less linearly with the tail current. If the output voltage starts to saturate, the oscillator is said to work in the voltage limited region (Fig. 4.38). Operation in the current limited region results in better phase noise

Figure 4.38: Two regions of operations: voltage limited and current limited region. performance than operation in the voltage limited region. In the voltage limited region, tail current is wasted since it does not contribute to higher voltage swing.

4.5.5

Calculation of the Impulse Sensitivity Function with Hajimiri and Lee’s model

In this section, we present two different methods to calculate the ISF. The first method is based on direct measurement of the impulse response and calculation of Γ(x) from it. The 124

second method is based on analytical state-space approach to find the excess phase change caused by an impulse of current from the oscillation waveforms. Direct measurement of Impulse Response In this method, an impulse is injected at different relative phases of the oscillation waveform and the oscillator is simulated for a few cycles afterwards. By sweeping the impulse injection time across one cycle of the waveform and measuring the resulting time shift ∆t, hφ (t, τ ) can be calculated noting that ∆φ = 2π∆t/T , where T is the period of oscillation. Since one needs to simulate the oscillator for only a few cycles for each impulse, the simulation executes rapidly. Once hφ (t, τ ) is found, the ISF is calculated by multiplication with qmax . This method is the more accurate of the two methods presented. Closed-Form Formula for the ISF An nth-order system can be represented by its trajectory, in an n-dimentional state-space. In the case of a stable oscillator, the state of the system, represented by the state vector ¯ periodically traverses a closed trajectory, as shown in Fig. 4.39. In the most general X,

Figure 4.39: State-space trajectory of an nth-order oscillator. ¯ case, the effect of a group of external impulses can be viewed as a perturbation vector ∆X ¯ ¯ which suddently changes the state of the system to X +∆X. As discussed earlier, amplitude variations eventually die away, but phase variations do not. Application of the perturbation impulse causes a certain change in phase in either a negative or positive direction, depending on the state-vector and the direction of the perturbation. To calculate the equivalent time shift, we first find the projection of the perturbation vector onto a unity vector in the direction of motion, i.e., the normalized velocity vector ¯˙ ¯ X , l = ∆X ¯˙ |X|

(4.200)

¯˙ is the first derivative of where l is the equivalent displacement along the trajectory, and X the state vector. Note the scalar nature of l, which arises from the projection operation. ¯˙ The equivalent time shift is given by the displacement divided by the speed |X| ∆t =

l , ˙ ¯ |X|2

(4.201)

which results in the following equation for excess phase caused by the perturbation  ¯˙  ∆t 2π ¯ X = ∆X (4.202) ∆φ = 2π T T ¯˙ 2 |X| 125

In the specific case where the state variables are node voltages, and the impulse is applied to the ith node, the baove equation reduces to ∆φi =

2π ∆qi v˙i T Ci |v¯˙ |2

(4.203)

where |v¯˙ |2 is the norm of the first derivative of the waveform vector and v¯˙i is the derivative of the ith node voltage. Writing the output of a practical oscillator as Vout (t) = A(t)f [ω0 t + φ(t)], we have ∆φ =

∆q f˙i , qi |f¯˙|2

(4.204)

(4.205)

where f˙i represents the derivative of the normalized waveform on node i, hence Γi (x) =

f˙i f˙i = P . n 2 |f¯˙|2 ˙ fj

(4.206)

j=1

It can be seen that this expression for the ISF is maximized during transitions (i.e., when the derivative of the waveform function f is maximum), and this maximum value is inversely proportional to the maximum derivative. Hence, waveforms with a larger slope show a smaller peak in the ISF function. In the special case of a second-order system, one can use the normalized waveform and its derivative as the state variables, resulting in the following expression for the ISF: f0 (4.207) Γ(x) = 02 f + f 002 In the case of an ideal sinusoidal oscillator f = cos(x) and Γ(ωt) = − sin(ωt), which is a consistent result. This method has the attribute that it computes the ISF from the waveform directly, so that simulation over only one cycle of f is required to obtain all of the necessary information.

4.6

Noise of Bias Current Source

Oscillators typically employ a bias current source so as to minimize their sensitivity to the supply voltage and noise therein. We wish to study the phase noise contributed by this current source. Condider the topology shown in Fig. 4.40(a), where In models the noise of ISS , including

Figure 4.40: (a) Oscillator with noisy tail current source, (b) circuit viewed as a mixer.

flicker noise near zero frequency, thermal noise around the oscillation frequency, ω0 , thermal 126

noise around 2ω0 , etc. We also recognize that M1 and M2 are periodically turned on and off, thus commutating ISS + In and hence operating as a mixer. In other words, the two circuits shown in Fig. 4.40(b) are similar, and the differential current injected by M1 and M2 into the tanks can be viewed as the product of ISS + In and a square wave toggling between -1 and +1 (for large swings). Let us examine the effect of different noise frequencies upon the performance of the oscillator in Fig. 4.40(a). The noise around ω0 is mixed with the harmonics of the square wave, ω0 , 3ω0 , 5ω0 ,..., landing at 0, 2ω0 , 4ω0 ,.... Thus, this component is negligible. The noise around 2ω0 , on the other hand, markedly impacts the performance [62, 63]. As illustrated in Fig. 4.41(a), a noise component slightly below 2ω0 is mixed with the first and

Figure 4.41: (a) Translation of tail noise around 2ω0 to sidebands around ω0 , (b) separation of PM and AM components. third harmonics of the square wave, thereby falling at slightly below and above ω0 but with different amplitudes and polarities. To determine whether these components produce AM or PM, we express the oscillator output as cos(ω0 t) and its third harmonic as (−1/3) cos(3ω0 t). For a tail current noise component, I0 cos(2ω0 − ∆ω)t, the differential output current of M1 and M2 emerges as Iout ∝ cos(ω0 t)I0 cos(2ω0 − ∆ω)t +

−1 cos(3ω0 t)I0 cos(2ω0 − ∆ω)t 3

(4.208)

I0 I0 cos(ω0 − ∆ω)t − cos(ω0 + ∆ω)t + .... (4.209) 2 6 Two equal cosine sidebands having opposite signs surrounding a cosine carrier represent PM. In the above equation, however, the two sidebands have unequal magnitudes, creating some AM as well. Writing ∝

I0 I0 I0 cos(ω0 − ∆ω)t = cos(ω0 − ∆ω)t + cos(ω0 − ∆ω)t 2 6 3

(4.210)

I0 6

cos(ω0 −∆ω)t−

and extracting from the second term its PM components (Fig. 4.41(b)) as I0 6 cos(ω0 + ∆ω)t, we obtain the overall PM sidebands: Iout ∝

I0 I0 cos(ω0 + ∆ω)t − cos(ω0 − ∆ω)t + ..., 3 3

127

(4.211)

where the proportionality factor is related to the conversion gain of the mixing action. It can be shown that the relative phase noise in the output voltage can be expressed as [62] 2 16In 9π 2

S(∆ω) =



1 2C∆ω

2

4 2 2 π 2 ISS Rp

4I 2 = 2n 9ISS



ω0 2Q∆ω

2 .

(4.212)

The thermal noise near higher even harmonics of ω0 plays a similar role, producing PM sidebands around ω0 . It can be shown that the summation of all the sideband powers results in the following phase noise expression due to the tail current source [62] π 2 In2 S(∆ω) = 2 16ISS



ω0 2Q∆ω

2 .

(4.213)

Since the noise current at 2ω0 in the tail current source translates to phase noise around ω0 , a shunt capacitor can be used to remove this and higher noise harmonics can be used (Fig. 4.42). However, if M1 and M2 enter the deep triode region during oscillation, then two

Figure 4.42: (a) Use of capacitor to shunt tail noise, (b) use of ac coupling to avoid operation in deep triode region. effects raise the phase noise: (1) the on-resistance of each transistor now degrades the Q of the tank, and (2) the ISF from the noise of each transistor to the output phase becomes substantially larger. These issues can be resolved with capacitive coupling inserted in the loop [64].

4.6.1

AM/PM Conversion

Let us summarize our findings thus far. In the tail-biased oscillator (and also in the topbiased oscillator), the noise near zero frequency introduces amplitude modulation, whereas that near even harmonics of ω0 leads to phase noise. However, the ampliude modulation resulting from the bias current does translate to phase noise in the presence of nonlinear capacitances in the tanks. To understand this point, we make the following observations. Since the varactor capacitance varies periodically with time, it can be expressed as a Fourier series ∞ ∞ X X Cvar = Cavg + an cos nω0 t + bn sin nω0 t (4.214) n=1

n=1

where Cavg denotes the “dc” value. If noise in the circuit modulates Cavg , then the oscillation frequency and phase are also modulated. We must therefore determine under what conditions the tail noise,i.e., the output AM noise, modulates Cavg . Consider the tank shown in Fig. 4.43(a), and first assume that the voltage dependence of C1 is odd-symmetric around the vertical axis,e.g., C1 = C0 (1 + αV ). In this case, Cavg is independent of the signal amplitude because the capacitance spends equal amounts of time 128

Figure 4.43: (a) Tank driven by an RF current course, (b) effect of AM on average capacitance for a C/V characteristic that is symmetric around vertical axis, (c) effect of AM on average capacitance for a C/V characteristic that is asymmetric around vertical axis.

above and below C0 (Fig. 1.3(b)). The average tank resonance frequency is thus constant and no phase modulation occurs. The above result change if C1 exhibits even-order voltage dependence, e.g. C1 = C0 (1 + α1 V + α2 V 2 ). Now the capacitance changes more sharply for negative or positive voltages, yielding an average that depends on the current amplitude (Fig. 1.3(c)). We therefore observe that, in an oscillator employing such a tank, slow modulation of the amplitude varies the average tank resonance frequency and hence the frequency of oscillation. The phase noise resulting from the low-frequency bias current source is computed in [65].

4.7

Figures of Merit of VCOs

Let us recall that there is an intrinsic trade-off between the phase noise, power dissipation, and tuning range of VCOs. For example, varactors themselves suffer from a trade-off between their capacitance range and their Q. We also recall from Leeson’s equation that phase noise rises with the oscillation frequency if the Q does not increase proportionally. A figure of merit (FOM) that encapsulates some of these trade-offs is defined as F OM1 =

ω02 PD ∗ P N ∗ ∆ω 2

(4.215)

where the phase noise is multiplied by the square of the offset frequency at which it is measured so as to perform normalization. Attention must be paid to the unit of phase noise (noise power normalized to carrier power) in this expression. Note that the product of power dissipation and phase noise has the units of W/Hz. Another FOM that additionally represents the trade-offs with the tuning range is  2 TR ω02 × . (4.216) F OM2 = PD × P N × ∆ω 2 ω0 State-of-the-art CMOS VCOs in the range of several GHz achieve an F OM2 around 190dB. In general, the phase noise in the baove expressions refers to the worst-case value, typically at the highest oscillation frequency. Also note that these FOMs are open loop and do not account for the load driven by the VCO. 129

4.8 Appendix: Differential-algebraic equations for oscillators The dynamics of an autonomous oscillator without undesired perturbations can be described by a system of differential-algebraic equations (DAEs) of the form d q(x) + g(x) = 0 dt

(4.217)

where x ∈ Rn represents a vector of state variables consisting of circuit node voltages and branch currents pertaining to voltage sources and inductors in the circuit. The function q() : Rn − > Rn represents the nonlinear charge and flux storage elements in the circuit, and the function g() : Rn − > Rn represents memoryless nonlinearities in the circuit. Almost all of the circuit simulators based on SPICE use the modified nodal analysis (MNA) formulation, which is basically a system of DAEs. Equation (4.217) is assumed to have an asymptotically and orbitally stable periodic solution xs (t) with period T, i.e., d q(xs ) + g(xs ) = 0 dt

(4.218)

Taking the derivative of both sides of the above equation with respect to t gives:   d d d x˙s + x˙s = 0 q(x) g(x) dt dx dx x=xs x=xs

(4.219)

Thus, x˙s (t) is a T -periodic solution of the homogeneous periodically time-varying linear system of DAEs d (C(t)x) ˙ + G(t)x˙ = 0 (4.220) dt d d where C(t) = dx q(xs )0 is in general not full rank, and G(t) = dx g(xs ). Both C(t) and G(t) are periodic with period T . We are interested in the response of the system described in (4.217) to a small statedependent perturbation of the form B(x)b(t) where B() : Rn − > Rn×p , represents the modulation of the intensities of the noise sources with the large-signal state, and b() : Rn − > Rp is a vector of noise intensities. From nonlinear perturbation theory, it is shown that the perturbed system described by d q(x) + g(x) + B(x)b(t) = 0 dt

(4.221)

z(t) = xs (t + α(t)) + y(t)

(4.222)

has an exact solution of It can be shown that the phase deviation α(t) is given by the nonlinear differential equation d α(t) = v1T (t + α(t))B(xs (t + α(t)))b(t), dt

α(0) = 0

(4.223)

where v1 (t) is a periodically time-varying vector referred to as the perturbation-projection vector (PPV). Note that the phase deviation α(t) can grow unboundedly large with time, even though the noise perturbations are small. Also, the orbital deviation y(t) is obtained by performing a traditional linear perturbation analysis around the phase-corrected solution. The nonlinear perturbation analysis theory also defines the oscillator noise constant c (in s) which is given by Z 1 T T c= v (τ )B(xs (τ ))B T (xs (τ ))v1 (τ )dτ (4.224) T 0 1 130

Once the oscillator noise constant is obtained, the single-sideband phase noise L(fm ) in dBc/Hz is given by [58]   f02 c , 0 ≤ fm  f0 (4.225) L(fm ) ≈ 10 log 2 π 2 f04 c2 + fm where fm is the offset frequency in Hz from the carrier.

131

Chapter 5

Comparative Analyses of Performances in VCOs designed in 180 nm Si-Ge HBT: Models and Simulations In this final chapter, comparative analyses of the performances of 180 nm Si-Ge HBT VCOs are carried out. The frequency of oscillation is fixed for each topology to 5 GHz. All the components used in the design are taken from the PDK (Product Development Kit). All the circuits that will be presented in this chapter, the theory used to perform these analyses as well as the technology used, have been presented in the previous four chapters. For each circuit analyzed, a small signal model is used to predict the frequency of oscillation. The transfer function of the circuits has been computed using the Symbolic Math Toolbox in Matlab, since it is a powerful toolbox to simplify all the calculations necessary to obtain the transfer function in the form H(s) = N (s)/D(s). Next, the phase noise has been measured with SpectreRF in Cadence Virtuoso: the results given by simulations are very accurate, for two main reasons. First, the phase noise of an oscillator is computed in Cadence using PSS (Periodic Steady State) and Pnoise (Periodic Noise) analysis: Pnoise uses the exact model for the calculation of the phase noise, consisting of computing the Floquet modes for autonomous circuits (see Chapter 5). Second, the models of all the real components used in the design are implemented in Cadence, so all the resistive and capacitive parasitics are taken in account to evaluate the phase noise. Generally, the results given by Cadence in terms of phase noise match well (within 1-2 dB) with the post- layout simulations, and within 2-3 dB of the real chip implementation. The simple linear and time invariant Leeson’s model is used to predict SpectreRF simulations qualitatively. This model matches well (within 3-4 dB) with simulations, and is a powerful method to evaluate by hand the expected phase noise from an oscillator topology. For each topology a Matlab script has been created and will be presented in this chapter. For each topology, its script calculates (i) the transfer function, (ii) the predicted frequency of oscillation from the transfer function, (iii) the Loaded-Q factor for the Leeson’s model, (iv) the predicted phase noise and the comparison with the result given by SpectreRF, (v) the Figure of Merit (FOM) based on the measured tuning range and dc dissipated power. Such a script could be a useful way to analyze an oscillator by hand. Some important conclusions will be given from all these results and from the simulations about which topology is suitable for a certain application.

132

5.1

State of the art

Table 5.1 shows some VCOs implemented in Si-Ge technology, and their performances in terms of phase noise (evaluated at 100 kHz offser from the carrier frequency), dissipated power and tuning range, while Table 5.2 shows some VCOs implemented in CMOS technology. In the last case, the phase noise is evaluated mainly at 1 MHz offset from the carrier frequency since, as discussed in Chapter 4, this technology is not suitable for applications that require a low phase noise at small offsets from the carrier. Table 5.1: State of the art VCOs in HBT technology Year 2005 2005 2007 2001 2000 2002 2002 2012 2000 2002 2002

Ref [66] [67] [68] [69] [70] [71].1 [71].2 [72] [73] [74].1 [74].2

Type Differential Colpitts Differential Colpitts Differential Colpitts X-band Clapp Cross Coupled Cross Coupled Differential Armstrong Differential VCO Differential Colpitts Quadrature Colpitts

Technology SiGe HBT BiCMOS SiGe HBT InGaP-HBT SiGe-HBT SiGe-HBT SiGe-HBT BiCMOS SiGe SiGe HBT SiGe HBT

fosc (GHz) 5 3 3 10 4.8 5.9 6.3 4.4 5 6.3 5.9

TR (GHz) 0.2 0.3 0.3 1.5 0.27 1 1 1 0.3 1.08 1

PN (dBc/Hz) -108@100kHz -105@100kHz -105@100kHz -92@100kHz -100@100kHz -106@100kHz -104@100kHz -95@100kHz -98@100kHz -104@100kHz -106@100kHz

Pdc (mW) n/a n/a n/a n/a 46 53 30 10 30 30 53

FoM n/a n/a n/a n/a 181 198 199 195 182 199 198

Measured Measured Measured Measured Measured Measured Measured Measured Measured Measured Measured

Table 5.2: State of the art VCOs in CMOS technology Year 2015 2014 2005 2005 2005 2013 2009 2010 2007 2007 2010 2007 2012 2007

Ref [69] [71] [75].1 [75].2 [76] [77] [78] [79] [80].1 [80].2 [81] [82] [83] [84]

Type Current starved Class-C Cross-coupled Cross-coupled Differential Colpitts Cross-coupled Quadrature Colpitts Vackar Armstrong Armstrong Hartley Hartley Hartley Hartley

5.2

Technology CMOS 45nm CMOS 55nm CMOS 180nm CMOS 180nm CMOS 180nm CMOS 180nm CMOS 180nm CMOS 180nm CMOS 180nm CMOS 180nm CMOS 180nm CMOS 180nm CMOS 180nm CMOS 180nm

fosc (GHz) 2 7.15 5.15 5.3 5 4 5.44 4.9 5.1 5.1 5.6 5.06 5.65 4.5

TR (GHz) n/a 1.3 1.5 1.2 n/a 1.91 0.25 0.18 0.38 0.47 0.16 0.38 0.8 0.48

PN (dBc/Hz) -104@1MHz -127@1MHz -88.01@100kHz -81.52@100kHz -120.42@1MHz -115.6@1MHz -124.36@1MHz -124.9@1MHz -116.71@1MHz -110.02@1MHz -123.6@1MHz -125.6@1MHz -118.42@1MHz -122@1MHz

Pd,DC (mW) n/a 18 1.2 0.9 n/a 2.99 9.9 13.5 3.9 2.59 10.4 17.4 1.7 6.75

FoM (dB) n/a 206 200 193 189 196 189 188 192 189 187 194 204 197

Common Base Differential Colpitts VCO

As explained in the previous chapters, the Colpitts oscillator is a topology that has been exploited a lot in several recent works [85, 86], and the differential counterpart is one of the most used BJT topology [87, 66, 67, 68, 74, 76, 88, 78], because among a large number of RF oscillator topologies, the Colpitts oscillator is well known for its superior phase noise performance. The HBT technology is regarded to be the best suited technology choice for low phase noise VCOs due to its inherently low noise, although the oscillator topology and design is also crucial. According to Lee and Hajimiri [30] the Colpitt oscillator has an advantage regarding low phase noise due to its favorable impulse sensitivity because, in a well-designed Colpitts oscillator, the current to the tank is delivered by the transistor in a short time compared to the cycle time [66]. In addition, due to the balanced design, the decoupling of the supply bias is less critical.

133

Results sim meas sim meas meas meas meas meas meas meas meas meas meas meas

Figure 5.1: Schematic of the Si-Ge HBT VCO with differential outputs.

Fig. 5.1 shows a differential common-base Colpitts oscillator designed in 180 nm Si-Ge HBT technology, with a 3.3 V supply (Vcc ). A differential inductor is used, with the center tap also tied to 3.3 V. For the biasing network, consisting of Rb1 , Rb2 , Re , a second 3 V supply is used (Vbb ). The capacitive voltage divider typical of the Colpitts topology is offered by the two capacitors C1 and C2 . The two capacitors Cb on the bases of the transistors act as decoupling capacitors, and also serve for minimizing the frequency pushing by the base voltage [47]. The variable capacitors are implemented using accumulation-mode MOS varactors, as they offer better performances in terms of tuning range and phase noise compared to using reverse biased diode varactors [89]. The following design procedure has been adopted.

5.2.1

Single Biasing Network

Fig. 5.2 shows the biasing network used, where Rs is the series resistance of the inductor,

Figure 5.2: Schematic of the single biasing network.

that can be calculated from the value of the inductor used (L=580 pH), and from the Qfactor of the inductor itself, that is computed using Cadence (Q=23.8). Therefore, we can

134

write Rs =

2πfosc L , Q

(5.1)

obtaining Rs = 0.76 Ω. The KVL for Q1 gives VCE = VCB + VBE .

(5.2)

For VBE = 0.7 V, the BJT is on; moreover, VCB has to be greater than zero, to make sure that the BJT works in its forward active region: choosing VCB = 1.8 V, VCE is equal to 2.5 V. The KVL from VCC to ground, gives VCC = Rs Ic + VCE + VE .

(5.3)

From the PDK 1 documentation, it’s given that for a VBE = 0.7V , the transistor collector current IC is 2 mA. Therefore, from (5.3), VE = 0.79 V . The emitter resistance value Re can now be calculated from the equation Re ≈

VE = 400Ω. IC

(5.4)

To calculate Rb1 and Rb2 , the equivalent Thevenin circuit in Fig. 5.3 is considered, where

Figure 5.3: Thevenin equivalent circuit of the base bias network.

Rb2 Rb1 + Rb2

(5.5)

Rb1 Rb2 . Rb1 + Rb2

(5.6)

VBB = Vbb and RBB = From the KVL to the network in Fig. 5.3

VBB = RBB IB + VBE + V E

(5.7)

Substituting (5.5) and (5.6) in (5.7), we have Vbb

Rb2 Rb1 Rb2 IC = + VBE + VE , Rb1 + Rb2 Rb1 + Rb2 β

(5.8)

where β is the forward current gain of the transistor, and is exstimated to be around 100 from the PDK. Solving the above equation for Rb1 /Rb2 gives Rb1 = 1, Rb2 1 Process

Development Kit

135

(5.9)

Table 5.3: Single Colpitts Device Sizing Active device Value Passive devices Emitter Length 7 µm Re Emitter Width 0.5 µm Rb1 Multiplier 9 Rb2 EBC Fingers 232 Cb Emitter Metal M2 C1 Include metal parasitics Yes C2

Value 420 Ω 1.5k Ω 1.5k Ω 400 pF 1.1 pF 1.4 pF

Table 5.4: Varactor and Inductor Sizing Inductor Value Varactor Value Outer dimension 300 µm Length 0.48 µm Width 34 µm Width 2 µm Spacing 2 µm Fingers 10 Number of Turns 2 Slices 10 Operating Frequency 5 GHz Multiplier 1 Inductance Nominal Value 0.58 nH Cmin 367.85 fF Q-factor 23.83 Cmax 975.95 fF which means that Rb1 = Rb2 . Values of resistors have to be chosen taking into account the dc dissipated power and their thermal noise, that results in upconversion to phase noise. Moreover, it’s well known that to integrate high value resistors is hard since the required area is high. A good choice is Rb1 = Rb2 = 1.5kΩ, since the dc dissipated power from the biasing network becomes lower and the thermal noise associated with the biasing network is negligible compared to the other noise sources. Note that, with these values RBB Re  (5.10) β and VBB  VBE .

(5.11)

Therefore, the collector current can be written approximately as IC ≈

VBB . Re

(5.12)

Note that Ic is a value completely independent of the physical features of the transistor. This is the reason why a four resistance network is widely adopted as biasing network. A .dc analysis has been performed in Cadence, and it is shown in Fig. 5.4. Note that the collector current is 1.97 mA, VBE is 0.71 V and VCE is 2.51 V, confirming the assumptions above. Note also that all the components are not ideal, therefore the poly-resistor used in the design is also characterized by a capacitor to substrate value and a resistor to substrate value, both of which depend on the value chosen for the resistor.

5.2.2

Single Common-Base Colpitts VCO

Next, the single stage counterpart shown in Fig. 5.5. has been analysed. Table 5.3 shows the active and passive devices sizing, while Table 5.4 shows the inductor and varactor sizing. In this design, the output can be taken either from Vout1 or Vout2 . The difference between the outputs is that the first has a higher voltage swing compared to to latter, but the output Vout2 doesn’t need to be buffered, since it is taken from the emitter of the BJT, and the resistance seen from this node is small.

136

Figure 5.4: A .dc simulation in Cadence.

137

Figure 5.5: Single stage common base Colpitts VCO.

Inductor As regards the inductor, it has been optimized to have the lowest parasitic series resistance (calculated in the previous section), i.e., the highest Q- factor, equal to 23.86 (see Table 5.5). This contributes to lower phase noise. As shown in several works [90], optimization of the inductor is one of the most important step to lower phase noise, since it is the most critical component to integrate on chip, and generally occupies a large area. However, the best choice is to select a small inductor to minimize the noise associated with the parasitic components. A square inductor has been used: Fig. 5.6 shows the cross section, Fig. 5.7 shows a layout snap shots of the single-ended inductor, and Fig. 5.8 shows its equivalent circuit representation: Csub and Rsub are the substrate capacitance and resistance respectively, Cox the oxide capacitance, R1 -R4 the ladder resistance components, L1 -L4 the ladder inductance components, Rvia is the underpass/cross-over via resistance and Cp is the Interwinding and cross-over capacitance. The capacitive effect of the packag-

Table 5.5: Some of the inductors available at around 5 GHz operating frequency Outer (µm) Width (µm) Turns Space (µm) Qpeak Fpeak (GHz) Ldc (nH) Rdc (Ω) 300 34 2 2 23.86 5.50 0.58 0.76 325 34 2 2 23.56 5.05 0.71 0.94 325 34 2 2.5 23.53 5.09 0.70 0.94 325 34 2 3 23.45 5.12 0.69 0.93 325 30 2 2 23.04 5.07 0.80 1.10 275 22 3 3 21.03 5.08 1.21 1.82 375 18 2 3 20.04 5.12 1.52 2.38 375 16 2 3 18.97 5.21 1.61 2.68 200 12 4 2 16.60 5.30 1.64 3.05 400 10 2 3 14.71 5.23 2.23 4.76

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Figure 5.6: Cross section view of inductor.

Figure 5.7: Square Single-Ended Inductor Layout.

Figure 5.8: Sub-Circuit Model for Single-Ended Square Inductor.

139

ing compound are taken into account by selecting the dielectric constant of the compound through the inductor Component Description Format (CDF) for realistic results. The radio frequency (RF) skin effect pushes the current at higher frequencies to the surface of the metal line, effectively increasing the resistance of the inductor (AC resistance). This effect is modeled using a ladder circuit comprised of resistors and inductors that approximate the conductor as four concentric shells. The parallel combination of resistors in the ladder circuit resistance corresponds to the DC resistance of the inductor, while the inductance of the ladder corresponds to the internal inductance of the metal trace. This internal inductance is due to the flux linkage of the current to itself and is gradually turned off as the current conducting cross-section is restricted with increasing frequency. For this reason, a droop of the inductance from the DC value is observed on inductors that are affected by the skin effect. The interwinding capacitance or feed forward capacitance, electrically couples the ports of the inductors. The oxide capacitance couples the inductor to the substrate. The packaging compound material affects primarily the interwinding capacitance whose value will increase with the dielectric constant of the material. Single-ended inductors can be drawn over an active ground shield to improve the Q value. Using a ground shield lowers the substrate resistance by moving the ground return path from the bulk silicon to the shield structure. Finally, for single-ended inductors the Q can be boosted and noise isolation improved by inserting a ground shield below the inductor. Varactor The variable capacitors are implemented using accumulation-mode MOS varactors, as they offer better performance in terms of tuning range and phase noise with respect of using reverse biased diode varactors [89]. As explained in Chapter 3, the Q- factor of the varactor significantly affects the phase noise and, as for the inductor, a lower phase noise can be obtained with a small inductor. Nevertheless, with a small varactor, the range [Cmin , Cmax ] in Table 5.4 reduces, thus reducing the tuning range (phase noise and tuning range are trade off parameters in a VCO). In our technology, the MOS varactor is formed by a thin gate-oxide over N-well, with an N + implant at both source/drain regions to form ohmic contacts with varactor N-well region. A cross section of this device is shown in Fig. 5.9 The MOS varactor cell offers several

Figure 5.9: MOS Varactor Cross Section: n+ poly to Nwell capacitor as MOS Varactor.

design parameters to allow optimization of device performance. Table 5.10 provides detailed information about the cell variables. The gate width (Wg ) and length (Lg ) control the capacitance (C), tuning range and quality factor (Q). Increased Wg and Lg provide higher tuning range as the contribution of fixed capacitance is reduced. However, the Q is reduced due to increased Nwell and poly gate resistance, determining lower phase noise. 140

Figure 5.10: MOS Varactor Parameter Description.

The C is scaled through arraying the device as slices (Ns ) and fingers (Nf ). The subcircuit used for the scalable mos varactor model is shown in Fig. 3.13. The intrinsic capacitance CGBi is the oxide capacitance Cox in series with a voltage dependent depletion capacitance Cd . The total capacitance swings from a maximum of Cox in accumulation for positive Vgb to the series combination of Cox and Cd in depletion when Vgb is negative. Overlap and fringing capacitances (Cf r ) are considered to be constant. The parasitic resistance is dominated by the Nwell resistance (Rnwb + Rnwe ). Optimization for low phase noise All values shown in Table 5.3 have been derived from Periodic Steady State (PSS) and PNoise (Periodic Noise) simulations. Cadence allows one to sweep the values of the components in the schematic, and to plot the phase noise over the value of the desired component. Therefore, the value for minimum phase noise can be chosen. For example, the emitter resistance Re , found to be 400 Ω in the previous section, has been found to be 420 Ω for a minimum phase noise by simulations. The transistor sizing has been chosen in the same way: infact, the optimum phase noise for a given topology is also reached when the optimum current density for the transistor is chosen [59]. The optimum current density in Cadence has been found with the sizing in Table 5.3. The Emitter-Base-Collector Fingers option has been chosen to be 2-3-2, in order to reduce the thermal noise associated to the parasitic base resistance, since its value decreases. Finally, as explained in Chapter 4, the optimum feedback ratio for the Colpitts topology k = C2 /C1 has to range between 1 and 4, and it depends on the specific topology (Common-Base, Common-Emitter, Common-Collector). Therefore C1 and C2 in Table 5.3 have been determined (i) by the desired oscillation frequency, since the inductance value is fixed after the optimization shown before, and (ii) by the optimum k, that in our case has been found to be 1.27 by means of simulations. Simulations A 150 ns .tran simulation has been performed. The transient of the circuit lasts around 10 ns. Fig. 5.11 shows the output waveform of the designed single Colpitts VCO at the centre frequency of 5.1 GHz, when the transient time is exstinguished. The spectrum of the output waveform, measured in SpectreRF from 145 ns to 150 ns, is shown in Fig. 5.12. Note that the fundamental frequency is 5.1 GHz, and there are also the other even and odd harmonics due to the transistor’s nonlinearities. The phase noise, evaluated at 100 kHz offset from the carrier frequency, is equal to -105.75 dBc/Hz and is shown in Fig. 5.13. Table 5.6 reports the percentage contributions of the active and passive device to the thermal noise components of the PN spectrum at 100 kHz from the carrier frequency, as the flicker noise contribution at that offset is completely absent for this technology. Several important observations can be derived from Table 5.6 and Fig. 5.13. As can be seen, the major contribution of the noise is given by the transistor Q1 . Therefore, the designer should try 141

Figure 5.11: Output waveform Vout1 in Fig. 5.5.

Figure 5.12: Output spectrum of Vout1 in Fig. 5.5.

142

Figure 5.13: Phase noise plot, and value at 100 KHz offset from the carrier frequency.

Table 5.6: Summary of Noise Source Contributions to simulated PN for the Single Colpitts VCO [% of total] Topology Contr. Ic (Q1 ) 54,98 rb (Q1 ) 7.05 rc (Q1 ) 0.75 rsu (Q1 ) 0.85 re (Q1 ) 0.19 Inductor Ld 27.96 Re 3.27 Varactor 4.92

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to minimize if possible both noise generated in the transistor itself as well as transistor noise up-conversion due to these sources. The flicker noise contributions are absent: this would not be true for a MOSFET technology, and this is the reason for which, to obtain good PN performances at 100 kHz offset, BJT technology is the best option. The second relevant contribution of the noise is given by the inductor, while the varactor does not contribute so much, as the varactor usually has a Q factor three or four times that of the inductor. The noise contributions for all the components take into account all the parasitics of their models, since they are not ideal. This implies that the results given by SpectreRF are very accurate. The oscillation frequency ranges between 4.70 GHz and 5.56 GHz, exhibiting a tuning range equal to (fmax − fmin ) = 16.7% (5.13) TR = 2 (fmax + fmin ) The phase noise varies within 7 dB over the tuning range, as shown in Fig. 5.14. The Figure

Figure 5.14: Phase noise plot over the tuning range at 100 kHz offset from the carrier.

of Merit (FOM) is calculated as F OMdB = 10 log10

Pd,DC

T R2 2 × P N × fof f

(5.14)

where the tuning range (TR) is calculated as the difference between fmax − fmin , Pd,DC is the dc dissipated power, and fof f is the offset frequency from the carrier. Note that the FOM defined in the above equation contains the power efficiency η of the oscillator in the numerator, since the PN expression contains in its denominator the power of the signal measured on the tank Psig , calculated as A2tank /2Rp , where Rp is the parallel resistance of the tank. Thus, we can write: F oMT =

T uning Range2 × η ,  2  ω0 ωcor  2 2F kT 1 + 1+ fof f 2QL ωof f ωof f 

144

(5.15)

Table 5.7: Differential Colpitts Device Sizing Active device Value Passive devices Emitter Length 7 µm Re Emitter Width 0.5 µm Rb1 Multiplier 9 Rb2 EBC Fingers 232 Cb Emitter Metal M2 C1 Include metal parasitics Yes C2

Value 420 Ω 1.5k Ω 1.5k Ω 400 pF 1.1 pF 700 fF

Table 5.8: Varactor and Inductor Sizing Inductor Value Varactor Value Outer dimension 300 µm Length 0.48 µm Width 34 µm Width 2 µm Spacing 2 µm Fingers 10 Number of Turns 2 Slices 10 Operating Frequency 5 GHz Multiplier 1 Inductance Nominal Value 0.58 nH Cmin 367.85 fF Q-factor 23.83 Cmax 975.95 fF where k is the Boltzamann’s constant, T is the absolute temperature, F is the noise factor, QL is the open-loop loaded Q factor, and η is the power efficiency of the topology, calculated as Psig /Pd,DC , Psig being the delivered power to the tank, i.e., Psig = A2tank /(2Rp ), where Atank is the amplitude of the signal across the inductor, and Rp is the parallel resistance of the inductor. Using Equation (5.98), the Single Colpitts VCO exhibits a FOM equal to 202.22 dB, the measured dc dissipated power being equal to 11.05 mW.

5.2.3

Differential Colpitts VCO

Colpitts, Cross-Coupled, Armstrong and Hartley oscillators have long been used in their single ended configurations [91] but, as the number of transistors is no longer a key costdetermining factor, differential versions have been developed. Assuming perfect symmetry, differential topologies are ideally immune to common-mode noise, like that coming from the supply rails or from the bias-network. Moreover, one of the most efficient methods of reducing phase noise is to increase the signal amplitude in the resonator. However, the maximum resonator signal amplitude is limited by breakdown mechanisms in the device used. An efficient method to overcome the breakdown limitation, is to “parallel connect” two or more resonators, thereby effectively increasing the total resonator signal amplitude, while still keeping within the break-down limits of each separate resonator. As seen in Chapter 4, if N identical oscillators are coupled to each other the phase noise will be reduced by 10 log10 (1/N ) dB. So for a differential configuration, a 10 log10 (1/2) = -3 dB phase noise improvement is expected with respect to the single configuration counterpart. The topology shown in Fig. 5.1 is now examinated. Table 5.7 shows the sizes of the active and passive devices, while Table 5.8 shows the inductor and varactor sizes. Note that the active and passive device values are the same for the single and for the differential version: the only value changed is the value of C2 , that is the half of the value for the single version, because we can see C2 as series connection of two 2C2 capacitances. As in the middle there is an ac ground, we can split the differential Colpitts into two single Colpitts topologies. Note that also the varactor and inductor sizing are the same. The only change that has been made in the differential topology with respect to the singleended one consists of using a differential inductor, shown in Fig. 5.15, instead of a single one. The reason is that, if two single-ended inductors have been used, the differential behaviour

145

of the circuit would have depended only on the capacitor C2 that connects the two stages. Therefore, the value of C2 would have been chosen carefully: a small value for C2 with respect to C1 implies that the impedance ZC2 = 1/(sC2 ) is really high at our oscillation frequency, and there is no phase relation between the two output waveforms. On the other hand, if we choose a big value for C2 , the impedance seen between the two stages at the oscillation frequency is small, and the two output waveforms would tend to be exactly in phase after a transient. Using a differential inductor, instead, the differential behaviour between the two stages is fixed by the inductor itself. Infact, when the current in one coil is flowing in a direction, the current in the other coil flows the opposite way due to magnetic coupling, fixing the differential behaviour of the two bjts, and hence fixing the differential behaviour of the whole structure. Fig. 5.16 shows the equivalent circuit of the differential

Figure 5.15: Layout differential inductor used in the schematic.

inductor. The meanings for the components are the same as for the single-ended one, and have been explained in the previous subsection.

Figure 5.16: Sub-Circuit Model for Differential Inductor.

146

Specifications The target we have to satisfy with this topology are mainly two: ˆ phase noise less than -110 kHz offset from the carrier frequency at 5 GHz central frequency operation; ˆ Figure of Merit (FOM) optimization: this means that the tuning range has to be reasonably high and the dc dissipated power reasonably low.

Small signal model and frequency prediction Fig. 5.17 shows the small signal model used to predict the frequency of oscillation. This

Figure 5.17: Small signal model of half the circuit of Fig. 5.1. model includes all the parasitic capacitances of the BJT; Cπ is included in Zπ , and Ccs is included in ZT . In particular Zπ = rπ || and ZT =

1 rπ = sCπ 1 + srπ Cπ

1 ZL ||ZL = , s(Ccs + Cx ) ZL s(Ccs + Cx ) + 1

(5.16)

(5.17)

where ZL = sL + Rs ,

(5.18)

Cx is the average value of the caractor capacitance (we are supposing to predict the central frequency of osillation) and Rs is the series resistance of the inductor. All the parasitics are evaluated at the fixed operating point using Cadence. The two KCLs that we can write for the circuit of Fig. 5.17 are: Vµ sCµ − gm Vπ − V1 sC1 − and gm Vπ + IIN +

VT = 0, ZT

Vπ + V1 sC1 − Vout 2sC2 = 0. Zπ 147

(5.19)

(5.20)

The KVLs that can be written are Vout + Vπ = 0

(5.21)

V1 + Vµ − Vπ = 0 ⇒ V1 + Vµ + Vout = 0 ⇒ V1 = −(Vµ + Vout )

(5.22)

VT − V1 − Vout = 0 ⇒ VT + Vµ + Vout − Vout = 0 ⇒ VT = −Vµ ,

(5.23)

and V1 and VT are the voltages across C1 and ZT respectively. Combining these equations, we get Vµ sCµ + gm Vout + (Vµ + Vout )sC1 + and

Vµ ZT

(5.24)

Vout − (Vµ + Vout )sC1 − 2Vout sC2 = 0. Zπ

(5.25)

1 ) = −Vout (gm + sC1 ) = Vµ G(s) = −Vout V (s) ZT

(5.26)

−gm Vout + IIN − From (5.24) we can write: Vµ (sCµ + sC1 + and from (5.25) IIN = Vout (gm +

1 + sC1 + 2sC2 ) + Vµ sC1 = Vout A(s) + Vµ D(s). ZT

(5.27)

From (5.2.3) and (5.27) Vµ = −

V (s) Vout G(s)

IIN = A(s)Vout −

V (s) D(s)Vout , G(s)

(5.28) (5.29)

obtaining Vout 1 . = V (s) IIN A(s) − G(s) D(s)

(5.30)

Equation (5.30) can be expanded by substituting A(s), V (s), G(s), D(s) but algebraic calculations are tedious. For this reason, the Symbolic Math Toolbox in Matlab has been used to compute (5.30), and the following code has been written. syms ’s’; syms ’C1’ ’C2’ ’Cx’ ’Cmu’ ’Ccs’ ’Cpi’ ’Cce’ ’L’ ’gm’ ’Rs’ ’Re’... ... ’w’ positive; Zl=s*L+Rs; Zpi=1/(s*Cpi); Zt=Zl/(Zl*s*(Ccs+Cx)+1); A=gm+1/Zpi+s*C1+2*s*C2; D=s*C1; G=s*Cmu+s*C1+1/Zt; V=gm+s*C1; S=simplifyFraction(1/(A-(V/G)*D),’Expand’,true); fprintf(’\nTransfer function:\n’); S=collect(S,’s’); pretty(S);

148

[ ,Ds]=numden(S); Ds=collect(Ds,’s’); fprintf(’\nDenominator of the transfer function:\n’); pretty(Ds); Snew(s,C1,C2,Cx,Cmu,Ccs,Cpi,L,Rs)=subs(S,gm,0); Snew(s,C1,C2,Cx,Cmu,Ccs,Cpi,L)=subs(Snew,Rs,0); Snew=collect(Snew,’s’); fprintf(’\nTransfer function without gm nor Rs:\n’); pretty(Snew); [ ,Dsnew]=numden(Snew); Dsnew=collect(Dsnew,’s’); fprintf(’\n Denominator of the transfer function without gm nor Rs:\n’); pretty(Dsnew); Note that only the denominator of Equation (5.30) has been considered, since the impedance at fosc has to be infinite (see Chapter 1). Then the denominator has been evaluated without gm or Rs , since the frequency of oscillation is evaluated considering only the equivalent LC tank of the circuit. Thus, the denominator without gm or Rs has the following expression L(2C1 C2 + C1 Ccs + 2C2 Ccs + C1 Cµ + 2C2 Cµ + C1 Cπ + C1 Cx + 2C2 Cx + Ccs Cπ + Cµ Cπ + ... (5.31) ... + Cπ Cx )ω 2 − (C1 + 2C2 + Cπ ) = 0 The code used for the prediction of the frequency is Cx av=(975.903e-15+367.785e-15)/2; Dsnew f(w)=subs(Dsnew,C1,C2,Cx,Cmu,Ccs,Cpi,L,s,... ...1.1e-12,700e-15,Cx av,83.118e-15,107e-15,1.37e-12,580e-12,... ...1i*w); eq f=abs(Dsnew f(w)); wosc=solve(eq f); fosc=wosc/(2*pi); fprintf(’\n Equation that predicts the wosc:\n’); r i=isreal(subs(Dsnew,s,1i*w)); if r i eq fv=subs(Dsnew,s,1i*w); else eq fv=imag(subs(Dsnew,s,1i*w)); end eq fv=solve(eq fv); pretty(simplify(eq fv)); fosc=double(fosc); fprintf(’\n fosc = %d’,fosc);

From this code, the equation eqf v that results in the prediction of the central oscillation frequency is 1 ωosc,Colpitts = q (5.32)
, L 2CA + CB 149

where

C1 (C2 + Cµ ) + C2 (Ccs + Cx ) C1 + 2C2 + Cπ

(5.33)

C1 Cπ + (C1 + Cπ )(Ccs + Cµ + Cx ) C1 + 2C2 + Cπ

(5.34)

CA = and CB =

The value predicted matches well (within 100 MHz) with the measured one in Cadence. This difference is due to the fact that each component used, being not ideal, exhibits capacitances to the substrate (as seen in the previous section), and all the parasitic capacitances of the inductor have not been considered. Simulations As for the Single Colpitts VCO, a .tran simulation was performed. Fig. 5.18 shows the differential behaviour of the circuit , Fig. 5.19 shows the differential waveform

Figure 5.18: Vout1 and Vout2 waveforms . Vout2 − Vout1 and Fig. 5.20 shows its spectrum. Note that all even harmonics cancel (this did not happen in the single topology), whereas the odd harmonics add in phase. Note also that the central oscillation frequency is exactly the same as the single topology’s one, as expected. The phase noise at the central frequency of operation is -109.62 dBc/Hz, and we can see the improvement of -3 dB discussed before. (Fig. 5.21). The tuning range is from 4.78 GHz to 5.63 GHz (16,33 %), when the control voltage varies between (3.3-2) V and (3.3+2) V, values that allow to cover the entire tuning range of the varactor. As explained in Chapters 3 and 4, there is a trade-off between phase noise and tuning range. In Fig. 5.22. the phase noise plot over a 15 % of tuning range (obtained varying the control voltage in a lower range) is shown. As we can see, the minimum phase noise over the smaller tuning range is now -111.75 dBc/Hz at 100 kHz offset from the carrier, and the phase noise does not vary a lot in the tuning range. This is to show that it’s possible to improve the phase noise, but lowering the tuning range, so it depend on the specification assigned to the designer.

150

Figure 5.19: Vout2 − Vout1 waveform.

Figure 5.20: Vout2 − Vout1 waveform spectrum.

151

Figure 5.21: Phase noise plot over the tuning range (16 %) at 100 kHz offset from the carrier.

Figure 5.22: Phase noise plot over the tuning range (15 %) at 100 kHz offset from the carrier.

152

Phase noise prediction using Leeson’s model The simple Leeson’s model allows us to predict the phase noise with a discrepancy of 3-6 dB with respect to SpectreRF Simulations, that computes the Floquet modes (see Chapter 4) for autonomous circuits to exstimate the PN. Despite this discrepancy, the Leeson model allows the designer to evaluate the expected phase noise of an oscillator by hand, and it represents a powerful method to roughly evaluate which topology offers a lower PN. As seen in Chapter 4, the Ideal Leeson formula is  L(∆ω) = 10 log

2kT Psig



ω0 2Q∆ω

2  (5.35)

while the more accurate Semi-Empirical Leeson’s formula is expressed as  L(∆ω) = 10 log

2kT {1 + Psig



ω0 2Q∆ω

2   ∆ω1/f 3 } 1+ ∆ω

(5.36)

In the above relations, Psig is the power of the signal on the tank, calculated as A2tank /Rp , ω0 is the oscillation frequency, ∆ω is the frequency offset from the carrier, ∆ω1/f 3 is the corner frequency between the 1/f 3 and 1/f 2 region of phase noise (measured in Cadence), and Q is the open-loop Q- factor, calculated from the open-loop transfer function H(s) = A exp(jφ) as (see Chapter 4) s 2  2 dA dφ ω0 + . (5.37) QL = 2 dω dω Therefore, we need to compute the open-loop transfer function. Fig. 5.23 shows the small signal model used to compute the open-loop transfer function, and consequently the open loop Q. Since Vπ = −Vin we can write:

Figure 5.23: Small signal model used to compute the open-loop transfer function .

Vin Vin + + gm Vin + VCE (sCCE ) = 0, Re Zπ from which

 VCE = −Vin

 1 1 1 + + gm = −Vin A(s). Re Zπ sCCE

153

(5.38)

(5.39)

From the KVL we can write Vπ − Vµ + VCE = 0 ⇒ Vµ = Vπ + VCE = −Vin + VCE .

(5.40)

Substituting (5.39) into (5.40) we obtain Vµ = −Vin (A + 1).

(5.41)

The current Icx can be written as follows Icx = VCE (sCCE ) + gm Vin + Vµ sCµ .

(5.42)

Naming Zc = and

 Zx =

1 1 + sC1 2sC2

(5.43)

 1 1 || ||ZL sCcs sCx

(5.44)

where ZL = sL + Rs ,

(5.45)

the current flowing into C1 and C2 can be expressed as Icc = Icx

Zx . Zx + Zc

(5.46)

1 . 2sC2

(5.47)

Finally, Vout can be written as Vout = Icc Substituting: Vout = H(s) = Vin



 − A(s)sCCE + gm − (A + 1)sCµ

Zx 1 . Zx + Zc 2sC2

Equation (5.48) has been implemented in Matlab using the following code Zl=s*L+Rs; Zpi=1/(s*Cpi); Zx=parallel(Zl,parallel(1/(s*Ccs),1/(s*Cx))); Zc=1/(s*C1)+1/(2*s*C2); A=(1/Re+1/Zpi+gm)*(1/s*Cce); H=(-A*s*Cce+gm+(-A-1)*s*Cmu)*(Zx/(Zc+Zx))*(1/2*s*C2); Hnew(w,C1,C2,Cx,Cmu,Ccs,Cpi,Cce,L,Rs,gm,Re)=subs(H,s,1i*w); Hnew(w)=subs(Hnew,C1,C2,Cx,Cmu,Ccs,Cpi,Cce,L,Rs,gm,Re... ...,1.1e-12,700e-15,Cx av,112.036e-15,83.11e-15,1.37e-12,... ...150e-15,580e-12,Rs num,76.9752e-3,420); PHI=angle(Hnew); dPHI=diff(PHI); A=sqrt(real(Hnew)^2+imag(Hnew)^2); dA=diff(A); frange=linspace(5e9,5.2e9,30); Ql=pi*frange.*sqrt(dPHI(2*pi*frange).^2+dA(2*pi*frange).^2); plot(frange,Ql); Ql=double(max(Ql))/2; % is the differential topology

154

(5.48)

Then, the two Leeson’s formulas have been implemented using the following code F=1.5; k=1.3806488e-23; T=300; A=2.4; w0=2*pi*fosc; L=5.7942e-10; Qind=23.857; Rp=Qind*L*w0; Psig=(A^2)/(2*Rp); wcor=2*pi*1572; woff=2*pi*100e3; L1=10*log10((2*k*T/Psig)*(w0/(2*Ql*woff))^2); L2=10*log10((2*F*k*T/Psig)*(1+(w0/(2*Ql*woff))^2)*(1+wcor/woff)); fprintf(’\nL1 @100kHz offset = %d’,L1); fprintf(’\nL2 @100kHz offset =%d\n’,L2); figure(’Name’,’Colpitts’,’NumberTitle’,’off’,... ...’OuterPosition’,[50 50 700 700]); foff range=logspace(log10(10e3),log10(5e6),500); L1=10*log10((2*k*T/Psig)*(w0./(2*Ql*2*pi*foff range)).^2); semilogx(foff range,L1,’b’); hold on; L2=10*log10((2*F*k*T/Psig)*(1+(w0./(2*Ql*2*pi*foff range)).^2).*... ...(1+wcor./(2*pi*foff range))); semilogx(foff range,L2,’r’); %comparison with Cadence results cadence pn=csvread(’colpitts pn.csv’,1,0); temp=interp1(cadence pn(:,1),cadence pn(:,2),foff range,’pchip’); semilogx(foff range,temp,’k’); grid on; xlabel(’frequency offset [Hz]’);... ... ylabel(’Phase Noise [dBc/Hz]’); title(’Colpitts’); legend(’Ideal Leeson model’,’Semi-empirical Leeson model’,... ...’Cadence simulations’,’location’,’NorthEast’);

The result is shown in Fig. 5.24. Note that the amplitude on the tank has been measured

Figure 5.24: PN vs. frequency offset obtained through the Ideal, Semi-empirical Leeson model, and Cadence simulation.

155

in Cadence. As can be seen, the PN predicted by the Semi-Empirical Leeson model matches well (within less that 3 dB) with the values obtained by means of SpectreRF simulations. Table 5.9 reports the percentage contributions of the active and passive devices to the thermal noise components of the PN spectrum at 100 kHz from the carrier frequency, as the flicker noise contribution at that offset is completely absent for this technology. Several Table 5.9: Summary of Noise Source Contributions to PN for the Colpitts [% of total] Topology Contr. Ic (Q1,2 ) 56,42 rb (Q1,2 ) 4.23 rc (Q1,2 ) 0.87 rsu (Q1,2 ) 0.93 re (Q1 ) 0.19 Inductor Ld 19.94 Re 6.08 Varactors 3.32 important observations can be derived from the above tables. As can be seen, the major contribution of the noise is given by the transistor pair. Thereby, the designers should try to minimize if possible both the noise generated by the transistor itself as well as transistor noise up-conversion due to these sources. The flicker noise contributions are absent: this would not be true for a MOSFET technology, and this is the reason for which, to obtain good PN performances at 100 kHz offset, BJT technology is the best option. The noise contributions for all the components take into account all the parasitics of their models, since they are not ideal. This implies that the results given by SpectreRF are very accurate. The Colpitts frequency ranges between 4.78 GHz and 5.63 GHz, exhibiting a tuning range equal to 16.33%, and the dc dissipated power is 23.52 mW: therefore, the FOM is equal to 204.32 dB, more or less the same as the single topology: this result was expected since the differential topology offers better performances in terms of phase noise, but dissipates twice the power of the single version. Table 5.10 summarizes the performances of the two designed VCOs. The PN shown is evaluated at 100 kHz offset from the carrier, and is the minimum over the tuning range. Table 5.10: Performances summary of the Colpitts VCO Parameters Differential Colpitts PN -109.62 dBc/Hz Pd 23.52 mW TR 16.33% FOM 204.32 dB

5.3

Differential Armstrong VCO

In this section, the differential Armstrong topology shown in Fig. 5.25 will be analyzed following the same procedure as for the differential Colpitts 2 . The design conditions are the same (i.e., inductors, varactors, BJT, Vcc , and output amplitude); therefore a comparison with the Differential Colpitts shown in the previous section can be carried out. The results shown are interesting, since the Armstrong VCO has not been widely explored in Si-Ge technology (there is only one implementation in [72]), but only in CMOS technology [92, 2 The

Matlab code will be omitted as it is roughly the same.

156

Figure 5.25: Schematic of the designed Differential Armstrong VCO.

Table 5.11: Armstrong Device sizing Active devices Value Passive devices Emitter Length 5 µm Re Emitter Width 0.5 µm Ce Multiplier 5 C EBC Fingers 232 L Emitter Metal M2 k Include metal parasitics Yes Vbb

Value 550 Ω 1 pF 485 fF 0.55 nH 0.90 1V

80, 93]. The phase noise performances of an Armstrong VCO are expected to be worst with respect to the Colpitts one, since four inductors are used. Also the occupied area is higher, for the same reason. The parameter that makes the Armstrong topology interesting to explore is the dissipated power: simulations will show that the Differential Armstrong dissipates a dc power much lower (more than one order of magnitude) than the Differential Colpitts. Due to ever-increasing demand for bandwidth, very stringent requirements are placed on the spectral purity of local oscillators in phase-locked loops. But the large demand for low-power portable battery-operated electronic devices makes also the dissipated power a key parameter to evaluate the performance of an oscillator. Moreover, the Armstrong doesn’t need the voltage-capacitor divider, typical of the Colpitts, and for this reason is more tunable, exhibiting an higher tuning range with respect to the Colpitts VCO. If we refer to the FOM as the parameter to extabilish which topology offers better performances, the Armstrong topology is superior; on the other hand, if phase noise is the only one requirement, the Colpitts topology is better than the Armstrong one.

5.3.1

Small signal model and frequency prediction

The Armstrong VCO in Fig. 5.25 makes use of coupled inductors (with a coupling factor equal to 0.9), and a single capacitor C for each stage. The tail current is implemented with a resistor Re because, as explained in Chapter 4, a BJT tail current source would have introduced an additional 1/f noise term. The capacitor Ce filters the noise contributions that come from the tail current source. The sizes of the active and passive devices used in the VCO are reported in Table 5.11. As for the Colpitts, all the components are real. The central frequency of oscillation has been theoretically predicted from the small signal model of the half topology shown in Fig. 5.26 , in which all the BJT’s parasitics capacitances 157

Figure 5.26: Small signal model for the single Armstrong.

have been included (except the Cµ that complicates calculations), as they affect the choice of the LC tank values (Cv = C+Ccs ). For the varactor, a value equal to Cx = (Cmax +Cmin )/2 has been considered. The small-signal model’s equations have been implemented by using the Symbolic Math Toolbox in Matlab which allows us to obtain the transfer function in the form Yout (s) = N (s)/D(s) after all the simplifications. The output current can be expressed as Iout = Ic + Icv + gm Vπ .

(5.49)

If ZL = sL + Rs , Iout =

Vout − kIb + sCv Vout + gm Vπ = ZL



 1 + sCv Vout − kIb + gm Vπ ZL

(5.50)

The current Ib can be calculated as Ib =

Vπ − kIc , ZL

(5.51)

and can be substituted to (5.50), obtaining     1 Vπ + sCv Vout − k − kIc + gm Vπ . Iout = ZL ZL

(5.52)

The Ic current can be calculated as Ic =

Vout − kIb ZL

(5.53)

and substituting in this equation the expression of Ib calculated as before. Therefore   Vout Vπ Ic = −k − kIc . (5.54) ZL ZL After all calculations, we can write Ic =

Vout ZL

kVπ ZL k2

−

1−

158

.

(5.55)

Substituting (5.55) in (5.52) we get  Iout =

  Vout kVπ  1 Vπ ZL − ZL + gm Vπ . + sCv Vout − k −k ZL ZL 1 − k2

Expanding this relation   1 k 2 Vout k 3 Vπ kVπ Iout = + sCv Vout + − − + gm Vπ ZL (1 − k 2 )ZL ZL (1 − k 2 ) ZL and collecting     1 k2 k3 k Iout = + sCv + V − + − g out m Vπ ZL (1 − k 2 )ZL (1 − k 2 )ZL ZL = A(s)Vout − D(s)Vπ

(5.56)

(5.57)

(5.58) (5.59)

At this point, only Vπ needs to be computed. From (5.51) and (5.50), we can write Ib =

Vπ − k(Iout − sCv Vout − gm Vπ ) ZL

(5.60)

and −sCπ Vπ ZL = Vπ − kZL Iout + ksCv ZL Vout + kgm ZL Vπ .

(5.61)

If we call G(s) and V (s) respectively G(s) =

kZL sCπ ZL + 1 + kgm ZL

(5.62)

ksCv ZL , sCπ ZL + 1 + kgm ZL

(5.63)

V (s) = − we can write

Vπ = G(s)Iout + V (s)Vout .

(5.64)

Equations (5.64) and (5.59) can be combined to obtain Vout 1 + D(s)G(s) = . Iout A(s) − D(s)V (s)

(5.65)

Computing this relation in Matlab, the denominator without gm or Rs has the following expression Cπ Cv L2 (1 − k 2 )ω 4 − L(Cπ + Cv )ω 2 + 1 = 0 (5.66) from which ωosc,Armstrong = q where Ceq =

1 2LCeq 1 − k 2


,

Cπ Cv p 2 Cπ + Cv − Cπ + 2Cπ Cv (2k 2 − 1) + Cv2

(5.67)

(5.68)

and Cv = Ccs + C.

(5.69)

As for the Colpitts, the same procedure has been computed in Matlab to predict the expected phase noise with the Leeson model.

159

Figure 5.27: Vout1 and Vout2 waveforms .

Figure 5.28: Vout2 − Vout1 waveform.

160

Figure 5.29: Vout2 − Vout1 waveform spectrum.

Figure 5.30: Phase noise plot over the tuning range at 100 kHz offset from the carrier.

161

Simulations A .tran simulation was performed. Fig. 5.27 shows the differential behaviour of the circuit. Fig. 5.28 shows the differential waveform Vout2 − Vout1 and Fig. 5.29 shows its spectrum. Note that all even harmonics cancel (this does not happen in the single topology), whereas the odd harmonics add in phase. The phase noise at the central frequency of operation is -107.92 dBc/Hz (Fig. 5.30). Fig. 5.31 reports the PN obtained through the Ideal and Semi-Empirical Leeson model

Figure 5.31: PN vs. frequency offset obtained through the Ideal, Semi-empirical Leeson models, and Pnoise SpectreRF simulations for the differential Armstrong.

and the PN obtained by direct plots from periodic steady state (PSS) and periodic noise (Pnoise) simulations. The PN predicted by the Semi-Empirical Leeson model matches well (within less than 3 dB) with the values obtained by means of SpectreRF simulations. Table ?? reports the percentage contributions of the active and passive device to the thermal noise components of the PN spectrum at 100 kHz from the carrier frequency, as the flicker noise contributions at that offset is completely absent for this technology. Several important observations can be derived from the table above. As can be seen, the major contribution to the noise is given by the transistor pair. Therefore, the designers should try to minimize if possible both the transistor noise generation as well as transistor noise up-conversion due to these sources. The flicker noise contributions are absent: this would not be true for a MOSFET technology, and this is the reason for which, to obtain good PN performances at 100 kHz offset, BJT technology is the best option. The noise contributions for all the components take into account all the parasitics of their models, since they are not ideal. This implies that the results given by SpectreRF are very accurate.

162

Table 5.12: Summary of Noise Source Contributions to PN for the Armstrong [% of total] Topology Contr. Ic (Q1,2 ) 55,79 rb (Q1,2 ) 3.64 rc (Q1,2 ) 0.77 rsu (Q1,2 ) 0.65 re (Q1 ) 0.19 Inductor Ld 31.26 Re 1.37 Varactors 3.25

The Armstrong frequency ranges between 4.64 GHz and 5.68 GHz, exhibiting a tuning range equal to 20.11% (Fig. 5.32). The dc dissipated power from the Armstrong is 1.68

Figure 5.32: Tuning range of the differential Armstrong. mW, resulting in a FOM equal to 215.83 dB. Comparison between Differential Colpitts and Differential Armstrong VCOs Table 5.13 summarizes the performances of the two VCOs we have designed. The PN shown is evaluated at 100 kHz offset from the carrier, and is the minimum over the tuning range. The results show that, under the adopted design conditions, the differential Colpitts Table 5.13: Performances summary of the designed VCOs Parameters differential Colpitts differential Armstrong PN -109.62 dBc/Hz -107.92 dBc/Hz Pd 23.52 mW 1.68 mW TR 16.33% 20.11% FOM 204.32 dB 215.83 dB

163

topology considered in this study is superior in terms of phase noise performance to the differential Armstrong over the tuning range. On the other hand, the differential Armstrong dissipates a dc power much lower (more than one order of magnitude) than the differential Colpitts, and is also more tunable. In other words, the FOM of the low-power Armstrong topology is higher than the FOM of the Colpitts, suggesting the opportunity for designers to reconsider the Armstrong VCO for further investigation and implementation in SiGe HBT technology.

5.4

Differential Vackar VCO

Another topology that has been simulated in SiGe technology is the Vackar VCO, since in previous works it has never been implemented in that technology; moreover in the literature we can read that the Vackar VCO has been implemented using discrete components [94], and only recently has been presented a fully integrated differential Vackar VCO [79, 95], but in MOSFET technology. Fig. 5.33 show the schematic of the differential Vackar VCO. C1 and

Figure 5.33: Schematic of the implemented differential Vackar VCO.. C2 form a capacitive divider, also adopted in the Colpitts topology, while L and Cv form a series-tuned LC tank. Cx is a varactor (the same used in the Colpitts and the Armstrong, as for the inductor). An advantage reported in [79] of the Vackar is that the amplitude of the oscillations shows a slower drop as the frequency rises when compared to other topologies such as the Colpitts VCO. Moreover, another advantage that is shown in this section is that the Vackar VCO, even if it is a differential version like the Colpitts, dissipates much less power and so like the Armstrong, it could be used for low-power applications. The sizes of the active and passive devices used in the VCO are reported in Table 5.14.

5.4.1

Small signal model and frequency prediction

For frequency prediction calculations, the half circuit in Fig. 5.34 has been considered. Note that the transistors Q3 and Q4 are switching transistors. If we included them in the model, we could not consider the half circuit for the frequency prediction. Moreover, their sizing 164

Table 5.14: Active devices Emitter Length Emitter Width Multiplier EBC Fingers Emitter Metal Include metal parasitics

Vackar Device sizing Value Passive devices 10 µm Vbb 0.5 µm Cv 7 C1 232 C2 M2 k Yes L

Value 1.6 V 200 fF 200 fF 500 fF 0.90 0.55 nH

Figure 5.34: Schematic of the half Vackar, not including Q3 and Q4 , and the coupling factor between the inductors.

165

don’t affect the oscillation frequency so much, so it is reasonable not to include them in the model. The coupling factor k can be considered by substituting L in all the following calculations with L(1 + k), as shown in Sec. 5.3. The small signal model of the circuit in Fig. 5.34 is shown in Fig. 5.35. In this model, ZL , Zcl are defined as

Figure 5.35: Schematic of the small signal model for the half Vackar, not including Q3 and Q4 , and the coupling factor between the inductors.

ZL = sL + Rs and Zcl =

1 ||(sL + Rs ). sCx

(5.70)

(5.71)

As done in the previous models too, let us write the KCLs for the network. In total, they are three, and are written as follows IIN +

Vπ + gm Vπ + sC1 V1 + sCv Vcv − sC2 V2 = 0, Zπ IL = Icv + Icl ⇒

and

VL Vcl = sCv Vcv + , ZL Zcl

(5.72) (5.73)

VL = −sC1 V1 − gm Vπ + sCµ Vµ . ZL

(5.74)

Vout = VL + Vcl ,

(5.75)

V2 + Vcv = Vcl ,

(5.76)

V1 = VL + Vcv ,

(5.77)

Vπ = Vµ + V1 ,

(5.78)

Vout = −Vµ

(5.79)

V2 = −Vπ .

(5.80)

The KVLs are

and

166

From (5.76), (5.80) and (5.75), it follows that Vcv = Vcl − V2 = Vcl + Vπ = Vout − VL + Vπ ,

(5.81)

while from (5.77), (5.80) and (5.75): V1 = VL + Vcv = VL + Vcl + Vπ = Vout + Vπ .

(5.82)

Substituting these relations in (5.73) we obtain VL Vout − VL = sCv (Vout − VL + Vπ ) + , ZL Zcl from which we can compute VL as     1 1 1 VL + sCv + = Vout sCv + + Vπ sCv , ZL Zcl Zcl     1 ZL Zcl VL = Vout sCv + + Vπ sCv . Zcl Zcl + sCv Zcl ZL + ZL

(5.83)

(5.84) (5.85)

From (5.74): VL = −sC1 (Vout + Vπ ) − gm Vπ − sCµ Vout . ZL After some algebra, we can write Vπ = Vout

N (s) D(s)

where N (s) and D(s) are respectively defined as   1 ZL Zcl N (s) = sCv + + s(C1 + Cµ ) Zcl Zcl + sCv Zcl ZL + ZL and D(s) = −gm − sC1 −

sCv Zcl . Zcl + sCv Zcl ZL + ZL

(5.86)

(5.87)

(5.88)

(5.89)

Finally, from (5.72) it follows that IIN +

Vπ ZL Zcl + gm Vπ + sC1 (Vout + Vπ ) + sCv {Vout − × Zπ Zcl + sCv Zcl ZL + ZL     1 × Vout sCv + + Vπ sCv + Vπ } + sC2 Vπ = 0. Zcl

(5.90)

Therefore, we can write IIN = −Vπ T (s) − Vout Q(s),

(5.91)

where T (s) and Q(s) are respectively defined as T (s) = and

s2 Cv2 ZL Zcl 1 + gm + sC1 − + s(Cv + C2 ) Zπ Zcl + sCv Zcl ZL + ZL

  1 ZL Zcl sCv Q(s) = s(C1 + Cv ) − sCv + Zcl Zcl + sCv Zcl ZL + ZL

(5.92)

(5.93)

Putting (5.87) and (5.91) together we get Vout −1 = . N (s) IIN T (s) + Q(s) D(s) 167

(5.94)

Nulling the denominator in Matlab with gm = 0 and Rs = 0, we obtain s Cx C1 + C1 C2 + Cv C2 + Cv Cx + Cx Cµ + Cµ Cπ + Cx Cπ + Cx C2 ωo = . L(1 + k)(Cv C1 C2 + Cx C1 C2 + Cv Cx C1 + Cµ Cπ Cx + Cv Cπ Cµ + Cx Cv Cµ + Cx Cv Cπ ) (5.95) Equation (5.95) predicts well (within 200 MHz) the central frequency of oscillation measured in Cadence, that is 5.3 GHz.

5.4.2

Performances

The minimum phase noise over the tuning range measured in SpectreRF at 100 kHz offset from the carrier frequency is -104.46 dBc/Hz, and is shown in Fig. 5.36.

Figure 5.36: Phase noise over the tuning range of the designed Vackar VCO. Table 5.15 reports the percentage contributions of the active and passive device to the Table 5.15: Summary of Noise Source Contributions to PN for the Vackar [% of total] Topology Contr. Ic (Q1,2 ) 30,19 rb (Q1,2 ) 3.14 rc (Q1,2 ) 0.97 rsu (Q1,2 ) 1.05 re (Q1,2 ) 0.57 Ic (Q3,4 ) 20,19 rb (Q3,4 ) 3.17 rc (Q3,4 ) 0.97 rsu (Q3,4 ) 1.35 re (Q3,4 ) 0.31 Inductor Ld 33.06 Varactors 3.95

168

thermal noise components of the PN spectrum at 100 kHz from the carrier frequency, as the flicker noise contributions at that offset is completely absent for this technology. The VCO ranges from 4.93 GHz to 5.63 GHz, exhibiting a tuning range equal to 13.5 %. The dc dissipated power is 7.8 mW in total, which is less than that dissipated in the differential Colpitts, and more that of the Armstrong. The FOM evaluated in the same way with respect to the other designed topologies is 201 dB, that actually is the lowest one. This is to show that cross-coupled topologies don’t offers the best performances in SiGe technology, as happens for the CMOS one.

5.5

A varactor configuration minimizing the Amplitudeto-phase noise conversion in VCOs

As outlined in Chapter 4, amplitude-to-phase-noise conversion due to varactors can severely limit the close-in phase noise performance in LC-tuned oscillators. The back-to-back series varactor topology is identified as a suitable solution to linearize the tank capacitance. The amplitude to phase noise conversion is greatly attenuated and the 1/f 3 phase noise is drastically reduced, without impairing the achievable tuning range. The wide tuning range, together with the supply reduction, suggest the use of avaractors featuring a steep C(V ) characteristic. However, highly nonlinear varactors make the output frequency dependent on oscillation amplitude and so, any amplitude noise translates into phase noise. Fig. 5.37 presents a conventional topology of integrated LC-tuned VCO.

Figure 5.37: The LC-tuned differential oscillator, with different varactor configurations. (a) Single-ended, (b) Differential, (c) Back-to-back series.

In this circuit, flicker noise associated to the current source generates flicker amplitudemodulation (AM) noise. The varactors convert this AM noise into frequency-modulation (FM) noise. This effect may be quantified by a conversion coefficient ∂ω KAM −F M = (5.96) ∂A which represents the sensitivity of the oscillation frequency to variations of the oscillation amplitude A. The resulting phase noise spectrum, expressed in terms of single-sidebandto-carrier ratio(SSCR or L), is L(ωm ) =

2 KAM −F M SAM (ωm ) 2 2ωm

(5.97)

where SAM (ωm ) is the power spectral density of the amplitude noise at ωm offset from the carrier. 1/f amplitude noise can therefore causing 1/f 3 phase noise, thus limiting the VCO performance. 169

The insets in Fig. 5.37 show three varactor configurations, that can be used in the VCO. The most conventional topology is shown in inset (a), and it is called single-ended-tuned VCO (SE-VCO). In order to improve the immunity to commmon mode disturbances, as ground bounces, in some cases the differential varactor configuration depicted in inset (b) (D-VCO) is adopted. A third possible configuration (inset (c)), typically employed to reduce distortion in RF tuned filters, uses varactors in back-to-back series connection (BB-VCO). What is shown rigorously in [96] is that, compared to the conventional single-ended one, the differential tuned topology features strong AM-to-PM conversion and limits the oscillation amplitude. Instead, the back-to-back series configuration reduces considerably the up-conversion of flicker noise and causes no penalty in the achievable tuning range. Finally, it must be noted that the same topology can be applied to reduce the conversion effects also in MOS varactors. In this case it is not possible to obtain a closed form for the conversion coefficient, and one must rely on simulations. In the following figures the three topologies shown before, are simulated using the BBVCO topology. For each topology, around 2 dB of improvement in phase noise is obtained, and a 5% increase in tuning range is observed. The dc-dissipated power is almost the same (0.1 mW more), so the overall FoM is higher.

Figure 5.38: Differential Colpitts using the BB-VCO topology. Table 5.16 reports the percentage contributions of the active and passive device to the thermal noise components of the PN spectrum at 100 kHz from the carrier frequency. Note that the flicker noise contributions at that offset are completely absent for this technology. Several important observations can be made from the Table. Firstly, the largest contribution to the noise is from the transistor pair. Thus, designers should try to minimize, as far as possible, both the transistor noise generation as well as transistor noise up-conversion due to these sources. Secondly, flicker noise contributions are absent: this would not be true for a MOSFET technology, and this is the reason why, to obtain good PN performances at 100 kHz offset, e.g. for point to point communication applications, BJT technology is the best option. Note that the noise contributions of all the components take into account all the parasitics of their models, but layout parasitics have not been included in our simulations. The tuning range of the Colpitts VCO is from 4.19 GHz to 5.41 GHz (25.45%), while that of the Armstrong is slightly larger: 4.16 GHz to 5.69 GHz, (31.06%). The most striking 170

Figure 5.39: Differential Armstrong using the BB-VCO topology.

Figure 5.40: Phase noise over the tuning range of the designed Differential Colpitts VCO (with the new varactor configuration).

171

Figure 5.41: Tuning range of the designed Differential Colpitts VCO (with the new varactor configuration).

Figure 5.42: Phase noise over the tuning range of the designed Differential Armstrong VCO (with the new varactor configuration).

172

Figure 5.43: Tuning range of the designed Differential Armstrong VCO (with the new varactor configuration).

Figure 5.44: Phase noise over the tuning range of the designed Vackar VCO (with the new varactor configuration).

173

Figure 5.45: Tuning range of the designed Vackar VCO (with the new varactor configuration).

Table 5.16: Summary of Noise Source Contributions to PN for the Colpitts and Armstrong VCOs: [% of total] @ 100 kHz offset from 5 GHz Topology Colpitts Armstrong Ic (Q1,2 ) 53,42 52.79 rb (Q1,2 ) 4.23 3.64 rc (Q1,2 ) 0.87 0.77 rsu (Q1,2 ) 0.93 0.65 re (Q1 ) 0.19 0.19 Inductor Ld 19.94 31.26 Re 6.08 1.37 Varactors 6.32 6.25

174

difference between the two VCOs is the dissipated DC power: 23.68 mW for the Colpitts but only 1.69 mW for the Armstrong. As the more tunable and lower-power configuration, the differential Armstrong topology has a clear advantage compared to the differential Colpitts. This is confirmed by the Figure of Merit (FOM) that, for a VCO, is defined as F OMT = 10 log10

Pd,DC

T R2 , 2 × P N × ωof f

(5.98)

where the tuning range (TR) is calculated as the difference between ωmax and ωmin , Pd,DC is the dissipated DC power, and ωof f is the offset frequency from the carrier. Note that the FOM implicitly contains the power efficiency η of the oscillator in the numerator, since the PN expression contains in its denominator the power of the signal measured on the tank Psig , calculated as A2tank /2Rp , where Rp is the parallel resistance of the tank [30]. Our Colpitts VCO has a FOM of 210.16 dB, while the Armstrong VCO exhibits a FOM of 221.13 dB. Table 6.1 summarizes the performances of the two VCO designs. The PN shown is evaluated at 100 kHz offset from the carrier, and is the minimum over the tuning range. The Armstrong has slightly higher phase noise compared to the Colpitts but dissipates more Table 5.17: Performances summary of the designed VCOs Parameters differential Colpitts differential Armstrong PN -112.18 dBc/Hz -110.48 dBc/Hz Pd 23.68 mW 1.69 mW TR 25.45% 31.06% FOM 210.16 dB 221.13 dB than an order of magnitude lower power, making its FOM over 11 dB better. This suggests that if the phase noise requirement of the application can be met, an Armstrong VCO will offer a significantly more power-efficient solution than a Colpitts VCO in Si-GE HBT technology. Our two (simulated) designs are compared to the (measured) state of the art in Table 5.1. In terms of FOM, the Armstrong topology is worthy of serious consideration.

175

Chapter 6

Conclusions In this work, comparative analyses of the performances of 180 nm Si-Ge HBT VCOs are carried out. The frequency of oscillation is fixed for each topology to 5 GHz. All the components used in the design are taken from the 180 nm Si-Ge HBT PDK. All the designed VCOs, the theory used to perform these analyses as well as the technology used, have been presented in the first four chapters of the thesis, while the design procedure and simulations are shown in Chapter 5. For each circuit analyzed, a small signal model is used to predict the frequency of oscillation. The transfer function of the circuits has been computed using the Symbolic Math Toolbox in Matlab, since it is a powerful toolbox to simplify all the calculations necessary to obtain the transfer function in the form H(s) = N (s)/D(s). Next, the phase noise has been measured with SpectreRF in Cadence Virtuoso: the results of simulations are expected to be very accurate, for two main reasons. First, the phase noise of an oscillator is computed in Cadence using PSS (Periodic Steady State) and Pnoise (Periodic Noise) analysis: Pnoise uses the exact model for the calculation of the phase noise, consisting of computing the Floquet modes for autonomous circuits (see Chapter 4). Second, the models of all the real components used in the design are implemented in Cadence, so all the resistive and capacitive parasitics are taken in account to evaluate the phase noise. Generally, the results given by Cadence in terms of phase noise match well (within 1-2 dB) with the post- layout simulations, and within 2-3 dB of the real chip implementation. The simple linear and time invariant Leeson’s model is used to predict SpectreRF simulations qualitatively. This model matches well (within 3-4 dB) with simulations, and is a powerful method to evaluate by hand the expected phase noise from an oscillator topology. For each topology a Matlab script has been created and will be presented in this chapter. Its script calculates (i) the transfer function of the small signal model of the oscillator, (ii) the predicted frequency of oscillation from the transfer function, (iii) the loaded-Q factor for the Leeson’s model, (iv) the predicted phase noise and the comparison with the result given by SpectreRF, (v) the Figure of Merit (FOM) based on the measured tuning range and dissipated dc power. Such a script could be a useful way to analyze an oscillator by hand. Some important conclusions have been derived from all these results and from the simulations about which topology is suitable for a certain application. Table 6.1 summarizes the performance of the two designed VCOs. The PN shown is evaluated at 100 kHz offset from the carrier, and is the minimum over the tuning range. The results are good compared to the state of the art shown in the Chapter 5, in terms of phase noise, dissipated dc power and tuning range; the FOM, that summarizes all these performances, is also high for all the designed topology. The Armstrong topology has to be considered for further investigation and implementations in Si-Ge HBT technology because, despite a higher phase noise of 2 dBc/Hz with

176

Parameters PN @ 100 kHz Pd TR FOM

Table 6.1: Performances summary of the designed VCOs differential Colpitts differential Armstrong differential Vackar -112.18 dBc/Hz -110.48 dBc/Hz -105.64 dBc/Hz 23.68 mW 1.69 mW 8 mW 25.45% 31.06% 18.77 % 210.16 dB 221.13 dB 208 dB

respect to the Colpitts, our Armstrong VCO dissipates a much lower dc power (more than one order of magnitude) than the Colpitts, exhibits a higher tuning range, and has an overall FOM of 11 dB higher than the Colpitts. A real implementation of the designed Colpitts VCO could be performed, since the measured phase noise is expected to be only 2-3 dB higher in the real chip implementation compared to simulation results. This is because the used PDK is very accurate in taking into account all the resistive, capacitive, and inductive parasitics.

177

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