Decentralized Control for Parallel Operation of Distributed Generation Inverters in Microgrids Using Resistive Output Impedance Josep M. Guerrero1, Néstor Berbel2, José Matas2, Luis García de Vicuña2, Jaume Miret2 Escola Universitària d'Enginyeria Tècnica Industrial de Barcelona Sustainable Distributed Generation and Renewable Energy Group 1 Department of Automatic Control Systems & Computer Engineering 2 Department of Electronic Engineering UNIVERSITAT POLITÈCNICA DE CATALUNYA Comte d'Urgell 187. 08036 Barcelona. SPAIN
[email protected] Abstract—In this paper, a novel wireless load-sharing controller for islanding parallel inverters in an ac-distributed system is proposed. The paper explores the resistive output impedance of the parallel-connected inverters in an island microgrid. The control loops are devised and analyzed taking into account the special nature of a low voltage microgrid, in which the line impedance is mainly resistive and the distance between the inverters makes the control intercommunication between them difficult. In contrast with the conventional droop control method, the proposed controller uses resistive output impedance, and as a result a different control law is obtained. The controller is implemented by using a DSP board, which only uses local measurements of the unit, thus increasing the modularity, reliability, and flexibility of the distributed system. Experimental results are provided from two 6 kVA inverters connected in parallel, showing the features of the proposed wireless control. Index Terms—Distributed generation (DG), inverters, droop method, microgrids.
I. INTRODUCTION HE GENERATION of highly reliable, good quality electrical power near the place where it is demanded can imply a change of paradigm. This concept, named distributed generation (DG), is especially promising when dispersed energy storage systems (fuel cells, compressed-air devices, or flywheels) and renewable energy resources (photovoltaic arrays, variable speed wind turbines, or combined cycle plants) are available. These resources can be connected through power conditioning ac units to local electric power networks also known as microgrids [1]. Hence, inverters or ac-ac converters are connected to the local dispersed loads via a common electrical distribution bus. In such systems, every unit must be able to operate independently without intercommunication due to the long distance between DG units [2]. In order to achieve good power sharing, the controller makes tight adjustments over the output voltage frequency and amplitude of the inverter [3]. This control technique, known as droop method, consists in emulating the behavior of large power generators, which drop their frequencies when the power delivered increases.
T
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This work was supported by the Spanish Ministry of Science and Technology under Grant DPI 2003-06508-C02-01.
1-4244-0136-4/06/$20.00 '2006 IEEE
There are many control schemes for linear load sharing based on the droop method [4]-[10]. In [8] a controller was proposed to also share nonlinear loads by adjusting the output voltage bandwidth with the delivered harmonic power. In another approach [10], every single term of the harmonic current is used to produce a proportional droop in the corresponding harmonic voltage term. However, the droop method exhibits a slow dynamic response, since it requires low-pass filters with a reduced bandwidth to calculate the average value of the active and reactive power [11]. In [12], a wireless controller was proposed in order to enhance the dynamic performance of the paralleled inverters by adding integral-derivative power terms to the droop control method. Using the conventional droop method, the output impedance and line impedance are considered to be mainly inductive, which is often justified by the large inductor value or by the long distances between the units. However this is not always true since the output impedance of the inverter depends also on the control strategy [13], [14], and the line impedance is predominantly resistive for low voltage cabling. Another problem of the droop method is that the power sharing is degraded if either the output impedance or the line impedance are unbalanced. To ensure inductive output impedance, fast control loops are added to the droop control method, thus avoiding the use of an extra output inductor. On the other hand, the droop method has been studied extensively in parallel dc converters [15]-[21]. In these cases, resistive output impedance is enforced easily by subtracting a proportional term of the output current from the voltage reference. However, little work has been done in the application of the resistive droop method to parallel inverters [22], [23]. The advantages of such an approach are the following: 1) the overall system is more damped; 2) it provides automatic harmonic current sharing; and 3) phase errors barely affect active power sharing. In this paper, we propose a novel control scheme that is able to further improve the steady-state and the transient response of parallel-connected inverters without using communication signals. The controller uses a resistive output impedance, which allows good power sharing with low sensitivity to the line impedance unbalances. Finally, the output impedance is designed to share not only active and reactive power, but also harmonic content of the total loads.
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PV panel system
~
Wind turbine
Fuel cells
Q=Im{S}
Compressed-air
Inductive load E>V, φ V, φ >0
E∠φ
Fig. 3. Polar diagram of the P/Q circumference.
Z∠θ = R+jX
~
V∠0º
S=−
S=P+jQ Fig. 2. Equivalent circuit of a DG unit connected to the common ac bus.
II. RESISTIVE OUTPUT-IMPEDANCE POWER-FLOW ANALYSIS Fig. 1 shows a general scheme of a microgrid which consists of a combination of multiple micro-generator DG units, distributed loads, and electric power interfaces that transfer energy to the local ac bus. The microgrid can be connected to the utility grid through a single point of common coupling (PCC). When the utility grid is not present, the DG units should be able to share the total power demanded by the local loads, adjusting their output voltage references as a function of the delivered power. Fig. 2 shows the equivalent circuit of a DG unit as an inverter connected to a common ac bus through a decoupling output impedance. The active and reactive power injected to the bus by every unit can be expressed as follows [24]: EV V2 EV cos φ − sinφ sin θ P = cos θ + Z Z Z
(1)
EV V2 EV Q = sin θ − cos φ − sin φ cosθ Z Z Z
(2)
where E is the amplitude of the inverter output voltage, V is the common bus voltage, φ is the power angle, and Z and θ are the magnitude and the phase of the output impedance respectively. Assuming that the output impedance is resistive (Z = R and θ = 0º), the active and reactive powers become
(3) (4) From (4), the stability bounds of φ can be found. Note that the range –90º < φ < +90º causes a negative slope of Q. Using polar coordinates, the complex power injected to the ac bus (S = P + jQ) can be written as
V 2 EV − jφ + e R R
(5)
which is shown in Fig. 4 as a circumference with a radium of EV/R and a center point at –V2/R. Note that P decreases and Q increases when φ increases. In practical applications, the power angle φ is normally small and thus a P/Q decoupling approximation (cos φ ≈1 and sin φ ≈φ) can be considered in order to simplify the control design (6) . (7) Consequently, the active power P can be controlled by the inverter output-voltage amplitude E while the reactive power Q can be regulated by the power angle φ, which is the opposite strategy to the conventional droop method. III. CONTROL DESIGN The aim of this section is to propose a controller that can guarantee a proper operation of the inverters without using control intercommunications. The proposed controller consists of three nested loops: 1) the inner output voltage regulation loop; 2) the resistive output impedance loop; and 3) the P/Q sharing outer loop. A.
Inner output-voltage regulation loop Fig. 6 shows the power stage of a single-phase inverter which includes an IGBT bridge configuration and an L-C filter. The equivalent series resistance (ESR) of the filter capacitor is not considered in the model, since its effect appears far above the frequency range of concern [25]. The bilinear differential equations that describe the large-signal dynamic behavior of this converter are presented as follows di L L = Vin u − v o − rL i L (8) dt dv C o = i c = i L − io dt (9) where rL is the equivalent series resistance (ESR) of the inductance L, and u is the control variable, which can take the following values: 1, 0 or –1, depending on the state of the pair of switches S1–S2 and S3–S4.
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According to the nonlinear control and feedback linearization theory, the output voltage of this system is of a second-order relative degree. Thus, from (8) and (9) the open-loop averaged output-voltage dynamics can be derived LC
d 2 vo dt
+ rL C
d vo dt
+ vo + L
d io dt
+ rL io = Vinu
(10)
where means average value over one switching cycle. In order to linearize the system in a large-signal sense, and to achieve a good tracking of the output voltage, we propose the following controller expression
(
)
Vin u = v ref + k p vref − v o + k d
(
)
d v ref − vo , dt
(11) where vref is the output-voltage reference. Note that the controller does not need any integral term to avoid steadystate error, since it can add lag to the output voltage tracking. Instead, it uses a feedforward term of the filter input voltage, Vin·u. Besides, integral term adds an inductive behavior to the output impedance [13], which is not desirable for our approach. By equating (10) and (11), the closed-loop output-voltage dynamic behavior takes the form vo =
k d s + (1 + k p )
LCs + ( rL C + k d ) s + (1 + k p ) 2
v ref −
Ls + rL LCs + ( rL C + k d ) s + (1 + k p ) 2
v ref
io
(12) where s is the Laplace operator. From the above expression, the inverter can be modeled by a two-terminal Thevenin equivalent circuit of the form vo = G(s)·vref – Zo(s)·io (13) where G(s) is the voltage gain and Zo(s) is the output impedance. On the one hand, the voltage gain is responsible for the good output voltage tracking. Thanks to the feedforward term it is able to perfectly follow the output voltage reference. On the other hand, the output impedance at low frequency can be easily reduced by increasing kp. The output impedance fixes the dynamics of the output voltage inverter. From (12), we can deduce that the system has one fixed zero at rL/L and two complex-conjugated poles, which can be adjusted by means of kp and kd. After studying the root locus of the closed-loop output impedance, we can consider that the poles are dominant, since the zero is far from them. As a consequence, we can obtain the desired dynamical response by adjusting these poles. In this situation the output impedance value can be comparable resistive and inductive terms, and thus the decoupling between P and Q is not guaranteed. Apart from its inductive or resistive nature, the phase of the output impedance is very sensitive to the parasitic resistance rL. One problem is that this parameter is neither easy to measure nor easy to estimate, since it is determined by the ESR of the filter inductor and other parasitic elements, such as the on resistance of the IGBTs and the stiffness of the dc-link, among others. Consequently, the power sharing accuracy can be affected due to the fact that the output impedance is not fixed. B.
impedance unbalance. Hence, to enforce the desired output impedance, we can drop the output voltage reference proportionally to the output current, by using the following instantaneous droop function: vref = vo* – ZV(s)·io (14) where ZV(s) is the virtual output impedance, and the output voltage reference at no load, defined as vo*. Fig. 4 shows the virtual impedance loop in relation to the closed loop system. The value of ZV(s) should be larger than Zo(s) and the maximum line impedance expected. This fast control loop known as virtual output-impedance loop can be used to fix the output impedance of the inverter in terms of magnitude and phase. Resistive output impedance around the output-voltage frequency can be implemented by drooping the output-voltage reference proportionally to the output current, io. Individual output impedance values for high-order current harmonics are obtained by subtracting a voltage, which is proportional to the current harmonics, from the output-voltage reference. Thus, the proposed output voltage reference can be expressed as:
Virtual resistive output impedance loop The output impedance of the closed-loop inverter affects the power sharing accuracy and also determines the droop control strategy [13]. In addition, the proper design of the output impedance can reduce the impact of the line-
v *o RD i o
11 h = 3, odd
Rh R D i oh ,
(15)
where RD is the virtual output impedance, and Rh is the resistive coefficient of every harmonic term ioh. Using this loop, the output impedance presented to the fundamental and the harmonic components can be fixed independently. This way, output impedance is fixed RD, but some dips (Rh < RD) are situated in harmonic frequencies in order not to increase the output voltage THD excessively. Fig. 12 shows the bode diagram of the virtual impedance loop, vref /io.
Fig. 4. Bode diagram of the virtual output impedance.
C.
Outer P/Q sharing loop As we stated previously, the conventional droop method has an inherent trade-off between P/Q sharing accuracy and frequency/amplitude output-voltage regulation. From (6) – (7), we can observe that by increasing the output-voltage amplitude the delivered real power becomes higher, while increasing the power angle reduces the reactive power. Consequently, the power-sharing loop should take into account this behavior. Thus, P–V droop and Q–ω boost functions are needed to obtain a proper P/Q sharing, as shown in Fig. 5. Further, in order to improve the dynamics of the paralleled
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system, the following droop/boost control scheme is proposed
E = E − nP − n d *
dP
In this section, some practical issues about the control implementation are described. The overall controller was implemented by using a dual DSP board. The output voltage regulation loop was built by using a fixed-point DSP together with supervisor algorithms and alarms. In addition, the power sharing and the virtual impedance loops were implemented using a fast floating-point DSP because of the high number of filters and calculations. However, another implementation would be possible by using a faster fixed-point DSP and sharing a low-cost microcontroller. ω
E
ω* ω = ω * + mQ
E = E* – nP P
iL
(17)
V. CONTROLLER IMPLEMENTATION
Pmax
L
+ ––
Output static switch
io
to the local ac bus
C
where m and md are the proportional and the derivative coefficients of the reactive power Q, and n and nd are those of the active power P. Note that this special kind of controller does not use integral terms, since in this case they will turn the system unstable. In fact, the frequency and amplitude are deviated in order to achieve communicationless P/Q sharing. These deviations are smaller than those in the conventional droop method, since we can adjust the transient response through the derivative terms without increase the maximum E/ω deviations. Notice that although equation (4) shows a relationship between φ and Q, equation (17) uses frequency (ω) instead of φ. This is because the units does not know the initial phase value of the other units. However, the initial frequency at no load can be easily fixed as ω*. Besides, considering the negative sign of equation (4), signs of Q-terms in (17) are deliberately positive in order to achieve negative feedback. The proposed control scheme allows us to modify the transient response by acting on the main control parameters, and, at the same time, to keep the static droop/boost characteristics. Also, it minimizes the transient circulatingcurrent among the modules, and further improves the whole system dynamic performance. The coefficients m and n fix the steady-state control objectives, while md and nd are selected to guarantee stability and good transient response.
∆E
Vin
(16)
dt dQ ω = ω * + mQ + m d dt
E*
DC link
Capacitive load -Qmax
∆ω
Inductive load Qmax
Fig. 5. Static droop/boost characteristics for resistive output impedance.
Q
iC Vinu
‘6711 DSP board
kc=kd/C _
PWM + drivers
TMS320LF2407A DSP board Inner output voltage regulation control
+
v_o kp
+
vref
+
DSP core
1+skd
Communication bus lines
Fig. 6. Block diagram of the output voltage regulation controller.
A.
Output voltage regulation controller The inner voltage regulator controller, depicted in Fig. 6, was implemented by using a TMS320LF2407A Texas Instruments 16 bit fixed point DSP board running at 40 MHz. The derivative term was implemented by using a small current transformer which senses the capacitor current, in order to avoid the high frequency noise, which is usually amplified by this term. The voltage and current sampling were rated at 10 and 20 kHz, respectively. B.
Power sharing controller Fig. 7 depicts the block diagram of the proposed controller. The average active power P can be obtained by means of multiplying the output-voltage by the load-current, and filtering the product using a low-pass filter. In a similar manner, the average reactive power is obtained, but in this case the output-voltage must be delayed 90 degrees. In order to adjust the output voltage amplitude and frequency, equations (16) and (17) are implemented, which correspond to a couple of PD controllers applied over the signal Q and P. The power sharing controller was implemented by using a TMS320C6711 32 bit floating-point DSP. The filters were performed by using IIR solutions, and the 90º delay was obtained by using a circular buffer. C.
Virtual impedance loop The virtual resistive output-impedance loop was also included in this DSP. The harmonic components of the output current can be extracted by using a bank of band-pass filters, which was implemented through FIR filters as in [26]. The output current is limited by the virtual output impedance loop, and can be enhanced by programming higher impedance when the current is near overload. Finally, the two-DSPs were interconnected by using the host port interface (HPI), characteristic of the TMS320C67xx family. The fixed-point DSP-controller also includes a PLL block in order to synchronize the output voltage of the inverter in frequency and phase with the common bus. When the output voltage synchronization is completed, the output static switch is turned on, and the droop/boost control are initiated.
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Wireless power-sharing controller TMS320C6711 DSP board
Band-pass filters bank
R11 ⋅ 2sk11 s 2 + 2k11 s + 112 ω 2
n harmonic
+ R3 ⋅ 2sk 3 s 2 + 2k 3 s + 32 ω 2
3rd harmonic
Harmonic power-sharing loop
+ io
Qi
io
LPF
Q
ωo
RD
PD
LPF
Q-sharing loop
+ +
ω* Ε*
+90º Pi
+
RD io
P/Q Calculation
vo
+
Resistive virtual impedance loop
P
PD
−
+
P-sharing loop
ωo
Reference generator
~
−
vo*
vref
+
vo* = E·sin(ωt)
Fig. 7. Block diagram of the power-sharing controller. E1∠φ1
~ DG Unit #1
ZO1∠θ1
V∠ 0º
i1 ZL1=jXL1+rL12
i2
ZO2∠θ2
ZL2=jXL2+rL2 P, Q, D Load
E2∠φ2
(a)
~ DG Unit #2
Fig. 8. Equivalent circuit of two-units supplying a common load.
(b)
Fig. 9. Steady state and transient response of the output currents (top and bottom) and the circulating current (middle). Y-axis: 10 A/div; X-axis: 10 ms/div.
VI. EXPERIMENTAL RESULTS Two 6-kVA single-phase inverter units were built and tested, confirming experimentally the validity of the proposed approach. Each inverter consisted of a single-phase IGBT full-bridge with a switching frequency of 20 kHz and an L-C output filter. The impedance of the lines connected between the inverters and the load were intentionally unbalanced to properly test the control behavior, as the equivalent circuit of Fig. 8. The outstanding features of the parallel system were experimentally evaluated when the two-unit system shares a linear load. Fig. 9 depicts the steady-state and the transient response of the output currents and the circulating current (i1–i2) when a sudden load change occurs from no-load to full load. As it can be seen, the circulating current remains very small even for no-load conditions. These results show an excellent dynamic response of the proposed controller for load step changes.
Fig. 10. Transient response of the circulating current (middle) and output currents (top and bottom) when connecting unit #2, while unit #1 supplying the load constantly. Y-axis: 10 A/div, X-axis: 200 ms/div. (a) md = nd = 0; (b) md = 0.00005 and nd = 0.00003.
The dynamic performance of the system was tested by connecting the unit #2 while unit #1 was supplying the linear load constantly. As shown in Fig. 10, the derivative terms of the proposed P/Q sharing loop allow us to improve the transient response of the paralleled system. In this case, the output currents never exceed the nominal output current of the DG unit. Finally, Fig. 11 illustrates the steady-state output currents when the units share nonlinear loads. Two situations are evaluated: in the first one the load is a typical rectifier load with a high crest factor, while in the second one this load is in parallel with a resistive load. This shows the very good output current equalization of the system when sharing linear or nonlinear loads, or even in no-load conditions.
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[4] [5] [6]
[7] (a) [8]
[9] [10] [11] (b) Fig. 11. Steady-state output currents when sharing (a) nonlinear load, Yaxis: 2 A/div, X-axis: 5 ms/div; (b) resistive and nonlinear load, Y-axis: 10 A/div, X-axis: 5 ms/div.
VII. CONCLUSION A power-sharing controller without control wire interconnections for the parallel operation of DG inverters was proposed. In a clear-cut contrast with the conventional droop method, the output impedance of the inverters is enforced to be resistive, giving the following advantages: 1) the system becomes more damped; 2) automatic harmonic sharing is obtained; and 3) phase errors barely affect Psharing. Consequently, novel droop control functions are devised which are also able to improve the dynamic response of the paralleled system. The controller consists of three nested loops: a P/Q sharing control loop, a resistive virtual output-impedance loop, and an inner output-voltage regulation loop. Experimental results have been presented to validate the proposed control approach, showing good power sharing when supplying linear and nonlinear loads, even when the line impedances are unbalanced. The excellent performances of this wireless controller highlight its applicability to parallel connected inverters in distributed power systems, such as low voltage DG systems or microgrids. ACKNOWLEDGMENT The authors would like to express their gratitude to Arno van Zwam, Hans Poppelier, Jan Joosten, and Raquel Igualá from Mastervolt for his support and cooperation. [1] [2] [3]
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