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electronics Article

All-in-One Wafer-Level Solution for MMIC Automatic Testing Xu Ding, Zhiyu Wang *, Jiarui Liu, Min Zhou and Faxin Yu

ID

, Wei Chen, Hua Chen, Jiongjiong Mo

School of Aeronautics and Astronautics, Zhejiang University, Hangzhou 310027, China; [email protected] (X.D.); [email protected] (J.L.); [email protected] (M.Z.); [email protected] (W.C); [email protected] (H.C.); [email protected] (J.M.); [email protected] (F.Y.) * Correspondence: [email protected]; Tel.: +86-571-8795-1581 Received: 7 April 2018; Accepted: 23 April 2018; Published: 26 April 2018

 

Abstract: In this paper, we present an all-in-one wafer-level solution for MMIC (monolithic microwave integrated circuit) automatic testing. The OSL (open short load) two tier de-embedding, the calibration verification model, the accurate PAE (power added efficiency) testing, and the optimized vector cold source NF (noise figure) measurement techniques are integrated in this solution to improve the measurement accuracy. A dual-core topology formed by an IPC (industrial personal computer) and a VNA (vector network analyzer), and an automatic test software based on a three-level driver architecture, are applied to enhance the test efficiency. The benefit from this solution is that all the data of a MMIC can be achieved in only one contact, which shows state-of-the-art accuracy and efficiency. Keywords: wafer-level; MMICs automatic test; OSL de-embedding; calibration verification model; dual-core topology

1. Introduction MMICs (monolithic microwave integrated circuit) are the core components of sensors, radars, and wireless communication systems, the performance of which decides the capability of the whole system. Due to the imperfect yield of the former semiconductor process, after fabrication, wafer-level function testing for each chip is indispensable in order to eliminate the rejects. Hundreds of chips on one wafer may also have diverse application purposes. As a result, dozens of indicators are needed to be evaluated, like the DC (direct-current) characteristics, S-parameter (scatter parameter) and its derivatives, output power and PAE (power-added efficiency), spectrum and non-linearity, noise parameters, etc. [1]. These ask the system to have the abilities of automatic test item switching and high-speed measurement. Furthermore, with the development of semiconductor technology, the MMICs’ performance, together with their highest operation frequencies and integration level, keep rising [2–8], which require the automatic system to have stronger abilities. Traditional test systems can either measure partial indicators of the MMICs or try to achieve the whole data by handling many instruments with a complex switch system. However, this leads to laborious operation, poor accuracy, and low speed. Traditional systems also ignore vector error correction, electromagnetic interference, temperature drift, and so on [9–15]. They cannot meet the precision and speed requirement of today’s 5G communication, radars, safety inspection, and other mm-wave applications. To solve the problems above, in this paper, we present an all-in-one wafer-level solution for MMIC automatic testing. To optimize the measurement accuracy, the OSL (open short load) two tier de-embedding [16–19], the calibration verification model, the accurate PAE testing, and the optimized vector cold source NF (noise figure) measurement techniques are integrated in the solution [20–22]. Electronics 2018, 7, 57; doi:10.3390/electronics7050057

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To improve the test efficiency, a dual-core topology formed by an IPC (industrial personal computer) and a VNA (vector network analyzer), and an automatic test software based on a three-level driver architecture are applied [23,24]. The benefit from this solution is that all the data of a MMIC can be acquired in only one contact, which is much more accurate and efficient than traditional systems. This paper is organized as follows: Section 2 introduces the main problems of the current MMICs test. Section 3 demonstrates the improvements for measurement accuracy. Section 4 demonstrates the improvements for measurement efficiency. Section 5 shows the whole system and verifies its validity by measurement. In the final section, conclusions are drawn. 2. The Main Problems of the Current MMICs Test Various MMICs are provided for different applications, like PA (power amplifiers), LNA (low noise amplifiers), MFC (multifunction chips), attenuators, filters, limiters, and other active or passive devices. According to different chip functions, the evaluation of dozens of indicators is commonly inevitable, like the DC characteristics, S-parameter and its derivatives, output power and PAE, spectrum and non-linearity, noise parameters, and so on. These indicators can be classified as four main types: DC characteristics, S-parameter, power and non-linearity, together with noise parameters. Typical MMIC test indicators and classification are shown in Table 1. These test indicators with weak correlation bring a significant challenge for MMIC measurement. Figure 1 shows the setup of the traditional test system. It is a mixture of scalar and vector measurements and a combination of wideband and narrowband testing. It has four subsystems roughly combined by a complex switch system. Table 2 shows different MMICs’ test indicators. Table 3 shows the four subsystems and the corresponding instruments. It is certain that such a complicated system sacrifices accuracy and efficiency for covering the whole test. The situation becomes even worse for the wafer-level case. Table 1. Typical MMICs’ test indicators and classification.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Test Indicators

Class

ID (Drain current) IG (Gate current) Pinch-off voltage Overshoot VSWRIn (Input standing-wave ratio) VSWROut (Output standing-wave ratio) Linear gain Phase POut (Output power) GC (Gain compression) PAE (Power added efficiency) Spectrum and non-linearity NF (Noise figure) NF Min (Minimum noise figure) RN (Noise resistance) ΓOpt (Optimum source impendence) Magnitude consistency Phase consistency

DC characteristics DC characteristics DC characteristics DC characteristics S-parameter S-parameter S-parameter S-parameter Power and non-linearity Power and non-linearity Power and non-linearity Power and non-linearity Noise parameters Noise parameters Noise parameters Noise parameters Statistics Statistics

Table 2. Different MMICs’ test indicators.

PA LNA MFC Passive

DC √ √ √

×

S-Parameter √ √ √ √

Power and Non-Linearity √

× √ ×

Noise

× √ × ×

Passive

×



×

×

Table 3. Subsystem and their instruments. Electronics 2018, 7, 57

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Instruments

1. DCand power supply Table 3. Subsystem their instruments. 2. DMM (digital multimeter) 3. Oscilloscope Instruments

DC

1. DC power supply

4. 2.VNA (vector network analyzer) DMM (digital multimeter)

S-parameter DC

Oscilloscope 5. 3.SG (signal generator) 4. VNA network analyzer) generator) 6. AWG (vector (arbitrary waveform SG (signal generator) 7. 5.PM (power meter) and power sensor 6. AWG (arbitrary waveform generator) 8. 7.SA PM(Spectrum (power meter)analyzer) and power sensor

S-parameter

Power and non-linearity Power and non-linearity

SA (Spectrum analyzer) 9. 8.Noise source 9. Noise source 10.10.NFA (noise figure analyzer) NFA (noise figure analyzer)

Noise

Noise

Number ofof instruments Number instruments

10 10 Vector Network Analyzer Acti ve Channel

Chan 1

Dis k E ject

E ntr y

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Chan 3

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Fo rm at

/\ Dis pl ay

M ark er

Avg

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E ntr y Of f

Center



-

M enu

Frequency: xxx GHz Power: +9.00 dBm DC Offset: 0.000 mV

T rig

Outputs

Hold

Inc Set

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On Off

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ALC INPUT M enu

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Common

-20V

Gnd Pr es et

On

Auto/ Man

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Cont ras t Decr eas e

L ocal

Cont ras t In creas e

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A

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Peak 1

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H Line

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Fre e Run

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Video

Sa ve/ Recall

Se q

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Edge

PW

Pa t er n

Acqu ir e

Sin gle

Pwr

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Other

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3~6dB Cursor

O

C

Noise

GND

Oscilloscope

Sp

Other RFOut

DUT

Pwr NF

ENR

RF Power Meter

Signal Generator

RF_main

Inp ut

1

1

Disk Eje ct

Spectrum Analyzer

M ath

2

3

2

3

M ath

RF_Sp

4

4

RF_Pwr

On/ Off

Control

System

NF

I Inpu t Fr equency

In put/ Out put

M ode

M ode Set up

Sy st em

Pr es et

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Dem od

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Pr int

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So urce

M ark er

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Vol ume

So urce

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DC

M ark er Set up

Adjust

E xter nal T rig ger In put

\/

/\

7

8

9

4

5

6

1

2

3

0

.

-

Bks p

REF E nter

Input

Switch

RF Inpu t

Control

L ine On/ Off

Help

Next Win dow

Z oom

--




Retur n

Dis k E ject

Figure test system. Figure1.1.The The traditional traditional test system.

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In terms of accuracy, such a complicated system leads to poor stability and arduous calibration. Intraditional terms of accuracy, complicated system leads to poorcan stability and arduous In the system, such only athe S-parameter’s reference plane be extended to the calibration. probe tips, In the traditional system, only the S-parameter’s reference plane can be extended to the probe tips, while others can only reach the coaxial plane. To correct this deviation, a simple scalar calculation while others can only coaxialloss plane. To correct this deviation, a simple scalar calculation may be performed by reach using the direct subtraction method. Meanwhile, because of the principle may be performed by using directthe losssystem subtraction method. Meanwhile, because of repeatability, the principle defects for power and noisethe testing, ignores the vector correction, switch defects andafter noise testing, the system ignores vector correction, switch repeatability, clutter, for etc. power Although careful calibration, there is stillthe a large remaining error [25,26]. In terms of clutter, etc. system Although careful calibration, there is still a large remaining error [25,26]. In terms speed, the hasafter to switch among each subsystem four times, the IPC needs to communicate of speed, system hasfrequently, to switch among each subsystem times, the IPC and needs to communicate with eachthe instrument and the response for four the power sensor Y-factor (hot/cold with eachnoise instrument frequently, and theslow. response forthese the power sensor and Y-factor (hot/cold source) source) measurement is always All of are time consuming, which can hardly be noise measurement is always accepted for productive tests.slow. All of these are time consuming, which can hardly be accepted for productive tests. MMIC test process can be summarized in three steps: calibration, verification, and The complete The complete MMIC testmeasurement process can be summarized in three steps: calibration, verification, measurement (Figure 2). The errors come from sources: system error, random and measurement (Figure The measurement errors come sources: error,the random error, and drift error [27].2). However, only the system error from can bethree removed by system calibration, other error, and drift error [27]. However, only the system error can be removed by calibration, the other two two can only be reduced by careful operation with a more accurate and compact system (shown in can only Table 4) be reduced by careful operation with a more accurate and compact system (shown in Table 4) Table Table 4. 4. Measurement Measurement errors errors and and suppression suppressionmeans. means.

Calibration Calibration Verification Verification Automation Automation

SystemError Error System √√ √

Random Error Random Error

Drift Error Drift Error

× ×

××

××





√ √ √



√√ √

Calibration No

Verification Yes Measurement Figure 2. 2. Test Test process process generalizations. generalizations. Figure

Additionally, researchers commonly focus on better calibration methods [28–30], but overlook Additionally, researchers commonly focus on better calibration methods [28–30], but overlook the the verification step. They often verify the calibration by experience or even omit this step. An verification step. They often verify the calibration by experience or even omit this step. An effective effective verification can judge the validity of the calibration, determine abnormalities of system verification can judge the validity of the calibration, determine abnormalities of system operation, operation, and guarantee the accuracy of the test data. Meanwhile, it must be conducted in a and guarantee the accuracy of the test data. Meanwhile, it must be conducted in a quantitative manner quantitative manner independent from human factors. independent from human factors. It is quite necessary to develop a more powerful system to solve the defects of the traditional It is quite necessary to develop a more powerful system to solve the defects of the traditional ones ones and cover the complex measurement tasks. The system is aimed at supporting large-scale onand cover the Therefore, complex measurement tasks. The of system is aimed supporting large-scale wafer testing. it must have the ability working in CWat(continues wave), pulsed,on-wafer or other testing. Therefore, it must have the ability of working in CW (continues wave), pulsed, or other modulation modes, and can perform precise testing of all the indicators in Table 1 in one contact. modulation and can perform precise testingprecisely of all the in Table 1 in one contact. Additionally,modes, it should support full vector correction toindicators the probe tips. Furthermore, it needs Additionally, it should support full vector correction precisely to the probe tips. Furthermore, it needs to be as simple as possible to reduce the complexity, improve the accuracy, and enhance the to be as simple as possible to reduce the complexity, improve the accuracy, and enhance the efficiency. efficiency. 3. The Improvements in Measurement Accuracy

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3. The Improvements in Measurement Accuracy In this paper, in order to enhance the measurement accuracy, the proposed solution takes the commonly-neglected impacts, for instance, vector error correction, electromagnetic interference, and temperature drift, into account. Furthermore, light of the different subsystems’ requirements, the measurement accuracy of our solution is markedly improved by integrating the OSL two-tier de-embedding, the calibration verification model, the accurate PAE testing, and the optimized vector cold source NF measurement, and other advanced test techniques. We discuss these in detail below. 3.1. S-parameter Test Standard calkits are always in the same connector type. However, when meeting the heterotype connectors, calibration cannot be executed accurately. In an actual wafer-level test situation, only the S-parameter’s reference plane is extended to the probe tips, and other indicators’ reference planes can only reach the coaxial or waveguide plane. Traditional test systems either uses scalar correction. 

  S F11 1     S F21 S F12 − S F11 S F22  =  1 S F22 1

ΓO ΓS ΓL

 −1   ΓMO ΓMO    ΓMS   ΓMS  ΓML ΓML

S F21 = ΓML S F22 =

ΓS (ΓML − ΓMO ) + ΓO (ΓMS − ΓML ) ΓS ΓO (ΓMS − ΓMO )

(Γ S − ΓO )(ΓMO − ΓML )(ΓMS − ΓML ) ΓS ΓO (ΓMS − ΓMO ) √ l εr DelayOffset = , ε r = 1.000649, c = 299792458m/s c √ dBLoss | 1GHz c ε r Z0 dBLoss Z0 p = LossOffset | 1GHz = 10log10 (e)l 10log10 (e)DelayOffset f r (LossOffset ) DelayOffset f ,Z = 50Ω αl = 2( Z0,Offset ) 109 0,Offset  βl = 2π f DelayOffset + αl S F21 S F12 =

Γi = Γi × e−2γl , γ = α + jβ, i = Open, Short, Load 0

(1)

(2) (3) (4) (5) (6)

(7) (8) (9)

which relies on direct loss subtraction method and ignores all vector factors, or even leaves this deviation alone. This can hardly be adopted by mm-wave applications (Ka band or above) or high-precision requirements. Therefore, we introduce the extended OSL de-embedding method (Figure 3) to extract the S-parameter of probes or other heterotype connectors. Firstly, we calibrate at the coaxial plane, then connect the probes and measure the on-wafer open, short, and load standards. Γi are the given reflection coefficients of on-wafer standards, and ΓMi are the measured data at the coaxial plane when the probes contact the standards. After acquiring these data, we use Equations (1) to (4) to calculate the probes’ S-parameter. To solve the phase uncertainty in Equation (4), two external conditions, reciprocity and Phase|0Hz = 0◦ , are added. Then we can compensate the power vectorially and extend all reference planes to the probe tips. For the non-ideal calkits with LossOffset (GΩ/s) and DelayOffset (ps), we use the correction algorithm from Equations (5) to (9) to obtain the correction factor e− 2γl and the new reflection coefficient Γi ’. In Figures 4 and 5, we use a 6 dB attenuator (Weinschel® 75A-06) as the DUT (device under test). We can see the calculated data are nearly the same with the measured one. In this way, the valid frequency range of the OSL method is remarkably extended.

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Coax Reference Plane Calibration CoaxCoax Reference Plane Coax Calibration

Probe Reference Plane On Reference Wafer Calibration Probe Plane On Wafer Calibration

Open Short Load Open e-γl Short Load

SF21

e-γl

SF21

Offset Correction Offset Correction SF22 SF22

SF11 SF11

Γi ,i = Open Short Γi ,i = Open Load Short Load

e-γl

SF12

-γl

SF12

e

Figure 3. OSL de-embedding flow. Figure 3. OSL de-embedding flow. Figure 3. OSL de-embedding flow. -10

S11(dB) S11(dB)

Measure

-5.6-5.9 -5.9-6.2

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Figure 4. S-parameter magnitude of the 6 dB attenuator (Weinschel® 75A-06, Weinschel, Frederick, ® Figure 4.4.S-parameter ofofthe Weinschel, MD, USA). Figure S-parametermagnitude magnitude the6 6dB dBattenuator attenuator(Weinschel (Weinschel®75A-06, 75A-06, Weinschel,Frederick, Frederick, MD, USA). MD, USA).

40 40

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250.0

OSL_No_Offset OSL_Offset_Model OSL_Data_Base Measure

200.0 150.0

S21 Phase(°)

100.0 50.0

0.0 -50.0 -100.0 -150.0

-200.0 -250.0 0

4

8

12

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20 24 Frequency(GHz)

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.

® 75A-06, ® 75A-06, Figure 5. 5. S-parameter 6 dB attenuator (Weinschel Weinschel, Frederick, MD, Figure S-parameterphase phaseofofthe the 6 dB attenuator (Weinschel Weinschel, Frederick, USA). MD, USA).

alwaysperplexes perplexes the the test testoperators operators whether whether the the calibration calibration isis accurate accurate enough enough and and ready ready to to ItItalways use. In the coaxial condition, we can test a precisely-manufactured golden unit or the verification kit use. In the coaxial condition, we can test a precisely-manufactured golden unit or the verification to to validate itsits accuracy. applications because because of of the the kit validate accuracy.However, However,ititmay maynot notbe besuitable suitable for for on-wafer on-wafer applications processcorner cornerfluctuation fluctuationand and the thedestruction destruction to tothe thetest testkits kitsby byeach eachcontact. contact.Sometimes Sometimes they they only only process test an open or a thru for simple verification. However, this method is not a quantitative way and test an open or a thru for simple verification. However, this method is not a quantitative way and closely related to the operator’s experience. To overcome these defects, we introduce the delay line closely related to the operator’s experience. To overcome these defects, we introduce the delay line model to toverify verifythe thecalibration. calibration. The The π-shaped π-shaped equivalent equivalent circuit circuit is is shown shown in in Figure Figure 6, 6, in in which which the the model delay line between two probes is indicated by the L and R Series in series. The inductor L determines delay line between two probes is indicated by the L and RSeries in series. The inductor L determines thecharacteristic characteristictime time ττD.. The RSeries indicates the series resistor of the delay line resistor RLine and the the D The RSeries indicates the series resistor of the delay line resistor RLine and twotwo probes’ contact resistor RC, which should be small. The influence of the capacitors can be ignored. the probes’ contact resistor RC , which should be small. The influence of the capacitors can be When the calibration is completed, we put the probes on another delay line (not used calibration) ignored. When the calibration is completed, we put the probes on another delay linein(not used in with knownwith τD to perform theperform S-parameter measurement, and then calculate real τDthe and RSeries calibration) known τ D to the S-parameter measurement, and thenthe calculate real τD from the model (Equations (10) to (15)). Finally, after comparing the difference between the measured and RSeries from the model (Equations (10) to (15)). Finally, after comparing the difference between the data and data the nominal value, we can we judge the calibration is passed or not. Figure 7 shows an measured and the nominal value, can ifjudge if the calibration is passed or not. Figure 7 shows example. After a DC–110 GHz calibration, we we useuse a new thruthru with a 1 aps1 delay for verification. We an example. After a DC–110 GHz calibration, a new with ps delay for verification. can see the characteristic time τD is nearly 1 ps and the series resistor RSeries is no more than 300 mΩ. We can see the characteristic time τ D is nearly 1 ps and the series resistor RSeries is no more than In this we confirm that the is effective. TheThe verification model provides 300 mΩ.condition, In this condition, we confirm thatcalibration the calibration is effective. verification model providesa quantitative manner to evaluate the calibration independent from experience. a quantitative manner to evaluate the calibration independent from experience. 2S12  Y11 Y12  1 1  S11 1  S22   S12 S21 " # = " # (10)   Y 2S121+ S22 ) + S121S21S11 1  S22   − S122S S2112 Y11  21 Y12 Y22  Z10Ψ  (1 − S11)( = (10) Z0 Ψ Y21 Y22 21 22 Ψ 1+S11−2S 1+S S12 S21 (1 + S11 )(1 − S22 ) − S12 S21 (11)

1 1 1 Ψ = (, 1+ ) − S12 S21 Z BS11 )(1 + ,SZ22 C Y11 Y12 Y12 Y21 Y22 1 1 1 ZB R 2 fL , ZC = ZA = , Series ZB = j− Y11 + Y12 Y12 Y21 + Y22 RSeries real Z B ZB = RSeries + j2π f L L imag Z B D RZSeries = 2 real fZ ( ZB ) ZA

0

τD =

(11) (12) (12) (13) (14) (13) (15) (14)

0

L imag( ZB ) = Z0 2π f Z0

(15)

Port1 Port1

Port2 Port2 L L

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Port1 Port1

Port2 Port2 L L

Thru Thru (a) (a) B B

Port1 Port1

RSeries RSeries

Port2 Port2

A A

C C

Thru Thru (b) (a) (b) (a) 6. The equivalent circuit of delay line. (a) equivalent circuit, (b) π-shaped model. Port1 Figure 6. B Port2 circuit line. model. Figure 6. The The equivalent equivalent circuit of of delay delay line. (a) (a) equivalent equivalent circuit, circuit, (b) (b) π-shaped π-shaped model. Port1 Figure B Port2

1.6 1.4 1.4 1.2

A A

C C

1.2 1.0 1.0 0.8

(b) (b)

0.8 0.6 0.6 0.4

0 0

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(a)

0.30 0.20 0.20 0.10 0.10 0.00 0.00 -0.10 -0.10 -0.20 -0.20 -0.30 -0.30 -0.40

0.4 0.2 0.2 0.0 0.0

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Rseries(Ω) Rseries(Ω)

Delay(ps) Delay(ps)

2.0 2.0 1.8 1.8 1.6

80 80

90 90

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40 50 60 70 Frequency(GHz) 40 50 60 70 Frequency(GHz) (b)

80 80

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(b)

Figure 7. Calibration verification result. (a) delay in ps, (b) RSeries in . Figure 7. Calibration verification result. (a) delay in ps, (b) RSeries in . Figure 7. Calibration verification result. (a) delay in ps, (b) RSeries in Ω.

3.2. Power and Non-Linearity Test 3.2. Power and Non-Linearity Test 3.2. Power and Non-Linearity Test PAE represents the key performance of PAs, and it is impacted by the output power and drain PAE represents the key performance of PAs, and it is impacted by the output power and drain current Its measurement accuracy is factors. Theoutput traditional method uses PAEjointly. represents the key performance ofinfluenced PAs, and itby is many impacted by the power and drain current jointly. Its measurement accuracy is influenced by many factors. The traditional method uses the SG and PM Its together with DMM to perform the scalarbytest (Table 3). Although this solution can current jointly. measurement accuracy is influenced many factors. The traditional method the SG and PM together with DMM to perform the scalar test (Table 3). Although this solution can obtain of the current, cannot make a fully correction. Meanwhile, PM only uses thethe SGaccurate and PMvalue together with DMMit to perform the scalarvector test (Table 3). Although this solution obtain the accurate value of the current, it cannot make a fully vector correction. Meanwhile, PM only supports power tests, which is easily interfered the clutter the testMeanwhile, frequency. can obtainwideband the accurate value of the current, it cannot makeby a fully vector near correction. supports wideband power tests, which is easily interfered by the clutter near the test frequency. Additionally, limited by the testing of PM, response of the sensornear is extremely PM only supports wideband powerprinciple tests, which is the easily interfered bypower the clutter the test Additionally, limited by the testing principle of PM, the response of the power sensor is extremely slow when the power levellimited is below leading to communication timeoutof and system collapse. frequency. Additionally, by–30 thedBm, testing principle of PM, the response the power sensor slow when the power level is below –30 dBm, leading to communication timeout and system collapse. The VNA uses a when superheterodyne receiver, which a narrowband method with a larger is extremely slow the power level is below –30provides dBm, leading to communication timeout and The VNA uses a superheterodyne receiver, which provides a narrowband method with a larger dynamic range and betteruses accuracy. However, a receiver, sample resistor RSample, ashown in Figure 8, is system collapse. The VNA a superheterodyne which provides narrowband method dynamic range and better accuracy. However, a sample resistor RSample, shown in Figure 8, is introduced todynamic obtain therange drainand current IDaccuracy. [31,32] and PAE based on Equations whose with a larger better However, a sample resistor(16) R and (17), , shown in introduced to obtain the drain current ID [31,32] and PAE based on Equations (16)Sample and (17), whose accuracy be accepted. Tothe settle these problems, we and use PAE a VNA to test the output(16) power, and Figure 8, iscannot introduced to obtain drain current ID [31,32] based on Equations and (17), accuracy cannot be accepted. To settle these problems, we use a VNA to test the output power, and collect accuracy the DC data frombethe VNA’s controller interface. The controller can the control the power, DMM, whose cannot accepted. To settle these problems, we use ainterface VNA to test output collect the DC data from the VNA’s controller interface. The controller interface can control the DMM, read back the DC data, and then show it on the VNA’s screen (Figure 9). After gathering all the and collect the DC data from the VNA’s controller interface. The controller interface can controldata, the read back the DC data, and then show it on the VNA’s screen (Figure 9). After gathering all the data, the VNA sends to the IPC to then precisely PAE.screen This plan can9). remarkably improve the DMM, read backthem the DC data, and showcalculate it on thethe VNA’s (Figure After gathering all the the VNA sends them to the IPC to precisely calculate the PAE. This plan can remarkably improve the accuracy, speed, and stability. When a narrow-pulsed test is performed, or the current is larger than data, the VNA sends them to the IPC to precisely calculate the PAE. This plan can remarkably improve accuracy, speed, and stability. When a narrow-pulsed test is performed, or the current is larger than 3 A,accuracy, the current probe is used instead of the DMM. Assistedtest by is our unique calibration technique, the the speed, and stability. When a narrow-pulsed performed, or the current is larger 3 A, the current probe is used instead of the DMM. Assisted by our unique calibration technique, the system the same accuracy. than 3 A,can themaintain current probe is used instead of the DMM. Assisted by our unique calibration technique, system can maintain the same accuracy. (V  VOut ) the system can maintain the same  accuracy. I D   (VInIn  VOut ) , = 2 or 10 (16) ID  RSample , = 2 or 10 (16) RSample α(VIn − VOut ) ID = POut -PIn , α = 2 or 10 (16) R-Sample PAE  POut PIn 100% (17) PAE  I D  VD 100% (17) I D  VD P − PIn PAE = Out × 100% (17) ID × VD

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VNA VNA

DC Power Supply DC Power Supply

Vd_Out Vd_Out

Sample Resistor 1Ω Sample Resistor 1Ω

Vd_In Vd_In

VOut VOut

50kΩ 50kΩ 50kΩ 50kΩ Scale of 1/2 Scale of 1/2 40kΩ 40kΩ 40kΩ 40kΩ Scale of 1/10 Scale of 1/10 10kΩ 10kΩ 10kΩ 10kΩ

VIn VIn

PA PA

Gnd Gnd

Figure 8. Traditional VNA PAE test plan. Figure 8. Traditional TraditionalVNA VNAPAE PAEtest testplan. plan. Figure 8.

Control Control Data Data

VNA VNA

DC DC

PA PA

Figure 9. Accurate PAE test plan. Figure 9. Accurate PAE test plan. Figure 9. Accurate PAE test plan.

3.3. Noise Parameter Test 3.3. Noise Parameter Test 3.3. Noise NFParameter representsTest the key performance of LNAs. From Equations (18) and (19), we know NF is NF represents the key match. performance of LNAs. Equations and (19), wescalar knowmethod NF is strongly related to source Both the formerFrom Y-factor method(18) and the VNA NF represents the key performance of LNAs. From Equations (18) and (19), we know NF is strongly related to Zsource match. Both the former Y-factor method and the VNA scalar method assume the system 0 is 50 Ω without considering the mismatch [33–35]. In reality, the result is mainly strongly related to source match. Both the former Y-factor method and the VNA scalar method assume assume theby system Z0 is 50 Ω without the mismatch [33–35]. Inbetween reality, the is mainly impacted the mismatched source, considering the reflection coefficient difference coldresult and hot states, the system Z is 50 Ω without considering the mismatch [33–35]. In reality, the result is mainly impacted by0the mismatched source,noise the reflection coefficient difference between cold and hot states, and the uncertainty of ENR (excess ratio). Figure 10 gives the test result of an X-band LNA (1.2 impacted by the mismatched source, the reflection coefficient difference between cold and hot states, and the uncertainty of ENR (excess noise Figure 10 gives the test result of an X-band LNA (1.2 dB NF, 26 dB gain and 1.8 VSWR) underratio). different mismatched source conditions. Furthermore, for and of ENR (excessunder noisedifferent ratio). Figure 10 gives the conditions. test result of an X-bandfor LNA dBthe NF,uncertainty 26 dB gain and 1.8 VSWR) mismatched source Furthermore,

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7, x FOR PEER REVIEW 10 of 18 (1.2Electronics dB NF, 2018, 26 dB gain and 1.8 VSWR) under different mismatched source conditions. Furthermore, for its low speed, the Y-factor method is not suitable for production testing, and the scalar method is often its low speed, the Y-factor method is not suitable for production testing, and the scalar method is limited by the DUT’s gain. After careful comparison, we adopt the vector method for accurate NF often limited by the DUT’s gain. After careful comparison, we adopt the vector method for accurate testing. Meanwhile, the ambient temperature also needs to be concerned for precise testing. The NF test NF testing. Meanwhile, the ambient temperature also needs to be concerned for precise testing. The result impacted by ambient is shown Figure 11. We11. use the thermal control probe NF test result impacted by temperature ambient temperature is in shown in Figure We use the thermal control station tostation provide control. More than 0.1 than dB NF are obtained with 3 ◦ C probe toaccurate provide temperature accurate temperature control. More 0.1deviations dB NF deviations are obtained ◦ variations ofvariations the ambient temperature around 23 around C. For further optimization, we use a 3we dBuse or a6 3dB with 3 °C of the ambient temperature 23 °C. For further optimization, attenuator before the probe to improve source match. Calculated by Equation the uncertainty dB or 6 dB attenuator before the probethe to improve the source match. Calculated by(20), Equation (20), the reduces by about 25~40% (Figure 12). We choose theWe power sensor for noise calibration avoid ENR uncertainty reduces by about 25~40% (Figure 12). choose the power sensor for noisetocalibration uncertainty in mm-wave applications integrate and the integrate thermal control probe station to suppress to avoid ENR uncertainty in mm-waveand applications the thermal control probe station thetoeffects of temperature electromagnetic interference.interference. This solution suppress the effects offluctuation temperatureand fluctuation and electromagnetic Thisthoroughly solution thoroughly the shortcomings lowlarge speed with largeand fluctuation and hightosensitivity to overcomes theovercomes shortcomings of low speed of with fluctuation high sensitivity the ambiance the NF ambiance of the5 NF test.the Table 5 shows the speed of improvement of our method. of the test. Table shows speed improvement our method.

NF  10lg( F )  10lg(

SIn / N In ),where S for signal,N for noise SOut / NSOutIn /NIn

NF = 10lg( F ) = 10lg(

(18)

), where S f or signal, N f or noise

(18)

2 SOut /NOut Opt   S 4 RN F  FMin  2 2 2 Z 0 4R 1 NOpt (1 ΓOpt S − ) ΓS F = FMin + Z0 1 + ΓOpt 2 (1 − |ΓS |2 ) FSys 2 (  NFSys ) v F DUT u u F( FSys · ∆NF )2 u 2 Rcvr FDUT  NF Sys u ( Rcvr ) 2 FRcvr FDUT G u DUT u +( FDUT GDUT · ∆NFRcvr )  NF  DUT ∆NFDUT = uFRcvr  1F −1 2 2 u ( +( Rcvr  GA ·) ∆G ASys_dB ) u FDUT G A DUT F G tDUT A F Sys FRcvr )∆ENRdB ) +SysS(( FDUT F F − FDUT G

(19)

(19)

(20) (20)

Sys _ dB

DUT

 S ((

F is noise factor, as a ratio, F



Rcvr

FDUT GADUT

A DUT )ENR dB )

is minimum noise factor, NF is the dB quantity;

 F is noise factor, as a ratio, mim Fmim is minimum noise factor, NF is the dB quantity; ENR is is the in dB; dB; dB dB  ENR theexcess excessnoise noiseratio ratioof ofthe the noise noise source, source, in ∆ terms areare the associated  The The Δ terms the associateduncertainties, uncertainties,always always in in dB; dB; and and a single-frequency  S =S1=for 1 for a single-frequencymeasurement. measurement. 1.35

NF NO ATT 1.3

NF ATT 3dB

NF ATT 6dB 1.25

1.2

NF(dB)

• • • •

FDUT

1.15 1.1

1.05 1 0.95 0.9

8

8.2

8.4

8.6

8.8

9

9.2

9.4 9.6 9.8 Frequency(GHz)

10

10.2

10.4

Figure 10. NF result influenced by source match. Figure 10. NF result influenced by source match.

10.6

10.8

11

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1.5 1.5

26°C 26°C 23°C 23°C 20°C 20°C

1.45 1.45 1.4 1.4 1.35 1.35

NF(dB) NF(dB)

1.3 1.3

1.25 1.25 1.2 1.2

1.15 1.15 1.1 1.1

1.05 1.05 1

1 8.8 8.9 9 9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 10 10.1 10.2 10.3 10.4 8.8 8.9 9 9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 10 10.1 10.2 10.3 10.4 Frenquency(GHz) Frenquency(GHz)

Figure 11. NF result influenced by ambient temperature. Figure 11. 11. NF result Figure result influenced influencedby byambient ambienttemperature. temperature.

Uncertainty(dB) Uncertainty(dB)

0.3 0.3 Before Optimization After Optimization Before Optimization After Optimization 0.24 0.24 0.18 0.18 0.12 0.12 0.06 0.06 0 0 -0.06 -0.06 -0.12 -0.12 -0.18 -0.18 -0.24 -0.24 -0.3 -0.3 8 8.2 8.4 8.6 8.8 9 9.2 9.4 9.6 9.8 10 10.2 10.4 10.6 10.8 11 8 8.2 8.4 8.6 8.8 9 9.2 9.4 9.6 9.8 10 10.2 10.4 10.6 10.8 11

Frequency(GHz) Frequency(GHz) Figure 12. The test accuracy comparison. Figure 12. 12. The Figure The test testaccuracy accuracycomparison. comparison. Table 5. NF measurement speed (in second). Table 5. NF measurement speed (in second). Table 5. NF measurement speed (in second).

Points 11 51 101 201

Points NFA Points NFA 11 2.8 11 NFA 2.8 51 2.8 11 51 11 101 11 21 101 21 201 21 42 201 42 42

PSA PSA 2.2 2.2PSA 9 9 2.2 189 18 3518 35 35

EXA EXA 2.1 2.1 9 9 18 18 36 36

This Work This Work EXA2 2 2.6 2.12.6 9 3.1 3.1 18 4.2 364.2

This Work 2 2.6 3.1 4.2

4. The Improvements for Measurement Efficiency 4. The Improvements for Measurement Efficiency Aimed at solving the low efficiency of the traditional test system and simplifying its laborious Aimed at solving the low efficiency of the traditional test system and simplifying its laborious Aimed solving thecompared low efficiency of the traditional test system and simplifying its laborious operation,atwe carefully different mm-wave instruments of many companies [36–39], then operation, we carefully compared different mm-wave instruments of many companies [36–39], then operation, we carefully comparedwafer-level different mm-wave instruments of manytesting. companies [36–39], adopts then put put forward a new all-in-one solution for MMIC automatic The solution put forward a new all-in-one wafer-level solution for MMIC automatic testing. The solution adopts forward a new all-in-one for MMIC automatic testing. The solution the the dual-core hardware wafer-level topology andsolution a three-level software driver architecture. The solutionadopts uses the the dual-core hardware topology and a three-level software driver architecture. The solution uses the IPC as hardware the control center, and the aVNA as the software data center, thearchitecture. thermal control probe station with dual-core topology three-level driver The solution uses the IPC IPC as the control center, the VNA as the data center, the thermal control probe station with electromagnetic shielding asasthe on-wafer test the platform, and the automatic test software is based on aselectromagnetic the control center, the VNA the data center, thermal probe station with electromagnetic shielding as the on-wafer test platform, andcontrol the automatic test software is based on the three-level driver architecture of theand HMIthe (human machine interface). shielding as thedriver on-wafer test platform, automatic test software is based on the three-level the three-level architecture of the HMI (human machine interface).

4. The Improvements for Measurement Efficiency

driver architecture of the HMI (human machine interface).

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In terms of hardware, different from the former distribution mode (Figure 13), the dual-core Electronics 2018, 7, x FOR PEER REVIEW 12 of 18 topology In uses the of IPC to configure the from wholethe system the VNAmode to acquire thethe data (Figure 14). terms hardware, different formerand distribution (Figureall 13), dual-core Taking theterms architecture ofthe thewhole modern VNA, advanced calibration and measurement topology uses IPCadvantage to configure system and the VNA to acquire all 13), the data (Figure 14). In of the hardware, different from the former distribution mode (Figure the dual-core Taking the advantage ofwhole the VNA, the advanced calibration and measurement method canuses bearchitecture easily integrated, and themodern test system isVNA remarkably simplified. The number of topology the IPC to configure the system and the to acquire all the data (Figure 14). method can bereduced easilyadvantage integrated, and the1)test system remarkably simplified. The number of Taking thecan architecture the modern theisfour advanced calibration and measurement instruments be from 10of(Figure to,VNA, at most, (Figure 15, the instruments surrounded instruments bebeintegrated, reduced from 10the (Figure 1) to, isatremarkably most, fourother (Figure 15,The the number instruments method can line becan easily and test communicates system simplified. of at the with a dotted can omitted). The VNA with instruments directly surroundedcan with areduced dotted line can10be(Figure omitted). TheatVNA communicates with other instruments instruments be from 1) to, most, four (Figure 15, the instruments hardware level, collects all the data together, and then sends them back to the IPC. Thus, we save directly at with the hardware collects all the data and then sends back to the IPC. surrounded a dotted level, line can be omitted). The together, VNA communicates withthem other instruments much time wasted by the communication between the IPC and each instrument, which improves the Thus, we save much time wasted by the communication between the IPC and each instrument, which directly at the hardware level, collects all the data together, and then sends them back to the IPC. efficiency and stability significantly. improves the efficiency and stability significantly. Thus, we save much time wasted by the communication between the IPC and each instrument, which improves the efficiency and stability significantly.

VNA VNA

DC DC

IPC IPC Control Flow Control Flow

Data Flow Data Flow

Other Instruments Other Figure 13. The former distribution mode.Instruments

Figure 13. The former distribution mode.

Figure 13. The former distribution mode.

VNA VNA

DC DC IPC IPC Control Flow Control Flow

Data Flow Data Flow

Other Instruments Other Figure 14. The dual-core topology. Instruments Figure 14. The dual-core topology.

Figureare 14.defined The dual-core In terms of software, the drivers at threetopology. levels: the main window, the functional window, and basic function driver. benefit of thislevels: architecture is that the main has In terms ofthe software, the drivers are The defined at three the main window, the program functional theterms virtue briefness. Each driver are does a simple and clear job, the is window, very convenient window, andofof the basic function driver. The benefit ofatthis architecture iswhich that the main program hasfor In software, the drivers defined three levels: main the functional the virtue Each driver a simpleofand job, which is very convenient for has the window, and of thebriefness. basic function driver.does The benefit this clear architecture is that the main program virtue of briefness. Each driver does a simple and clear job, which is very convenient for distributing

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development and reduces the collapse probability significantly. The software combines the high efficiency and flexibility of the C# the strong data storage and abilities of the distributing development andlanguage reduces theand collapse probability significantly. The processing software combines the high efficiency and flexibility of the C# language and the strong data storage and processing relational database. In this way, we can test different DUTs with high speed, and perform big data abilities of the relational database. In this way, we can test different DUTs with high speed, and statistical analysis and processing conveniently. perform big data statistical analysis and processing conveniently.

VNA

Oscilloscope

Display

Triggering Trig

Trace

Cursor

V Line

H Line

Ext

Int

Return Line

Instrument State

Video

Free Run

Mode

System

Local

Preset

Video

Save/ Recall

Seq

Cal

Edge

PW

Pattern

Acquire

Single

Input

1

Math

1

Disk Ejec t

2

3

2

3

Math

4

4

DMM

DC

On/ Off

Pulse Modulator AMP Can be omitted

RF Vd Vg Trg Control Monitor

Figure 15. The new all-in-one solution.

Figure 15. The new all-in-one solution. 5. All-in-One Solution and Measurement Results

5. All-in-One Based Solution Measurement Resultsin Section 3 and 4, we provide an all-in-one waferon theand improvement and optimization for MMIC automatic testing. Figures 16 and 17 show the whole system setup and its Basedlevel on solution the improvement and optimization in Sections 3 and 4, we provide an all-in-one software HMI. Figure 18 gives a photo of the system. Compared with the solution in Figure 1, the wafer-levelfully-upgraded solution forsystem MMIC automatic testing. Figures 16 and 17 and show the whole system setup has a much simpler structure and a more friendly intelligent HMI. After and its software HMI. Figure 18 gives a photo of the system. Compared with the solution in Figure 1, the accuracy and validity checking of the improved methods, we chose an X-band PA and LNA (their main indicators are shown in Table 6) fully evaluated before to inspect and verify the whole system. the fully-upgraded system has a much simpler structure and a more friendly and intelligent HMI. Figure 19 presents the screen of the VNA. Its six channels test the S-parameter, the gain compression, After the accuracy and validity checking of the improved methods, we chose an X-band PA and LNA the intermodulation distortion, the noise parameters, and the spectrum, respectively. In Tables 7 and 8, (their mainweindicators are in Table 6) and fully evaluated beforewith to inspect and verify compare the testshown coverage, accuracy, speed of our system the traditional one. Anthe whole system. Figure 19improvement presents the screen the VNA. Its six channels test the S-parameter, efficiency of 11 times isofachieved. In Figure 20, we exhibit partial windows of the test the gain result, andintermodulation the windows of the auto screeningthe and noise statistical analysis functions. Assisted by the HMI, compression, the distortion, parameters, and the spectrum, respectively. we can clearly comprehend all the parameter tendencies of each DUT varying with the frequency or In Tables 7 and 8, we compare the test coverage, accuracy, and speed of our system with the traditional input power, and obtain the statistical distribution of each parameter in the test batch. Meanwhile, one. An efficiency improvement of database 11 timesautomatically, is achieved. In ensures Figurethe 20,safety we exhibit partial all the test results are sent to the which and traceability of windows of the test the result, and the windows of the auto screening and statistical analysis functions. Assisted results and provides great convenience for further deep analysis. by the HMI, we can clearly comprehend all the parameter tendencies of each DUT varying with the Table 6. DUTs’ main indicators for verification. frequency or input power, and obtain the statistical distribution of each parameter in the test batch. Main Indicators Meanwhile, all the test results areDUT sent to the database automatically, which ensures the safety and X-band Frequency range traceability of the results and provides great convenience for>34dBm further deep analysis. POut PA

Gain

>25dB

Table 6. DUTs’ mainPAE indicators for verification. >47% DUT

PA

LNA

LNA

X-band Frequency range >26dB Gain Main Indicators VSWRIn/VSWROut 25dB >47%

Frequency range Gain VSWRIn /VSWROut NF

X-band >26dB 60 10 10