IEEE Transactions on Circuits and Systems I: Regular ...

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IEEE Transactions on Circuits and Systems I: Regular Papers Popular

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Popular Articles (September 2016) Browse the top 50 most frequently downloaded documents for this publication according to the usage statistics for the month of September 2016

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1. FET-R-C Circuits: A Unified Treatment—Part I: Signal Transfer Characteristics of a Single-Path Tetsuya Iizuka ; Asad A. Abidi Publication Year: 2016, Page(s):1325 - 1336 |

Abstract | PDF (2599 KB) |

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2. FET-R-C Circuits: A Unified Treatment—Part II: Extension to Multi-Paths, Noise Figure, and Driving-Point Impedance Tetsuya Iizuka ; Asad A. Abidi Publication Year: 2016, Page(s):1337 - 1348 |


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3. A 12-Bit 10 MS/s SAR ADC With High Linearity and EnergyEfficient Switching Shubin Liu ; Yi Shen ; Zhangming Zhu Publication Year: 2016, Page(s):1616 - 1627 |


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4. A Low Power Class-AB Audio Power Amplifier With Dynamic Transconductance Compensation in 55 nm CMOS Process Fang Tang ; Shiping Li ; Bo Wang ; Amine Bermak ; Xichuan Zhou ; Shengdong Hu Publication Year: 2016, Page(s):1360 - 1369 |


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5. An Efficient Switched-Capacitor DC-DC Buck Converter for Self-Powered Wearable Electronics Dima Kilani ; Mohammad Alhawari ; Baker Mohammad ; Hani Saleh ; Mohammed Ismail Publication Year: 2016, Page(s):1557 - 1566 |


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6. Frequency Response Mismatches in 4-channel TimeInterleaved ADCs: Analysis, Blind Identification, and Correction Simran Singh ; Lauri Anttila ; Michael Epp ; Wolfgang Schlecker ; Mikko Valkama Publication Year: 2015, Page(s):2268 - 2279 Cited by: Papers (3) |


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7. An Ultra-Wideband Digitally Programmable Power Amplifier With Efficiency Enhancement for Cellular and Emerging Wireless Communication Standards Lutfi Albasha ; Chris Clifton ; Yoshikatsu Jingu ; Alan Lawrenson ; Hideshi Motoyama ; Souheil Bensmida ; Kevin A. Morris ; Kazumasa Kohama Publication Year: 2016, Page(s):1579 - 1591 |


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8. A 0.45 V, Nano-Watt 0.033% Line Sensitivity MOSFET-Only Sub-Threshold Voltage Reference With no Amplifiers Zhangming Zhu ; Jin Hu ; Yutao Wang Publication Year: 2016, Page(s):1370 - 1380 |


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9. A 14-bit 250 MS/s IF Sampling Pipelined ADC in 180 nm CMOS Process Xuqiang Zheng ; Zhijun Wang ; Fule Li ; Feng Zhao ; Shigang Yue ; Chun Zhang ; Zhihua Wang Publication Year: 2016, Page(s):1381 - 1392 |


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10. A frequency compensation scheme for LDO voltage regulators C. K. Chava ; J. Silva-Martinez Publication Year: 2004, Page(s):1041 - 1050 Cited by: Papers (142) | Patents (6) |


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11. Optimized Active Single-Miller Capacitor Compensation With Inner Half-Feedforward Stage for Very High-Load ThreeStage OTAs Davide Marano ; Alfio Dario Grasso ; Gaetano Palumbo ; Salvatore Pennisi Publication Year: 2016, Page(s):1349 - 1359 |


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12. Analysis and Design of Wide-Band Millimeter-Wave Transformer-Based VCO and ILFDs Yue Chao ; Howard C. Luong Publication Year: 2016, Page(s):1416 - 1425 |


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13. The flipped voltage follower: a useful cell for low-voltage low-power circuit design R. G. Carvajal ; J. Ramirez-Angulo ; A. J. Lopez-Martin ; A. Torralba ; J. A. G. Galan ; A. Carlosena ; F. M. Chavero Publication Year: 2005, Page(s):1276 - 1291 Cited by: Papers (224) | Patents (2) |


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14. Small-Signal Modeling and Dynamic Analysis of a Novel ZVZCS Three-Level Converter S. Bai ; N. Huang ; A. Ioinovici Publication Year: 2006, Page(s):1958 - 1965 Cited by: Papers (8) |


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15. System Design for Direct RF-to-Digital

Receiver

Minh Tien Nguyen ; Chadi Jabbour ; Seyed Majid Homayouni ; David Duperray ; Pascal Triaire ; Van Tam Nguyen Publication Year: 2016, Page(s):1758 - 1770 |


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16. A Charge-Recycling Assist Technique for Reliable and Low Power SRAM Design Woong Choi ; Jongsun Park Publication Year: 2016, Page(s):1164 - 1175 |


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17. Testable MUTEX Design Yang Zhang ; Leandro S. Heck ; Matheus T. Moreira ; David Zar ; Melvin A. Breuer ; Ney L. V. Calazans ; Peter A. Beerel Publication Year: 2016, Page(s):1188 - 1199 |


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18. Analysis and Design of a Multi-Core Oscillator for UltraLow Phase Noise Seyed Amir-Reza Ahmadi-Mehr ; Massoud Tohidian ; Robert Bogdan Staszewski Publication Year: 2016, Page(s):529 - 539 |


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19. A 12-bit 210-MS/s 2-Times Interleaved Pipelined-SAR ADC With a Passive Residue Transfer Technique Chin-Yu Lin ; Tai-Cheng Lee Publication Year: 2016, Page(s):929 - 938 |


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20. Current-Based Resonant Power Delivery With Multi-Cycle Switching for Extended-Range Inductive Power Transmission Hesam Sadeghi Gougheri ; Mehdi Kiani Publication Year: 2016, Page(s):1543 - 1552 |


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21. Universal Current-Mode Control Schemes to Charge LiIon Batteries Under DC/PV Source Suvankar Biswas ; Lilly Huang ; Vaibhav Vaidya ; Krishnan Ravichandran ; Ned Mohan ; Sairaj V. Dhople Publication Year: 2016, Page(s):1531 - 1542 |


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22. System-Level Analysis of Far-Field Radio Frequency Power Delivery for mm-Sized Sensor Nodes Jayant Charthad ; Nemat Dolatsha ; Angad Rekhi ; Amin Arbabian Publication Year: 2016, Page(s):300 - 311 |


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23. Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey José M. de la Rosa Publication Year: 2011, Page(s):1 - 21 Cited by: Papers (82) | Patents (6) |


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24. Variable-Mirror Amplifier: A New Family of ProcessIndependent Class-AB Single-Stage OTAs for Low-Power SC Circuits Stepan Sutula ; Michele Dei ; Lluís Terés ; Francisco SerraGraells Publication Year: 2016, Page(s):1101 - 1110 |


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25. A Fractional-N DPLL With Calibration-Free Multi-Phase Injection-Locked TDC and Adaptive Single-Tone Spur Cancellation Scheme Cheng-Ru Ho ; Mike Shuo-Wei Chen Publication Year: 2016, Page(s):1111 - 1122 |


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26. An Embedded Passive Gain Technique for Asynchronous SAR ADC Achieving 10.2 ENOB 1.36-mW at 95-MS/s in 65 nm CMOS Jae-Won Nam ; Mike Shuo-Wei Chen Publication Year: 2016, Page(s):1628 - 1638 |


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27. An 8 b 700 MS/s 1 b/Cycle SAR ADC Using a Delay-Shift Technique Tsung-Han Tsai ; Hung-Yen Tai ; Pao-Yang Tsai ; Cheng-Hsueh Tsai ; Hsin-Shu Chen Publication Year: 2016, Page(s):683 - 692 |


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28. A 0.36 pJ/bit, 0.025 mm , 12.5 Gb/s Forwarded-Clock Receiver With a Stuck-Free Delay-Locked Loop and a Half-Bit Delay Line in 65-nm CMOS Technology Woorham Bae ; Gyu-Seob Jeong ; Kwanseo Park ; Sung-Yong Cho ; Yoonsoo Kim ; Deog-Kyoon Jeong Publication Year: 2016, Page(s):1393 - 1403 |


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29. Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures Pierluigi Nuzzo ; Fernando De Bernardinis ; Pierangelo Terreni ; Geert Van der Plas Publication Year: 2008, Page(s):1441 - 1454 Cited by: Papers (85) |


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30. 0.7-V Three-Stage Class-AB CMOS Operational Transconductance Amplifier Elena Cabrera-Bernal ; Salvatore Pennisi ; Alfio Dario Grasso ; Antonio Torralba ; Ramón Gonzalez Carvajal Publication Year: 2016, Page(s):1807 - 1815 |

Abstract | PDF (1781 KB)


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31. Full On-Chip CMOS Low-Dropout Voltage Regulator Robert J. Milliken ; Jose Silva-Martinez ; Edgar Sanchez-Sinencio Publication Year: 2007, Page(s):1879 - 1890 Cited by: Papers (205) | Patents (11) |


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32. A 30–75 2.5 GHz 0.13CMOS Receiver Front-End With Large Input Capacitance Tolerance for Short-Range Optical Communication Sagar Ray ; Mona Mostafa Hella Publication Year: 2016, Page(s):1404 - 1415 |


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33. A New Representation of FFT Algorithms Using Triangular Matrices Mario Garrido Publication Year: 2016, Page(s):1737 - 1745 |


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34. Ultra-High Density Monolithic 3-D FinFET SRAM With Enhanced Read Stability Debajit Bhattacharya ; Niraj K. Jha Publication Year: 2016, Page(s):1176 - 1187 |


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35. A 400 Mb/s∼∼2.5 Gb/s Referenceless CDR IC Using Intrinsic Frequency Detection Capability of Half-Rate Linear Phase Detector Sangjin Byun Publication Year: 2016, Page(s):1592 - 1604 |


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36. Parameter Identification of Chaotic and Hyper-Chaotic Systems Using Synchronization-Based Parameter Observer Zhihuan Chen ; Xiaohui Yuan ; Yanbin Yuan ; Herbert Ho-Ching Iu ; Tyrone Fernando Publication Year: 2016, Page(s):1464 - 1475 |


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37. A 5 GHz FractionalADC-Based Digital Phase-Locked Loops With −243.8 dB FOM Wei-Sung Chang ; Tai-Cheng Lee Publication Year: 2016, Page(s):1845 - 1853 |


38. A 70 mW 25 Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset With 40 dB of Equalization in 65 nm CMOS Technology Shuai Yuan ; Liji Wu ; Ziqiang Wang ; Xuqiang Zheng ; Chun Zhang ; Zhihua Wang Publication Year: 2016, Page(s):939 - 949 |


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39. On the Stability of Charge-Pump Phase-Locked Loops Aliakbar Homayoun ; Behzad Razavi Publication Year: 2016, Page(s):741 - 750


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40. Implementation of Memristive Neural Network With FullFunction Pavlov Associative Memory Xiaoyang Liu ; Zhigang Zeng ; Shiping Wen Publication Year: 2016, Page(s):1454 - 1463 |


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41. A Fully-Integrated Low-Dropout Regulator With FullSpectrum Power Supply Rejection Yan Lu ; Yipeng Wang ; Quan Pan ; Wing-Hung Ki ; C. Patrick Yue Publication Year: 2015, Page(s):707 - 716 Cited by: Papers (4) |


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42. A Systematic Study of ESD Protection Co-Design With High-Speed and High-Frequency ICs in 28 nm CMOS Fei Lu ; Rui Ma ; Zongyu Dong ; Li Wang ; Chen Zhang ; Chenkun Wang ; Qi Chen ; X. Shawn Wang ; Feilong Zhang ; Cheng Li ; He Tang ; Yuhua Cheng ; Albert Wang Publication Year: 2016, Page(s):1746 - 1757 |


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43. Theoretical Comparison of Direct-Sampling Versus Heterodyne RF Receivers Ramon Gomez Publication Year: 2016, Page(s):1276 - 1282 |


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44. Design of Adaptive Exponential Functional Link NetworkBased Nonlinear Filters Vinal Patel ; Vaibhav Gandhi ; Shashank Heda ; Nithin V. George Publication Year: 2016, Page(s):1434 - 1442 |


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45. A 300Audio Modulator With 100.5-dB DR Using Dynamic Bias Inverter Sangwoo Lee ; Woojin Jo ; Seungwoo Song ; Youngcheol Chae Publication Year: 2016, Page(s):1866 - 1875 |


46. An Automatic Gain Control System for ISFET Array Compensation Yuanqi Hu ; Pantelis Georgiou Publication Year: 2016, Page(s):1511 - 1520 |


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47. A SPICE Model of the Layered RRAM

Bi-

Firas Odai Hatem ; T. Nandha Kumar ; Haider A. F. Almurib Publication Year: 2016, Page(s):1487 - 1498 |


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48. Matching Properties of Femtofarad and Sub-Femtofarad MOM Capacitors Hesham Omran ; Hamzah Alahmadi ; Khaled N. Salama http://ieeexplore.ieee.org/xpl/topAccessedArticles.jsp?punumber=8919

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Publication Year: 2016, Page(s):763 - 772 |


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49. Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators M. Ortmanns ; F. Gerfers ; Y. Manoli Publication Year: 2004, Page(s):1088 - 1099 Cited by: Papers (59) | Patents (1) |


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50. An Inductive-Coupling Blocker Rejection Technique for Miniature RFID Tag Bo Zhao ; Nai-Chung Kuo ; Ali M. Niknejad Publication Year: 2016, Page(s):1305 - 1315 |


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Meet Our Editors

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

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Editor-in-Chief

Andreas Demosthenous Dept. Electronic & Electrical Engineering University College London London WC1E 7JE, UK

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