The 2010 International Power Electronics Conference
Model Predictive Control of Three-Phase Four-Leg Neutral-Point-Clamped Inverters Jose Rodriguez∗, Bin Wu† , Marco Rivera∗, Alan Wilson∗ , Venkata Yaramasu† and Christian Rojas∗ ∗ Universidad
Tecnica Federico Santa Maria, Department of Electronics Engineering, Valparaiso, Chile University, Department of Electrical and Computer Engineering, Toronto, Canada Email:
[email protected],
[email protected],
[email protected]
† Ryerson
Abstract— This paper presents a nite control set model predictive control strategy with a prediction horizon of one sample time to control the three-phase four-leg neutral-point-clamped (NPC) inverter with an output LC lter. The four-leg NPC converter is developed to deliver power to the unbalanced/nonlinear three-phase loads and it can produce three output voltages independently with one additional leg. The proposed predictive method uses the discrete model of the inverter and load to predict the future load and capacitor voltage behavior for each valid switching state of the converter. The control method chooses a state which generates minimum error between the output voltages and their references and as well as between the capacitor voltages. The feasibility of the proposed predictive control scheme is veried by computer simulations, showing a good performance and the capacity to compensate disturbances while maintaining balancing of the dc-link capacitor voltages.
I. I NTRODUCTION Recently, three-phase four-wire systems are selected by most utilities in North America as the medium voltage distribution systems [1]. Multilevel inverters are most suitable for such medium voltage, high power applications, because of many attractive features like high voltage capability, reduced common mode voltages, near sinusoidal outputs, low dv/dt’s and smaller or even no output lter. The conventional threeleg neutral-point-clamped (NPC) inverters are not suitable for three-phase four-wire systems with unbalanced/nonlinear loads because of the following reasons: (i) insufcient dc-link utilization (ii) high ripple on dc-link capacitors (iii) problem of dc-link capacitor voltages balance. The four-leg NPC is a promising topology compared to three-leg NPC in threephase four-wire systems and it offers full utilization of the dc-link voltage and lower stress on the dc-link capacitors [2]. Moreover, reliability of the system and the control of the neutral-point voltage during fault-free operation can be improved by using four-leg NPC inverter [3], [4]. A great variety of modulation methods available for this converter can be classied as, pulse width modulation (PWM) [3] - [7] and 3D space vector modulation (SVM) [2], [8]. In contrast to PWM, the complete utilization of the converter capacity to deliver output voltage can be achieved by using SVM. Predictive control is a class of controllers that have found recent application in power electronics [9]. This control appears as an attractive alternative to classical modulation methods, due to its fast dynamic response and simple concept. Since,
978-1-4244-5393-1/10/$26.00 ©2010 IEEE
power converters have a discrete nature, the application of predictive control constitutes a promising and better suited approach as compared to the standard schemes that use mean values of the variables. This technique utilizes a very intuitive control law to deal with the multivariable cases, treatment of the constraints, and compensation for the dead times [10]. Applications of the predictive control for two-level inverters are reported since 1980s [11], but nowadays it is possible to nd wide range of applications in the power electronics and machine control [12]. A great variety of control algorithms have been presented under the name of predictive control [9]. The nite control set model predictive control with a prediction horizon of one sample time is a simple and very exible control scheme that allows easy inclusion of the nonlinearities and constraints in the design of controller. Moreover, this scheme does not require internal current control loops and modulators. In this paper, a predictive control technique is proposed to control the output voltages and as well as the balancing of the capacitor voltages of four-leg NPC inverter, in an easy and intuitive manner. This control scheme uses the load and output LC lter model to predict future load voltage and capacitor voltage behavior for each valid switching state of the converter. This paper is organized as follows: in section II, mathematical model of the NPC converter and load is presented, followed by the explanation of the proposed control strategy in section III. In section IV, simulation results are presented, verifying the feasibility of the proposed method and nally in section V appropriate conclusions are drawn. II. T HREE -P HASE F OUR -L EG NPC I NVERTER T OPOLOGY The three-phase four-leg NPC inverter with output LC lter considered in this paper is shown in Fig. 1. This converter presents a connection format similar to the conventional threephase NPC converter, with an additional leg connected to the neutral point of the load. The voltage in any leg x of the NPC inverter, measured from the negative point of the dc-link (N ), is expressed in terms of switching signals as, vxN = vdc1 S1x + vdc2 S2x ,
x = u, v, w, f,
(1)
where vdc1 and vdc2 are the dc-link capacitor voltages, and ideally both the capacitors share equal voltages, i.e. vdc1 = vdc2 = vdc .
3112
(2)
The 2010 International Power Electronics Conference
P S1u
S1v
S1w
S1f
S2u
S2v
S2w
S2f
idc1
vdc1 Cdc1 0
u iu v w f
idc2 vdc2 Cdc2
S3u
S3w
S3v
S4u
Rf
Lf
S3f
S4w
S4v
Load
Output F ilter
iou
Cf
vo
vf N
S4f
N Fig. 1.
Three-phase four-leg NPC inverter topology.
TABLE I
corresponds to 0, 1 or −1. The RLC lter feeds RL load with a controlled voltage vo , irrespective of the current io consumed by the load. The load voltage vo , as a function of the lter parameters, inverter current i and differential NPC voltage v with respect to the negative dc-rail, is given by:
P OSSIBLE SWITCHING STATES OF THE FOUR - LEG NPC INVERTER . S1x 1 0 0
S2x 1 1 0
vxN 2vdc vdc 0
Lx 1 0 -1
di − Rf i. (11) dt The inverter current i as a function of the load current io and the output voltage vo , are dened as follows, vo = v − Lf
The switching signals of each leg of the converter can be represented as follows: S3x
= S1x ,
(3)
S4x
= S2x .
(4)
All the four legs of NPC converter provide three voltage levels (vdc , 0 and −vdc ) with respect to the midpoint of dc-link. The switching states to achieve these levels are summarized in the Table I. The four-leg NPC inverter has a total of 81 possible switching states. The nominal voltages of both capacitors are directly related to the current idc1 and idc2 as: � t 1 vdc1 (t) = vdc1 (0) + idc1 (τ ) dτ, (5) Cdc1 0+ � t 1 idc2 (τ ) dτ, (6) vdc2 (t) = vdc2 (0) + Cdc2 0+ where Cdc1 and Cdc2 are the dc-link capacitors. Moreover, these capacitor currents are directly related to the three-phase currents (iu , iv and iw ), and the voltage levels of the four-leg NPC as follows, idc1
=
Ku iu + Kv iv + Kw iw ,
(7)
idc2
=
Qu iu + Qv iv + Qw iw ,
(8)
where Kx and Qx depend on the voltage levels, such that: Kx
=
sign{Ln − 1} − sign{Lx − 1},
(9)
Qx
=
sign{Ln + 1} − sign{Lx + 1},
(10)
where Ln and Lx corresponds to the neutral and phase-levels respectively, and sign is the argument sign, whose value
dvo . (12) dt The system in Eq. (11) and Eq. (12) can be represented in state variable form as: � � � � � � v˙ o vo v = A + B , (13) ˙i i io i = io + Cf
where, �
0 A= −1/Lf
� � 0 1/Cf , B= −Rf /Lf 1/Lf
� −1/Cf . (14) 0
III. P ROPOSED P REDICTIVE C ONTROL S CHEME A. Control Strategy The predictive control scheme is shown in Fig. 2. The algorithm calculates all the 81 possible conditions that the state variables can achieve during the future sample k+1. The control strategy chooses a switching state in the sampling instant k, which minimizes the cost function in the k+1 sampling instant. The system applies this switching state during the whole k+1 sampling period. B. Cost Function As shown below, the cost function considered in this paper has two objectives: the minimization of the error between the predicted output voltages vo [k +1] and their references vo∗ [k + 1], and the balance of the dc-link capacitor voltages. These
3113
The 2010 International Power Electronics Conference
TABLE II
Load
RLC Filter
dc-Link 4-Leg NPC
VALUES USED IN THE F OUR - LEG NPC I NVERTER AND L OAD .
io [k]
i[k] u, v, w vdc [k]
vo [k] f 8
vo [k + 1] 81
vo∗ [k
+ 1]
vdc [k + 1] Predictions of vo and vdc , using (18), (19) and (24)
Fig. 2.
vdc [k] vo [k] io [k] i[k]
V alues
vdc Cdc An fn
dc-link voltage dc-link capacitor dc-link noise amplitude dc-link noise frequency
300 [V ] 1000 [μF ] 0.01 [V ] 100 [Hz]
Lf Rf Cf
Filter inductor Filter resistor Filter capacitor
2 [mH] 0.05 [Ω] 80 [μF ]
RL LL fref Aref
Load resistance Load inductance Output reference frequency Output reference amplitude
20 [Ω] 10 [mH] 60 [Hz] 280 [V ]
Ts ρ ρ
Sampling time Weighting factor (linear load) Weighting factor (non-linear load)
20 [μs] 0.15 0.3
Block diagram of predictive control scheme for the 4-leg NPC.
two control objectives are represented, with the following equations g
=
g1 + g2
(15)
g1 g2
= =
||vo [k + 1]∗ − vo [k + 1]||1 , ρ|vdc1 [k + 1] − vdc2 [k + 1]|,
(16) (17)
where ρ is a weighting factor, which can be adjusted according to the desired performance. The switching state that minimizes the cost function is chosen and then applied at the next sampling instant. Additional constraints such as switching frequency reduction, current limitation and spectrum shaping can be included just by adding those conditions in the cost function. C. Predictive Models As shown in Fig. 2, the cost function requires predicted output voltages (vo [k+1]) and the capacitor voltages (vdc1 [k+ 1] and vdc2 [k + 1]) in discrete-time form. For this reason, the system in (13) is represented in the discrete-time form as follows: � � � � � � v [k] v[k] vo [k + 1] , (18) =Φ o +Γ i[k + 1] i[k] io [k] where
Description
S[k]
Minimization of cost function g with (15), (16) and (17) 81
V ariables
Φ = eTs A ,
Γ = A−1 (Φ − I)B,
(19)
and where the voltage and current vectors are dened as: � �T v = vuN − vf N vvN − vf N vwN − vf N , (20) �T � io = iou iov iow , (21) �T � (22) i = iu iv iw , �T � (23) vo = vou vov vow .
The capacitor voltages can be represented in discrete-time form as: Ts vdc [k + 1] = vdc [k] + idc[k], (24) Cdc
where Ts is the sampling time, and Cdc is the dc-link capacitor. The dc-link current and voltage vectors are represented as follows: � �T (25) idc = idc1 idc2 , �T � vdc = vdc1 vdc2 , (26)
where the dc-link current are calculated using equations (7), (8), (9) and (10). IV. S IMULATION R ESULTS
To validate the proposed control method, a simulation model of a three-phase four-leg NPC inverter with the parameters as indicated in Table II has been developed with a sample time of Ts = 20[μs] and a three-phase resistance as a output load. As shown in Fig. 3, a step change in the load resistance in phases u and w, of 2 p.u. and 2/3 p.u. respectively, has been applied at t =0.15[s], without any alterations in the controller (no information of the change in parameters is provided to the controller). The neutral current if whose value corresponds to the sum of three-phase currents is shown in Fig. 3d, while Fig. 3a shows the output voltage, which is not distorted, even in the load step. The balancing of the capacitor voltages (vdc1 and vdc2 ) is shown in the Fig. 3c, where the difference between the capacitor voltages is almost negligible (8 [V]), even with the sinusoidal dc-link disturbance, and the unbalanced load with neutral currents. A more detailed behavior of the output voltage is shown in g. 4, where the load step does not affect the voltage output. This gure also shows a good reference tracking with the proposed model predictive control strategy. Fig. 6 shows the behavior of the system, applying, in t =0.15[s], a connection step change of a non-linear load, which consist of a diode rectier connected to a RL load, as shown in Fig. 6, where the neutral leg is connected directly to the negative terminal of the load. In this case, the weight factor ρ of the cost function is modied for a better performance in the output voltage and the dc-link balance. The load current is
3114
The 2010 International Power Electronics Conference
io [A]
20
iou iov iow
10 0 í10 í20 0.11
0.12
0.13
0.14
0.15
0.16
0.17
0.18
0.19
(a) 400
vou vov vow
vo [V ]
200 0 í200 í400 0.11
0.12
0.13
0.14
0.15
(b)
0.16
0.17
0.18
0.19
vdc [V ]
305 300
vdc1 vdc2
295 0.11
0.12
0.13
0.14
0.15
0.16
0.17
0.18
0.19
0.16
0.17
0.18
0.19
(c) 20
iof [A]
10 0 í10 í20 0.11
0.12
0.13
0.14
0.15
t [s] (d)
Fig. 3. Simulation results for the predictive control of four-leg NPC inverter: (a) output currents; (b) output voltages; (c) dc-link voltages; (d) neutral output current.
∗ vow vowp vow
vow [V ]
í235
í240
í245 149.9 149.92 149.94 149.96 149.98
150
t [s]
150.02 150.04 150.06 150.08 150.1
Fig. 4. Simulation results for the predictive output voltage control of the four-leg NPC inverter, showing the voltage reference, prediction output in the phase c.
u v w RL LL n Fig. 5.
shown in Fig. 6a, whose waveforms have a continuous component, due to the rectication effect, while Fig 6a shows the output voltage, noting that there is not appreciable disturbance in the connection step. The balancing of the capacitor voltages (vdc1 and vdc2 ) is shown in the Fig. 6c, where the voltage difference is very small, even with the neutral current shown in Fig. 6d, which has a notorious continuous component.
Topology of the non-linear load used in the simulation.
V. C ONCLUSION A nite control set model predictive control strategy with a prediction horizon of one sample time has been proposed in this paper to control the three-phase four-leg NPC inverter with an output LC lter. The control algorithm tests each of the 81 possible switching states and then chooses a switching state that minimizes the cost function. The ideal minimum of the cost function is zero and represents the perfect regulation of the output voltages with the balancing of the capacitor voltages. With the predictive control, (a) balancing of the dclink capacitor voltages and (b) tracking of the output line voltage to its reference with less error has been achieved under the balanced and un-balanced load conditions.
3115
The 2010 International Power Electronics Conference
io [A]
15
iou iov iow
10 5
R EFERENCES
0 0.145
0.15
0.155
0.16
0.165
(a)
0.17
0.175
0.18
0.185
vo [V ]
500
0.19
vou vov vow
0
í500
0.145
0.15
0.155
0.16
0.165
(b)
0.17
0.175
0.18
0.185
0.19
vdc [V ]
305 300
vdc1 vdc2
295 0.145
0.15
0.155
0.16
0.165
(c)
0.17
0.175
0.18
0.185
0.19
iof [A]
15 10 5 0
(NSERC) through Wind Energy Strategic Network (WESNet) Theme III.
0.145
0.15
0.155
0.16
0.165
t [s]
0.17
0.175
0.18
0.185
0.19
(d) Fig. 6. Simulation results for the predictive control of four-leg NPC inverter using a nonlinear load: (a) output currents; (b) output voltages; (c) dc-link voltages; (d) neutral output current.
ACKNOWLEDGMENT The authors wish to thank the nancial support from the Chilean Fund for Scientic and Technological Development FONDECYT through project 1080059 and from the Natural Sciences and Engineering Research Council of Canada
[1] Ning-Yi Dai, Man-Chung Wong, Fan Ng, Ying-Duo Han, A FPGA-Based Generalized Pulse Width Modulator for Three-Leg Center-Split and FourLeg Voltage Source Inverters, IEEE Trans. on Pow. Electronics, vol. 23, no 3, May. 2008, pp. 1472-1484. [2] Yao J., Green T., Three-Dimensional Space Vector Modulation for a FourLeg Three-Level Inverter, IEEE European Conf. on Pow. Electronics and Applications, Sep. 2005, Dresden, Germany. [3] Ceballos S., Pou J., Robles E., Zaragoza J., Ibanez P., Martin J.L., FaultTolerant Hybrid Four-Leg Multilevel Converter, IEEE European Conf. on Pow. Electronics and Applications, Sep. 2007, Aalborg, Denmark. [4] Ceballos S., Pou J., Zaragoza J., Martin J.L., Robles E., Gabiola I., Ibanez P., Efcient Modulation Technique for a Four-Leg Fault-Tolerant NeutralPoint-Clamped Inverter, IEEE Tran. on Ind Electronics, vol. 55, no. 3, Mar. 2008, pp. 1067-1074. [5] Wong M., Tang J., Han Y., Cylindrical Coordinate Control of ThreeDimensional PWM Technique in Three-Phase Four-Wire Trilevel Inverter, IEEE Tran. on Pow. Electronics, vol. 18, no. 1, Jan. 2003, pp. 208-220. [6] Yang X., Zhang Y., Zhong Y., Three-Phase Four-Wire DSTATCOM based on a Three-Dimensional PWM Algorithm, IEEE Conf. on Electric Utility Deregulation and Restructuring and Power Technologies DRPT 2008, Apr. 2008, Nanjing, China. [7] Kim J., Sul S., Enjeti P., A Carrier-Based PWM Method with optimal Switching Sequence for a Multilevel Four-Leg Voltage-Source Inverter, IEEE Tran. on Ind. Applications, vol. 44, no. 4, Jul.-Aug. 2008, pp. 12391248. [8] Dai N., Wong M., Han Y., Application of a Three-level NPC Inverter as a Three-Phase Four-Wire Power Quality Compensator by Generalized 3DSVM, IEEE Tran. on Pow. Electronics, vol. 21, no. 2, Mar. 2006, pp. 440-449. [9] Cortes P., Kazmierkowski M., Kennel R., Quevedo D., Rodriguez J., Predictive Control in power electronics and drives, IEEE Trans. on Industrial Electronics, vol. 55, no. 12, pp. 4312-4324, Dec. 2008. [10] Rodriguez J., Pontt J., Silva C., Correa P., Lezana P., Cortes P., Ammann U., Predictive Current Control of a Voltage Source Inverter, IEEE Trans. on Industrial Electronics, vol. 54, pp. 495-503, Feb. 2007. [11] Wrslin R., Pulsumrichtergespeiste synchronmaschinen Antrieb mit hoher Taktfrequenz und sehr groem Feldschwchbereich, Dissertation Universitt Stuttgart, 1984. [12] Kouro S., Cortes P., Vargas R., Amman U., Rodriguez J., Model Predictive Control - A Simple and Powerful Method to Control Power Converters, IEEE Trans. on Industrial Electronics, vol. 56, issue 6, Jun. 2009, pp 1826-1838.
3116