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Modeling and Digital Predistortion of Class-D Outphasing RF Power Amplifiers Per N. Landin, Student Member, IEEE, Jonas Fritzin, Student Member, IEEE, Wendy Van Moer, Senior Member, IEEE, Magnus Isaksson, Member, IEEE, and Atila Alvandpour, Senior Member, IEEE
Abstract—This paper presents a direct model structure for describing class-D outphasing power amplifiers (PAs) and a method for digitally predistorting these amplifiers. The direct model structure is based on modeling differences in gain and delay, nonlinear interactions between the two paths and differences in the amplifier behavior. The digital predistortion method is designed to operate only on the input signals’ phases, to correct for both amplitude and phase mismatches. This eliminates the need for additional voltage supplies to compensate for gain mismatch. Model and predistortion performance are evaluated on a 32 dBm peak output power, class-D outphasing PA in CMOS with on-chip transformers. The excitation signal is a 5 MHz downlink WCDMA signal with peak-to-average power ratio (PAPR) of 9.5 dB. Using the proposed digital predistorter, the 5 MHz adjacent channel leakage power ratio (ACLR) was improved by 13.5 dB, from -32.1 dBc to -45.6 dBc. The 10 MHz ACLR was improved by 6.4 dB, from -44.3 dBc to -50.7 dBc, making the amplifier pass the 3GPP ACLR requirements. Index Terms—Power amplifiers, behavioral modeling, digital predistortion, outphasing amplifier, LINC
I. I NTRODUCTION FFICIENT and linear amplification of amplitude modulated high frequency signals still poses a major problem in modern wireless transmitters. An amplifier structure that aims at increasing efficiency while maintaining linearity is the outphasing amplifier [1], [2]. The outphasing amplifier is based on separately amplifying two purely phase modulated signals using efficient amplifiers, such as switching amplifiers, and then combining these two signals to restore the original amplitude and phase modulated signal. In recent years, the interest in the outphasing amplifier architecture and its’ potential for high efficiency operation
E
This work was supported by the Swedish Research Council (VR), the Excellence Center at Linköping-Lund in Information Technology (ELLIIT), Ericsson Research, Kista, Sweden, a postdoctoral fellowship of the Research Foundation Flanders (FWO), the Flemish Government (METH1), and a grant from the LM Ericsson Research Foundation. P. N. Landin, W. Van Moer and M. Isaksson are with the Department of Electronics, Mathematics and Natural Sciences, University of Gävle, Sweden. P. N. Landin is also with the Statistical Signal Processing Lab, ACCESS Linneaus Center, KTH Royal Institute of Technology. P. N. Landin and W. Van Moer are with the Department ELEC, Vrije Universiteit Brussel, Belgium. Phone: +46-26-648578, e-mail:
[email protected] J. Fritzin was with the Department of Electrical Engineering, Linköping University, Linköping, Sweden. He is now with Ericsson AB, Stockholm, Sweden. E-mail:
[email protected] A. Alvandpour is with the Department of Electrical Engineering, Linköping University, Linköping, Sweden. E-mail:
[email protected]
has resulted in many new techniques to further improve the power efficiency. Outphasing power amplifiers (PAs) using class-D amplifiers have been implemented and tested in [3]– [7]. These have all evaluated the performance on uplinklike signals when considering telecommunication standards or wireless local area network (WLAN). Methods to improve the efficiency in back-off have been proposed by dynamic power control implemented by turning off amplifier stages [5], more efficient combining network topologies [8], [9], multilevel and multimode techniques [10], [11] and power recycling techniques [12], [13]. Ideally, the outphasing amplifier should provide linear amplification. However, in practice outphasing amplifiers experience mismatch in gain and phase [14], different behavior in the two amplifiers [14], finite bandwidth [15] and interactions between the branches [16]. Analysis of these sources generating nonlinear distortions was done in [14]–[20]. Nonlinear distortion in outphasing amplifiers arising from non-ideal switching in class-D amplifiers was analyzed in [6]. Corrections for these sources of nonlinear distortions have been proposed earlier by adjusting the amplitudes and/or phases of the input signals [17]–[24]. In the case of phase-only predistortion, the predistorters did consider Chireix combiners [17], but without amplitude mismatch. In this paper, the focus is on analyzing and correcting the undesired behavior of outphasing amplifiers using baseband processing techniques. This is done to make the outphasing amplifier pass regulatory requirements on linearity measures, such as adjacent channel leakage power ratio (ACLR). In a first step, a new black-box behavioral model describing the relationship between the input and output signals is derived. The proposed model includes all the previously mentioned sources of nonlinear behavior except for the bandwidth limitation in [15]. However, the model can be extended to include this behavior as well. A black-box model using a similar basic idea was proposed in [3], but it operated on the phase of the outphasing signals, and was evaluated on a low-power PA for user equipment signals with lower peak-toaverage-power ratio (PAPR) ~3 dB. In this paper, the model is based on the amplitude, and it also takes timing distortions into account. The results are evaluated for more demanding base-station signals with PAPR ~10 dB and more stringent ACLR requirements. Once the direct model is identified, the predistorter parameters are searched for by putting the predistorter in front of the model and performing a search for the predistorter parameters. Using a direct model to numerically identify the predistorter
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is not a novel idea, but to the authors’ best knowledge, it has not been used for the direct model or the predistorter model as proposed in this paper. The predistortion method has not been implemented in hardware, but is applicable at the baseband level. The goal is to find suitable models to describe the amplifier and predistorters for class-D outphasing PAs, compensating amplitude and gain mismatches without requiring a second voltage supply to compensate the amplitude mismatch. The performance of the proposed predistorter is experimentally evaluated on a 32 dBm peak output power CMOS classD outphasing PA [4]. This peak power is the highest reported for all class-D RF PAs [4]. Class-D amplifiers necessitates the use of phase-only predistortion to compensate both amplitude and phase mismatches, due to the constant envelope output of the class-D stages, unlike previously proposed predistorters. The earlier proposed predistorters change the input signal amplitude when linear amplifiers are used [18], [21], [22], or include adjustments of the voltage through the use of multiple voltage supplies in the output stage [23], [24] to compensate for the gain mismatch. Using the method proposed in this paper, only a single voltage supply is necessary. Due to the nonlinear nature of the models, the extraction of the model and the predistortion parameters becomes a nonlinear problem. Methods for deriving parameter values used to initiate the search for both direct model and predistorter parameters are proposed. In short, the contributions of the paper are: i) the derivation of a black-box model for outphasing amplifier behavior, ii) a phase-only predistortion method that compensates both amplitude and phase mismatches, and iii) proposing initial values for starting the parameter search. The paper starts by introducing the concept of the outphasing amplifier in Section II in order to motivate the choices of direct model and predistorter structures. A behavioral model for outphasing amplifier structures is given in Section III. A digital predistortion model is proposed in Section IV. Methods for estimating the initial parameters of both behavioral model and digital predistorter are given in Section V. The measurement setup and outphasing amplifier used to obtain data for modeling and predistortion are described in Section VI. Results from the modeling and predistortion are presented in Section VII. II. T HE O UTPHASING A MPLIFIER The signals considered here are sampled complex valued baseband signals s(tn ) = A(tn )ejφ(tn )
(1)
with A(tn ) being the amplitude modulation and φ(tn ) the phase modulation. tn = Tns is the sampling instant for sample n using a sampling rate of T1s . The baseband signal s(t) can be decomposed as the sum of two amplitude envelope constant signals by writing [25] s1 (t) = s(t) + e(t) = Amax ej(φ(t)+Θ(t))
(2)
Q e(t)
s(t) −e(t)
s1 (t)
φ(t) Θ(t)
−Θ(t) s2 (t) I
Fig. 1. Geometric explanation behind the construction of the outphasing signals. Θ(t) is the outphasing angle, φ(t) is the angle of the original signal s(t). e(t) is the component from (2) and (3) used to create the constant envelope amplitude signals s1 (t) and s2 (t).
Fig. 2. Illustration of the outphasing amplification concept. The dotted box represents parts that are considered to belong to the outphasing amplifier: the two amplifiers A1 and A2 and the combiner. The signal component separator (SCS) applies the transformation of the expressions in (2) and (3) to s(t), creating the envelope envelope amplitude constant signals s1 (t) and s2 (t). These signals are amplified by the (non)linear amplifiers A1 and A2, and finally combined into the output signal y(t).
and s2 (t) = s(t) − e(t) = Amax ej(φ(t)−Θ(t))
(3)
where Amax is the maximum value of the amplitude A(t), Θ(t) is the outphasing angle, φ(t) is the phase modulation from (1) and 2s(t) = s1 (t) + s2 (t). The signal e(t) is constructed as s A2max e(t) = js(t) −1 (4) A2 (t) This is illustrated in Fig. 1. It should be noted that the signal e(t) has wider bandwidth than the original signal s(t) and extends into the adjacent channels. Any imbalance between branches will make the e(t) distort the output spectrum and degrade ACLR. The transformation from s(t) to s1 (t) and s2 (t) is the function of the signal component separator (SCS) in Fig. 2. The operation of the outphasing amplifier is illustrated in Fig. 2. The outphasing amplifier is considered to consist of the two amplifiers A1 and A2 and the combiner. In Fig. 2 the outphasing amplifier and the SCS are illustrated in baseband form. The baseband signals s1 and s2 are modulated onto a
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carrier and input to the outphasing amplifier. The output signal is then measured and transformed back to low-pass equivalent form. However, as the direct model and predistorter operate on baseband signals that perspective is kept throughout this paper. The lowest amplitude the output signal can reach is limited by the difference between the two output power levels in the two amplifiers [3]. A measure of the maximum to minimum ratio of an output signal is given by the dynamic range |G1 + G2 | DR = 20 log10 (5) |G1 − G2 | where G1 and G2 are the static gains of paths 1 and 2, respectively. The static gain in relation to the models is further discussed in the next section. The influence of limited dynamic range was analyzed in [14]. III. B EHAVIORAL M ODEL In outphasing amplifiers, nonlinear distortions are caused by different delays, gains, nonlinear behavior of the two amplifiers, A1 and A2 [14], nonlinear interactions between the two paths [16], memory effects due to heating [21], and bandwidth limitations in the signal generation and/or amplifier matching networks [15]. No low-frequency memory effects from heating, or high-frequency memory effects due to frequency dependence of the amplifier, in the form of dependency on previous input (or output) samples, are used in this work. The structure of the amplifier should be reflected in the model. Thus, the output is modeled as a sum of two different functions, y1 (s(tn ); θ1 ) and y2 (s(tn ); θ2 ) ymod (tn ; θ) = y1 (s(tn ); θ1 ) + y2 (s(tn ); θ2 )
(6)
with θ = [θ1T θ2T ]T being the model parameters. The functions y1 (s(tn ); θ1 ) and y2 (s(tn ); θ2 ) are chosen as complex exponential functions with separate gain functions g1 (s(tn ); η1 ) and g2 (s(tn ); η2 ). These gain functions are introduced with reference to the nonlinear interactions between the amplifiers [16]. Hence, the model is formulated as ymod (tn ; θ) =g1 (s(tn ); η1 )ejp1 (s(tn );λ1 ) s1 (tn )+ g2 (s(tn ); η2 )ejp2 (s(tn );λ2 ) s2 (tn )
(7)
η1 and η2 are the parameters of the gain functions g1 and g2 respectively, while λ1 and λ2 are the parameters for the phase distortion functions of path 1 respectively 2. The functions g1 and g2 should each be chosen such that they have one component that is independent of the signal. This is the static gain termed G1 and G2 , respectively, in (5). In the present work, the amplifiers A1 and A2 are class-D amplifiers, which means that they operate as switches, i.e. the output is tied to either VDD or ground. Ideally, such stages can be considered ideal voltage sources whose output voltages are independent of the load [26]. The amplifier used for experimental verifications uses four transformers as combiners [4], i.e. there is no isolation between the paths. The envelope of class-D stages is constant which means that the input amplitude cannot be changed
in order to change the envelope amplitude. As the signal combining process using four on-chip transformers is not ideal, there will be gain mismatches between the amplifier stages. There, the gain mismatches creates both amplitude and phase distortion. Additionally, the class-D stages can contribute with nonlinear behavior due to non-ideal operation [6]. Since no sufficiently accurate trigger is available, the sampled output signal y(tn ) cannot be used directly for modeling purposes. Initial estimates are provided using a crosscorrelation method followed by a phase interpolation, see Section VI for details. This corresponds to having one time offset between the two input signals and the output signal. However, there is also the possibility of having different delays in the two amplifier paths [14], meaning that an additional relative delay between the paths should be included. Together this makes the use of two separate delay terms necessary: one to describe the difference in runtime between the paths and one to describe the total offset between the input signals and the output signal. This can be written as y(tn ) = y1 [s(tn − ∆1 )] + y2 [s(tn − ∆2 )]
(8)
with ∆1 , ∆2 being the time offsets. y1 [s(tn )] and y2 [s(tn )] are the low-pass equivalent output signals of the amplifiers A1 and A2, respectively. For theoretical applications, one offset can be removed because the input-output synchronization is a measurement related problem. Nevertheless, both terms should be considered in a practical implementation, unless there is a guarantee that no mismatch in delay exists. Putting all of the above together gives the modeled output signal ymod (tn ; θ) =
(9)
g1 (s(tn − ∆1 ); η1 )e
jp1 (s(tn −∆1 ); λ1 )
s1 (tn − ∆1 )+
g2 (s(tn − ∆2 ); η2 )e
jp2 (s(tn −∆2 ); λ2 )
s2 (tn − ∆2 )
with θ = [η1T η2T λT1 λT2 ∆1 ∆2 ]T as the model parameter vector. ηi are the parameters of the gain functions gi , λi the parameters of the phase distortion functions pi and ∆i is the timing mismatch for path i, where i ∈ {1, 2}. A normalization of the measured output signal y(tn ) is used by setting the maximum amplitude of s(tn ) to have the same maximum amplitude as that of y(tn ). This choice is made because there is no combination of s1 (tn ) and s2 (tn ) that can give a larger amplitude than this. The exact forms of the functions gi and pi have so far not been specified. These can be chosen as arbitrary functions of the input signal s(tn ). Here, they are chosen as polynomials in the input amplitude, i.e. pi (s(tn ); ηi ) =
K X
|s(tn )|k ηi (k)
(10)
k=0
for the phase distortion of path i, and similar for the gain function gi . With this choice the static gains G1 and G2 are given by η1 (0) and η2 (0), respectively. With the used expressions memory can be included by introducing a dependency on previous input samples, similar to a memory polynomial structure.
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Behavioral models of RF PAs normally consider single-RFinput systems, such as traditional class-AB, class-B and singleinput Doherty PAs, see [27]–[29] and the references therein. Models for multi-input RF PAs have considered envelopeelimination and restoration (EER), envelope tracking (ET) and dynamic load modulation transmitters [30], [31], although in principle similar methods could be used for outphasing amplifiers. In [3] a model similar to the one proposed in this paper was used. That model used the outphasing phase as input signal and could not model any gain variation. IV. D IGITAL P REDISTORTION Ideally, the outphasing amplifier is perfectly linear, i.e. the outphasing amplifier should take an input signal and deliver a linearly amplified version at the output of the PA. Considering published outphasing PAs they typically do not need digital predistortion for uplink/terminal applications [4]– [7], [32]. However, basestation signals with larger peak-toaverage power ratio, i.e. larger phase variations, and more strict linearity requirements are used in the measurements, therefore digital predistortion is needed to make the output signal from the outphasing amplifier pass regulatory requirements such as spectral mask and ACLR limits [33]. To the authors’ best knowledge, this is the first class-D outphasing PA demonstrating sufficient linearity for base station signals. Due to the use of class-D amplifiers the input amplitudes must be kept constant, i.e. no predistorter functions changing the amplitudes of the input signals are allowed. The different gain factors limit the achievable dynamic range [19]. However, within this dynamic range the outphasing amplifier can reach all amplitudes by changing the phases of the two input outphasing signals. By changing only the phases, the need for additional voltage supplies, when eliminating the gain mismatch via the supplies, is avoided [23], [24]. Using phase-only predistortion functions leaves one natural choice for the predistorted signals: complex exponential functions as s1, DPD (s(tn ); θ, γ1 ) = ejr1, DPD (s(tn ); θ, γ1 ) s1 (tn )
V. PARAMETER E STIMATION This section introduces the numerical goals of the direct model and the predistorter in terms of error criteria that are to be minimized. The search for the parameters starts with the parameters of the direct model as these are needed to find the parameters of the predistorter.
(11) A. Direct Model
for path 1 and s2, DPD (s(tn ); θ, γ2 ) = ejr2, DPD (s(tn ); θ, γ2 ) s2 (tn )
(12)
for path 2. γ1 and γ2 are the predistorter parameters for paths 1 and 2 respectively, and r1, DPD , r2, DPD are the phasepredistortion functions. θ are the direct model parameters as in (9). The adopted form for the phase distortion functions ri are also polynomials in the input envelope amplitude |s(tn )|, i.e. ri (s(tn ); θ, γi ) =
linear amplifier. Finding the parameters γ1 and γ2 of the predistorter is done by using the direct model to model the predistorted output signal. An error criterion based on the difference between the input signal and a scaled version of the output signal is used to reach the goal of a linearly behaving outphasing amplifier. The search for the predistorter parameters is explained in detail in Section V. A phase-only predistortion model for Chireix combiners was proposed in [17], but did not consider amplitude mismatch or other combiner architectures. The predistorter proposed in this paper is applicable to all combiner architectures, and additionally handles differences in gain, path delay and nonlinear characteristics. However, this flexibility comes at the cost of a computationally more expensive parameter identification method. In [34] a predistortion was implemented by comparing the input and output samples to create a memory-less predistorter for a high-power GaN mixed-mode outphasing PA. Other implementations of predistorters have used the physical approach of considering gain- and phase-imbalance [21]–[23], [35]. The predistorter that was proposed in [3] shares the general structure with the predistorter proposed here, although it operates on the outphasing angle and it lacks initial value estimates. If both output signals y1 (t) and y2 (t) were available, one could view the system as a 2-input, 2-output system with crossterms describing the influence of one amplifier on the other. However, that is not the case as we only have access to the sum of these signals in the form of y(t). Thus, the predistorter must be found using only the measured output signal y(tn ).
κ X
|s(tn )|k γi (k)
(13)
k=0
with κ being the order. Also, it is possible to include dependency on previous input samples in the form of a memory polynomial if desired. By using the predistorted signals s1, DPD (tn ) and s2, DPD (tn ) as input signals instead of s1 (tn ) and s2 (tn ), the idea is to make the predistorted outphasing amplifier behave as a
The direct model should describe the relationship the input and output signals with as low model possible. This requirement is translated as an error that is to be minimized. The sum-square error given VN (θ) =
N −1 X n=0
|ǫ(tn )|2 =
N −1 X
between error as measure by
|y(tn ) − ymod (tn ; θ)|2
(14)
n=0
is used. Here, ǫ(tn ) is the difference between the modeled output ymod (tn ; θ) and the measured output y(tn ). The task is now to find the parameters θ that minimizes (14). This is a nontrivial task as the model is nonlinear in at least some of the parameters: the delays ∆1 , ∆2 and the parameters λ1 , λ2 of the phase polynomials. Depending on which functions are used for g1 (s; η1 ) and g2 (s; η2 ), the problem can be linear or nonlinear in these parameters. Initial estimates for the parameters η1 and η2 in the gain functions g1 (s(tn ); η1 ) and g2 (s(tn ); η2 ) are obtained by
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assuming that the phase distortion is 0 in a first step. That is, find η = [η1T η2T ]T such that VN (η) = =
N −1 X
n=0 N −1 X
|y(tn ) − ymod (tn ; η)|
2
|y(tn ) − (g1 (s(tn ); η1 )s1 (tn )
(15)
n=0
+g2 (s(tn ); η2 )s2 (tn ))|
2
is minimized. If g1 (s(tn ); η1 ) and g2 (s(tn ); η2 ) are linear in the parameters this problem is a linear least-squares problem. As an example, consider the case when g1 and g2 are constants, then the minimization of (15) is equivalent to solving the system of linear equations given by g1 y = [s1 s2 ] (16) g2 where y, s1 and s2 are the samples of y(tn ), s1 (tn ) and s2 (tn ) stacked into column vectors. Given the estimates η1 and η2 above, one can form estimates of the output signals y1 (s(tn )) from amplifier A1 and y2 (s(tn )) from amplifier A2. Recall that the output signal y(tn ) is the sum of y1 (s(tn )) and y2 (s(tn )) as y(tn ) = y1 (s(tn )) + y2 (s(tn )) + ǫ(tn ) =
with ǫ(tn ) being the model error. Approximate the signals y1 (s(tn )) and y2 (s(tn )) with yb1 (s(tn )) = s1 (tn ) g1 (s(tn ); η1 )
(18)
yb2 (s(tn )) = s2 (tn ) g2 (s(tn ); η2 )
(19)
By rearranging (17), an estimate of yb1 (s(tn )) is obtained as yb1 (tn ) =
and of yb2 (s(tn )) as
yb2 (tn ) =
y(tn ) − g2 ( s(tn ); η2 ) s2 (tn ) g1 (s(tn ); η1 )
(20)
y(tn ) − g1 ( s(tn ); η1 ) s1 (tn ) . g2 (s(tn ); η2 )
(21)
The amplitude difference is now estimated and parameterized. The remaining error that should be estimated is the phase difference between yb1 (tn ) and s1 (tn ). This difference is approximated by the function p1 (s(tn ); λ1 ) by minimizing N −1 X n=0
|[6 yb1 (tn ) − 6 s1 (tn )] − p1 (s(tn ); λ1 )|2
B. Digital Predistortion For the predistortion, the problem is similar to the problem of estimating the parameters in the direct model. However, a major difference is that the predistorted signal is passed through the direct model. This makes the parameter estimation a nonlinear problem. The reason this is done is because one no longer wants to have an output signal from the model that is similar to the measured output signal, but rather to make it similar to a linearly amplified version of the original input signal. As cost function, the sum-square error CN (γ) =
(17)
s1 (tn ) g1 (s(tn ); η1 ) + s2 (tn ) g2 (s(tn ); η2 ) + ǫ(tn )
respectively
synchronized to the input signal s(tn ) using a phase interpolation synchronization method. It is assumed that the amplifier and measurement setup are sufficiently well-designed to have negligible difference in delay between the paths, as a first estimate. Initial estimates for all parameters have now been found. The model parameters can now be searched for using a nonlinear optimization method [36] that minimizes the model error in (14) as function of the parameters θ.
(22)
with respect to λ1 . If the function p1 (s(tn ); λ1 ) is linear in the parameters, minimizing (22) is a linear least-squares problem. The initial parameter estimates for λ2 can be obtained in a similar way as for λ1 . Initial estimates for the time offsets ∆1 and ∆2 can in this case be set to 0, because the output signal y(tn ) is
=
N −1 X n=0 N −1 X
|ǫDPD (tn ; γ)|2
(23)
|s(tn ) − ymod (sDPD (tn ); γ)|2
n=0
is used. ǫDPD (tn ; γ) is the predistorted error signal, i.e. the difference between the original input signal and a linearly scaled version of the measured output signal. ymod (sDPD (tn ; γ)) is the modeled output signal from the amplifier when the predistorted input signal sDPD (tn ; γ) is used. γ = [γ1T γ2T ]T are the parameters in the digital predistortion algorithm. From earlier we know that no adjustments to the amplitude of the input signals are allowed due to the class-D operation of the amplifiers. Thus, parameters requiring an initial estimate are the parameters in the phase-polynomials (11) and (12). The idea is now to establish approximate inverses of the phase-distortion in A1 and A2. For this purpose it is assumed that the inverse phase-distortion in each amplifier (A1 and A2) can be approximated by a polynomial in |s(tn )|. In line with the P :th order inverse of Volterra theory [37], a polynomial is a possible choice for inverting function of another polynomial. Now we have transformed the problem into one that consists of finding the approximate inverse of a polynomial using another polynomial. We want to use the derived model as a predistorter, i.e. operating on the input signal to the outphasing amplifier, the inverse we are seeking is a pre-inverse. Due to a theorem by Schetzen [37], we know that the preinverse of a Volterra system is equal to the post-inverse, up to a given order P . Using the above similarity of post- and pre-inverses we say that a first estimate of the pre-inverse of the phase-distortion is given by the post-inverse of the phasedistortion in each branch. This is a problem that is linear in the parameters, if the functions r1 (s; γ1 ) and r2 (s; γ2 ) are linear in the parameters.
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Fig. 3. Principle of the measurement setup containing a signal generator with phase coherent outputs and a vector signal analyzer. All instruments are connected to a PC running MATLAB for instrument control, modeling, digital predistortion and signal component separation. The baseband signals s1 (tn ) and s2 (tn ) are transferred to the vector signal generators, modulated onto a carrier and input to amplifiers A1 and A2, respectively. The amplified signals are output from the amplifiers and added to create the signal y(t) which is sampled and processed by the vector signal analyzer.
Fig. 4.
Principle of the used class-D outphasing amplifier, from [4].
Fig. 5.
Chip photo of the outphasing amplifier, from [4].
Hence, for path 1 the initial parameters of the phasepredistortion r1 (s; γ1 ) are found by solving |r1 (p1 (s(tn ); λ1 ); γ1 ) − 6 s1 (tn )|
2
(24)
n=0
where 6 s1 (tn ) denotes the angle of s1 (tn ). This is a parameter-linear problem if r1 (s(tn ); γ1 ) is parameter-linear in γ1 . As an example, consider the case where r1 (s(tn ); γ1 ) is linear in the parameters γ1 . Then (24) can be solved using a linear least-squares method. To illustrate this, let r1 = R1 (s(tn ))γ1 , with r1 a column vector formed from the values of r1 (s(tn ); γ1 ) and R1 (s(tn )) the regression matrix. Using the similarities between the post- and pre-inverse discussed earlier, (24) can be rewritten as γ b1 = arg min||s1 − R1 (p1 (s(tn ); λ1 ))γ1 ||2
(25)
40
25 ←Pout
30
20 DE→
20
15
10
10 PAE→
0
PAE, DE (%)
γ1
N −1 X
Pout (dBm)
γ b1 = arg min
5
γ1
where s1 is a column vector formed from the angles of 6 s1 (tn ). Eqn. (25) is linear in the parameters γ1 . ||·||2 denotes the standard Euclidean norm. The same approach is used for estimating initial values for the predistortion parameters for path 2. All parameters now have initial estimates meaning that (23) can be minimized using an optimization method, as for the minimization of the direct model error in (14). However, the lowest amplitudes cannot be fully corrected due to the gain imbalance. An initial estimate used to start the parameter search ignores the samples of lowest amplitude in (24). However, the final results take this amplitude range into account by the use of the search method. VI. M EASUREMENT S ETUP The measurement equipment for testing outphasing amplifiers is similar to that used for behavioral modeling and digital predistortion of other amplifier types. This means a vector
−10 −90
−60
−30 0 30 60 Outphasing angle Θ (o)
0 90
Fig. 6. Measured output power (Pout), drain efficiency (DE) and power added efficiency (PAE) are shown as functions of the outphasing angle, from [4]. Note that the outphasing angle is defined over [−90o , 90o ] due to the way it is introduced in Fig. 1.
signal analyzer is required for the measurements and a vector signal generator is needed for the signal generation. The measurement equipment used is a R&S FSQ26 vector signal analyzer and two R&S SMBV100A vector signal generators with the phase coherent RF output option. This equipment is controlled by a PC running MATLAB. Signal component separation, i.e. the operation of the SCS in Fig. 2, is done in MATLAB. The baseband outphasing signals s1 (tn ) and s2 (tn ), with sampling rates of 92 MHz, are uploaded to the signal generators and modulated onto a carrier. The setup is shown in Fig. 3.
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TABLE I M EASURED ACLR FOR WCDMA WITH RESPECT TO 3GPP
NMSE and ACEPR (dB)
Without DPD With DPD 3GPP limit [33]
-10 MHz -48.0 -53.4 -50
ACLR (dBc) -5 MHz 5 MHz -32.5 -32.1 -47.4 -45.6 -45 -45
10 MHz -44.3 -50.7 -50
−30 NMSE ACEPR
−40 −50
2
4 6 Polynomial Order
8
10
Fig. 7. Model performance as NMSE and ACEPR are shown as functions of the order of the phase polynomial when the gain functions are kept constant.
Normalized PSD (dB/Hz)
REQUIREMENTS
0 −5 −10 −15 −20 −25 −30 −35 −40 −45 −50 −55
Without DPD
With DPD −10
−5 0 5 10 Frequency Rel. to Carrier (MHz)
Fig. 8. The power spectra of the original output signal and the predistorted WCDMA signal.
Synchronization of the input signal s(t) and the measured output signal y(t) must be done prior to any modeling as the measurement system is asynchronous. A coarse synchronization is given by a cross-correlation between the input and output signals. A phase interpolation [29] is then applied to achieve sub-sample synchronization. However, there is no guarantee that this gives a sufficiently good synchronization between the three terms s1 (tn ), s2 (tn ) and y(tn ), but it is a first estimate used in the modeling process. The noise in the measured output signal is reduced using coherent averaging [29]. The output signal is averaged five times. The outphasing PA is based on eight class-D amplifier stages, whose outputs are combined by utilizing four on-chip transformers, see Fig. 4 for the amplifier principle and Fig. 5 for the chip photo. The signals s1 (t) and s2 (t) are connected as described in [6]. The peak output power is 32 dBm, demonstrating state-ofthe-art output power of class-D RF PAs and is one of the first fully integrated watt-level outphasing PAs [4], [5], [7]. The outputs of the class-D stages connected to the transformers are driven by a tapered buffer. The gain is 22 dB from the input of the buffer to the output. The DC power consumption of the smallest buffer stage (inverter) was considered as input power. The measured output power over outphasing angle at 1.85 GHz is shown in Fig. 6. The dynamic range of the amplifier is 40 dB at 1.85 GHz [4]. The output stage of the PA was designed for a 5.5V supply and was driven by a 1.3V driver. In order to avoid excessive heating of the device, the supply voltage in the output stage was lowered to approximately 4.1V resulting in an average output power of 20 dBm and peaks around 29.5 dBm. Thus, the 32 dBm and 29.5 dBm output power levels are achieved at the same outphasing angle but with different supply voltages in the output stage. The excitation signals that were used are two downlink 5 MHz 16-QAM WCDMA signals with PAPR of 9.5 dB. One
signal is used to identify the model and predistorter parameters while the other is used to validate model and predistorter performance. VII. R ESULTS All results presented here are for the validation data set, i.e. the data set that was not used to extract the model parameters. The direct model performance is measured using the normalized mean square error (NMSE) and the adjacent channel error power ratio (ACEPR). The NMSE is given by R E(f )df NMSE = RBW (26) BW Y (f )df with Y (f ) being the estimated power spectrum of the signal y(tn ), and E(f) being the estimated power spectrum of the model error e(tn ) = ymod (tn ; θ) − y(tn ). The integrations are made over the available bandwidth BW. The ACEPR is given by [29] R E(f )df adj. ch. ACEPR = R (27) ch. Y (f )df with Y (f ) and E(f ) as for the NMSE. The integration in the numerator is done over the channel containing the input signal. For the denominator, the integration is done over the adjacent channel (upper or lower) containing the largest model error power [29]. For the predistortion, ACLR is used as a measure of predistortion performance. The model performance as NMSE and ACEPR are computed for orders of the phase polynomial going from 1 to 10. The gain functions g1 and g2 are kept constant, thus considering the class-D amplifiers to operate at constant amplitude. The obtained model performance is shown in Fig. 7 as functions of the phase polynomial order. At a model order of 5 no gains in model performance is achieved by further increasing the polynomial order. A model with this performance should have sufficient performance to be used
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−20
VIII. C ONCLUSIONS
−25
A novel nonlinear black-box model structure for modeling outphasing amplifiers has been introduced. It allows for flexible modeling of outphasing amplifiers by considering time and gain mismatches, different nonlinear behavior in the amplifiers and nonlinear interaction between the amplifiers through the use of arbitrary amplitude and phase distortion functions. A phase-only predistortion algorithm based on the direct model was also proposed. This predistorter successfully linearized a 32 dBm peak power CMOS class-D outphasing PA to fulfill the linearity requirements according to the 3GPP standards when using a 5 MHz WCDMA signal with 9.5 dB PAPR. The performance improvements were as follows: the 5 MHz ACLR decreased by 13.5 dB, from -32.1 dBc to -45.6 and the 10 MHz ACLR decreased by 6.4 dB, from -44.3 dBc to -50.7 dBc. Theoretical limits on achievable ACLR due to limited dynamic range, i.e. gain mismatch, were also presented.
ACLR (dBc)
−30 ← ACLR @ 5MHz, DPD −35 ← ACLR @ 5MHz, no DPD −40 −45 −50
← ACLR @ 10MHz no DPD
ACLR @ 10MHz → −55 DPD −60 10
15
20
25
30
35
40
45
50
55
60
Dynamic Range (dB) Fig. 9. The 5 and 10 MHz ACLR for the used WCDMA-signal are shown as functions of the dynamic range, defined in (5), i.e. when there is amplitude mismatch between the two class-D stages. The first case (marked “no DPD”) shows the ACLR when the WCDMA-signal is transmitted through an outphasing amplifier with limited dynamic range. The second case (marked “DPD”) shows the achievable performance when the amplitude mismatch is compensated as far as possible, i.e. there is distortion only in the samples with amplitudes lower below the dynamic range defined in (5). This indicates the lowest achievable ACLR for an outphasing amplifier, assuming that a predistorter can correct all distortion except the gain mismatch below the dynamic range. The limitations of -48 dBc and -55 dBc ACLR at 5 and 10 MHz offset, respectively, are due to the used WCDMA-signal.
for extracting the predistorter. Note that for simplicity we have restricted the modeling to only consider the same polynomial order for both paths 1 and 2. Using the model proposed in [3], the lowest NMSE was -32.3 dB and the lowest ACEPR was -44.3 dB. Because the model proposed in this paper has lower model errors, the predistorter is extracted on the models in (9) proposed in this paper. According to the static gains in g1 and g2 , the amplifier dynamic range, defined in (5), is approximately 40 dB, in agreement with the measurements in [4]. Limited dynamic range puts limits on the achievable ACLR due to the amplitude mismatch. Assuming a correction method that can correct all errors, except the gain mismatch below the dynamic range, what ACLR can be achieved? Fig. 9 shows the ACLR without and with correction for the case of pure amplitude mismatch, as it is assumed that all other errors can be perfectly corrected. With 40 dB dynamic range, the lowest 5 MHz and 10 MHz ACLR are -48 dBc and -55 dBc, respectively. The performance of the predistorter using a direct model of order 1 for η1 , η2 , and 5 for λ1 , λ2 and a predistorter of order 5 for γ1 , γ2 is shown in Fig. 8. Measured ACLR values are given in Table I. The predistortion improves the 5 MHz ACLR by approximately 13.5 dB, from -32.1 dBc to -45.6 dBc, and the 10 MHz ACLR by 6.4 dB, from -44.3 dBc to -50.7 dBc. Thus, the predistorter makes the PA fulfill the ACLR requirements according to 3GPP [33]. The error vector magnitude (EVM) is also improved from approximately 5% to approximately 1.5%.
R EFERENCES [1] D. Cox, “Linear amplification with nonlinear components,” IEEE Transactions on Communications, vol. 22, no. 12, pp. 1942 – 1945, December 1974. [2] H. Chireix, “High power outphasing modulation,” Proc. IRE, vol. 23, pp. 1370–1392, November 1935. [3] J. Fritzin, Y. Jung, P. N. Landin, P. Händel, M. Enqvist, and A. Alvandpour, “Phase predistortion of a class-D outphasing RF amplifier in 90 nm CMOS,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 58, no. 10, pp. 642–646, October 2011. [4] J. Fritzin, C. Svensson, and A. Alvandpour, “A +32dBm 1.85 GHz classD outphasing RF PA in 130nm CMOS for WCDMA/LTE,” in IEEE European Solid-State Circuits Conference, September 2011, pp. 127– 130. [5] W. Tai, H. Xu, A. Ravi, H. Lakdawala, O. Degani, L. Carley, and Y. Palaskas, “A 31.5dBm outphasing class-D power amplifier in 45nm CMOS with back-off efficiency enhancement by dynamic power control,” in Proceedings of the European Solid-State Circuits Conference, September 2011, pp. 131 –134. [6] H. Xu, Y. Palaskas, A. Ravi, M. Sajadieh, M. El-Tanani, and K. Soumyanath, “A Flip-chip-packaged 25.3 dBm class-D outphasing power amplifier in 32 nm CMOS for WLAN application,” IEEE Journal of Solid-State Circuits, vol. 46, no. 7, pp. 1596 –1605, July 2011. [7] J. Fritzin, C. Svensson, and A. Alvandpour, “A wideband fully integrated +30dBm class-D outphasing RF PA in 65nm CMOS,” in Proceedings IEEE International Symposium on Integrated Circuits, December 2011. [8] D. Perreault, “A new power combining and outphasing modulation system for high-efficiency power amplification,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, no. 8, pp. 1713–1726, August 2011. [9] W. Gerhard and R. Knoechel, “Improved design of outphasing power amplifier combiners,” in Proceedings German Microwave Conference, March 2009, pp. 1–4. [10] M. Helaoui, S. Boumaiza, F. M. Ghannouchi, A. B. Kouki, and A. Ghazel, “A new mode-multiplexing LINC architecture to boost the efficiency of WiMAX up-link transmitters,” IEEE Transactions on Microwave Theory and Techniques, vol. 55, no. 2, pp. 248 –253, February 2007. [11] P. Godoy, S. Chung, T. Barton, D. Perreault, and J. Dawson, “A 2.5-GHz asymmetric multilevel outphasing power amplifier in 65-nm CMOS,” in Proceedings IEEE Topical Conference on Power Amplifiers for Wireless and Radio Applications, January 2011, pp. 57–60. [12] R. Langridge, T. Thornton, P. Asbeck, and L. Larson, “A power reuse technique for improved efficiency of outphasing microwave power amplifiers,” IEEE Transactions on Microwave Theory and Techniques, vol. 47, no. 8, pp. 1467–1470, August 1999. [13] P. Godoy, D. Perreault, and J. Dawson, “Outphasing energy recovery amplifier with resistance compression for improved efficiency,” IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 12, pp. 2895–2906, December 2009.
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[14] F. Casadevall and J. Olmos, “On the behavior of the LINC transmitter,” in IEEE Vehicular Technology Conference Proceedings, May 1990, pp. 29 –34. [15] W. Gerhard and R. Knöchel, “Prediction of bandwidth requirements for a digitally based WCDMA phase modulated outphasing transmitter,” in European Conference on Wireless Technology Proceedings, October 2005, pp. 97 –100. [16] F. Raab, “Efficiency of outphasing RF power-amplifier systems,” IEEE Transactions on Communications, vol. 33, no. 10, pp. 1094 – 1099, October 1985. [17] A. Birafane and A. Kouki, “Phase-only predistortion for LINC amplifiers with Chireix-outphasing combiners,” IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 6, pp. 2240 – 2250, June 2005. [18] S.-S. Myoung, I.-K. Lee, J.-G. Yook, K. Lim, and J. Laskar, “Mismatch detection and compensation method for the LINC system using a closed-form expression,” IEEE Transactions on Microwave Theory and Techniques, vol. 56, no. 12, pp. 3050 –3057, December 2008. [19] A. Birafane, M. El-Asmar, A. B. Kouki, M. Helaoui, and F. M. Ghannouchi, “Analyzing LINC Systems,” IEEE Microwave Magazine, vol. 11, no. 5, pp. 59–71, August 2010. [20] M. Helaoui, S. Boumaiza, and F. Ghannouchi, “On the outphasing power amplifier nonlinearity analysis and correction using digital predistortion technique,” in IEEE Radio and Wireless Symposium Digest, January 2008, pp. 751–754. [21] A. Huttunen and R. Kaunisto, “A 20-W Chireix outphasing transmitter for WCDMA base stations,” IEEE Transactions on Microwave Theory and Techniques, vol. 55, no. 12, pp. 2709–2718, December 2007. [22] X. Zhang, L. Larson, P. Asbeck, and P. Nanawa, “Gain/phase imbalanceminimization techniques for LINC transmitters,” IEEE Transactions on Microwave Theory and Techniques, vol. 49, no. 12, pp. 2507 –2516, December 2001. [23] I. Hakala, D. Choi, L. Gharavi, N. Kajakine, J. Koskela, and R. Kaunisto, “A 2.14-GHz Chireix outphasing transmitter,” IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 6, pp. 2129 – 2138, June 2005. [24] S. Moloudi, K. Takinami, M. Youssef, M. Mikhemar, and A. Abidi, “An outphasing power amplifier for a software-defined radio transmitter,” in IEEE International Solid-State Circuits Conference Digest, February 2008, pp. 568 –636. [25] X. Zhang, L. Larson, and A. P.M., Design of Linear RF Outphasing Power Amplifiers. Artech House, 2003. [26] J. Yao and S. Long, “Power amplifier selection for LINC applications,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 53, no. 8, pp. 763 –767, August 2006. [27] J. Pedro and S. Maas, “A comparative overview of microwave and wireless power-amplifier behavioral modeling approaches,” IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 4, pp. 1150– 1163, April 2005. [28] D. Schreurs, M. O’Droma, A. Goacher, and M. Gadringer, RF Power Amplifier Behavioral Modeling. Artech House, 2009. [29] M. Isaksson, D. Wisell, and D. Rönnow, “A comparative analysis of behavioral models for RF power amplifiers,” IEEE Transactions on Microwave Theory and Techniques, vol. 54, no. 1, pp. 348–359, January 2006. [30] H. Cao, H. Nemati, A. Soltani Tehrani, T. Eriksson, and C. Fager, “Digital predistortion for high efficiency power amplifier architectures using a dual-input modeling approach,” IEEE Transactions on Microwave Theory and Techniques, vol. PP, no. 99, pp. 1–9, 2012. [31] H. Nemati, H. Cao, B. Almgren, T. Eriksson, and C. Fager, “Design of highly efficient load modulation transmitter for wideband cellular applications,” IEEE Transactions on Microwave Theory and Techniques, vol. 58, no. 11, pp. 2820 –2828, November 2010. [32] H. Xu, Y. Palaskas, A. Ravi, and K. Soumyanath, “A highly linear 25dBm outphasing power amplifier in 32nm CMOS for WLAN application,” in Proceedings of the European Solid-State Circuits Conference, September 2010, pp. 306–309. [33] 3GPP TS 25.104; 3rd Generation Partnership Project; Technical Specification Group Radio Access Network; Base Station (BS) radio transmission and reception (FDD) (Release 11), 3GPP Std., Rev. V11.0.0, 2011. [34] J. Qureshi, M. Pelk, M. Marchetti, W. Neo, J. Gajadharsing, M. van der Heijden, and L. de Vreede, “A 90-W peak power GaN outphasing amplifier with optimum input signal conditioning,” IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 8, pp. 1925–1935, August 2009. [35] J. Hur, H. Kim, O. Lee, K.-W. Kim, K. Lim, and F. Bien, “An amplitude and phase mismatches calibration technique for the LINC transmitter
with unbalanced phase control,” IEEE Transactions on Vehicular Technology, vol. 60, no. 9, pp. 4184–4193, November 2011. [36] M. Heath, Scientific Computing: An Introductory Survey. McGraw-Hill, 2002. [37] M. Schetzen, The Volterra and Wiener Theories of Nonlinear Systems. Krieger Publishing Company, 2006.
Per N. Landin (S’07) received the M.Sc. degree from the Uppsala University in 2007 and the degree of licentiate in technology from KTH Royal Institute of Technology, Stockholm, in 2009. He is currently working towards the Ph.D. degree at the University of Gävle and KTH Royal Institute of Technology, Stockholm. His main interest is signal processing techniques for modeling and linearization of nonlinear radio frequency devices.
Jonas Fritzin (S’07) received his M.S. Degree in electrical engineering from Chalmers University of Technology, Göteborg, Sweden, in 2004 and the Ph.D. degree from Linköping University, Linköping, Sweden, in 2011. His research interests includes CMOS RF Power Amplifiers and Transmitters and Predistortion. Since January 2012 he is working as an RF-ASIC designer at Ericsson AB, Stockholm, Sweden.
Wendy Van Moer (M’97-SM’07) received the Engineer and Ph.D. degrees in applied sciences from the Vrije Universiteit Brussel (VUB), Brussels, Belgium, in 1997 and 2001, respectively. She is currently an Associate professor with the Electrical Measurement Department (ELEC), VUB. Her main research interests are nonlinear measurement and modeling techniques for medical and high-frequency applications. She was the recipient of the 2006 Outstanding Young Engineer Award from the IEEE Instrumentation and Measurement Society. Since 2007 she has been an associate editor for the IEEE Transactions on Instrumentation and Measurement and in 2010 she became an associate editor of the IEEE Transactions on Microwave Theory and Techniques. She is a member of the administrative committee of the IEEE Instrumentation and Measurement society.
Magnus Isaksson (S’98-M’07) received the M.Sc. degree in microwave engineering from the University of Gävle, Gävle, Sweden, in 2000, the Licentiate degree from Uppsala University, Uppsala, Sweden, in 2006, and the Ph.D. degree from the Royal Institute of Technology, Stockholm, Sweden, in 2007. He worked on communication products with the Televerket, Sweden, during 1989-1999. He is a teacher in signal processing for Telecommunications and is currently the Head of the dept. of electronics, mathematics, and natural sciences at the University of Gävle. His main interests are in signal processing algorithms for radiofrequency measurements and modeling of nonlinear microwave systems. Dr. Isaksson is the author or co-author of many published peer-review journal articles, books, and conference proceedings in the area, and is currently Head of research within the fields of electronics, mathematics, and natural sciences at the University of Gävle, Sweden.
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Atila Alvandpour (M’99-SM’04) received the M.S. and Ph.D. degrees from Linkoping University, Sweden, in 1995 and 1999, respectively. From 1999 to 2003, he was a senior research scientist with Circuit Research Lab, Intel Corporation. In 2003, he joined the department of Electrical Engineering, Linköping University, as a Professor of VLSI design. Since 2004, he is the head of Electronic Devices division. He is also the coordinator of Linköping Center for Electronics and Embedded Systems (LINCE). His research interests include various issues in design of integrated circuits and systems in advanced nanoscale technologies, with a special focus on efficient analog-to-digital data converters, wireless transceiver front-ends, sensor interface electronics, high-speed signaling, on-chip clock generators and synthesizers, low-power/high-performance digital circuits and memories, and chip design techniques. He has published about 100 papers in international journals and conferences, and holds 24 U.S. patents. Prof. Alvandpour is a senior member of IEEE, and has served on many technical program committees of IEEE and other international conferences, including the IEEE Solid-State Circuits Conference, ISSCC, and European Solid-State Circuits Conference, ESSCIRC. He has also severed as guest editor for IEEE Journal of Solid-State Circuits.