Modeling Erratic bits Temperature Dependency for ...

Modeling Erratic bits Temperature Dependency for Monte Carlo Simulation of Flash arrays Cristian Zambelli, Member, IEEE, Gert Koebernik, Rudolf Ullmann, Matthias Bauer, Georg Tempel, and Piero Olivo

Abstract—The erratic bits phenomenon has been extensively characterized in the last decade due to its massive burden on the performance and on the reliability of the Flash memories. From a statistical standpoint it has been possible to describe a Markov chain-based model of this phenomenon in large arrays suitable for Monte Carlo simulation. This model, however, is based on the assumption of complete independency of the probabilistic parameters characterizing each erratic bit from the testing temperature. The goal of this letter is to provide, through the electrical characterization of NOR Flash arrays, the statistical tools necessary to perform a correct simulation of the erratic bits under different temperature conditions.

By performing electrical characterization of erratic bits in Uniform Channel Programming (UCP) NOR Flash arrays it is possible to reveal this dependency and to appropriately describe a statistical model of the temperature impact on the erratic bits phenomenon. This letter therefore provides the missing statistical resources mandatory to perform a correct yet complete Monte Carlo simulation of the erratic bits in Flash architectures. A discussion on the physical roots of the temperature dependency of the erratic bits is also provided.

Index Terms—Flash memory, erratic bits, reliability, simulation, temperature

II. E XPERIMENTAL SETUP

I. I NTRODUCTION Floating gate-based Flash memories represent the mainstream for today’s non-volatile memory technology [1]. Both NOR and NAND architectures make use of at least one writing operation relying on the Fowler-Nordheim (FN) electrons tunneling, which transfers charge to/from the floating gate. This mechanism, however, may exhibit erratic behaviors due to charge trapping in the tunnel oxide, leading to significant variations of the cell threshold voltages VT with respect to expected normal values measured after the FN operation [2]. This phenomenon has been extensively characterized in the last two decades from different standpoints: physical roots of the erratic bits [2], [3], reliability implications on the writing operations [4], and statistical modeling of the phenomenon occurrence in multi-megabit arrays [5]. The last point gained particular interest thanks to the possibility of developing dedicated Monte Carlo simulation frameworks with enhanced prediction capabilities of threshold voltage distributions after each program/erase operation. In [6] as example, a statistical modeling approach based on Markov chains allowed to simulate the NOR Flash yield loss due to excessive bitline leakage caused by over-erased erratic bits. However, the methodology developed for Monte Carlo simulation of the erratic bits relied on the assumption of complete independency of the probabilistic parameters of those bits (i.e., Markov steady-state probabilities and average erratic shift) from an extrinsic stress source such as the test temperature. This work has been partially funded by the Bando Giovani Ricercatori from Universit´a degli studi di Ferrara (Italy) 5xmille 2009 contribution. C. Zambelli and P. Olivo are with Dipartimento di Ingegneria, Universit`a degli Studi di Ferrara, Via Saragat 1, Ferrara (Italy), 44122. G. Koebernik and R. Ullmann are with Infineon Technologies, Am Campeon 1-12, Neubiberg (Germany), 85579. M. Bauer and G. Tempel are with Infineon Technologies, K¨onigsbr¨ucker Strasse 180, Dresden (Germany), 01099.

The electrical characterization has been performed on automotive-quality embedded NOR Flash manufactured with a 130nm process integrated on a System-on-Chip product. The cell concept is a 1T-UCP design exploiting the FN tunneling both for program and erase operation. The cells population considered for statistical purposes featured 2.32 Mbits. All the experiments aimed at retrieving the erratic bits temperature dependency featured in 200 erase cycles. Each erase cycle is defined as a bulk program of the chip followed by an erase operation and then by a soft-programming mandatory to recover the strongly depleted over-erased bits. The erased read currents Iread of all the cells have been measured after each cycle using a fast Direct Memory Access (DMA) mode. The erratic bits considered in this letter for the temperature investigations are those generated during the softprogramming operation. No topological dependencies of the erratic bits have been pointed out during the measurements. Cycling operations have been performed at -40◦ C, 25◦ C, 85◦ C, 105◦ C, 125◦ C, and 150◦ C. III. E XPERIMENTAL RESULTS Each memory cell features a set of probabilistic parameters describing its behavior during cycling [7]. The most relevant are: the erratic shift ∆Iread denoting the difference between the average read currents in erratic and normal states; the Markov steady state probabilities α and β representing the probabilities of remaining in normal and erratic state, respectively. An erratic bit is detected when its ∆Iread ≥ 6σ, where σ is the experimental setup resolution. After testing it is possible to retrieve the statistical distributions of the α, β, and ∆Iread parameters throughout the array. Markov steady state probabilities α and β can be described by normal distributions (see Fig. 1), whose mean values µα and µβ (see Fig. 2) and their standard deviations σα and σβ (see

2

Fig. 2. Temperature dependence of the extracted normal distributions mean values µα and µβ of the Markov steady state probabilities. The best fitting law is a quadratic equation.

Fig. 1. Extracted Markov steady state probabilities α and β of the erratic bits model described in [7] as a function of the testing temperature. The least-square estimates are provided for each temperature (dashed lines).

Fig. 3) appear to be temperature dependent. Their dependency can be described by the following equations set: 

µα,β (T ) = aα,β ∗ T 2 + bα,β ∗ T + cα,β σα,β (T ) = dα,β ∗ T + eα,β

(1)

where aα,β , bα,β , cα,β , dα,β , and eα,β are fitting constants. Almost for all temperatures µβ > µα , although for higher temperatures this inequality becomes weaker. The correlation of this trend to the physical roots of the erratic bits yields to the conclusion that at high temperature the average generation probability of the positive charge cluster in the tunnel oxide responsible for the erratic bits phenomenon [4] decreases, whereas the average annihilation probability increases [7]. This could lead to an instability of the charge cluster since the transitions between the Markov states depicting its presence/absence becomes more frequent. Eq.(2) then allows to rewrite the temperature dependent cumulative distribution function of the two steady state probabilities as:    1 [α, β] − µ (T ) α,β  . F ([α, β](T )) = 1 + erf  q 2 2σ 2 (T )

(2)

α,β

The other probabilistic parameter to be affected by the temperature is the erratic average shift ∆Iread . Fig. 4 shows its statistical distribution at different temperatures on a log-normal probability plot. By using a Pearson’s χ2 goodness-of-fit test with a confidence level up to 99% to include the distribution tails, ∆Iread can be modeled as:

Fig. 3. Temperature dependence of the extracted normal distributions standard deviation values σα and σβ of the Markov steady state probabilities. The best fitting law is a linear equation. The extracted values of σ∆Iread are also plotted together with their mean value (dashed-dotted line) to be exploited in Eqs.(3) and (5).

F (∆Iread ) =





1 ln(∆Iread ) − T50  erf c − q 2 2σ 2 ∆Iread

(3)

where log-normal distribution parameters T50 and σ∆Iread are calculated through a Least-Square Estimate. These parameters are then refined by means of a Maximum Likelihood Estimate. Through a Likelihood Ratio Test σ∆Iread is found to be conveniently assumed common for all temperatures (and equal to 0.236 as shown in Fig. 3) in order to enable the derivation of an accelerated model. The temperature dependency of the calculated T50 cannot be described by means of a standard Arrhenius accelerated model, as shown in Fig.5, while it can be successfully fitted either by a split Arrhenius model or by a modified Arrhenius accelerated model [8]. The split Arrhenius model is based on the assumption that two concurring phenomena, each featuring a proper activation energy, can be separately modeled starting from a critical temperature. This leads to the following equation set:

3

Fig. 4. Log-normal probability plot of the extracted erratic average shift at different temperatures. The least-square estimates are provided for each temperature (dashed lines). Fig. 5. Arrhenius models of the log-normal distribution lifetime parameter T50 . At T > Tc ≃ 85◦ the cluster strength decreases because of a higher detrapping probability of the holes constituting the cluster.

T50 (T ) =

(

Ea1

A1 ∗ e( kT ) Ea2 A2 ∗ e( kT )

T ≤ Tc T > Tc

(4)

where A1 , and A2 are the pre-exponential factors equal to 0.65µA and 0.78µA, respectively, Ea1 , and Ea2 are the two activation energies equal to 50meV and 39meV, respectively, and Tc is the critical temperature assumed equal to 85◦ C. This modeling approach however, is unpractical in accelerated tests since multiple equations for the ∆Iread cumulative function needs to be calculated. The F (∆Iread (T )) can be better described using a modified Arrhenius model by using the following equation set:

IV. C ONCLUSIONS In this letter we have provided an extension to the Monte Carlo methodology exploited in the simulation of the erratic bits phenomenon in Flash arrays in order to account for the device testing temperature. Through the electrical characterization of NOR Flash arrays it has been possible to describe an equation set suitable for the description of the aforementioned phenomenon. A physical explanation of the underlying properties of the erratic bits has been provided thanks to the temperature characterization results. R EFERENCES

 !   ln(∆I (T ))−T (T ) 50 read  F (∆Iread (T )) = 1 erf c − q 2 2 2σ∆I read  n  Ea   T50 (T ) = A ∗ T ∗ e( kT ) T0

(5)

where A is the pre-exponential factor of the modified Arrhenius model equal to 4.06µA, T0 is the reference temperature assumed equal to 25◦ C, n is a fitting constant equal to -2.42 and Ea is the activation energy found to be equal to 50meV. The last parameter gives an important information about the nature of the positive charge clusters responsible for erratic bits generation. The erratic average shift magnitude is intrinsically a measure of the strength of the charge cluster, as it represents the distance between the two Markov states depicting either its presence or its absence. Assuming that the positive charge cluster is generated via an Anode Hot Hole Injection phenomenon [9], it is expected that competing mechanisms are present with a different temperature dependence (see Fig.5). As the temperature increases the tunnel oxide is more prone to damages due to the increased holes creation efficiency [10]. At the same time, for increasing temperature, the detrapping probability of the holes constituting the charge cluster in the tunnel oxide becomes significantly larger [10] thus weakening the cluster strength. This effect appears to be the dominant one as evidenced in Fig.5.

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