INTERNATIONAL CONFERENCE ON ELECTRIC POWER ENGINEERING (ICEPENG 2015) OCTOBER 14-16, 2015
Modeling of a Three-level Static VAR Compensator and Simulation Study of a Universal Power Flow Controller Damian B. Nnadi
Crescent O. Omeje
Christian N. Obetta
Dept. of Electrical Engineering, University of Nigeria, Nsukka +2348069335370
[email protected]
Dept. of Electrical Engineering University of Port Harcourt, Port Harcourt +2340869335370
Dept. of Elect Elect. Engineering Enugu State University of Science & Technology, Enugu
[email protected]
[email protected]
compensatory device-flexible alternating current transmission system devices (FACTS) to control the
Abstract This paper presents the analysis and simulation study of
magnitude of the voltage at a particular bus bar in
a three-level voltage source inverter in controlling the
any electric power system, the minimization of these
magnitude
transmission losses is actualized.
of
reactive
power
flow
in
a
given
transmission line. The mathematical modeling of the 3-
This, therefore, formed the basic principles of static
level thyristor controlled voltage source inverter
var compensator devices. A static var compensator
(TCVSI) in the d-q axis with respect to the static var
(SVC) is an electrical device meant for providing
compensator is presented in this work. In line with the
fast-acting reactive power compensation on high-
above analysis is the state space and dynamic equations of the TCVSI in determining the inverter’s optimum performance while the simulation of a unified power flow controller which is aimed at determining the
voltage
electricity
transmission
network,
thus,
regulating the magnitude of the supply voltage and also stabilizing the transmission network during
variation in the rate of reactive power flow across the
transient disturbances [1].
transmission line is also analyzed in this work with the
The SVC is an automated (mechanized) impedance
aid of MATLAB/SIMULINK software package.
matching device, designed to ensure that the transmission line parameters get closer to unity
Key words: Thyristor controlled, Voltage Source Inverter,
power factor. This is realized by the following
Static Var Compensator and Unified Power Flow
underlying principles:
Controller.
If the power systems reactive load is capacitive 1 Introduction
(leading Power factor), the SVC device switches on
Reactive power (VAR) compensation and its control
the reactors to absorb the reactive power from the
have formed an essential part in the analysis of power
system thus lowering the system voltage to the
system and efficient functioning of transmission line
manufacturers default value which is the acceptable
parameters. This is achieved by the minimization of
system operational value.
power transmission losses achieved by maintaining a
For an inductive load condition (Lagging Power
constant supply voltage across the line. It is a well-
factor), the capacitor banks are automatically
established fact that by using reactive power
switched on with the aid of a thyristor-controlled
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INTERNATIONAL CONFERENCE ON ELECTRIC POWER ENGINEERING (ICEPENG 2015) OCTOBER 14-16, 2015
VSI, thus, providing a higher but appreciable system
topology. The operational principles of the system
operational voltage magnitude [2].
can be explained by considering per phase of the
2
SVC system. It is observed that from Figure.2, the
Principles of operation of a three-level VSI
based static compensator
inverter output terminal voltage is given by ea, while
The static var compensator which uses a three-level
ia and va are the fundamental components of current
converter is shown in Figure 1. The main circuit
and voltage of the phase “A” a.c mains voltage
consists of twelve power GTO’s thyristors with an
source. The SVC is connected to this a.c main
anti-parallel diodes which is connected to a three
through a reactor L and a resistor R representing the
phase supply through a reactor. Two capacitors are
total loss in the inverter.
connected to the d.c supply voltage of the inverter
Figure 1 Power circuit of three-level VSI static var compensator
By controlling the phase angle α, the amplitude of the fundamental component of the inverter phase voltage and the a.c mains voltage can as well be controlled [3].
∂ib Vb − eb Rib = − ∂t L L ∂ic Vc − ec Ric = − ∂t L L
(2) (3)
3. Mathematical modeling of the 3-level VSI based
Transforming (1), (2) and (3) in matrix form gives
static var compensator (SVC)
rise to (4) as shown below:
Figure 2 represents a simplified equivalent circuit of
voltage law (KVL) across the three phases of the
𝜕𝑖𝑎 −𝑅 𝜕𝑡 𝐿 𝜕𝑖𝑏 = 0 𝜕𝑡 𝜕𝑖𝑐 [ 0 [ 𝜕𝑡 ]
inverter equivalent circuits. Equations (1) - (3) are
The inverter supply voltage which corresponds to the
derived from Figure 2 using KVL;
d.c capacitor voltages are given by:
the 3-levelVSI based static var compensator. The mathematical modeling of the circuit presented below is effectively done by applying the Kirchhoff’s
∂ia Va − ea Ria = − ∂t L L
0 −𝑅 𝐿 0
0
𝑖𝑎 𝑉𝑎 − 𝑒𝑎 1 × [𝑉𝑏 − 𝑒𝑏 ] 0 [𝑖 𝑏 ] + 𝐿 𝑖 𝑉𝑐 − 𝑒𝑐 −𝑅 𝑐 𝐿 ]
(1)
D. B. NNADI, C. O. OMEJE, C. N. OBETTA
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(4)
INTERNATIONAL CONFERENCE ON ELECTRIC POWER ENGINEERING (ICEPENG 2015) OCTOBER 14-16, 2015
∂Uc1
[∂U∂t ] = c2
∂t
1 C
I × [ c1 ] Ic2
Where VL is the r.m.s line voltage The inverter output voltage derived from Figure 2
(5)
above is given by the following equation:
The conventional three phase AC-mains voltage is given by the following expression:
VABC
EABC
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sin(ωt) 2π VA 2 sin (ωt − ) = [VB ] = √ × VL × (6) 3 3 Vc 2π [sin (ωt + 3 )]
sin(ωt + α) ea 2π 2 sin (wt − + α) = [eb ] = √ × M × × Uc (7) 3 3 ec 2π sin (ωt + + α) [ ] 3
Figure 2: Equivalent circuit of three-level VSI static var compensator
Where M represents the modulation index, Uc
voltage to the two axes (dq) rotating reference frame
represents the inverter source voltage and α
result to (8)
Vqdo = 𝑃 × VABC
represents the thyristor controlled delay angle also known as the firing angle of the thyristor [4]. In transforming (1) – (7) into their d-q-o reference frame, the following assumptions were made: All the
(8)
P operator in (8) represents the improved Park’s transformation matrix given by (9) 𝑃
inverter switches were considered to be ideal so as to prevent the forward voltage associated with other
=√
switches. The source voltages and currents were balanced across the capacitor bus-bar in Figure 2 above. The total losses in the inverter are derived from the three phase lumped resistors. The magnitude of the total harmonic distortion value caused by the switching action of the inverter is considered to be negligible [5]. Transforming the abc a.c mains
2 3 2π 2π + α) cos (ωt + + α) 3 3 2π 2π sin (ωt − + α) sin (ωt + + α) (9) 3 3 1 1 ] √2 √2
cos(ωt + α) cos (ωt − × sin(ωt + α) 1 [
√2
Substituting the values of P and VABC into (8) gives rise to (10) as shown below:
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INTERNATIONAL CONFERENCE ON ELECTRIC POWER ENGINEERING (ICEPENG 2015) OCTOBER 14-16, 2015
cos(ωt + α) 2 Vqdo = √ × sin(ωt + α) 3 1 [ √2
2π 2π + α) cos (ωt + + α) sin(ωt) 3 3 2π 2π 2π 2 sin (ωt − + α) sin (ωt + + α) × √ × VL × sin (ωt − 3 ) 3 3 3 2π 1 1 [sin (ωt + 3 )] ] √2 √2
cos (ωt −
(10)
Expanding (10) gives rise to (11) and this forms the a.c mains supply voltage in q-d-o frame:
Vqdo = P × VABC
Vq VL sin α = [VL cos α] = [Vd ] (11) V0 0
Similarly, the inverter output voltage in q-d-o reference frame is obtained as follows:
Eqdo = P × EABC cos(ωt + α) 2 Eqdo = √ × sin(ωt + α) 3 1 [ √2
(12)
2π 2π + α) cos (ωt + + α) sin(ωt + α) 3 3 2π 2π 2π 2 sin (ωt − + α) sin (ωt + + α) × √ × M × sin (wt − 3 + α) × Uc 3 3 3 2π 1 1 [ sin (ωt + 3 + α) ] ] √2 √2
cos (ωt −
(13)
Expanding (13) result to (14) which form the inverter output voltage in q-d-o reference frame:
0 Eqdo = P × EABC = [M] Uc 0
IC1 + IC2 = 2IC = FIabc sin(ωt + α) Where F = √
Eq = [Ed ] (14) E0
−R L
3
2π 3 2π 3
+ α) (18) + α) ]
to (19): T −T
2IC = F P
1 Vq − eq iq ]×[ ]+ [ ] id L Vd − ed
× M × sin (wt −
Transforming (17) into q-d-o reference frame results
frame gives rise to (15) as shown: −ω
2
[ sin (ωt +
Transforming (4) into their respective q-d-o reference ∂iq −R [ ∂t ] = [ L ∂id ω ∂t
(17)
Iqdo = [0
M
Iq 0] × [Id ] (19) Io
(15) The capacitors voltage is given by (20) which is
Substituting the values of Vq, eq, Vd and ed (11) and
further simplified to (21) by the substitution of (19)
(14) into (15) results to (16) :
into (20).
∂iq −R [ ∂t ] = [ L ∂id ω ∂t
−ω 1 iq ]×[ ] + −R id L L −VL sin α ×[ ] (16) VL cos α − MUc
From the second assumption considered above, it is observed that the inverter supply current which
∂Uc Ic = ∂t C
(20)
∂Uc MId = ∂t 2C
(21)
corresponds to the dc current flowing across the capacitor bus is given as:
D. B. NNADI, C. O. OMEJE, C. N. OBETTA
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INTERNATIONAL CONFERENCE ON ELECTRIC POWER ENGINEERING (ICEPENG 2015) OCTOBER 14-16, 2015
∂Iq
The total reactive power delivered by the thyristor controlled static var compensator (SVC) on the a.c mains via RL load is given by (22)
Qc = Vq Iq + Vd Id
∂t ∂Id
Where𝐗̇(𝐭) =
(22)
∂t ∂Uc
[ ∂t ] −R L
Substituting the values of Vq and Vd from (11) into (22)
Iq ; X(t) = [ Id ] ; Uc
ω
0
The inverter under this condition is forced to operate
VL −R −M A = ω ; B = [L ]; 0 L L M 0 0 0 [ ] 2C C = [−𝑉𝐿 0 0] ; U(t) = ∆α ;
optimally by injecting more reactive power to the a.c lines
The Laplace transformation of (27) and (28) results
to compensate for the drop in voltage on the line. This
to (29) and (30)
results to (23) as shown below:
Qc = −VL sin α Iq + VL cos α Id
(23)
During a transient disturbance along the a.c mains connected to the inverter through a reactor, there is a resultant voltage drop accompanying this line disturbance.
occurs when the control delay angle of the inverter is made equal to 900. Under the above condition, the total output (reactive) power from (23) changes to (24)
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Qc = −VL Iq
SX(s) − X(0) = AX(s) + BU(s)
(29)
Y(s) = CX(s)
(30)
Assuming
(24)
The state space and the output equation for the above
X (0) = 0,
X(s) = [SI − A]−1 × BU(s)
(31)
analysis is presented in (25) and (26): 𝜕𝐼𝑞 𝜕𝑡 𝜕𝐼𝑑 𝜕𝑡 𝜕𝑈𝑐 [ 𝜕𝑡 ]
Qc=
−𝑅 𝐿 =
𝜔 [ 0
[−VL
0
−𝜔 −𝑅 𝐿 𝑀 2𝐶
Y(s) = C[SI − A]−1 × BU(s)
0
−𝑉𝐿 𝐼𝑞 −𝑀 × [ 𝐼𝑑 ] + [ 𝐿 ] × ∆𝛼 0 𝐿 𝑈𝑐 0 0 ]
Iq 0] × [ Id ] Uc
(25)
(32)
The transfer function of the above equation is presented in (33)
(26)
Qc(s) ∆α(s)
= C[SI − A]−1 × B
(33)
Where Qc(s) = Y(s) and U(s) = ∆α(s) substituting the
Where ∆α represents the incremental change in the inverter
values of ABC and SI into (33) gives (34) where I is
control delay angle corresponding to the transient
identity matrix.
disturbance on the line
Qc(s) = ∆α(s)
The dynamic equations of (25) and (26) give rise to (27)
V2L L
S3 +
2R s2
and (28) respectively [6]:
𝐗̇(𝐭) =
AX(t) + BU(t)
(27)
L
[S2 + R 2
Rs L
+ [( ) + L
+
M2 2LC
M2 2LC
]
+ ω2 ] s +
M2 R
(34)
2L2 C
The values of VL and RLC as well as the frequency used in this analysis are as follows:
Y =
CX(t)
(28)
VL = 415volts, R = 0.4Ω, L =100mH, C = 1000μF, M = 0.8, ω=100π.
D. B. NNADI, C. O. OMEJE, C. N. OBETTA
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INTERNATIONAL CONFERENCE ON ELECTRIC POWER ENGINEERING (ICEPENG 2015) OCTOBER 14-16, 2015
Substituting these values into (34) gives rise to (35)
Where
as follows:
1722250×(𝑠2 +4𝑠 +3200) G(s) = 3 𝑠 +8𝑠2 +101912.044𝑠+128000
(𝑠 2
𝑄𝑐(𝑠) 1722250 × + 4𝑠 + 3200) = 3 ∆𝛼(𝑠) 𝑠 + 8𝑠 2 + 101912.044𝑠 + 128000
(35)
The characteristic equation from control law is
and H(s) = 1 as shown in Figure 3
achieved when 1+G(s) H(s) = 0.
1722250 × (𝑠 2 + 4𝑠 + 3200) 𝑠 3 + 8𝑠 2 + 101912.044𝑠 + 128000
Qc(s)
∆α(s)
Fig.3 Block diagram of the transfer function of SVC This implies that
𝑠 3 + 1722258𝑠 2 + 6990912.044𝑠 + 5511328000 = 0
108
Applying the Routh-Hurwitz stability criterion to the above non-linear polynomial equation gives the
The auxiliary equation from the s2 row is given by:
following [7]:
1722258s2+ 551132800 = 0;
Table: 1 Routh- Hurwitz coefficient of characteristic equation
The value of s from this equation is obtained as:
1
6990912.044
locus plot shown in Fig.4where the two dots
s2
1722258
5511328000
represent +j56.57 and –j56.57 along the vertical
s1
6987711.981
0
s0
5511328000
0
s
3
s = ± j56.57. This value is confirmed in the root-
plane. This positive and negative value of s shows that the control system is marginally stable [8]. Appendix 1 represents the root-locus program.
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INTERNATIONAL CONFERENCE ON ELECTRIC POWER ENGINEERING (ICEPENG 2015) OCTOBER 14-16, 2015
Root Locus 0.034
0.024
0.017
0.0115
0.007
0.0035
70 60
60 0.055
50 40
40
30
Imaginary Axis
20
0.12
20 10
0 10 -20
20
0.12
30 -40
40 50
0.055 -60
60 0.034
-3
-2.5
0.024 -2
0.017 -1.5
0.0115
0.007
-1
0.0035
70
-0.5
0
Real A xis
Fig.4: Root-locus plot of a static var compensator 4 Simulation of a Unified Power Flow Controller
capacitor linking the two converters. When there is a
A unified power flow controller (UPFC) consists of
voltage drop due to transient disturbance on the line
two switching power converters connected to each
such as a three phase fault, the inverter is forced to
other back to back through a d.c link capacitor. The
operate to compensate for this drop in voltage by
two converters (Rectifier and Inverter) are connected
injecting reactive power to the system. As the
to the AC supply system by a shunt and series
operation of the inverter continues, the capacitor
transformers. The rectifier is a three phase full bridge
voltage discharges. During this process the rectifier is
converter with six pulses which is designed using
set into operation to recharge the capacitor to its
diode rectifiers. The inverter is a three level inverter
original value; hence maintaining the normal
that is made up of twelve pulses using IGBT as the
operation of the UPFC. In this simulation analysis, a
switching source.
three phase to ground solid fault was applied at two
The principle of operation of the UPFC is analyzed as
separate periods on a transmission line. The results
follows: Under normal operation, the rectifier charges
obtained
are
shown
in
Figures:,5-8
up the d.c 5 Simulation Results of the unified Power Flow Controller under study.
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INTERNATIONAL CONFERENCE ON ELECTRIC POWER ENGINEERING (ICEPENG 2015) OCTOBER 14-16, 2015
500
300
400 300 200 Fault voltage (volts)
Prefault line voltage (volts)
200
100
0
-100
100 0 -100 -200 -300
-200 -400
-300
-500
0
0.02
0.04
0.06
0.08 0.1 0.12 time(second)
0.14
0.16
0.18
0.2
Figure 5 Pre-fault a.c voltage waveform of UPFC
0
0.02
0.04
0.06
0.08 0.1 0.12 time(second)
0.14
0.16
0.18
0.2
Figure 6 Fault voltage waveform of UPFC
250 400
200
100
200
50
voltage(volts)
Postfaultline voltage(volts)
Prefault voltage Inverter voltage
300
150
0 -50
100 0 -100
-100 -200
-150
-300
-200 -250
0
0.05
0.1 time(second)
0.15
0.2
Figure 7 Post-fault ac voltage waveform
-400
0
0.01
0.02
0.03
0.04 0.05 0.06 time(second)
0.07
0.08
0.09
0.1
Figure 8 Inverter & pre-fault voltage waveform
6 Conclusions
ground solid fault occurred on the transmission line,
This paper presented the equation modeling of a three
thus, reducing the voltage at this interval to a zero
level static var compensator
(SVC) and the
potential. In Figure 8 it is also observed that when the
simulation of a unified power flow controller. The
fault on the line is cleared the voltage on the line
foregoing analysis of the three level SVC using the
tends to build up above the zero level. This is
Routh-Hurwitz stability criterion deduced from the
achieved by the operation of the inverter as it
characteristic equation proved that the system under
discharges the capacitor voltage through the injection
analysis is marginally stable as confirmed from the
of current to the a.c supply which compensates for
root-locus plot in Figure 4.
the drop in the transmission line voltage. During this
The simulation results obtained above show that
process, the output voltage of the inverter tends to
when a three phase to ground solid fault is applied on
decrease as the capacitor discharges as shown in
a transmission line, there is always a drop in the a.c
Figure 9. Additionally, as the capacitor discharges, its
supply voltage of the transmission lines as indicated
voltage also decreases and this process causes the
in Figures 7 - 8. It is observed that within the period
rectifier to act by charging back the capacitor through
of 0.02s to 0.042s and 0.12s to 0.14s a three phase to
the injection of reactive power into the a.c supply.
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The waveforms presented in Figure 9 proved that the inverter voltage and the a.c supply voltage are in phase. Thus conforming to the principle of unified power flow controller
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[4] Peng, F.z and Lai, J.S, “A multi-level Voltage-source Inverter for static var generator applications’’, in Journal of Japan IEE, 1994 [5] Watanabe, E.H. Stephen, R.M and Aredes, M. “New concepts of Instantaneous active and reactive powers in electrical systems with generic loads’’, IEEE Trans. Power Deliv., April,1993, Vol.8, N0.2, pp.697-703, [6]Akagi, H. Kanazawa, Y. Nabae, A.,“Generalized Theory of The Instantaneous Reactive Power in Three phase circuit’’, IPEC, Tokyo, 1983, pp.1375-1386. [7]Dass, H.K., Advanced Engineering Mathematics, S.Chand and Company ltd, New Delhi. 2010 [8]Ogata, K., Modern Control Engineering. Fourth Edition. Pearson Education Press. New York. 2003
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