Multiprogramming Stretch

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Exploitation of this parallelism presents a number of new problems in machine design ... International Business Machines Corporation, Poughkeepsie, New York ...
Multiprogramming Stretch: Feasibility Considerations / E. F. Codd, €3. S. Lowry, -. \/rrnnnniigh, C . Scalzi / T_R.r]o. 719 *I*----*--..

TR 00.719

M a y 12, 1960

MULTIPROGRAMMING STRETCH: FEASIBILITY CONSIDERATIONS

E. E. E. C.

F. Codd S. Lowry McDonough A. Scalzi

ABSTRACT The tendency towards i n c r e a s e d p a r a l l e l i s m in computers is noted. Exploitation of this p a r a l l e l i s m p r e s e n t s a number of new problems in machine design and in programming s y s t e m s . Minimum r e q u i r e m e n t s for successful concurrent execution of s e v e r a l independent problem p r o g r a m s a r e discussed. These r e q u i r e m e n t s are m e t i n the Stretch s y s t e m by a carefully balanced combination of built-in logic and programmed logic. Techniques a r e described which place the burden of the programmed logic on s y s t e m p r o g r a m s ( s u p e r v i s o r y p r o g r a m and compiler) r a t h e r than on problem programs.

(Note: Optimizing p r o b l e m s a s s o c i a t e d with multiprogramming a r e not discussed in this paper. )

Product Development Laboratory, Data Systems Division

International Business Machines Corporation, Poughkeepsie, New York

M ULTIPROGRAMMING STRETCH: FEASIBLITY CONSIDERATIONS E. E. E. C.

F. Codd S. Lowry McDonough A. Scalzi

INTRODUCTION

In r e c e n t y e a r s t h e r e h a s been a t r e n d towards i n c r e a s e d p a r a l l e l i s m i n computer design. The p r i m e a i m of t h i s p a r a l l e l i s m is to allow m o r e of the component units of a computer s y s t e m t o be kept in productive use m o r e of the time. Two f o r m s have c l e a r l y emerged. The first, which we shall c a l l local p a r a l l e l i s m , c o n s i s t s of overlapping the execution of a n instruction with that of one o r m o r e of its immediate neighbors in the instruction s t r e a m . This f o r m of p a r a l l e l i s m was p r e s e n t in a v e r y e a r l y machine, the IBM Selective Sequence Electronic Calculator, which was capable of working on t h r e e neighboring instructions simultaneously. Such p a r a l l e l i s m was l a t e r abandoned in the von Neumann type machines such a s the IBM 701. Now that we have once again reached a stage in which the logical elements a r e much f a s t e r than the m e m o r i e s , the need for this type of p a r a l l e l i s m h a s r e t u r n e d and in fact, the Stretch s y s t e m is capable of working on as m a n y a s seven neighboring instructions simultaneously. The second f o r m of p a r a l l e l i s m , which we s h a l l c a l l nonlocal, provides for concurrent execution of instructions which need not be neighbors in a n instruction s t r e a m but which m a y belong, if d e s i r e d , to entirely s e p a r a t e and unrelated p r o g r a m s . It i s this f o r m of p a r a l l e l i s m upon which we wish to focus attention. T o exhibit nonlocal p a r a l l e l i s m , a computer s y s t e m must p o s s e s s a number of connected facilities, each capable of operating simultaneously (and, except for m e m o r y r e f e r e n c e s , independently) on p r o g r a m s which need not be related t o one another. A facility m a y be a n input-output unit, a file unit, a n a r i t h m e t i c unit, a logical uni$ o r some a s s e m b l a g e of these units. In a n e x t r e m e c a s e each facility is a complete computer itself. -1

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Stretch is a multiple-facility system. The following facilities a r e capable of simultaneous operation on p r o g r a m s which need not be related:

a.

One ( o r m o r e ) c e n t r a l processing units.

b.

Each channel of the basic exchange (a switching and coordinating unit for m oderate speed input-output activities).

c.

Each disk (seeking only).

d.

The read-write channel of the high-speed

exchange (a switching and coordinating

unit for high-speed input-output activities).

The multiple-facility computing system b e a r s a close resemblance t o a job shop although the analogy can be taken too far. J u s t as the jobs to be processed in a job shop a r e split up into t a s k s which can be handled concurrently by the available facilities, so may p r o g r a m s be sub:-+-,.-at L - - I - 3uLll Laana. At any instant the tasks being executed simultaneously may belong t o the s a m e program o r to different programs. One object of concurrently running t a s k s which belong t o different ( p e r haps totally unrelated) p r o g r a m s i s t o achieve a m o r e balanced loading of the facilities than would be possible if all the t a s k s belonged t o a single program. Another object is to achieve a specified real-time response in a situation in which messages, transactions, etc., a r e t o be processed on-line. A t h i r d object is t o expedite and simplify debugging and certain types of problem solving by making it economically feasible for the prog r a m m e r t o use a console f o r d i r e c t communication with, and alteration of, h i s program. uAvAubu

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MULTIPROGRAMMING REQUIREMENTS Several problems arise when concurrent execution of p r o g r a m s sharing a common m e m o r y is attempted. F o r example, it is almost c e r t a i n that sooner or l a t e r , unless special m e a s u r e s a r e taken, one p r o g r a m will make a n unwanted modification in another due to a p r o g r a m m e r ' s blunder. Then again, when some unexpected event BCCUI:S, it is not merely a m a t t e r of deciding whether it w a s due to a machine malfunction, a programming blunder, or a n operator e r r o r , It i s n e c e s s a r y to know which of the s e v e r a l p r o g r a m s m a y have been adversely affected and which one (if any) w a s responsible, Such questions make it desirable t o establish a s e t of n e c e s s a r y conditions which a rnldtiprogrzzming system must satisfy if it is t o be generally accepted and used. W e propose the s i x conditions described below.

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a. Independence of Preparation: The multiprogramming scheme should p e r m i t p r o g r a m s t o be independently written and compiled. This is particularly important if the p r o g r a m s a r e not r e l a t e d t o one another. The question of which p r o g r a m s a r e t o be co-executed with which should not he prejudged eveE at the compiling stage.

b. Minimum Information f r o m P r o g r a m m e r : The p r o g r a m m e r should not be r e q u i r e d to provide any additional information about his p r o g r a m for i t to be run successfully i n the multiprogrammed mode. On the other hand, he should be p e r m i t t e d to supply e x t r a information (such as expected execution time if r u n alone) to enable the multiprogramming system to r u n the p r o g r a m m o r e economically than would be possible without this information. Maximum Control by P r o g r a m m e r : It may be n e c e s s a r y in a C. multiprogramming scheme to place c e r t a i n of the machine's f e a t u r e s beyond the p r o g r a m m e r ' s direct influence (for example, both clocks in Stretch). This reduction in direct control by the problem p r o g r a m m e r m u s t not only be held to a n absolute minimum, but must a l s o r e s u l t in no reduction in the effective logical power available to the programmer. d. Non-Interference: No program should be allowed to introduce e r r o r o r undue delay into any other program. Causes of undue delay include a p r o g r a m which gets stuck in a loop, and failure of an operator to complete a requested manual operation within a reasonable time. e. Automatic Supervision: The multiprogramming scheme must a s s u m e the burden of the added operating complexity. Thus, instructions for handling c a r d s , tapes, and f o r m s should originate f r o m the multiprogramming s y s tem. Sirnilarly, machine malfunctions, p r o gramming e r r o r s , and operator mistakes should be reported t o the responsible p a r t y in a standard manner by the multiprogramming system. Again, all routine scheduling should be handled automatically by the system in such a w a y that the supervisory staff can make c o a r s e o r fine adjustments at will. F u r t h e r responsibilities of the system include accounting for the machine time consumed by each job and making any time studies required for operating o r maintenance purposes.

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f. Flexible Allocation of Space and Time: Allocation of space in c o r e and disk storage, assignment of input-output units, and control of time-sharing should be based upon the needs of the p r o g r a m s being executed (and not upon some rigid subdivision of the machine). These requirements a r e met in the Stretch s y s t e m by a carefully balanced combination of built-in logic and programmed logic. The hardware for multiprogramming would be far too cumbersome and

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expensive if an attempt were made to meet these requirements by builtin logic alone, Further, the method of meeting certain of these requirements (particularly the automatic scheduling requirement) must be variable from user t o user due to variations in their objectives, First, then let us consider those mu~tipscrgrarnmingfeatures x h k h are provided in hardware in Stretch,

MULTIPROGRAMMING FEATURES IN STRETCH Before mentioning some specific features, i t is important to note that extensive use of programmed logic in a multiprogramming scheme can easily prove self-defeating because the time taken by the machine to execute the multiprogramming program may offset the gain from concurrent execution of the problem programs, However, the r a w speed and logical dexterity of Stretch a r e such that i t is possible to employ quite sophisticated programmed logic. We now describe four major features in Stretch which facilitate I-fiultipr0 gr aimx,ing.

a.

The Program Interruption System : This system w a s described in some detail at the 1957 EJCC by F. P. Brooks, Jr. Briefly, the system permits interruption of a sequence of instructions whenever the following four conditions are satisfied:

(i) the interruption system is enabled, (ii) no further activity is to take place on the current instruction, (iii) an indicator bit is on, (iv) the corresponding mask bit is on. The indicators reflect a wide variety of machine and program conditions which may be classified into the following five types: signals from input-output units, other central processing units, etc. ; data exceptions such as data flags, zero divisors, or negative operands in square root operations; result exceptions such as lost c a r r i e s , partial fields, o r floating point exponents within certain ranges;

instruction exceptions such as instructions which should not or cannot be completed or should signal when they a r e completed; and

When several problem programs a r e being executed concurrently, certain of these conditions a r e of private concern to the particular program which caused their occurrence. Other conditions, particularly types (i) and (v), a r e of general concern. Each of the indicators for conditions af private ~ i i i x e r nhas a variable mask Z i t -which allows the current program the choice of suppressing or accepting interruption for the respective condition. On the other hand, each of the indicators for conditions of general concern possesses a fixed mask bit (permanently set in the on position). This feature combined with appropriate control measures respecting the disabling of the entire interruption system virtually eliminates the possibility that an interruption of general concern i s suppressed and lost. Another aspect of the interruption system which is of importance to multipxogramming is the interrupt table. When an interruption is taken, control is passed (without changing the contents of the instruction counter) to one of the instructions in an interrupt table. The base address of this table is variable so that several such tables may exist simultaneously in memory; for example, one table for each problem program. However, only one is active a t a time. The relative location within the active table which supplies the interjected instruction is determined by the indicator (and hence by the particular condition) causing interruption. Exploitation of this interruption system depends upon programmed interrupt procedures. This aspect will be taken up when we deal with programmed logic for multiprogramming

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b. The Interpretive Console : It has been customary in general-purpose computers toprovide a single console at which an operator can exercise sweeping powers over the whole machine. For example, by merely depressing the STOP button the operator has been able to bring the entire activity of the machine to a halt. The normal requirement in multiprogramming on the other hand is to communicate with a particular program and a t the same time allow all other programs to proceed. Pursuing the same example, we now desire to stop a program rather than stop the machine. F o r this reason and because it is required that several consoles be concurrently operable with varying objectives, the Stretch console is not directly connected t o the central processing unit. Instead, it is treated as an input-output device. Its switches represent so many binary digits of input and its lights so many binary digits of output. N o fixed meaning is attached to either. By means of a console defining routine one can attach whatever meaning one pleases to these switches and lights..

c. Protection System: References by the c e n t r a l processing unit t o m e m o r y a r e checked. If the a d d r e s s falls within a c e r t a i n fixed a r e a o r within a second variable a r e a , the r e f e r e n c e is suppressed and a n -interruption occurs. 'I'he boundaries or' the variable area a r e specified by two a d d r e s s e s s t o r e d within the fixed a r e a . These a d d r e s s e s m a y be changed only if the interruption s y s t e m is

disabled.

This n3,stet.n allows any number of p r o g r a m s sharing m e m o r y t o be efieetively protected frorri each sther. At any instant, the central. processing unit is servicing only one p r o g r a m (logically speaking). Suppose this is a problem p r o g r a m P. The a d d r e s s boundaries a r e s e t s o that P cannot make r e f e r e n c e outside of i t s assigned a r e a . Before any other problem p r o g r a m Q a c q u i r e s the CPU, the a d d r e s s boundaries a r e changed to values which will prevent Q f r o m making r e f e r e n c e outside of the a r e a assigned to Q. The task of changing a d d r e s s boundaries is one of the p r o g r a m m e d functions of the Stretch multipr ogramming s y s tem.

clccks in S t r e t c h which zre usable by U = I The Clocks : There are p r o g r a m s . The f i r s t , r e f e r r e d to a s the elapsed-time clock, is a 36bit binary counter which is automatically incremented by unity once e v e r y millisecond. This clock m a y be r e a d by a p r o g r a m under c e r t a i n conditions but cannot be changed by a p r o g r a m under any conditions. It is intended for measuring and identifying p u r p o s e s , particularly in accounting for machine u s e , logging events of special i n t e r e s t , and identifying output. It takes m o r e than two y e a r s for this clock to go through a complete cycle. t%7C

The second clock, r e f e r r e d to as the i n t e r v a l t i m e r , is a 19-bit binary counter which is automatically decremented by unity once e v e r y millisecond. Under c e r t a i n conditions the interval t i m e r may not only be consulted but also be s e t to any d e s i r e d value by a p r o g r a m . Whenever the interval t i m e r reading r e a c h e s z e r o , a n interruption o c c u r s ( i f the interruption s y s t e m is enabled). The main purpose of this device is to provide a means for imposing time l i m i t s without requiring p r o g r a m m e d clock-watching: that i s , frequent inspection of the elapsed-time clock. T h e r e a r e s e v e r a l other f e a t u r e s in S t r e t c h which facilitate multiprogramming. To avoid going into too much detail, we shall m e r e l y make a brief r e f e r e n c e to one of these. The exchanges a s s u m e all the burden of word a s s e m b l y on input and d i s a s s e m b l y on output, Once a n input-output operation h a s been s t a r t e d , the responsible exchange is sufficiently autonomous that i t does not need t o interrupt the c e n t r a l processing unit in o r d e r to borrow some of i t s logical abilities (and t i m e ) for the purpose of completing the operation. It i s capable of

conducting the e n t i r e operation itself even though, for example, t r a n s m i s s i o n of s e v e r a l variable-length blocks f r o m tape is involved and the channel i n s t r u c t i o n s a r e s c a t t e r e d in m e m o r y . As a r e s u l t of this d e g r e e of autonomy, the frequency of input-output i n t e r r u p t i o n s is cslisideralRly reduced.

Now we t u r n our attention t o the p r o g r a m m e d logic and d i s c u s s how we p r o p o s e to exploit the built-in logic by p r o g r a m m i n g techniques in o r d e r t,o m+eet the rerrii;remente for a c c ~ p t a b m l ~a ~ l trj r rbr ~ a r a m r n i n gThree . 1"" - - * * - * - - tools a r e at our disposal: the s u p e r v i s o r y p r o g r a m , the c o m p i l e r , and the s o u r c e language. ---*--*---

The s u p e r v i s o r y p r o g r a m is a s s u m e d to be p r e s e n t i n the machine whenever m u l t i p r o g r a m m i n g is being attempted. It is a s s i g n e d the job of allocating s p a c e and t i m e t o p r o b l e m p r o g r a m s . All---&:--

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d i s k s t o r a g e and which input-output units a r e to be a s s i g n e d to e a c h of the p r o g r a m s . The s p a c e r e q u i r e m e n t s (including the r e q u i r e d n u m b e r of input-output units of e a c h type) a r e produced by the c o m p i l e r as a v e c t o r whose components a r e quantities dependent in a s i m p l e way upon one o r m o r e p a r a m e t e r s which m a y change f r o m r u n to run. Any s p a c e r e q u i r e m e n t s depending on p a r a m e t e r s a r e evaluated a t loading t i m e when the p a r t i c u l a r values of the r u n p a r a m e t e r s a r e made available.

The s u p e r v i s o r y p r o g r a m u s e s i t s p r e c i s e knowledge of the s p a c e r e q u i r e m e n t s of a p r o b l e m p r o g r a m together with a n y information i t may have r e g a r d i n g the expected execution t i m e and p a t t e r n of activity to d e t e r m i n e the m o s t opportune t i m e t o bring that p r o g r a m into the execution phase. It is not until the decision t o execute is made that specific a s s i g n m e n t s of m e m o r y s p a c e , d i s k s p a c e , and input-output units a r e put into effect. By postponing space allocation until the l a s t minute, the s u p e r v i s o r y p r o g r a m maintains a m o r e flexible position and is thus a b l e t o cope m o r e effectively with the m a n y eventualities and e m e r g e n c i e s which b e s e t computing installations no m a t t e r how well managed they a r e . Allocation of t i m e includes not only d e t e r m i n i n g when a loaded p r o g r a m should be put into the execution phase but a l s o handling queues of r e q u e s t s f o r f a c i l i t i e s f r o m the v a r i o u s p r o g r a m s being c o n c u r r e n t l y executed. The fact that both pre-execution queueing a n d in-execution queueing a r e handled by p r o g r a m m i n g r a t h e r than by s p e c i a l h a r d w a r e r e s u l t s in a high d e g r e e of flexibility. Thus, a t a n y t i m e the s u p e r v i s o r y p r o g r a m is a b i e t o change the queue discipiine in u s e on a n y s h a r e d faciiity and so cope m o r e effectively with the v a r i o u s types of s p a c e and time

bottlenecks which may arise. On interruptable facilities, such as the Stretch CPU, which d1.0~ one program t o be displaced by another, changes in queue discipline may be expected t o have very considerable effect upon the individual and collective progress of the programs being co-executed. These allocating powers of the supervisory program have several implications. Most important of these is that the compiler must produce a fully relocatable program-relocatable in memory and in disk storage, and with no dependence on a specific assignment of inputoutput units. A further consequence is that the supervisory program is responsible for all loading, dumping, restoring, and unloading activities, and will supply the operator with complete instructions regarding the handling of cards, tapes,and forms.

In order to meet the requirements of independent preparation of problem programs and non-interference with one another, it is necessary to assign the following functions to the supervisory program:

a.

Direct control of the enabled/disabled status of the interruption system.

b.

Complete control of the protection system and clocks. The transformation of 1/0requests expressed in t e r m s of symbolic file addresses into absolute 1/0instructions (a one-to-many transformation) followed by the issuing of these instructions in accordance with the queue disciplines currently in effect.

d.

The initial and, in some cases, complete handling of interruptions from 1 / 0 units and other central pr oces sing units.

By convention, whenever a problem program is being serviced by the central processing unit, the interruption system is enabled. On the other hand, when the supervisory program is being serviced, either the enabled o r the disabled status may be invoked according to need. Adherence to this convention is assisted by the compiler which: a.

refrains from generating in problem programs the instruction BRANCH DISABLE(an instruction which completely disables the interruption system); and

b.

whenever it encounters this instruction in the source language itself, substitutes a partial disable (a pseudo instruction) in its place, flagging it as a possible e r r o r .

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So long as the interruption system is enabled, the protection system is effective, Problem programs a r e therefore readily prevented from making reference to the a r e a s occupied by other programs (including the supervisory program itself), They a r e further prevented from gaining direct access to the address boundaries, the interrupt table base address, and the clocks, all of which a r e contained in the permanently protected area. F o r the sake of efficient use of the machine, one further demand is made of the programmer o r compiler, When a point is reached in a problem program beyond which activity on the central processing unit cannot proceed until one or more input-output operations belonging to this program (or some related program) a r e completed, then control must be passed to the supervisory program so that other problem programs may be serviced.

It is important to observe that w e do not require the programmer or compiler to designate places in the p r G r a m a t which control may be taken a w a y if some higher priority program should need servicing. We believe this to be an intolerable requirement when unrelated programs a r e being concurrently executed, especially if all arithmetic and status registers at such places must contain idormation or’rm further value. It is the interruption system (particularly as i t pertains to input-output) which makes this requirement unnecessary, It allows control to be snatched a w a y at virtually any program st’ep, and the supervisory program is quite capable of preserving all necessary information for the displaced program to be resumed correctly a t some later time, In removing certain features of the machine from the direct control of the problem programmer, we may appear to have lost sight of the requirement that he should have a maximum degree of control. However, for every such feature removed, we have introduced a corresponding pseudo feature. Take for example, the pseudo- DISABLE and pseudoENABLE instructions, When a problem program P issues a pseudo -DISABLE, the supervisory program effectively suspends all interruptions pertaining to P (by actually taking them and logging them internally) until P issues a pseudo-ENABLE. Meanwhile, the interruptions pertaining to other programs not in the pseudo-disabled state a r e permitted to affect the state of the queue for the CPU, Another example of a pseudo feature is the pseudo interval timer: one of these is provided for each problem program, The supervisory program coordinates the resulting multiple uses of the built-in interval timer. The need to detect that a program has become stuck in a loop, o r that an operator has not responded to an instruction from the supervisory program, is met by allotting a reasonable time limit for the activity in questicn, W h e n t b i s interva? expires withorrt the supervisory p3;?0grtim1

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receiving a completion signal, a n overdue signal is sent to a n appropriate console. The interval t i m e r is, of course, used for this purpose and expiration of the interval is indicated by the time-signal interruption.

CONCLUDING REMARKS In o r d e r t o provide a practical demonstration of the feasibility of multiprogra,mrming Stretch, the authors a r e developing an experimental superv i s o r y program with general multiprogramming capabilities. The experiments t o be performed with this s y s t e m a r e aimed at exploring conditions under which multiprogramming is profitable t o the u s e r .

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Prepared by Laboratory

Communications, Data Systems Division, Product Development Laboratory

International Business Machines Corporation, Pough keepsie, New

York

Printed in U. S. A. 1959