Parallel Operation of Multi-Mode Voltage Source

Parallel Operation of Multi-Mode Voltage Source Inverter Modules with Equal Load Sharing in Single Phase AC Systems Emanuel Serban, Member, IEEE, Masautso Ngosi, Member, IEEE, Trevor Monk Xantrex Technology Inc., Burnaby, British Columbia, Canada

Abstract—This paper presents a practical control method for parallel operation of Voltage Source Inverter modules with equal load sharing of the inter-connected modules. The main focus of the paper centers on control methodology for achieving precise phase synchronization for equal load sharing with minimum current circulation between the paralleled power converter modules, robust dynamics system control under different transient conditions. A form of communication between the converter modules is required for energy monitoring, real time control and diagnosis for scalable single and/or multi-phase systems and is introduced in the paper. Simulation and experimental results of the digital control implementation of multiple converter modules are also presented. Lastly this paper covers an introduction to multi-mode operation of voltage source converters. Index Terms—Voltage Source Inverter (VSI), Pulse width modulation (PWM), Point of common coupling (PCC), Controller area network (CAN), Look up table (LUT), Power Factor Correction (PFC).

I. INTRODUCTION Based on the architecture and topology of converter under discussion, two main control schemes for the parallel operation of AC voltage source inverters have been proposed: 1). Droop control method based on modulation of output voltage and frequency to regulate power flow between converters. Improvements over conventional droop control have been made with lower voltage distortion, improved power sharing under linear and nonlinear loads, independent operation of line impedance between converters and without communication signals between converters [1,2,3]. Droop method is very attractive in mini-grid type power generation where antiislanding is not a requirement therefore has a limited application. 2). A technique for active current sharing of converter modules requiring hardwire interconnection for sharing of voltage phase, current and other parametric information among power converters [4,5]. This method is attractive in grid-connected power systems, where important system features such as fast, synchronized AC transfer (pseudo UPS transfer time) between inverter back-up power mode and utility interactive converter modes. In applications for distributed power generation utilizing renewable sources, it is important to have the

ability to dispatch the energy optimally as well as control the power conversion system in inverter back-up power mode, utility interactive grid-tie inverter mode, active rectifier mode and active power filter mode. Utility interactive converters have means of islanding detection while supplying power to the utility grid from renewable energy sources [13,14,15]. Electrical power demand in both utility interactive and off-grid applications systems require dc and/or ac coupled systems where device control, remote and local monitoring, diagnostics and storage of energy are important functions. Most modern designs typically employ a multitude of mostly proprietary communication protocols between converter modules to facilitate multimode functions of ac/dc and dc/ac energy conversion. Parallel operation of inverter back-up converters requires dedicated control schemes since AC forming voltage must be synchronized in frequency, amplitude and phase to optimize output power sharing, and minimize circulation of reactive elements between paralleled sources. Modularity of power converters is an important aspect of an AC power system in order to enhance scalability. The proposed power converter module addresses this multiple mode converter requirement by embedding the following multi-mode capabilities in the architecture, as illustrated in Fig. 1: a.) Voltage-controlled VSI, dc to ac energy conversion for inverter mode back-up power or ac mini-grid, where the ac voltage and frequency are precisely controlled to power-up the ac critical loads. b.) Current-controlled VSI, dc to ac energy conversion for grid-tie inverter mode, power export to AC Grid from dc renewable sources, where the current is precisely sinusoidal controlled in phase with the AC Grid voltage. c.) Active rectifier mode with power factor correction (PFC), ac to dc energy conversion for battery charging applications. d.) Active power filter where corrective current harmonics are injected to compensate for otherwise high load current harmonics from being drawn from the AC Grid. The first three modes mentioned above have been digitally implemented on a single Digital Signal Processor within the topology to be described.

Total fundamental power P1 delivered by n converter modules to AC loads at the PCC is:

MULTI-MO DE CO NVERTER

=

RENEWABLE ENERGY SO URCES

n

P1 = ∑ P1k =

~

k =1

ENERGY STO RAGE

AC LO ADS AC GRID

II. BASIC CONVERTER MODEL ANALYSIS AC voltage controlled sources have sinusoidal voltage output and the sourced current can be distorted based on the load characteristics. When voltage-controlled VSI are parallel connected, inherent differences in ac voltage amplitude tend to generate reactive power flow; phase difference causes active power flow (circulating currents) between converter modules. Control schemes and algorithms are required to continually correct these variances and achieve stable operation of the system. S1

conv#1 q3 Vo1 C1

Vo

Rp,1 X1

L PCC Z

C1

Io1

n

∑R k =1

V0 k δ k p , k + jX k

(2)

All power converters modules utilize locally sampled power/current data to adjust respective individual AC voltage amplitude in order to regulate the fundamental reactive power flow Q1k between converter modules and ultimately for load sharing purpose.

Figure 1. Multi-mode power converter system application

q1

V0 N

AC Grid

N

Q1k =

V0 k NV0 cos δ k − V02 V0 k NV0 − V02  N 2 ( R p , k + jX k ) N 2 ( R p , k + jX k )

(3)

III. SYSTEM CONVERSION CONTROL ANALYSIS OF PARALLEL CONNECTED VOLTAGE-CONTROLLED VSI Load sharing of parallel connected voltage-controlled VSI modules poses two challenging aspects: real time ac voltage synchronization in frequency, amplitude and phase in order to achieve robust system dynamics under different loads or source perturbations, and equal load sharing with negligible current circulation between converters. The converter modules utilize a hardware based synchronizing bus for phase synchronization and CAN based data communication interface as illustrated in Fig.3.

1:N q2

conv#1

q4

Sk

conv#k q1

q3 Vok

Vdc

C2

Vo

Rp,k Xk

L

VS

VP

PCC

Ck

Iok

CANBUS

SYNC_PH_OUT

SYNC_PH_IN

SYNC_COM

N q2

q4

q1

q3

Sn

conv#n Von Cn

Vo

Rp,n Xn

L PCC

conv#k

Cn

Ion

CANBUS

SYNC_PH_OUT

VS

VP N

1:N q2

q4

Figure 2. Equivalent diagram of power converters parallel connected to PCC AC voltage bus and to Utility AC Grid

Fig. 2 presents a simplified block diagram with converter conv#k, parallel connected with (n-1) power converters modules at the point of common coupling (PCC) where the AC voltage bus V0 sources power to the AC load Z. Considering the case of sinusoidal voltage at PCC, the respective reference voltages of paralleled converter modules are dynamically controlled in phase and amplitude; the fundamental active power flow P1k from each converter module and AC load connected to the common AC voltage bus V0 is a function of power angle δ k
(V0 k , V0 ) :

V0 kV0 V0 kV0 sin δ k  δk (1) N ( R p , k + jX k ) N ( R p , k + jX k ) Where V0k represents the unfiltered voltage, Rp,k is the output inductor filter resistance, winding resistance, Xk is the filter inductor reactance, N is secondary to primary transformer turns ratio, and δk is angle difference between V0 and V0k of each converter module. P1k =

SYNC_PH_IN

conv#n

SYNC_COM

SYNC/CAN BUS

1:N

CANBUS

SYNC_PH_OUT

VS

VP

SYNC_PH_IN

SYNC_COM

Figure 3. Phase synchronization and CAN communication structure

A. Phase synchronization control scheme In each converter module voltage loop, sine-wave reference is governed by an internal digital look-up table (LUT). The sine-wave voltage reference (Vs) has to be in phase and with the same frequency with respect to other paralleled converters. The solution implemented as represented in Fig. 3 provides for better noise immunity and ground loop elimination by optically isolating the data and phase synchronization signals. A primary module is

automatically assigned by an arbitration process between the converters and assigned the responsibility for frequency and phase system communication to the secondary modules. For system reliability, if the primary module fails then a new leader is automatically reassigned by the arbitration process. B. Digital data system communication In this application, CAN was chosen as the physical layer due to its proven robustness. A proprietary software application manages the exchange of load sharing data in fast packets at sufficiently high rates for acceptable load share control loop bandwidth (see Fig. 6 and Fig. 7 for data sampling time differences). Three control methods were considered as viable implementation for parallel converters operation: 1.) Primary module role for load sharing A scheme of “n” converter modules where one power converter is assigned the role of primary module and (n-1) converters are assigned as secondary modules. The primary module dictates the ac voltage bus V0 reference and broadcasts its power or current to other converters which then adjust respective local variables within a pre-defined range. Load sharing is achieved by manipulating local controller Gd in order to equal the output of the primary module. x* = xPRIMARY where x represents the converter output active power or current. This control method presents the advantage of better system control and predictability in multi-mode transitions. It also offers reduced traffic loading of the data link and ultimately increased bandwidth of the load sharing control loop. Special attention has to be paid to the execution of the primary module election process which, coupled with data link latencies, can result is significant brown outs and system disturbance if not executed timely. Various algorithms can be employed for such scheme but it is beyond the scope of this discussion. 2.) Maximum power/current based election for equal load sharing Parallel method of “n” converters where the primary module is dynamically elected based on instantaneous loading of the converter modules: x* = max( x1 , x2 ,...xn ) where x represents the inverter output active power/current. 3.) Average power/current for equal load sharing Parallel method of “n” converters where the each module receives “n-1” power or current values from CAN data and then calculate the average power/current for the local voltage control adjustment [6]. n

x = ∑ ( xk / n) where xk represents the inverter output *

k =1

active power/current. The first control method of primary module role assignment has been implemented, extensively tested and evaluated. By convention, only the primary module is allowed to assert the phase synchronization signal, however the open-drain configuration allows any module to act as a primary module. This facilitates primary module arbitration in software without hardware reconfiguration.

The phase synchronization and shutdown signals are connected to external interrupt signals on the DSP. Even the primary module’s signals are looped back to external interrupt inputs. This minimizes timing error between all modules, since the delays caused by the optically isolated interface are consistent across all modules. The output sine-wave is generated using a sine wave LUT. The sine wave output frequency is determined by a timer controlled by the primary module. When the primary reaches the end of its lookup table, it asserts the synchronization phase signal, forcing each connected module (including the primary) to reset to the beginning of its LUT. Synchronization errors can be detected easily by monitoring the presence of the synchronization phase signal. If a module overruns the end of its LUT and no phase signal is detected, or if a phase signal is detected at any other point in the sine wave lookup table, the system will gracefully shut down with a synchronization error. This mechanism prevents damage in the event that the synchronization cable is accidentally cut or removed during system operation. The shutdown signal can be asserted by any module in the event of a critical fault. This will force all connected modules to shutdown immediately. The digital communication is implemented using a proprietary communications protocol based on CAN. The protocol is primarily a peer-to-peer broadcast architecture, where each device on the network broadcasts its status. Facilities exist to support directed command-response type network traffic for system configuration, however for the purposes of this discussion, only the status broadcast is considered. As such multiple converter modules operating in parallel are required to maintain equal voltage/current amplitude, frequency/phase synchronization within the power system. The system is designed as n converter modules illustrated in Fig. 2 and (n-1) converter modules will be available to sustain energy transfer to AC loads in the event of a single converter module failure. Considering the converter modules connected in parallel and sharing a common AC load Z at a point of common coupling (PCC) where V0 is the common AC voltage bus, V0k represents the modulated voltage before filtering. conv#k q1

q3 Vok

Vdc

Cdc

q2

Sk PCC

Vo

L

C

Iok

q4

3. Active rectifier mode with PFC -battery charge mode

AC Grid

1:N Mcos(w t)

Integrated multi-mode control functions: 1. Invert voltage-controlled VSI -inverter back-up mode 2. Invert current-controlled VSI -power export mode

Z

PWMq1 PWMq2 Vtr

d(t)

PWMq3 PWMq4

Mcos(w t+pi)

Figure 4. Simplified multi-mode converter block diagram

Fig. 4 represents a simplified converter block diagram where the energy conversion can be bi-directionally controlled and supports operation in multiple modes. The converter module utilizes a single stage, bidirectional four-quadrant high frequency H-bridge q1 …q4 topology, which modulates the DC bus Vdc into an average

output voltage, e.g. V01 Fig. 4. The average amplitude of V01 is proportional to the controlled duty cycle of the inverter. Sine-wave Pulse Width Modulation (PWM) is achieved by using a symmetrical ramp comparison with two complement reference signals, resulting in unipolar PWM modulation. Line-to-line output voltage V0 can reach values of +Vdc and zero during the positive period of the reference and –Vdc and zero during the negative period of the reference. The second order L-C low-pass filter attenuates the harmonics of the switching operation and restores the desired fundamental ac voltage signal. The output voltage feedback is compared with the sine reference signal and the error is compensated by a voltage controller Gv whose output becomes the current command or reference i*. The difference between i* and inductor current ii is compensated by the current controller Gi which generates the duty cycle command: d (t ) q1q2 = M cos ωt , d (t ) q3 q4 = M cos(ωt − π ) where M is

the modulation index, 0 < M < 1 . com

SYNC

LUT

Vs

Xv(s)

Gd Yd(s)

Pok_bus

Gv Yv(s)

V* kd

Gi I*

Yi(s) Xi(s)

Vo

km

Vok

1 sL

Iok

1 sC

Vo

Xd(s)

Rp

Pok

Ik

1 Z(s)

Vo

Gd Iok_bus

Yd(s) Xd(s)

Iok sgn(Pok) variance

Figure 5. Voltage-controlled VSI control block diagram for standalone or parallel converter operation (inverter mode)

Referring to control block diagram, Fig. 5, the function of each control compensator (Gv(s) for voltage loop, Gi(s) for current loop, Gd(s) from load sharing loop) is to calculate the difference between input (or commanded variable) and the actual output of each loop. The compensator provides the gain that forces the controlled variable to follow the command input by driving the output variable in a direction that minimizes loop error. The gain and bandwidth of each error amplifier would be primed and optimized in order to meet system gain and dynamic performance while maintaining control loop stability over entire load and input voltage ranges. LUT block represents the sine-wave look up table which has a phase synchronization with other paralleled modules, Pbus represents the active power (respectively the necessary shared current i0k_bus) transmitted via CAN bus, P0 represents local active power (respectively i0k local inductor current); km represents PWM modulator gain. Gv(s)/Gi(s) is the voltage/current controller transfer function, Rp represents the output inductor filter resistance, printed wire board resistance, winding resistance. From Fig. 4 the filtered output voltage v0 of the closedloop system is derived as: v0 (s) = −

Gv (s)Gi (s)kmkd vs (s) − s2 LC + s[RpC + Gi (s)kmC] + Gv (s)Gi (s)km +1 sL + Gi (s)km + Rp

s2 LC + s[RpC + Gi (s)kmC] + Gv (s)Gi (s)km +1

(4)

ik (s)

Where Gv(s) is the voltage loop transfer function k ( s + ω zv ) represented as type 2 compensator: Gv ( s ) = sv s ( s + ω pv ) implemented with anti-wind control of the integral action;

Gi(s) is the current transfer function represented as a PI compensator: Gi ( s ) = k p + ki / s ; Gd(s) is the load sharing compensator represented as lag-lead compensator which improves the steady-state performance due to high gain at low frequency and reduced gain in the higher range of frequencies: Gd ( s ) = ( s + ωdz ) /( s + ωdp ) .

The filtered output voltage can be written as sum of two average components: (5) v0 ( s ) = v '0 ( s ) + v ''0 ( s ) Where v0 '(s) =

Gv (s)Gi (s)km kd vs (s) (6) s 2 LC + s[ Rp C + Gi (s)kmC ] + Gv (s)Gi (s)km + 1

Maximizing the voltage gain of voltage/current controller Gv(s)/Gi(s) improves accuracy of output voltage and maximizing the bandwidth of controller Gv(s)/Gi(s) optimizes the dynamic response characteristics (step load response, start-up transient) of controlled variable. The reference of the voltage loop is the product between the sine-wave reference vs(s) and load sharing function kd: v0* ( s ) = vs ( s )kd . Load sharing between converter modules is achieved through a load sharing compensator Gd(s) where its output kd has clamped dynamic range in order to limit the modulation range of each paralleled module to the allowable regulation scale of the output voltage. sL + Gi (s)km + Rp v0 ''(s) = − 2 ik (s) (7) s LC + s[RpC + Gi (s)kmC] + Gv (s)Gi (s)km +1 Where the inverter output impedance approximation is: sL + Gi (s)km + Rp v ''(s) (8) = 2 Z0 (s) = 0 ik (s) s LC + s[RpC + Gi (s)kmC] + Gv (s)Gi (s)km +1 The inverter output impedance has to be minimized in order to achieve low voltage harmonic distortion under different load characteristics and a change in inductor current would affect the inverter output impedance. With inductor current feedback control, the gain of current controller should be optimized in order to maintain lower output impedance under varied load conditions. [1,7,8,9]. However, the goal is to decouple the load disturbance in the output voltage, v0 "( s ) / i0 ( s ) → 0 . Active load sharing is achieved by dynamically adjusting the load sharing controller transfer function, Gd(s) and its output is: kd = ( x *( s ) − x0 ( s )) ⋅ Gx ( s ) where x* is the primary converter module’s output active power or current and x0(s) is local converter module’s measured output active power or current. In order to improve the output voltage distortion in presence of nonlinear loads, proportional resonant controllers, harmonic compensators can be included for both current and voltage loops [10, 11, 12]. C. Electronic simulations The performances of two paralleled converters have been extensively investigated using PSpice computer simulation and compared with experimental results and evaluations. The electronic simulation is a time domain analysis of two dc/ac converters paralleled connected at the same AC bus, at switching frequency of 12kHz, with nested voltage/current control loops in each module. It can

be noted that the use of discrete data communication for load sharing control variables adds latency and has an impact on load sharing between converters. Results shown in Fig. 6 and Fig. 7., depict i1 the output current of converter conv#1 and i2 for converter conv#2 and circulation current between converters is (i1-i2). It can be noted that increasing the sample rate of the data link results in increased share loop bandwidth and hence lower circulation current between converter modules.

currents are well maintained under 4% of the ac output converter current as shown in Fig. 13 with non-linear load. Transient conditions were evaluated under the following conditions: secondary converter module start-up disturbance on common AC bus, load step, AC transfers between inverter back-up mode and AC Utility Grid. 1. Converter transient response experiment 1.1 Fig. 8 shows a start-up transient when a second converter conv#2 (i2) comes online on a common AC bus; it can be seen that during conv#2 transition to common AC bus causes conv#1(i1) to be desynchronized from sharing the active power at the AC load, instead an overshoot in power sharing and a large amount of reactive power flowing occur between converter modules conv#1 and conv#2 for the first few hundreds of milliseconds therefore not a stable load share transition.

Y-axis: C1: i1 50A/div C2: i2 50A/div C3: (i1-i2) 50A/div X-axis: 20ms/div Figure 6. Simulation of two converters with load sharing and data sampling time of 75ms: no load, 25Arms and 50Arms step load, with an average circulation current of 1.7Arms (7%)

Y-axis: C1: i1 25A/div C2: i2 25A/div C3: V0 250V/div X-axis: 20ms/div Figure 8. Illustration of undesirable effect on PCC at start-up of secondary module conv#2 (i2) where conv#1(i1) is already online due to absence of anti-wind control in the voltage compensator

1.2 Connection (start-up) of converter conv#2 to PCC: stable and seamless AC load share transition with minimal circulation current as illustrated in Fig. 9. Y-axis: C1: i1 50A/div C2: i2 50A/div C3: (i1-i2) 50A/div X-axis: 20ms/div Figure 7. Simulation of two converters with load sharing and data sampling time of 50ms: no load, 25Arms and 50Arms step load, with an average circulation current of 0.6Arms (2.5%)

IV. EXPERIMENTAL RESULTS OF PARALLEL CONNECTEDVOLTAGE-CONTROLLED VSI The proposed parallel method achieves the following electrical characteristics: excellent dynamics (step load response, voltage regulation, seamless secondary module start-up). System efficiency is optimized by staggering operation of converter modules based on load requirements. System loading is continuously monitored and modules brought on-line depending on demand. The scheme allows converters to operate close to peak efficiency per converter, e.g. for PLOAD ∈ [0.15 ÷ 0.5]PN , conv the efficiency is greater than 95% per converter module). Converter control and architecture is implemented using a 32-bit TMS320F2812 DSP running at 150MHz. Two and three converters modules were tested in parallel configuration and the performance was evaluated under load sharing and different dynamic test conditions. Each power module has a nominal output power of 6kVA, 60Hz/50Hz, input dc voltage range of 40-60Vdc and ac output voltage of 240Vrms/230Vrms. The effect of active/reactive power flow circulation between converters is very low, since the circulation

Y-axis: C1: i1 25A/div C2: i2 25A/div C3: (i1-i2) 25A/div X-axis: 20ms/div Figure 9. Illustration of improved effect on PCC at start-up of secondary module conv#2 (i2) where conv#1(i1) is already online due to addition of anti-wind control in the voltage compensator

In order to achieve a seamless start-up or connection of a secondary module, anti-wind control of the integral term in the voltage compensator was added to prevent unlimited build-up of error and should be optimized as well not to affect the dynamic range of sharing current controllers in the converter modules, e.g. at lower dc input range the current sharing starts to degrade if the integral limiter is considerably reduced. This was critical in achieving seamless start-up and fast AC load sharing at startup of a second converter. 1.3 Step load response: output currents of two converters are represented in Fig. 10: stable system response with negligible circulating current.

Y-axis: C1: i1 20A/div C2: i2 20A/div C3: (i1-i2) 20A/div C4: V0 500V/div X-axis: 20ms/div Figure 10. Illustration of stable step load response on both converters with equal load sharing

1.4. Step load response with different line impedance between each converter module to the PCC AC voltage is R1w+jX1w=0.1+j0.03 and R2w+jX2w=0.1+j0.75: stable system response independent of the line impedance as represented in Fig. 10.

Y-axis: C1: i1 20A/div C2: i2 20A/div C3: V0 500V/div C4: (i1-i2) 20A/div X-axis: 10ms/div Figure 10. Illustration of independent step load control response of the line impedance

2.

Experiment of load sharing in steady state 2.1 Combination of resistive load and light bulbs under steady state condition: three converters output currents are represented in Fig. 12.

Y-axis: C1: i1 30A/div C2: i2 30A/div C3: i3 30A/div X-axis: 10ms/div Figure 12. Converter output current in steady-state: three converters modules conv#1(i1), conv#2(i2) and conv#3(i3) sharing a load of 18kW

2.2 Non-linear load under steady state: output currents of three converters are represented in Fig. 13. The total voltage distortion is less than 3% over the full resistive load range with three paralleled converters. The system stability and dynamics has been proven under different conditions represented in Fig. 9-13, with excellent start-up transition, equal load sharing between converter modules under linear and non-linear AC loads, step load response and minimal circulating currents between converter modules.

Y-axis: C1: i1 20A/div C2: i2 20A/div C3: (i1-i2) 20A/div C4: V0 500V/div X-axis: 10ms/div Figure 13. Converter output current, circulating current and AC voltage bus in steady-state of conv#1(i1), and conv#2(i2) sharing a nonlinear load

V.

ADVANTAGE OF SELECTED TOPOLOGY: MULTIMODE CONVERTER OPERATION The power topology is comprised of a high-frequency full bridge PWM converter, LC filter, isolation 50/60Hztransformer and ac transfer switch. The topology was selected due to the inherent advantage of isolated bidirectional energy conversion, simplified hardware and control strategy for multi-mode operation. The disadvantage of size and weight of 50/60Hz line frequency transformer is compensated by the increased reliability (since at least two power converter stages highfrequency would be required for the bi-directional isolated ac/dc conversion), center-tap availability for 120/240Vrms North American AC system. The following multi-mode features have been practically implemented and evaluated: a.) Voltage-controlled VSI, dc to ac energy conversion for inverter mode back-up power application where the ac voltage and frequency are controlled (i.e. grid forming for ac loads). This mode of operation has already been presented. b.) Current-controlled VSI mode dc to ac energy conversion for grid-tie inverter mode, where the ac current is controlled and the ac voltage and frequency is controlled by the utility company. This mode is primarily used when renewable energy is exported from dc port to AC Grid. For example the Photovoltaic (PV) array is connected to the dc bus via a battery charge controller which is a dc/dc PWM converter. When the AC Grid is qualified the converter transfers from inverter mode to utility-interactive grid-tie inverter mode and the AC loads will be powered by the utility grid. The PV charge controller harvests the maximum energy from the PV array to the battery bank and if the battery dc voltage is above a certain level (e.g. battery float level) then the multi-mode converters, Fig.1, will export power to the AC loads and/or AC Grid. In Fig. 14 is illustrated the simplified architecture for grid-tie inverter mode where the converter is controlled as current-controlled VSI. The sine-wave current reference generated by the LUT is phase synchronized with the grid frequency to achieve unity power factor and the current control has an islanding protection algorithm [13].

Gi Vo PLL AI

Vs

LUT

I*

Yi(s) Xi(s)

km

Vok

1 sL

Iok

1 sC

Vo f(v,p) Vdc

Gdc Ydc(s) Xdc(s)

Yp(s) Xp(s)

Vdc,set

Ik

Rp

Gp

1 Z(s)

Vo

Pac Pac,set

Figure 14. Current-controlled VSI control block diagram for utility interactive converter (grid-tie inverter) operation

Along with the inner current control loop (Gi), two additional control loops have been implemented (PIDtype): battery control loop (Gdc) and the power control loop (Gp). In utility interactive grid-tie inverter mode, the converter modules parallel connected at the AC Grid and DC port (same battery bank) will transfer the dc energy to AC Grid and the battery control loop has the ability to “regulate” the dc voltage to a prescribed value (Vdc,set).

Y-axis: C1: V0 500V/div C2: i1 60A/div C3: i2 60A/div C4: i3 60A/div X-axis: 10ms/div Figure 15. Experimental results: illustration of AC Grid voltage (V0,grid) and three converters currents (i1, i2, i3). The converters are in parallel in grid-tie inverter mode and equally exporting power, 25Arms per module to AC Grid. Notice the equal export current is well regulated by the battery control loop and is achieved without the communication between three converters

c.) Active rectifier mode with power factor correction, ac to dc energy conversion where the dc voltage or current is well regulated (i.e. battery charge algorithm). Gi Vo

I*

Yi(s) Xi(s)

km

Vok

1 sL

Iok

1 sC

Vo f(v,i) Gvdc Vdc,set

Yv(s) Xv(s) Vdc

Rp

Gidc Yi(s) Xi(s)

Ik

1 Z(s)

Vo

Idc,set Idc

Figure 16. Control strategy of active rectifier with power factor correction block diagram

Fig. 16 illustrates a simplified architecture for active rectifier mode where the converter has three control loops. The inner PFC control loop (Gi) programs the input ac current to track the AC Grid voltage (V0) with near unity power factor, as it can be seen in Fig. 17. Two outer control loops are implemented for dc voltage regulation (Gvdc) and dc current regulation (Gidc), for battery bank charge. A sample of experimental results is shown in Fig. 17 where three converters are parallel connected and each converter input current from AC Grid is nearly sinusoidal, charging the battery bank with total of 225Adc/57Vdc (constant current of 75Adc per converter). The equal load sharing in active rectifier mode is achieved without system communication.

Y-axis: C1: V0 500V/div C2: i1 25A/div C3: i2 25A/div C4: i3 25A/div X-axis: 10ms/div Figure 17. Experimental results: illustration of AC Grid voltage (V0) and three converters currents (i1, i2, i3). The converters are parallel connected in active rectifier mode with PFC and equally charging the battery bank, 21Arms per module input current from the AC Grid. Notice the equal input current from the AC Grid is well regulated by the battery outer control loop and inner fast current loop and is achieved without the communication between three converters

VI. CONCLUSION The control of parallel converter modules in a scalable power system has been presented here, providing a practical, flexible and robust technical implementation with minimal digital control overhead. Each converter module operates autonomously by integrating full digital control and peer-to-peer data communication within the system. In inverter mode as parallel voltage-controlled VSI, the system synchronization is achieved with the ease of a single daisy-chain hardwired link capable of supporting single or three phase AC configurations for high flexibility setup. Each converter module has identical control capabilities therefore any module can be automatically reassigned as primary module. The primary module has the role of fast AC Grid voltage transfer for utility interconnected systems. In utility interactive mode, when the parallel converter operates in grid-tie inverter mode or battery charge mode, the equal sharing is achieved without communication due to the nested control loop control, each converter operates independently. The control strategy achievements as a practical approach presented, are: 1. Stable and robust control of paralleled VSI converter modules under different system perturbations, step load response, start-up transients at the common AC voltage bus and load sharing independent of line impedance. 2. Minimum circulation current between converters under no load or load conditions in inverter back-up power mode (voltage-controlled VSI). 3. Peer-to-peer data interchange between paralleled converters for AC Grid qualification and transfer synchronization between inverter power back-up mode and AC Grid utility interactive mode. 4. Equal load sharing between multiple paralleled converter modules in all three modes presented: inverter mode (voltage controlled VSI), grid-tie inverter (current controlled VSI) and battery charge (active rectifier with PFC). 5. Ease of scalability: single phase or three phase AC system 50/60Hz, parallel interconnection due to identical hardware and firmware structure of each converter module. 6. Multi-mode power converter operation capability due to integrated control functionality and bi-directional dc/ac or ac/dc energy conversion within the topology presented.

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