PCB Embedded Power Electronics for Low Voltage

PCB Embedded Power Electronics for Low Voltage Applications Daniel Kearney, Slavo Kicin, Enea Bianda, Andrej Krivda and David Bauman ABB Corporate Research Centre, BadenDättwil, Switzerland

Summary The performance of a novel 3-phase invertor module embedded in a printed circuit board (PCB) is investigated considering packaging, thermal resistance, reliability and insulation. The embedded power electronic module is based on 6 insulated gate bipolar transistors (IGBTs) and 6 diodes rated to 1.2kV/25A each and it is benchmarked with a comparable traditional wire bonded semiconductor module. A detailed outline of the package is discussed including the top and bottom side metallization and the copper interconnect technology. A FEM thermal simulation is presented comparing a standard package with dies bonded to direct bonded copper (DBC) substrates to the PCB integrated modules. This is also validated with experimental measurement. The integrated module demonstrates up to 44% lower thermal resistance than that of the traditional wire bonded DBC package for an identical applied current and cooling condition, resulting in a lower overall local chip temperature despite higher device losses. Furthermore, both packages are active power cycled to failure with the PCB embedded package demonstrates superior lifetime to that of the traditional DBC module. Finally, the maximum breakdown limit and the onset of partial discharge with the embedded PCB module are also reported for both aged and non-aged conditions.

1

Motivation

Power electronic systems are advancing towards new levels of complexity, switching performance and increased power density. Complex low voltage power electronic systems, such as 3-phase invertors, demand packages with lower inductances, improved thermal management, enhanced reliability and low cost potential. Increasing the switching speed and voltage rating of the devices can improve power density and system performance of existing systems and while encouraging new opportunities in power electronics [1]. While new wide band devices, such as SiC and GaN, enable for higher power densities, there is a significant requirement, and indeed opportunity, to improve the packaging environment of the system. It is imperative to minimize the commutation loop between gate drivers and semiconductors while ensuring the system inductances are low. Moreover, the design of the entire converter system must consider the insulation and thermal management holistically to ensure manufacturability, performance and reliability. Considering low voltage (LV) applications there is an increasing pressure to develop low cost solutions, which are robust and reliable. There has been much research focused on PCB embedded power electronics where the active power semiconductors are embedded in the PCB substrate [2]. This type of embedding allows for the low cost mass produced systems that can be easily designed and customized for a wide variety of applications where form factor and weight are often key considerations. Embedding can improve the electrical performance as we can now connect to the critical active devices directly without the need for long wires or solder bumps; it also enables the 3D stacking of components and enhanced primary and secondary thermal management for high heat flux power devices and tem-

perature sensitive devices such as capacitors [3]. In addition embedding permits integrated thermal management adjacent at the device level allowing optimal performance of existing heat sink technologies by removing several thermal interfaces [4]. The research presented in this study examines the robustness and performance of a commonly used topology in a PCB embedded module with a view to qualifying its performance in future LV systems.

2

Embedded PCB package concept

A power electronic module embedded in PCB is assembled using a laminate embedding technology called p² Pack developed by Schweizer Electronic AG [5]. The compact and PCB embedded module allows a greater design flexibility lower stray inductance and balanced gate coupling resulting in a very good switching performance. Furthermore, the thick copper leadframe provides excellent heat spreading. The module contains a 3-phase invertor based on 6 IGBTs (ABB 5SMX12E1280, dimensions: 6.59mm x 6.49mm) and 6 diodes (Infineon SIDC23D120E6, dimensions: 3.5mm x 6.5 mm) whereby each of these devices is rated to 1.2 kV and nominal current of 25 A. Since the embedding technology requires copper top metallization of the chips, the original Al metallization of emitter, gate and anode contact was modified by sputtering approximately 8µm of Cr/Cu layers while a mask protected part of the chips. Afterwards the chips were sintered to a 1mm copper leadframe with pre-machined cavities as shown in Figure 1. Each sinter chip was checked for blocking functionality prior to embedding. The sintering process to the leadframe

is significantly less complex and has a larger process window compared to the conventional power module with a ceramic substrate since there is no danger of cracking of the substrate. The leadframe serves three main functions: it provides a mechanical support for the semiconductors, it enhances thermal spreading and it distributes corresponding electrical potential to the bottom electrode of the chips. The narrow mechanical connections between parts of the module leadframe which are on a different electrical potential during module operation (visible in Figure 1) simplify the module fabrication process and they are finally removed. The assembly is prepared for the embedding process.

shown in Figure 4 – shows the copper via connections between the upper copper trace and the semiconductor chip metallization.

Figure 3: Cross-section of the prototype of the p² Pack Schweizer Electronic AG.

Figure 4: Cross-section with the copper vias.

Figure 1: (Top) 3-phase invertor topology; (left) a copper leadframe with sintered IGBTs and diodes and (right) the finalized PCB module with embedded chips.

Figure 2 illustrates a schematic cross-section of the embedded copper leadframe and identifies the representative voltage potential at each area of the package. The chip top-side metallization is accessed by laser drilling the PCB material and connecting it with through copper vias. In a system application, these copper vias can be connected to the copper traces of the complex PCB board containing e.g. gate units. Here the power and auxiliary electrical connections end on the top surface of the assembled package as shown in Figure 1.

2.1 Thermal spreading A numerical evaluation of the heat spreading capability of the PCB embedded package structure was considered and compared with that of the Semikron MiniSKiiP 23AC126V1. It was found that – for geometrically identical silicon chips – the maximum chip temperature in the PCB embedded package was evaluated be 11°C lower for the corresponding chip in the MiniSKiiP package under the same external ambient conditions. This was due to the superior heat spreading capability of the copper lead frame substrate.

Figure 2. Schematic cross-section of the copper leadframe embedded in the PCB.

Figure 5: Thermal heat spreading comparison

Figure 3 shows a cross-section of the module assembly and indicates thickness of the structure layers. A second slice through the package along the line of connectors – as

2.2 Thermal resistance, Rth The thermal resistance of each module was evaluated in the experimental facility shown in Figure 6, Figure 7 and Fig-

ure 8. This facility has the dual purpose of measuring thermal resistance of the PCB embedded package and measuring the number of cycles of the package. Each module is screw attached to a liquid cold plate. The thermal interface material is Gap Pad 5000S35 from Bergquist with a thermal conductivity of 5W/mK. The flow rate in the cold plate was 3lmin and the inlet water temperature was approximately 19°C. Figure 7 demonstrates a two-branch configuration whereby one phase leg of each module is cycled at any one time at a cycling frequency of 0.5Hz. In order to ensure the same cycling conditions are realized each branch contains two modules, one PCB embedded module and one SkiiP 23AC126V1, in series and experience the same heat transfer coefficient provided by the liquid cold plate. The thermal resistance between the chip junction and the base of the module can be written as:

Rth



j  cooler

T j max  TLCP qloss

Figure 7: The active power-cycling configuration. One phase leg is being cycled in each branch with contains both the PCB embedded module and the SkiiP module in series. [6]

(1)

where Tjmax was evaluated by measuring the collector-emitter voltage Vce of the chips and corresponding this value to a known calibration curve of Vce as a function of temperature. TLCP was measured by two calibrated k-type thermocouples located directly below the module at the module– liquid cold plate interface. The total heat loss for each chip, qloss, was calculated from the Vce and the nominal current. Figure 8: The active power cycling and thermal measurement facility.

The thermal resistance of the PCB embedded package was evaluated to be 0.50°C/W ≤ Rth jmax-cooler ≤ 0.61°C/W as shown in Table 1 corresponding to a 30% to 44% reduction in thermal resistance compared to traditional AlO DBC substrate based SkiiP 23AC126V1 module whose thermal resistance range is 0.89°C/W ≤ Rth jmax-cooler ≤ 0.96°C/W. This results compares well with the data sheet where the Rth=0.9°C. These results also validate the numerical simulations highlighted in sub-section 2.1. Branch 1 Module

Figure 6: Experimental set-up reliability and thermal measurement of the modules. Each red node identifies a thermocouple measuring point. Note: the alternate position of the PCB embedded module in relation to the inlet water.

Branch 2

PCB A SkiiP A SkiiP A SkiiP B PCB D PCB D

Switch

S2

S3

S4

S6

S7

S8

Vce [V]

3.04

2.18

2.05

2.11

2.87

2.81

Max. qloss [W]

91.20

65.40

61.50

63.3

86.10

84.30

Tcooler [°C]

23.53

22.19

22.19

26.91

24.83

24.83

Max Tj [°C]

75.5

80.19

79.17

87.73

67.63

76.11

dT [°C]

43.86

56.42

54.77

61.90

42.01

46.60

Rth jmax-cooler (°C/W)

0.57

0.89

0.93

0.96

0.50

0.61

Table 1: Thermal resistance and losses for PCB embedded module and SkiiP equivalent 30A (120% nominal); cycle frequency=0.5Hz; 1M cycles no failure.

2.3 Active power cycling The objective of this study was to determine the lifetime of the novel PCB embedded module compared to a mature wire bonded module currently used in low voltage applications. The cycling experimental set-up and equipment are outlined in detail [6]. The failure criteria for each module was established to be a 10% increase in the Vce of the chips which is indicative of a respective increase in electrical resistance of the contact between connection and indicating an increase of the Tj. This increased electrical resistance and Vce is most likely due to the subsequent detachment of the electrical contacts from the chip. Initially all modules were cycled at 30A – 120% of nominal current – with a cycle frequency of 0.5Hz which corresponds to a dT of 45°C for the PCB embedded module and approximately 57°C for the MiniSKiiP 23AC126V1. However, no failures were observed in either module for 10 6 cycles. Current was then increased to 35A (140% of nominal) to increase the Tjmax-Tjmin for each PCB embedded module to approximately 62°C. The PCB module continued cycling at 0.5Hz for 1.95x106 million cycles with no failures. By comparisons, the traditional wire bonded package, MiniSKiiP 23AC126V1 was failing at between 300,000 and 600,000 cycles for a respective Tjmax-Tjmin of approximately 75°C. A typical failure mode for these modules is shown in Figure 9 where the wire bond is broken for currents approximately 140% nominal.

However, it is understood that further tests to include the effect of humidity should be conducted to identify its effect on the operational lifetime of the PCB embedded modules. 2.4 Insulation The dielectric insulation of the embedded PCB module was also investigated considering the: a) maximum breakdown voltage at room temperature (Figure 11); b) partial discharge onset voltage in the modules. It is important to note for the insulation tests dummy modules were fabricated with copper lead frames and no chips embedded as illustrated in Figure 10. The focus of these tests was to evaluate the breakdown strength of the insulation within the package. In all cases the sample size is limited due to the available samples however it is indicative of the breakdown performance of the module. For each case two module conditions were examined: nonaged and aged modules which underwent for 500 thermocycles between -40°C and 150°C for 1 min at each temperature according to the JEDEC standard [7]. Table 2: Dielectric strength of the bottom insulation layer for the measured breakthrough voltage

Condition

Breakdown strength [kVrms/mm]

Potted module with no aging

41-50

Potted module after cycling

32-36

2.4.1 Breakdown strength

Figure 9: Typical wire bond failure on the SkiiP Semikron module at 35A (140% of nominal) for a respective Tjmax-Tjmin of approximately 75°C

Subsequent tests were conducted at 40A nominal current increasing the Tjmax-Tjmin for each PCB embedded module to approximately 90°C (160% of nominal current load) for only the PCB embedded module for 400,000 cycles before the test was terminated. These results clearly show the superior cycling capability of the PCB embedded package above a traditional wire bond DBC based power module. It also demonstrates the potential of the package for higher currents above 25A – offering higher power options for more compact modules.

Each module was connected as illustrated in Figure 10 with each copper leadframe is interconnected by means of copper traces and through copper vias. The principal insulation between the electrodes is by means of the thermal prepreg material. A full summary of the breakdown voltage for a number of samples is provided in Figure 11. The sample number was limited due to availability and hence the results are indicative of the material strength. However, the data is relatively consistent as gives a good first approximation of the insulation material strength. The key finding is the breakdown voltage strength of insulation material for the non-aged and aged modules. It can be seen for non-aged modules the breakdown strength of the material is between 5.34kVrms and 6.51kVrms while after thermal cycling the breakdown strength range drops to between 4.73kVrms to 4.2kVrms.

Figure 10: Schematic cross-section of the PCB embedded module with the electrode contact points.

words at what point do the discharges within the module become significant. The PD threshold limit was set as 10pC. Standard PD tests require the material to be prestressed above its design limit and then held at the design limit for a fixed period, normally one minute. However, in this experimental test case the material was subjected to increasing RMS voltage for periods of approximately 2 minutes; incrementally increased every 500Vrms, as shown Figure 13 until the onset of PD was evident. Figure 13 shows the voltage where the onset of PD became prominent above 10pC with the PD cloud beginning to appear at the maximum and minimum of the sinusoidal waveform. The tests were continued until break down however, in many cases this breakdown occur instantaneously at the same range of voltage as highlighted in Figure 11. Figure 11: Breakdown voltage for PCB embedded module

The normalized breakdown results and dielectric strength of the insulation material between potential and ground for a non-aged is 41-50kVrms/mm while aged is 3236kVrms/mm respectively as shown in Table 2. The normalized breakdown values show a spread due to the variation in insulation thickness, random distribution of defects in a material and random nature of the breakdown process. Figure 12 illustrates a typical breakdown point within the module where the electric arc broke through. The electrical breakdowns typically occurred at the edge of the electrodes, where the sharp radius of the electrode can locally increase the average electric field by a factor of 2-1000, depending on the radius of the electrode. It should be noted that high voltage was measured using a broad-band (10 MHz) high-voltage divider HVT 80 RCR (HILO Test GmbH, Germany) which was designed to measure AC, DC and pulse voltages. The divider was connected to the standard HAMAG HM 1508-2 oscilloscope via a special coaxial cable provided by HILO test.

Figure 12: A breakdown point where the majority of the samples cross-section demonstrated a break.

2.4.2 Partial discharge The set-up for the partial discharge tests was identical to that shown in Figure 10. The partial discharge (PD) tests were conducted at room temperature (~20°C) by applying a sinusoidal AC signal of 50Hz. The purpose of this test was to identify the onset of PD within the module – in other

Figure 13: Partial discharge for an embedded non-aged module at 4.765kVrms tested at 50Hz. Note the sinusoidal PD cloud is more concentrated at the points of greatest amplitude.

Figure 13 illustrates the onset PD for both non-aged module and aged modules. Despite the small sample size, the non-aged modules demonstrated consistent PD cloud formation at 4.77kvrms/mm while for the thermos-cycled modules PD was evident starting from 3.5kVrms/mm. This corresponds to 2.9 times greater than the nominal operating voltage (1.2kV) within the package. It is known that during inverter operation the material would experience frequency in the kHz range the current test was deemed sufficient to understand the initial material properties. Further testing is required to qualify the lifetime of the module at elevated ambient temperature and with high dV/dt switching values however; these initial findings show the potential of this embedding technology.

performance and system inductance for a full LV converter topology.

4

Acknowledgements

The authors would like to acknowledge Gernot Riedel and Jürgen Schuderer for their valuable technical input and discussion towards this work.

5 [1] Figure 14: The onset of partial discharge for the selection of modules tested

3

Conclusions

A thorough investigation of some of the key thermal, reliability and insulation parameters was conducted for a novel PCB embedded power electronics package and the findings identify the application potential of this embedding technology to advance future low voltage power electronic applications. The key findings are as follows: 









The PCB embedded module demonstrated a thermal resistance of 0.50°C/W ≤ Rth jmax-cooler ≤ 0.61°C/W. This equates to a 30-44% reduction in Rth compared to a traditional LV module of comparable rating. For the same cooling condition and current rating, the PCB embedded module outlasts the traditional wire-bonded module during active power cycling. This is due to the lower absolute temperature of the PCB modules a consequence of the superior heat spreading. This was validated numerically by FEM simulation. The PCB embedded module was tested up to 40A and for a chip dT=93°C of current with no failures up to 400,000 cycles demonstrating the significant potential of this technology for LV applications with increased current rating of 40 or greater. The insulation strength of the novel PCB embedded module has been measured to be between 41kVrms/mm and 50kVrms/mm in the non-aged condition. This corresponds to an absolute breakdown voltage of between 5.34kVrms to 6.51kVrms.

The onset of partial discharge (discharges >10pC) within the module has be experimentally evaluated to be approximately 4.7kVrms for non-aged materials It is clear there are several advantages to embedding power electronic chips in a PCB substrate; specifically relating to improved thermal management and reliability. To truly exploit this technology future work will focus on conducting a holistic system-level analysis optimizing the switching

[2]

[3]

[4]

[5]

[6]

[7]

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