Reducing Electromagnetic Interference in Non ...

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Arash TOUDESHKI*1, Norman B. MARIUN*1, Senan M. BASHI*1,. Hashim HIZAM*1 and Hishamuddin JAMALUDIN*2. Correspondence: N. Mariun, Department ...
Reducing Electromagnetic Interference in Non-Isolated DC to DC Step-down Converter Arash TOUDESHKI*1, Norman B. MARIUN*1, Senan M. BASHI*1, Hashim HIZAM*1 and Hishamuddin JAMALUDIN*2 *1 Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia, 43400 UPM Serdang, Selangor, Malaysia *2 Universiti Kuala Lumpur, Malaysian Institute of Chemical Engineering Technology, 78000 Taboh Naning, Alor Gajah, Melaka, Malaysia

Correspondence: N. Mariun, Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia, 43400 UPM Serdang, Selangor, Malaysia. email: [email protected]

INTRODUCTION Investigation of the Electromagnetic interference (EMI) is important for design of a good power supply. This research attempts to simulate and analyze the undesirable harmonics of the current from input source, which fed a resistive load with continuous output current. In this study, the output electrical power controlled by current, which flows through resistive load with the control of the time period and the duty cycle of nonisolated DC to DC step-down converter.

INTRODUCTION

Problem Statement • In this system, the non-isolated DC to DC step-down converter has been used to control the value of output voltage by chopping the current. Chopping the current will distort the sinusoidal input current waveform.

Objectives •

to simulate the non-isolated DC to DC step-down converter, which is used to feed a resistive load



to investigate the Thevenin’s equivalent to resistive load and power supply effect on input current harmonics



to suggest a simple method to reduce the electromagnetic interference of the input current.

Methodology • In Fig. 1, the capacitor Co is 47 µF, when the switching frequency of SW is 2 kHz at 10, 40, 70 and 100% of the duty cycle to supply the resistive load.

Methodology

Methodology

Methodology

Methodology

Methodology

Methodology • The optimum value of 1000 µF is used as the value of Cdc.

Results

Results

Results

CONCLUSION • The maximum undesirable harmonics and EMI occurred when switching duty cycle of SW is 10% and the resistive load is 18.2 ohms. • Using the optimum low-pass filter significantly reduced the value of undesirable harmonics and EMI in the input current. • The waveform of the input current is modified to acceptable waveform.

Acknowledgement We would like to thank the following: •MOSTI for providing the fund for this project, •Faculty of Engineering, UPM for providing the facilities and space, •RMC, UPM for managing our fund and assisting us on financial matter.

Thank You