Soft-Switched Quasi-Z-Source Inverter Topology for Variable Speed Electric Drives Alexandre Battiston, El-Hadj Miliani ´ IFP Energies nouvelles 1 & 4 avenue de Bois-Pr´eau Rueil-Malmaison, FRANCE Email:
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[email protected] URL: http://www.ifpenergiesnouvelles.fr
Serge Pierfederici, Farid Meibody-Tabar Universit´e de Lorraine - Laboratoire GREEN 2, avenue de la Forˆet de Haye Vandœuvre-L`es-Nancy, FRANCE Email:
[email protected] Email:
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Keywords , , , .
Abstract A novel bidirectional soft switched quasi-Z-source inverter is presented in this paper. By using a resonant capacitor and coupled inductors, the proposed quasi-Z-source inverter topology provides a solution to hard-switching problems for hybrid electric applications. The presented topology allows soft switching operations which aims at reducing the inverter’s active devices switching stresses as well as mastering the slew rate dv/dt that have a negative effect over the motor windings. The effectiveness of the proposed topology has been analytically studied and simulated in Matlab/Simulink and the results have been validated by experiment for both motoring and generating modes.
Introduction In hybrid electric vehicles, systems are generally supported by a battery. According to vehicle operations and performances, the power is modulated according to different converters that are controlled by means of power electronics switches. This paper focuses on the DC-to-AC conversion that is commonly realized by inverters. Nowadays, two types of power electronics inverters are widely considered according to the DC input nature of the inverter. The voltage source inverter (VSI) presents a DC-voltage source as DC input, also known as DC-bus voltage in the literature. When the DC input is a DC current source, the inverter is called a current source inverter (CSI). About ten years ago, Professor Fang Zheng Peng [1, 2, 3] introduced a new DC-to-AC topology, also known as Z-source inverter (ZSI). This latter is interesting as it can step up the DC-source voltage vs , what is impossible with classical voltage source inverters without adding further interface converter such as DC-to-DC boost converters. A few years after, other impedance-source inverters appeared in the literature. Among them, the quasi-Z-source inverter (QZSI) [4, 5] is a promising architecture as it presents the advantage of having a continuous battery current iL1 in comparison with Z-source topology. Bidirectional quasi-Z-source inverter is presented in Fig. 1. Generally, the DC-to-AC conversion is subject to hard switching operation of the semiconductor switches. Some drawbacks can be pointed out. • The overall inverter efficiency is dependent on both the conduction and switching losses in the semiconductors. If the switching frequency increases, inverter losses increase as well. The switching time between voltage and current waveforms during switch-ON and switch-OFF of the semiconductors involves a large amount of energy loss. • Switches generate high-voltage dv/dt that have a negative effect over the motor’s windings as regards ageing. Indeed, due to high dv/dt, a displacement current can be created across the parasitic capacitors of the stator windings insulation. This can cause failure on the machine insulation, and so reduce its lifetime. Moreover, this can lead to motor bearing material erosion and early mechanical failure. • In hard switching operation, the inverter’ switches are stressed due to the operating voltage-current zone. The reliability may be thus reduced if the operation last for a long period of time.
All these issues have been source of motivation for the study presented in this paper. Many papers have focused on soft switching techniques in response to the disadvantages of hard switching operations. Generally, authors propose soft switching strategies for classical inverter topologies (VSI). One of the most known is the Resonant Inverter architecture [6, 7, 8, 9, 10, 11]. Unfortunately, this supposes the inverter DC input is a DC-source voltage, that is no longer the case in ZSI or QZSI topologies. Authors proposed then soft switching solutions to DC-to-DC converters as in [12] for Flyback converter, in [13, 14] for full bridge converters or in [15, 16] for boost converter. Some investigations using converters discontinuous conduction mode (DCM) have been led to allow soft-switching operations without any additional components [17]. In [18], the authors proposed an unidirectional circuit to allow the Z-source inverter to behave with soft switching operations. However, the validation is only based on simulation results. Other solutions have been given for the promising quasi-Z-source inverter topology [19, 20] but not in bidirectional operating mode. In this paper, a bidirectional soft switching circuit is proposed to this latter topology. The solution aims at reducing inverter switching stresses as well as mastering dv/dt that represent serious problems from the motor point of view. The presented solution is valid whatever the operating mode of the electrical machine, that is motoring or generating operating modes. This bidirectional behavior is interesting as regards vehicular applications with regenerative braking operations. The paper is organized in five sections. The next section is an introduction of the quasi-Z-source topology. Then, it presents the proposed bidirectional soft switched architecture. All the operating sequences for obtaining soft switching in both motoring and generating modes are detailed in a following section. Simulation and experimental results are then given to validate the topology before a conclusion section.
Soft switched quasi-Z-source inverter Quasi-Z-source inverter The quasi-Z-source inverter (Fig. 1) makes part of the impedance-source inverters whose the famous Z-source inverter is one of the most studied. This DC-to-AC converter is able to step up the DC-source voltage vs to any desired level by means of inserting some extra ”shoot-through” states (”ST”) in the inverter PWM scheme. A ”ST” state means that both the upper and lower switches of a same inverter’s leg are simultaneously turned-ON. Fig. 2 is an illustration of the gate driver commands generation to pilot the six IGBTs. Generally, they are obtained by comparing three AC-voltage references to a high-frequency carrier-based function p(t). Commands associated to the upper switches are noted with exponent u and those associated to the lower switches with exponent l. In the case where no additional ”ST” state is added, the switch functions of both the upper and the lower switch of a same inverter’s leg are complementary (for instance Sau = S¯al ). In the same figure are highlighted the different operating state of the inverter. ZS denotes the zero-sequence state when the three upper switches (or the three lower switches) are turned-ON. The two states Act1 and Act2 represent the active states of the inverter. In order to prevent the load from being impacted by the addition of extra ”ST” states, these latter are inserted during the zero-sequence states because there is no power transfer between the source and the load. The insertion of the ”ST” states are presented in the figure. More details are given in [21, 22]. The method consists in creating six AC-voltage references that are compared to the same high-frequency carrier-based function p(t). Fig. 2 presents a strategy where six ”ST” states are added during switching period T .
vC2
iL1 vs DC-source voltage
C2 L1
K,D iL2 vC1 C 1
Iinv L2
vDC
Quasi Z-source inverter
Motor
Figure 1: Bidirectional quasi-Z-source inverter in a electrical traction system.
Shoot-through states
p(t)
T
Sau
Sbu
Scu
T
Scl
Sal
Sbl
T
ZS Act1
ZS
Act2
Act2
Act1
ZS
Figure 2: PWM scheme with additional ”ST” states of the inverter.
vC2 iL1 L, rL vs DC-source voltage
C2 K,D iL2 L, rL ir2 vC1 C1 Kr2,Dr2
Soft-switching device
ir1 Lr
vCr Cr
Kr1,Dr1
Soft-Switched Quasi Z-source inverter
Motor
Figure 3: Bidirectional soft switched quasi-Z-source inverter.
Proposed topology The proposed bidirectional soft switched quasi-Z-source inverter is illustrated in Fig. 3. It is composed of a resonant capacitor Cr and coupled inductors Lr with the same windings turns number N in both the primary and secondary sides. Two bidirectional switches (Kr1 , Dr1 ) and (Kr2 , Dr2 ) are used. The second one allows the energy stored during switching to be recovered to C1 . In order to simplify the study of the operating sequences, the inductors L and capacitors C1 and C2 will be modeled by current and voltage sources respectively. The inverter part (the six traditional IGBTs) will be modeled by a simple switch (Kinv , Dinv ) absorbing a load current ILd . Thus, when Kinv is turned-ON, this means the inverter works in a ”ST” state. As the ”ST” states are added during the zero-sequence states of the inverter, ILd = 0 during this sequence. On the contrary, when Kinv is turned-OFF, the inverter operates in an active state and ILd is different from zero, it is imposed by the functioning of the load (motor). In the following part, all operating sequences will be firstly detailed in motor mode (power from the source to the load).
Motor mode study In this part, one proposes to detail all the operating sequences valid for the motor mode. The study begins when the inverter is out of a ”ST” state. Resonant capacitor Cr is considered charged at this stage.
vC2 iL1 vs
iL2
iD vC1
vC2 iL1
ir2 vDr2
ir1 Lr v Cr v Cr Dinv vDr1
ILd
Figure 4: System in operating sequence S1 . The voltage across the capacitor Cr is given by the sum of the capacitive voltages vC1 + vC2 . The values of currents ir1 and ir2 are supposed to be zero. Thus the flux value through the coupled inductors is also zero. As regards the diodes and IGBTs, both Dr1 and Dinv are OFF as the voltage across them equals −vCr . The same remarks can be done for Dr2 because vDr2 = −vC1 < 0. The present sequence ends when the switch Kr1 is turned-ON before inserting a ”ST” state of the inverter.
vs
vC1
vs
vD vC1
ir2 vDr2
ir1 Lr v Cr v Cr Dinv
ILd
Figure 5: System in operating sequence S2 . The state of Kr1 has only changed. The voltage across the capacitor Cr is the same as in sequence S1 . Flux linearly increases via the primary side of the coupled inductors and the diode Dr2 stays in OFF state (voltage vDr2 is negative). ir2 is thus equal to zero and ir1 linearly increases. This sequence ends when ir1 reaches I = iL1 + iL2 − ILd . Thus, iD = 0 and the state of the diode D becomes OFF.
vC2 iL1
iL2
iD
vC2 iL2
iL1
ir2 vDr2
ir1 Lr v Cr v Cr Dinv
ILd
Figure 6: System in operating sequence S3 . The state of D has changed in the previous sequence. This sequence marks the beginning of the discharge of the capacitor Cr . It is important to point out that the dv/dt are controlled by means of a good sizing of the resonant elements Lr and Cr . Indeed, dv/dt can be expressed according to the duration of the sequence S3 . This latter can be calculated by considering phase plan in Fig. 9. One obtains: ∆v∆tCr = VCr π √L C where VCr is the stepped up value of the voltage r r 2 across the inverter. The end of the sequence is obtained when vCr = 0. The body diodes Dinv start conducting and cause a spontaneous ”ST” state of the inverter.
vs
iL2
vD vC1
ir2
ir1 Lr v Cr iKinv Cr vDr1
Figure 7: System in operating sequence S4 . The voltage vCr across Cr is maintained at zero while Kinv is turnedON. Thus, the diode D stays in OFF state. The stored energy in the coupled inductors is restored to the capacitor C1 through the diode Dr2 . The change of sequence is obtained when the inverter goes back in an active state due to the turning-OFF operation of Kinv .
vC2 iL1 vs
iL2
vD vC1
ir2
ILd
ir1 Lr v Cr v Dinv Cr vDr1
ILd
Figure 8: System in operating sequence S5 . S5 is the recharge sequence of the capacitor Cr . Indeed, according to the figure, the recharge current is given by iCr = iL1 + iL2 − ILd . It can be pointed out that while vCr is inferior to vC1 + vC2 , the state of the diode D stays OFF. As regards the current ir2 , it was decreasing in the previous sequence. When ir2 = 0, the state of the diode Dr2 is changed to OFF. The dv/dt during capacitor recharge can be calculated in the worst case (ILd = 0). One has: ∆v∆tCr = 2 PC0r/vs The capacitor Cr thus can be sized to attenuate the slew rates dv/dt and their negative effect as mentioned above. This sequence ends when vCr = vC1 + vC2 . This causes the conduction of the diode D and a new cycle can begin.
ir1 (Lr/Cr)1/2 Iconst (Lr/Cr)1/2
S3
uKr1
dKr1T
S4
t uST
I (Lr/Cr)1/2
S2 S5
S1
dT/6 t
vCr
Figure 10: Logical commands uKr1 and uST waveforms.
vC1+vC2 Figure 9: Operating sequences reprensented in the phase plan.
Summary of the operating sequences The previous operating sequences are summarized in Fig. 9 where the whole phase plan is plotted. In this diagram, all the studied sequences have been highlighted. The current, noted Iconst in the figure, is the maximum current through Kr1 and Dr2 during a operating cycle. It can be easily expressed according to geometric considerations in Fig. 9. One has: r Cr Iconst = I + (vC1 + vC2 ) Lr (1) r Cr = iL1 + iL2 − ILd + (vC1 + vC2 ) Lr
Soft switching implementation in the PWM scheme of the quasi-Z-source inverter Generation of uKr1 , logical command of Kr1 As mentioned above, soft switching operation has to be executed before entering in a ”ST” state of the QZSI. Let uST be the logical command of Kinv . This command comes from diagram in Fig. 2. Its value is uST = 1 when the inverter is in ”ST” state and uST = 0 when the inverter operates in its classical active (Act1 , Act2 ) or zero-sequence (ZS) states. Fig. 10 presents uKr1 and uST working together. The ON-time of uKr1 is given according to Fig. 9 by calculating the duration of both the sequences S2 and S3 . One obtains: dKr1 · T '
πp Lr LrCr I+ vC1 + vC2 2
(2)
Simulation results A simulation of the system presented in Fig. 3 is realized using Simulink SimPowerSystem’s blocksets. Results are presented in Fig. 11 on one operating cycle of the soft switching circuit. For these results, the ON-state duration of the command uKr1 has been voluntary overestimated for study convenience. Every operating sequence has been limited by different times t0 . . .t8 as follows: t ∈ [t0 ,t1 ]: sequence S1 , t ∈ [t1 ,t2 ]: sequence S2 , t ∈ [t2 ,t4 ]: sequence S3 , t ∈ [t4 ,t6 ]: sequence S4 , t ∈ [t6 ,t7 ]: sequence S5 , t ∈ [t7 ,t8 ]: sequence S1 . These results lead to the validation of the theoretical study detailed in the previous sections. It is verified that the insertion of ”ST” state is effective when the DC-bus voltage vCr equals zero. One has a ZVS switching, that is a reduction of the switching losses in the inverter as well as soft slew rates dv/dt.
Generator mode study As mentioned above, the proposed soft switched converter works in motor mode as well as generator mode (that corresponds to a power transfer from the load to the source). The system presented in Fig. 3
t1
t6 t7
t2 t3 t4 t5
t8
100 50 0 1 0.5 0
i (A) r2
i (A) r1
u
Kr1
u
ST
v (V) Cr
t0
1 0.5 0 15 10 5 0 15 10 5 0 0,08409
0,084091 0,084092 0,084093 0,084094 0,084095 Simulation time (s)
Figure 11: Simulation results presenting one operating cycle of the soft switching circuit.
remains valid. This section gives a summary of the operating sequences without presenting all equations. Some experimental results are given to the end in order to validate the theoritecal derivation. The main switches in this mode are K, Kr2 , Dr1 and (Kinv , Dinv ). They are presented in Fig. 12. vC2 iL1 L, rL vs DC-source voltage
K vC1
C2 iL2 L, rL ir2 C1 Kr2
(Kinv,Dinv) ir1 Lr
vCr Cr Dr1
Soft-Switched Quasi Z-source inverter
Generator
Figure 12: Soft switched quasi-Z-source inverter in generator mode.
Simulation results and description of the operating sequences Five sequences can be studied in the generator operating mode. Simulation results are given in Fig. 13 and commented in the following lines: • t ∈ [t0 ,t1 ]: sequence S1 : the switch K is supposed to be turned-ON in the beginning and Cr is supposed to be charged to vC1 + vC2 . The sequence ends when K is turned-OFF. • t ∈ [t1 ,t2 ]: sequence S2 : capacitor Cr linearly decreased until the voltage reaches zero and diodes Dinv start to conduct. • t ∈ [t2 ,t3 ]: sequence S20 : after the diodes Dinv are conducting, Kinv can be turned-ON under ZVS condition to insert a ”ST” state (uST = 1). • t ∈ [t3 ,t5 ]: sequence S3 : Kr2 is turned-ON to magnetized the secondary-side of the coupled inductors with ir2 . During this sequence, the inverter is controlled to return in an active state or zero-sequence state at t4 (uST = 0) in order to slightly delayed the recharge of Cr , which begins at t5 when Kr2 is turned-OFF. • t ∈ [t5 ,t6 ]: sequences S4 , S40 : when Kr2 is turned-OFF, the magnetized current ir2 is transferred to the primary-side and helps in recharging the capacitor Cr because iCr = ir1 + ILd − iL1 − iL2 > 0.
t0
v (V) Cr
100
t1 t2
t3
t4
t5 t6
t7
50 0
u
ST
1
0.5 0
u Kr2
0.5
u K
1
0.5
0 1
0
i (A) r1
10 5
i (A) r2
0 10
5
0 0.042
0.042002 0.042004 0.042006 0.042008 0.04201 0.042012 Simulation time (s)
Figure 13: Simulation results presenting one operating cycle of the soft switching circuit in generator mode.
When the voltage vCr reaches the sum vC1 + vC2 , the diode D is turned-ON and the switch K can thus be turned-ON under ZVS switching. • t ∈ [t6 ,t7 ]: sequence S5 : K is turned-ON and when the current ir1 is completely discharged, the system goes back to the first sequence. All these sequences can be summarized in Fig. 14 where the whole phase plan is plotted.
Generation of control command for Kr2 and K The generation of the commands of the switches is more difficult in comparison with motor operating mode. The following diagram in Fig. 15 explains how the commands have been implemented. The generation is made by means of several logical electronics Set-Reset (SR) latches and delays that are not detailed in this paper. • The quantity dd T represents the time necessary to linearly discharge the capacitor Cr . It is given by Cr vDC dd T = 2 P0 − |Imax | vs
(3)
with P0 the power of the generator and Imax the peak value of AC-currents. • dr T represents the time delay to recharge the capacitor Cr . The value is given by: πp dr T = Lr Cr 2 • dKr2 T is finally the ON-time of Kr2 which can be expressed according to: r ! 2 P0 Lr + vDC Cr dKr2 T = · vC1 vs Lr
(4)
(5)
ir1 (Lr/Cr)1/2 Iconst (Lr/Cr)1/2
dT/6
uST
S4
t
uKr2
S3 S4’
I (Lr/Cr)1/2 S2’
S5 S2
t
uK
dKr2T/2 t
S1
S1
vCr
vC1+vC2
S2
S’2
ddT
S3
S4/S’4
S5/S1
dKr2T drT
Figure 15: Logical commands uK , uST and uKr2 waveforms.
Figure 14: Operating sequences in generator mode reprensented in the phase plan.
Experimental results Test bench
(a) Experimental test bench.
(b) Soft switched device.
Figure 16: Experimental prototype for validation.
An experimental test bench has been realized to validate the soft switching circuit within an electric drive system composed of a PMSM (500 W) fed by a bidirectional soft switched quasi-Z-source inverter (Fig. 16). A resonant capacitor Cr = 10 nF and a resonant inductor Lr = 20 µH have been chosen. The authors insist in the fact the switching device (Fig. 16b) is an additional card that is directly connected to the original quasi-Z-source inverter. It has not been integrated during the power converter manufacturing process. The switching frequency has been fixed to 10 kHz and a dSPACE 1005 micro controller has been used for the control algorithm validation.
Experimental results in motor mode An operating cycle of soft switching is given in Fig. 17. The grid/emitter voltage vGE (inv) is the command voltage of the upper IGBT of the first leg (a) of the inverter. It is a image of the ”ST” state command uST presented before. The voltage vGE (Kr1 ) is the grid/emitter voltage of the IGBT Kr1 . The voltages vCE (inv) and vCr are finally observed and represent the collector/emitter voltage of the upper IGBT of the same leg a and the DC-bus voltage respectively. Two zooms before and after the insertion of an inverter ”ST” state are given in Fig. 18 and 19 respectively (they are boxed in Fig. 17). Fig. 18 allows validating the cancellation of both vCr and vCE (inv) after Kr1 is turned-ON. The ZVS switching
Active or zero state
Shoot-through states Active or zero state
vGE (inv) (20V/div) vGE (inv) (20V/div)
vGE (Kr1) (20V/div)
vGE (Kr1) (20V/div) vCE (inv) (50V/div)
vCE (inv) (50V/div)
vCr (50V/div)
vCr (50V/div)
Figure 17: Experimental result: detail of an operating cycle and soft switching operation.
Figure 18: Experimental result: zoom before the insertion of a ”ST” state of the inverter.
vGE (inv) (20V/div)
Miller plateau
Quasi ZVS switching
ZVS switching
vGE (K
r1)
vGE (Kr1) (20V/div) ir1 (2A/div)
(20V/div)
ir2 (2A/div)
vCE (inv) (50V/div)
vCr (50V/div)
Figure 19: Experimental result: zoom after the insertion of a ”ST” state of the inverter.
Resonance
vCE (inv) (20V/div) S1
S2
S3
Figure 20: Experimental result: zoom on resonance operation.
is thus justified when the inverter enters in a ”ST” state. Fig. 19 details operation when the inverter gets out of ”ST” state. The capacitor Cr is going to recharge to vC1 + vC2 . Generally, at the end of the Miller plateau, the IGBT collector current decreases when the collector/emitter voltage vCE (inv) has reached the whole DC-bus voltage. As presented here, the recharge of Cr is delayed so that it is still close to zero when the current begins to decrease. If theoretically it is a ZVS switching, IGBT defects (current tail) do not allow cancelled the switching losses. For more details about IGBTs switching waveforms, one can refer to [23, 24]. Thus, the turned-OFF switching of the IGBT after a ”ST” state is called Quasi ZVS switching because it reduces switching losses but does not cancel them. In Fig. 20 is presented a zoom on the first operating sequences that highlights resonance phenomenon. The sequences S1 , S2 , S3 and S30 have been indicated in the figure for comparison with the simulation results in Fig. 11. The linear growth of the current in the primary side of the coupled inductors is presented. Then, when ir1 = iL1 + iL2 − ILd , the resonant circuit makes the collector/emitter voltage vCE (inv) decrease to zero. When vCE (inv) = 0, the current ir1 is maintained as a constant. This confirms the theoretical and simulation results. In Fig. 21 are presented the primary-side current ir1 and the secondary-side current ir2 in the coupled inductors for one soft switching cycle. The different sequences are indicated in the figure. This allows validating that the stored energy in the primary-side is recovered in the secondary-side to the capacitor C1 . An interesting result that can be noticed according to the Fig. 20 and 21 concerns the quasi-Zero Current Switching (quasi-ZCS) switching of Kr1 . By contrast, the turned-OFF of Kr1 is realized in hard-switching operation. This is detailed in Fig. 22 where losses in Kr1
vGE (Kr1) (20V/div)
ir1 (2A/div)
Quasi ZCS switching of Kr1
ir2 (2A/div)
vCE (K
ir1 (2A/div) S1
Hard-switching operation when Kr1 is turned-OFF r1)
S2
S3
S4
S5
vGE (K
(100V/div)
r1)
(20V/div)
Quasi-ZCS operation when Kr1 is turned-ON
vGE (inv) (20V/div)
Losses (200W/div)
SC
Figure 21: Experimental result: observation of both the primary-side and secondary-side currents ir1 and ir2 for one operating cycle.
Figure 22: Experimental result: details of the switching of Kr1 .
Shoot-through state
vGE (inv) (20V/div)
vGE (Kr2)
P0
(20V/div) G
M
ZVS switching
vGE (K) (20V/div)
Generator part
Figure 23: Illustration of the experimental test bench in generator mode.
vCr (50V/div) Figure 24: Experimental result: detail of an operating cycle and soft switching operation in generator mode.
are plotted.
Experimental results in generator mode The same experimental test bench as previously is used. Fig. 23 is an illustration of the experimental test bench used for generator mode validation. As the electrical machine (Generator G) is coupled on the same shaft with another identical machine (Motor M), it is proposed to control the second one (Motor M) to generate the mechanical power P0 . The results presented in Fig. 24 allow validating both the commands of the switches in generator mode and the DC-bus voltage step down before inserting a ”ST” state. The figure presents an operating cycle where vGE (inv) is the control voltage of the upper switch of leg a. It is thus an image of uST . The voltages vGE (Kr2 ) and vGE (K) are the images of uKr2 and uK respectively. In Fig. 25, the currents in both the primary and secondary sides are presented to validate the recovery of the energy necessary to make the soft switching strategy operate. The switching losses of Kr2 are evaluated in Fig. 26 where the dissipated power (vCE (Kr2 ) · ir2 ) is plotted during one operating cycle. The result show that a hard switching operation is inevitable during turning-OFF process of Kr2 . Turning-ON operation of the same switch is soft switched with ZCS (Zero Current Switching) operation.
vCE (Kr2) (200 V/div)
ir1 (2A/div) ir2 (2A/div)
Reverse recovery diode
vGE (Kr2) (20V/div)
vGE (Kr2) (20V/div)
Losses (100W/div) vCr (50V/div)
Figure 25: Experimental result: recovery of the energy from the primary side to the second side of the coupled inductors.
ir2 (2A/div) Figure 26: Experimental result: evaluation of Kr2 losses.
Conclusion In this paper is proposed a bidirectional soft switched quasi-Z-source inverter. The theoretical study is detailed in both the motor and generator mode. It is supported by both simulation and experimental results. The operating principle of the soft switched system is validated and shows that switches stresses are reduced. Furthermore, motor/generator stress are reduced because the dv/dt are perfectly under control by designing resonant capacitance Cr and coupled inductance Lr . The experimental results as regards efficiency show that switching losses are moved to the additional device, what reduces the constraints over the traditional quasi-Z-source inverter’ switches.
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