special issue on communication ic - IEEE Xplore

GUEST EDITORIAL

SPECIAL ISSUE ON COMMUNICATION IC

Liu Dake

B

Wang Zhihua

y definition, Communication ICs are integrated circuits specially designed for and used in communication systems. From hardware designer’s point of view, a communication system could be a system with DSP (Digital Signal Processor, including digital ASIC, Application Specific Integrated Circuit and FPGA) + MCU (Micro Controller Unit) surrounded with analog/digital interfaces, including ADC (Analog to Digital Converter), DAC (Digital to Analog Converter) and RFIC (Radio Frequency IC) modules. ICs are core components for communications. IC based on VLSI (Very Large Scale Integration) has been the essential technology supporting telecommunications and it is growing rapidly in the last 20 years. It will definitely keep their high growing pace in the next decade. The involved R&D covers mobile communications, highway (core network) and last-mile (access network) broadband communication, and other domain specific communications. Radio communication steps into its new generation in every 10 years, the bandwidth has been 1Gbps and will be 10Gbps of 5G in the next 10 years. The bandwidth of broadband communication will soon reach 400Gbps per port. All of these challenges are drivers of R&D of high-end IC for communications. At the same time, R&D of low cost IC is also driven by volume communication markets including IoT (Internet of Things, including ZegBee, WIA-PA), Bluetooth, NFC (Near Field Communication, such as BAN: Body Area Communication, RFID), and other emerging technologies. Challenges on another side are low cost and low power consumption. Most ICs are based on silicon CMOS (Complementary metal–oxide–semiconductor) technologies. III/V

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Luo Li

group devices, Silicon Germanium, and Silicon Carbide devices are growing yet in their limited market. For silicon CMOS, Moore’s law has been gradually saturating and smarter circuits, application specific architectures, and systems are thus essential to keep the development pace of communications. Communication ICs can be classified into analog/ mixed, DSP, and control. ICs are used in all communication infrastructures and terminal systems. Both infrastructures and terminals are further divided into wireless (cellular, microwave, satellite, trunked radio, IoT, NFC etc.), digital broadband (digital core network, PON, xDSL, and communications carried by other medias) classical PSTN (Public Switch Telephone Network), and others. The frequency of RF can be from kHz up to mmWave. The structure of a radio receiver can be superheterodyne, homodyne, or direct sampling receiver. Circuit modules in RF receiver include LNA (Low Noise Amplifier), LO (Local Oscillator), Mixer, and IF (Intermediate Frequency) circuits. It receives weak signals from antenna and offers selected and amplified analog baseband signals. A radio transmitter includes modulator and power amplifier. RF Frequency source is for both the receiver and the transmitter, including oscillator, PLL (Phase Lock Loop), and FS (Frequency Synthesizer). Passive components, such as RF filters, RF switches, etc are not usually integrated in ICs. Broadband ICs are used for core network (routers, gateway) and broadband terminals (PON: Passive Optical Network, xDSL). Typical circuit modules include high speed I/O (XAUI, SPI4, LVDS), SerDes (Serializer/

China Communications • May 2015

GUEST EDITORIAL

Deserializer), Optical-electrical converters and broadband amplifiers /drivers. ADC and DAC, Nyquist-rate and oversampling converters as well as time-to-digital converters, are essential components for most communication systems. It can be implemented using different technologies such as SAR (successive approximation), DS (Delta-Sigma), flash (direct- conversion). Challenges of all circuits listed above are high speed (RC delay and jitter problems), high performance (high dynamic range, low noise, and linearity), low power, and low cost (silicon cost, package cost, and design cost). DSP (Digital Signal Processor) has been much used as communication IC for digital baseband and payload processing. A baseband IC supporting wide bandwidth consists of at least a channel equalizer for recovering signal distortion during transmission and modem. Radio Baseband Modem has been used for digital baseband signal processing, including receiver signal processing (Filtering, Frame/bit synchronization, transformation, channel estimation and equalization, de-modulation, data rate matching, de-interleaving, forward error correction, and bit error detection) and transmitter signal processing (error detection and correction coding, rate matching, modulation, and transformation). Baseband modem could also cover functions such as DPD (Digital Pre-Distortion) for RF power amplifier and symbol shaping filtering for transmitters. Challenges of IC for baseband include high performance (high throughput, low computing latency), flexibility (supporting multi standards and multi modes), low power consumption (efficient algorithm, efficient architecture, and advanced silicon technology), and low cost (silicon, package, and design cost minimization). The trade off all challenges together ends up a stringent design of a baseband IC. Voice, audio, image, video, and text have been payloads of communications. Payload processing includes compression/decompression and enhancements (echo cancelation and noise suppression). Other applications such as recognition are not counted as the payload processing for communications. Gateways between communication systems transform voice and video compression formats, and remove echo from classical PSTN phones. Voice CODECs (coder decoder) are essential components in wireless terminals compressing voice before transfer. Cryptograph processing (Encryption, decryption and au-


thentication) is an essential step of payload processing. It can be implemented using DSP or in ASIC (Application Specific Integrated Circuit). All digital circuits listed above could be implemented using ASIC, DSP, FPGA (Field-Programmable Gate Array) and ASIP (Application Specific Instruction-set Processor) technologies. MCU has been the master of communication systems. It is for processing of communication protocols and system resource managements. To reach the level and scale of IC integration, wireless System on Chip, and wireline system on chip (transceivers, SoCs, SiPs) are opportunities to minimize the cost and maximize the lifetime. One chip solution can be designed for phone, WLAN, UWB, IoT, GPS/Beidou, TV broadcast, NFC/RFID, Ethernet, Fiber Channel, SONET, PON, optical/electrical data transfer, and consumer-product. It fulfills features of green and low-power, multi-standard, and multi-band solutions. IC industry has been growing in China and the global share of communication IC made in China is rapidly increasing. Journal of China Communication organized a top professional editorial team and the team keeps inviting submissions of quality communication IC papers. This Special Topic Issue contains a collection of papers that provide theoretical advances, practical experiences, and reviews on VLSI ICs for Communication. We collected outstanding papers to this Special Topic Issue and to explore research and developments related Communication IC to further its state of the art. We received seven manuscripts in response to our call for papers, and we have accepted five papers for this Special Issue. The first article, on the RF transceiver side, “Research on CMOS Mm-Wave Circuits and Systems for Wireless Communications”, is authored by JIA Haikun, et al. The authors provide a state-of-the-art research on mmwave QPSK transceiver at 60GHz frequency range. The authors also provide a thorough review of challenges in mmWave circuits design. Several circuit techniques are introduced to deal with the challenges, including self-healing for amplifiers, resonant mode switching for VCOs (Voltage Controlled Oscillator) with wide frequency tuning range, and dual-mode for power amplifiers. The research is well fit in the roadmap of 5G micro-pico base stations for UDN (Ultra Density Network). The state-of-the-art 60GHz transceiver is integrated in CMOS IC with 65nm technology. The peak output power (per

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antenna) of the TX is 6.4 dBm at 60 GHz. The error vector magnitude (EVM) of the TX with 2.5 Gb/s data rate is 8%. The cascaded receiver gain reaches 54 dB with NF 6.1 dB for QPSK demodulation. The transceiver can be a potential candidate for future 5G UND base station at 60GHz range. On the analog/mixed circuit side, a pipelined ADC is present in the second article. It offers the research on ADC as a key component in mobile base stations and terminals. The continually increasing on demands for lower power and higher bandwidth is a primary motivation for ADCs. “A 85mW 14-bit 150MS/s Pipelined ADC with a Merged First and Second MDAC”, is authored by LI Weitao, et al. The acceptable input of the ADC is 2-Vp-p. It consumes only 85 mW, including 57mW for the ADC core. The SNDR of the ADC is 71.3 dB with a 2.4 MHz input and remains 68.5 dB for a 120 MHz input. On architecture level, the first power-hungry multiplying digital-to-analog converter (MDAC) and the second MDAC are merged by opamp and capacitor sharing. The dedicated sample-and-hold amplifier (SHA) is eliminated. And, the technique of range scaling is used to relax the requirement of the opamp. At circuit level, a single-stage opamp is adopted for low power. In result, both the power and the noise are optimized without reducing the speed, and the power consumption of the analog frontend can be effectively reduced. Besides, the method of blind calibration of linearity errors is used to improve the performance of the ADC. The result of the research can be used in current advanced terminals and will be able to reach quality performance for 5G base station after the silicon scaling. Mobile base stations consume up to 0.7% of the global generated electric energy now. To get 1000 times more bandwidth to be supplied by 5G, global base station will consume much more power. Design of future green base stations is essential for environments. Baseband IC Power consumption will be the dominate share of the total power in 5G base station of UDN because the cell radium will be shorted requiring less power emission from RF PA (Power Amplifier). Power consumption from RF modules and analog/mixed circuits can be predictable because component functions are relatively simple. However, the prediction of power consumed in digital baseband is not easy because there are different algorithms to select, and there are different architectures supported by

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different silicon technologies. By introducing the third article, “Multilevel Power Modeling of Base Station and Its ICs” by Wang Wei, et al, we get detailed power estimation and prediction method for baseband IC in base stations. Different from traditional ways, researchers of this paper offered a top down and bottom up approach. Power consumed in a base station is partitioned into subsystems and the power estimation is further based on mapping of selected algorithms to ASIC, DSP processors, and FPGA. Authors proved their method by comparing their power estimation to the power measured from a real base station. Authors claimed the capability to predict power consumption for future systems such as for 5G base stations. In this special issue, we also selected a paper concerned with the implementation research of channel coding. Polar codes have become increasingly popular recently because of their capacity achieving property. A big concern with its real application is the implementation complexity. The fourth article, by Sha Jin, et al, is titled “A Memory Efficient Belief Propagation Decoder for Polar Codes”. In this paper, a novel belief propagation (BP) decoder design for polar codes was presented. A new technique, stage-combination, is proposed to combine two adjacent stages into one, thus the number of stages and the memory requirement of the decoder will be halved. By applying path searching and nodes merging, the corresponding belief message updating rules are developed. The decoder was designed and synthesized under TSMC 45nm Low Power CMOS technology. The demonstrated hardware is partially parallel with 1024 nodes processed concurrently which achieved 50% memory reduction and reduced decoding latency. When code length is 210, the silicon cost is 0.747mm2 with the throughput of 1.683 Giga bits per second. Finally, we introduce the fifth article, “Low Power Sensor Design for IoT and Mobile Healthcare Applications”, by Chen Xican, et. al.. This paper reviews four possible low-power low-cost radars with high-accuracy for indoor positioning of IoT and healthcare monitoring. By comparing Continuous wave (CW) Doppler radar, impulse radio ultra wideband (IRUWB) radar, and Frequency-modulated continuous-wave (FMCW) radar in precision, circuit complexity, silicon cost, and power consumption, the authors exposed that Doppler radar architecture can achieve high accuracy and small area,


yet the power consumption is high with millimeter-wave carrier. FMCW radar provides a good trade-off between area, power, and ranging accuracy. However it suffers heavily from multi-path problem and scattering problem, especially in a narrow area. IRUWB radar can offer excellent precision for a reasonable cost with ultralow power consumption. In short range indoor positioning, as the conclusion, IRUWB is a proposed solution. The editors thank all of the authors for their submissions to this Special Issue. We are also grateful to the anonymous reviewers for their timely responses and their valuable comments to improve the quality of the articles. We hope that this Special Issue will further stimulate research interests in the significant research area of Communication ICs. Biographies Liu Dake, [IEEE SM’08] received PhD from Linköping University, Sweden in 1995. He is the Professor of China Recruitment Program of Global Expert (1000 plan) and National Expert of China. He is currently the Director and Professor of ASIP Lab (Application Specific Instruction-set Processor) of BIT (Beijing Institute of Technology), Beijing, China since 2010. He is also a full Professor of the Dept of Electrical Engineering in Linköping University, Sweden since 2001. He was the co-founder, the Board Director and the Chief Scientist Officer of Coresonic AB (Baseband IC Company acquired by MTK 2012), Sweden from 2005 to 2012. He was the co-founder, VP, and Chief Engineering Officer of FreeHandDSP AB Sweden (Gateway DSP IC Company, acquired by VIA 2002) from 1999 to 2002. He was a senior specialist of Low Power Design for Communication IC at Ericsson Microelectronics, Stockholm, Sweden from 1995 to 1998. Dake worked for Beijing Jiaotong University as a research staff during 1982 to 1989. Dake’s research interests are Communication IC, ASIP for Communications, 5G hardware platforms, Low power system design, medical microelectronics, and RF power amplifier. He is the author of Embedded DSP Processor Design, Application Specific Instruction set Processors published by Elsevier (Morgan Kaufmann), and co-authors of 10 book chapters in English, more than 150 papers in international Journals and international Conferences. Prof. Liu has served as the member of advisory committee of national instrumentation project packet in CNSF (National Nature Science

tional 03 Project Packet (National Science and Technology Major Projects for The New Generation Broadband Wireless Mobile Communication Networks). Wang Zhihua, [IEEE M’99-SM’04] received the B.S., M.S., and Ph.D. degrees in electronic engineering from Tsinghua University, Beijing, China, in 1983, 1985, and 1990, respectively. He is a Full Professor since 1997 and Deputy Director of Institute of Microelectronics since 2000. From 1992 to 1994, he was a visiting scholar at Carnegie Mellon University and at KU Leuven, Belgium. His current research focuses on CMOS RF IC for communications and biomedical applications. His ongoing work includes RFID, PLL, low-power wireless transceivers, and smart clinic equipment with combination of leading edge CMOS RFIC and digital imaging processing techniques. He is co-authors of 10 books and book chapters, more than 90 papers in international Journals and over 300 papers in international Conferences. He is holding 58 Chinese patents and 4 US patent. Prof. Wang has served as Deputy Chairman of Beijing Semiconductor Industries Association and ASIC Society of Chinese Institute of Communication, as well as Deputy Secretary in General of Integrated Circuit Society in China Semiconductor Industries Association. He had been one of the chief scientists of the China Ministry of Science and Technology serves on the expert committee of the National High Technology Research and Development Program of China (863 Program) in the area of information science and technologies from 2007 to 2011. He had been an official member of China Committee for the Union Radio-Scientifque Internationale (URSI) during 2000 to 2010. He was the chairman of IEEE Solid-State Circuit Society Beijing Chapter during 1999-2009. He served as a technologies program committee member of the IEEE International Solid-State Circuit Conference (ISSCC) from 2005 to 2011. He has been a steering committee member of the IEEE Asian Solid-State Circuit Conference (A-SSCC) since 2005 and has served as the technical program chair for the 2013 A-SSCC. He served as a Guest Editor for IEEE Journal of Solid-State Circuits Special Issue in December 2006, December 2009 and November 2014. He is an Associate Editor for IEEE Transactions on Biomedical Circuits and Systems and IEEE Transactions on Circuits and Systems — Part II: Express Briefs. Luo Li, [IEEE M 04] received PhD from BJTU (Beijing Jiaotong University), Beijing, China in 2004. She is currently a Professor of BJTU. Her research interests are VLSI design for Communications and Multimedia, Low power and Mixed-signal IC design.

Foundation of China) and the member on advisory board of Na-


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