Study of the temperature effect on the wet texturing ...

24th International IBERCHIP Workshop

February 26-28, 2018

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Study of the temperature effect on the wet texturing process of c-Si wafers for improve the short circuit current density of solar cells Mario Moreno, Jesús Martínez, Pedro Rosales, Sandra Baéz, Oscar Velandia, Alfonso Torres, Roberto Ambrosio, Miguel Domínguez, Karim Monfil, Javier Flores, Luis Hernández, Aurelio Heredia

 Abstract—In this work we have studied the wet texturing process of crystalline silicon (c-Si) wafers for the fabrication of solar cells. The solution composed of potassium hydroxide (KOH), isopropyl alcohol (IPA) and deionized water was used for texture the c-si wafer. Different temperatures of the solution were used in the range of 40 - 80 °C, where it was observed that it was an optimum temperature for produce a very uniform surface, with low diffused reflectance values. As well, solar cells were fabricated with and without the optimized texturing process. While the flat solar cell has a short circuit current density (Jsc) of 34.6 mA/cm2 and a efficiency of 12.6 %; the textured solar cell has a Jsc of 40.4 mA/cm2 and a efficiency of 14.7%. The above represents a increment of about 16.6 % of the efficiency in the solar cell.

Index Terms—silicon, solar cells, texturing.

I. INTRODUCTION

A

T the present time around of 90 percent of the solar photovoltaic (PV) modules fabricated in the world are based on silicon (Si) as polycrystalline silicon (poly-Si) and mono crystalline silicon (c-Si) [1]. The main reason is the fact that Si is one of the most abundant elements on Earth (just behind oxygen), it is not toxic, and it is used in a well established and mature industry for the production of Si wafers, which are used for the fabrication of Si integrated circuits (IC). Besides the above Si solar cells and modules have a very large time span, which is larger than 20 years and continuously there are efforts to improve the conversion efficiency [2-3]. Recently it has been achieved a new record of efficiency of c-Si solar cells of 26.3% in a practical size of 180 cm2 [4], the above efficiency is within 10% of the theoretical This work was partially supported by CONACYT, México, under project No. 154112. Mario Moreno, Jesús Martínez, Pedro Rosales, Sandra Baéz, Oscar Velandia, Alfonso Torres and Luis Hernández are with the Electronics department of the National Institute for Astrophysics, Optics and Electronics, INAOE, 72840 Puebla, México (e-mail: [email protected]). Roberto Ambrosio, Miguel Domínguez, Karim Monfil and Javier Flores are with the Meritorious Autonomous University of Puebla, BUAP, 72000 Puebla, México. Aurelio Heredia is with the Electronics department of the Popular Autonomous University of Puebla, UPAEP, Puebla, Mexico.

silicon efficiency limit of 29.1%. Despite the high efficiency values of c-Si solar cells achieved in laboratory, the main drawback is the price of the crystalline silicon (c-Si) wafers which increases the price of the solar cells and modules. On the other hand, the thin film solar cells technology has as the main characteristic the absence of crystalline wafers, since they are mainly fabricated on glass substrates and consequently its main advantage is their low fabrication cost. There are two main thin film solar cells technologies, the first based on amorphous silicon (a-Si:H) and the second one based on Cadmium Sulfur/Cadmium Tellurium (CdS/CdTe). Those technologies also have drawbacks, a-Si:H solar cells have low conversion efficiencies (< 13 %) and suffer of degradation due to sunlight radiation. On the other hand CdS/CdTe solar cells have demonstrated high conversion efficiencies (22 %), however their components are toxic and are not abundant on Earth, which is a limitation to meet the requirements of a growing PV industry in a long term. In order to reduce the cost production in c-Si solar cells, there is a continuous research in the solar cells fabrication processes. One way is to reduce the thickness of the silicon wafers [5], while other approach is the use of lower quality cSi wafers for mass production, replacing the high quality (and high cost) Float Zone (FZ) c-Si wafers, by lower quality Czochralski (CZ) c-Si wafers. The improvement of light trapping in the c-Si surface is another approach which is constantly under study and optimization. A reduction of the c-Si surface reflectance is achieved by texturing the c-Si wafers by wet solutions [6-8] and also by dry plasma processes [9-10]. In the present work we performed a study of the optimization of the texturing process of c-Si wafers using a solution composed of potassium hydroxide (KOH), isopropyl alcohol (IPA) and deionized (DI) water. Different temperatures of the solution were used in the range of 40 °C 80 °C, in order to analyze the production of very uniform surfaces, with lower diffused reflectance values. Also, solar cells were fabricated with and without the optimized texturing process in order to observe its effect on the increment of the short circuit current (Jsc) and consequently in the solar cells conversion efficiency.

Puerto Vallarta, Jalisco, México



II. EXPERIMENTAL The experimental process was divided in two parts, first it was carried out the process to optimize the texturization of the Si wafer surface, with the objective to produce prod a uniform c-Si surface and reduce the diffused reflectance. The second part consisted in the fabrication of solar cells with and without the optimized textured surface. A. Texturing processes The c-Si p (boron Si wafers used for this study were p-type doped), , 100>, CZ growth, of resistivity 5-15 5 Ωcm and thickness of 300 µm. The etchant solution was based on KOH / IPA / DI H2O, the KOH concentration was 1.5 W %, the IPA concentration was 3.8 Vol % and the DI water was 400 ml. [11].. The temperature of the solution was varied in the range of 40 °C to 80 °C. The process at the temperature of 40°C was performed for two times, 50 minutes and 70 minutes; while the processes at the temperature of 50 °C, 60 °C, 70 °C and 80 °C were carried out for 50 minutes. Table 1 shows hows the six different texturing processes. TABLE I CONDITIONS FOR THE TEXTURING PROCESSES OF C-SI WAFERS Temp. KOH IPA Process Time °C W % Vol % minutes Process A Process B Process C Process D Process E Process F

40 40 50 60 70 80

1.5 1.5 1.5 1.5 1.5 1.5

3.8 3.8 3.8 3.8 3.8 3.8

50 70 50 50 50 50

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were fabricated in flat wafers (non textured) and the second kind were fabricated on textured wafers using the optimized conditions obtained from the previous section. C. Characterization The textured c-Si wafer surfaces were analyze analyzed with a scanning electron microscope (SEM) (SEM), Hitachi, SU3500. This technique allow us to analyze the shapes of the pyramids aand also the uniformity along the wafer surfaces. The diffuse reflectance of the textured c-Si Si wafers was characterized with a spectrophotometer with an integrating sphere (X (X-Rite, 400-700 nm. Color-Eye Eye 7000A) in the range of 400 Current - Voltage (I-V) V) characteristics of the solar cells were measured at standard AM 1.5 spectrum illumination, at room temperature using a solar simulator (2A, Oriel Newport) and the cell performance characteristics haracteristics were extracted. III. RESULTS As was discussed in the experimental section, the wet texturing process was optimized and then it was used for the fabrication of solar cells. A. Texturing processes texturing As a first part of the study we performed the textu process at 40 °C C for two different times, 50 minutes and 70 minutes. Figure 1 shows the SEM top view images of the textured c-Si wafers, while the insets show a 60 degrees tilted view of the pyramids.

B. Solar cells fabrication Simple solar cell structures were fabricated on CZ cSi p-type wafers, with the characteristics described in the previous section. The wafers were chemically cleaned by a degreasing step based on trichloroethylene and acetone, the native thin oxide film was etched with buffered hydrofluoric acid (BHF) followed by the standard cleaning RCA 1 and RCA 2. Phosphorus diffusion from a n-type pe gas source was carried out in quartz diffusion furnaces. The pre-deposition deposition was made at 950 ºC for ten minutes using a mixture of Phosphine (PH3), Nitrogen (N2) and Oxygen (O2) gases. The phosphosilicate glass (PSG) was etched using the BHF 7:1 solution. The drivedrive in step was performed under H2O conditions, at 950°C in an atomic diffusion furnace for ten minutes. The wet thermal thin film of SiO2 grown in the drive-in diffusion step was used as single layer anti reflecting coating (SLARC SLARC). The grid was defined by photolithography in areas of 1cm x 1 cm and the aluminum (Al) contacts were formed by electron-beam electron (ebeam) evaporation and the lift-out technique. technique As well the bottom contact was formed by 1 µm thick evaporation of Al. An alloy step was made at 420 °C for 20 minutes in forming gas ambient and finally, y, the solar cells were cut 1cm x 1cm areas. Two kinds of solar cells were fabricated, the first kind

Fig. 1. SEM images of the textured c-Si wafers, process A and B of Table 1.




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In Figure 1 one can see that the wafer er textured for 50 minutes has small parts uncovered with pyramids, however an increment on the texturing time resulted on a over etching of the pyramids structures and an exposure off large flat parts in the c-Si surface. Therefore for the next texturing processes the time selected was 50 minutes. Figure 2 shows the SEM top view images of the textured ccSi wafers for 50 minutes at temperatures of 50°C, 60°C, 70°C and 80 °C. As well, the he insets show a 60 degrees tilted view of the pyramids. As one can see in the images of Figure 2, for this temperature range, the surface is completel completely filled with pyramids, without flat parts, which is desired for a reduction of the reflectance of the c-Si Si wafer surface. Also notice that the increment in the process temperature resulted on a slight increment of the pyramids sizes,, as is shown in the insets of the SEM images of Figure 2. The diffused reflectance measurements in the wavelength range of 400 nm to 700 nm are shown in Figure 3, and is observed that the wafer textured at 50 °C has the lower diffused reflectance, while the other textured wafers have practically the same reflectance values. The above can be ids produced with the related to the lower size of the pyramids erature of 50°C. Smaller pyramids could be more temperature efficient to produce multiple reflections eflections of the incident light. light Table II shows the average reflectance of the four processes and is observed that the process performed at 50 °C has an average diffused reflectance of 11.2 %, while the other process have an average diffused reflectance of about 12%. TABLE II AVERAGE REFLECTANCE OF THE TEXTURED C-S - I WAFERS Temp. Average Process °C reflectance Process C Process D Process E Process F

50 60 70 80

11.2 12.1 12.0 12.0

B. Solar cells characterization Two different processes of solar cells were performed in flat and textured wafers, as was discussed in section II. Figure 4 shows the current - voltage characteristics of both solar cells under AM 1.5 illumination, while the inset shows a schematic image of both structures. As one can seee the textured solar cell has a significant improvement in the current. Table III shows the performance characteristics of both types of solar cells, which are the average of 4 devices of area of 1 cm x 1 cm, with a standard d deviation less than 5%. The Voc of both solar cell is 0.55 V, which is low, and is consequence of the low quality of the thermal SiO2 passivating wafers The fill factor, layer and also of the low quality of the wafers. FF, is low and is practically the same in both cells, which is of about 66 %. The low FF is consequence of a relatively high series resistance produced by the metal / semiconductor contacts made of Al. The use of other kind of metals as silver (Ag) could reduce the series resistance and improve the t FF. Fig. 2. SEM images of the textured c-Si Si wafers, processes C to F of Table 1.




44 IV. CONCLUSIONS

In this work we have studied the effect of temperature on the texturing wet process of c-Si wafers for the fabrication of solar cells. We found that lower temperature of the wet texturing solution leads to a reduction of the diffused reflectance from 12 % to 11.2 %, which represents a reduction of 7%. From the characterization of both type of solar cells, we observed that the textured solar cell with the optimized process has an increment of Jsc of 16.4 % in comparison with the non-textured solar cell. The conversion efficiency in the wet textured solar cell was 14.7 %, while the flat solar cell has an efficiency of 12.6 %. ACKNOWLEDGMENT Fig. 3. Diffused reflectance of the processes C to F .

The effect of the optimized pyramids formation in the c-Si surface is observed in the current density, Jsc. For the flat solar cell is of 34.7 mA/cm2, while for the textured solar cell is of 40.4 mA/cm2, which represents a significant improvement of 16.4 % of the Jsc. The Jsc value measured in the textured wafer is close to that of the c-Si solar cell with record efficiency, which is 42.7 mA/cm2 achieved with inverted pyramids [12].

Fig. 4. I-V characteristics of solar cells fabricated on flat and on textured c-Si wafers.

Finally the conversion efficiency for the flat solar cell is of 12.6 %, while for the textured solar cell is of 14.7 %. The above represents an increment in the conversion efficiency of 16.6 %. TABLE III PERFORMANCE CHARACTERISTICS OF C-SI SOLAR CELLS. FF Eff Area Voc Jsc Solar % % Cell cm2 V mA/cm2 Non-textured Textured

1 1

0.55 0.55

34.7 40.4

66.2 66.1

12.6 14.7

M. Moreno acknowledges to CONACYT, Mexico, since this research was partially supported by the project number 154112. REFERENCES [1]

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