Microcantilevers with embedded piezotransistors formulate simple and sensitive MEMS sensors. In this reported work, three different p-type metal-oxide-semiconductor field-effect transistor (PMOSFET) embedded microcantilevers are fabricated and their responses to physical displacements are evaluated. Effects of gate bias on the drain current change and device sensitivity are investigated. Specifically, a wide tuning range above 200% is demonstrated for the PMOSFET with the width/length ratio of 5 within a gate bias span of 6 V. Such tunable feature can be very useful to compensate process variations and optimise device performance for maximum sensitivity.
Introduction: Microcantilever based sensors have been gaining considerable attention in measuring extremely small mass owing to their miniaturised size and high sensitivity. One such application is label-free bio molecule detection. Immobilisation of bio molecules on the cantilever surface results in physical displacement of the beam. The amount of displacement correlates well with the mass of the bio molecules and can be easily detected by piezoresistive methods [1]. In recent years, piezotransistors have emerged as an alternative option to their conventional resistor counterparts, featuring reduced noise [1] and almost twice higher sensitivity [2]. Motivated by this, three different piezotransistors are embedded in microcantilevers in this work to measure small displacements, as illustrated in Fig. 1. The influences of gate bias and transistor geometries (i.e. channel width and channel length) on device sensitivity are investigated.
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d = 5 mm d = 10 mm d = 15 mm
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P. Singh, J. Miao, L. Shao, R.K. Kotlanka and D.-L. Kwong
were kept the same as 30 mm while the channel widths were different. To apply the desired physical displacement, a PZT nano-indentor (Physik Instrumente P-245.5S) was vertically mounted on a DCM 2000 micro-manipulator (Cascade Microtech, Inc.) with an attached probe pointing at the free end of the cantilever. I-V characteristics of the PMOSFETs were obtained using the HP4156B semiconductor parameter analyser. The source-drain voltage VSD was biased at 5V throughout the testing, which was well below the impact ionisation threshold.
Wch(60 mm)/Lch(30mm) = 2
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Tunable microcantilever sensors with embedded piezotransistors
Wch(150 mm)/Lch(30 mm) = 5
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Piezoresistive effect in silicon: The piezoresistivity effect in silicon arises from change in the carrier mobility owing to strain induced band energy shift, band warping and carrier repopulation. In the case of microcantilevers, average surface stress sch in the PMOSFET channel region is given by [3, 4]: E 3t Wch sch = L − d (1) 2 K 2L3 where E is the Young’s modulus of silicon. K is a correction factor accounting for the material and geometric properties of the cantilever [4]. t, L, Wch and d are the thickness and length of the cantilever, channel width and displacement at the free end of the cantilever, respectively. In response to the physical displacement, the drain current of the PMOSFET varies in the form: DI Wch = apsch / p L − d (2) I 2 where p is the piezoresistive coefficient of silicon and a is the correction factor accounting for the carrier concentration and stress dependence normal to the cantilever surface [4]. Measurement results: Three microcantilevers were fabricated on a silicon-on-insulator (SOI) substrate. Cantilever dimensions were fixed to be 300 mm long (L), 200 mm wide (W ) and 3 mm thick (t). Etch of the cantilevers had an embedded PMOSFET near the base to experience the maximum stress. The channel lengths Lch of the three PMOSFETs
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Fig. 1 SEM of fabricated microcantilever embedded with PMOSFET
c
Fig. 2 Experimental results on drain current change against gate bias voltage under different cantilever displacement with PMOSFET as specified in a– c a Wch(60 mm)/Lch(30 mm) ¼ 2 b Wch(150 mm)/Lch(30 mm) ¼ 5 c Wch(90 mm)/Lch(30 mm) ¼ 3 VSD fixed at 5 V during testing
Fig. 2 shows the relative drain current change of the PMOSFET in response to the applied displacement. The overall current change is highest in the first PMOSFET owing to its smallest channel width Wch and highest channel stress sch , as expected from (2). It is also observed that the drain current change in the first PMOSFET increases with gate bias voltage VGS and the maximum current change is obtained at VGS ¼ 27 V. This can be attributed to the enhanced piezoresistive coefficient p at higher VGS [5]. The source-drain current of a transistor is determined by the carrier transport through its surface inversion layer. In the inversion layer, the carriers are confined in a triangular potential well formed by the source, drain and gate and the carrier energies are quantised into subbands. The subband energy levels are influenced by the transverse electrical field from VGS and changed by the applied mechanical stress. Consequently, the repopulation of the charge carriers among different valleys results in the mobility change in the inversion layer. Hence, the piezoresistive effect depends on VGS as well. However, the second PMOSFET in Fig. 2b exhibits the opposite trend of drain current change, giving the maximum value at VGS ¼ 21 V. This is believed to be due to the increased inversion layer carrier concentration at elevated VGS. Kanda’s classical model predicts that the piezoresistive coefficients vary with the Fermi level as a decreasing function of concentration [6]. Apparently, for this second PMOSFET, the effect of
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carrier concentration is the dominant factor and the aforementioned enhancement effect becomes less significant. Specifically, under 10 mm displacement, the drain current change decreases from 6.5% at VGS ¼ 21 V to 2% at VGS ¼ 27 V, manifesting a tuning range more than 200%. Next, to demonstrate the transition of the gate bias effect from enhancement to suppression on the drain current change, the third PMOSFET with medium Wch/Lch ratio of 3 is characterised and the measurement results clearly show that the drain current change increases at low VGS but decreases at high VGS. The maximum current change is achieved at VGS ¼ 23 V. It should be clarified that three PMOSFETs’ different responses to VGS are not due to the threshold voltage. Measured threshold voltages for the three PMOSFETs are very close. Their respective values are 20.25, 20.23 and 20.28 V. Hence, other factors such as non-uniform stress distribution in the channel region need to be investigated and this is still the topic of our ongoing research. Conclusions: In this Letter, we report our recent work on microcantilevers as displacement sensors. Three PMOSFETs are embedded into the cantilever base as piezoresistive sensing elements. Displacement testing reveals highest overall current change for the smallest PMOSFET owing to the high localised mechanical stress. Furthermore, a wide tuning range more than 200% is achieved for the relative drain current change through the modulation of the gate bias. However, within the same span of the gate bias, the PMOSFET with different width to length ratio exhibits different trends owing to the adverse effects between subband energy shift and inversion carrier concentration variation. As sensor dimensions are progressively evolving into sub-micron and nanometre regimes, such tunable feature of the piezoresistive PMOSFETs provides valuable opportunities to compensate process variations and tailor sensor performance for specific applications.
# The Institution of Engineering and Technology 2010 14 July 2010 doi: 10.1049/el.2010.1948 One or more of the Figures in this Letter are available in colour online. P. Singh and J. Miao (School of Mechanical and Aerospace Engineering, Nanyang Technological University, Singapore 639798) L. Shao, R.K. Kotlanka and D.-L. Kwong (Institute of Microelectronics, A ∗ STAR (Agency for Science, Technology and Research), Science Park-II, Singapore 117685) E-mail:
[email protected] P. Singh and J. Miao: Also with the Institute of Microelectronics, A∗ Star (Agency for Science, Technology and Research), Singapore References 1 Shekhawat, G., Tark, S.H., and Dravid, V.P.: ‘MOSFET-embedded microcantilevers for measuring deflection in biomolecular sensors’, Science, 2006, 311, pp. 1592–1595 2 Ivanov, T., Gotszalk, T., Sulzbach, T., Chakarov, I., and Rangelow, I.W.: ‘AFM cantilever with ultra-thin transistor-channel piezoresistors: quantum confinement’, Microelectron. Eng., 2003, 67–68, pp. 534–541 3 Ziegler, C.: ‘Cantilever-based biosensors’, Anal. Bioanal. Chem., 2004, 379, pp. 946– 959 4 Senturia, S.D.: ‘Microsystem design’’ (Kluwer Academic, 2001) 5 Scho¨rner, R.: ‘First- and second-order longitudinal piezoresistive coefficients of n-type metal-oxide-semiconductor field-effect transistors’, J. Appl. Phys., 1990, 67, (9), pp. 4354– 4357 6 Kanda, Y.: ‘A graphical representation of the piezoresistance coefficients in silicon’, IEEE Trans. Electron Devices, 1982, 29, pp. 64– 70
Acknowledgments: The authors acknowledge financial support from Nanyang Technological University and A∗ STAR (Agency for Science, Technology and Research) SERC (Science and Engineering Research Council), Singapore, grant no. 0921480069.
ELECTRONICS LETTERS 11th November 2010 Vol. 46 No. 23
