Analysis of stress buffer effect of polyimide on thermo-mechanical stress of ELK layer in flip-chip packages Motohiro Niwa1*, Kazutoshi Sakamaki2, Yoshiharu Kariya3 1)
Asahi Kasei E-materials Corporation, 2-1 Samejima, Fuji-shi, Shizuoka, 416-8501, Japan 2) Graduate school of Shibaura institute of technology 3) Materials science and Engineering department, Shibaura institute of technology *E-mail:
[email protected]
Abstract In this work, the finite element analysis (FEA) was carried out to investigate the ELK (extra low-k) protection potential of polyimide (PI) for SnAgCu solder Flip-chip (FC) packages. The effect of shape factors (thickness, opening diameter, slope) and mechanical properties (modulus, Tg, CTE) of PI layer are discussed. The maximum principal stress is considered as evaluation index for the ELK damage. For the purpose of clarifying the significant parameters for stress responses, the DOE analysis was investigated. By the FEA analysis, stress concentration observed clearly in two positions of ELK layer, at under corners of solder joint and at under PI opening edges. Through the statistical results, it was found that the factors of PI thickness, modulus and Tg had significant contributions to stress responses.
Introduction Flip-chip (FC) BGA package technology has been extended for high-performance LSI applications in recent years. For latest FC packages with a 40nm wafer node and beyond, ELK(extra low-k)/Cu interconnect with fragile nature and lower mechanical strength is implemented [1] , fracture and/or delamination of ELK induced by thermal stresses have been observed [2]. In general, two significant ELK damaged failure mode have been experienced. Failure mode appears (1) in cooling step during the reflow FC bonding and (2) during accelerated temperature cycling reliability test (TCT). Photosensitive polyimide (PSPI) is widely used not only for passivation layer for chip surface protection, but for dielectrics of bump re-distribution. PI layer would also be desired a stress buffer function to protect fragile ELK layer especially in case of mode (1), just before applying underfill. Therefore, it is necessary for the PI material to be designed with optimal lithographic and film mechanical properties for minimized ELK damage.
in Figure 1, the surface of the die is consisted from 4.25um Cu/low-k layer, 1.7um thick SiN as a passivation, and a PSPI layer with various thicknesses. Temperature condition is considered the cooling step during the reflow FC bonding that drops from the stress-free temperature at 508K to 298K, within 90sec (2.33K/sec). Material properties of each component are listed in Table 1. The Solders, SAC305, are defined as elasto-creep, temperature-dependent and their creep property is given by Galofaro’s low [3]. Cu/low-k layer was simplified to homogeneous layer by ROM (rule of mixture) for avoiding the effect of routing design of Cu interconnection. Si Wafer, Al Pad, Cu/Ti UBM, SiN, and FR4 substrate are defined as elastic. Table 1 Material properties of each component. Material Si die ELK layer Al pad SiN PSPI Cu UBM
Model description and Finite Element Analysis The finite element analysis is carried out by ANSYS 13.0 solver. Test model is a flip chip package, with a 10 x 10mm silicon die joined to FR4 organic substrate. Half of the package was 2D-modeled applying symmetric boundary condition from chip center to chip edge. As described
SAC 305 FR4 substrate
E (GPa) 168 28 69 267 Temp.dep. 110 Elast-creep Temp.dep. 22
Poisson’s ratio 0.35 0.3 0.3 0.28 0.3 0.34
CTE(ppm/K) 7 14 23.5 2.9 Temp.dep. 17
0.3
29
0.28
17
The input factors and levels verified in this work are shown in Table 2. The 7 factors and 3 levels are considered by DOE analysis and the numbers of run are 46 points chosen by optimal selection. Table 2 Each of factors and levels for experimental design.
Figure 1 Schematic diagram of detailed structure for thermo-mechanical FE simulation.
A B C D E F G
factor : PI Thickness : PI Opening diameter : PI Slope angle : Al Pad thickness : PI Young's modulus : PI Tg : PI CTE
unit um um deg um GPa K ppm/K
A-0.5 : 5 B-1 : 26 C-1 : 60 D-1 : 1 E-1 : 2 F-1 : 423 G-1 : 2
level A0 : 10 B0 : 36 C0 : 75 D0 : 2.75 E0 : 4 F0 : 523 G0 : 25
A1 : 20 B1 : 46 C1 : 90 D1 : 4.5 E2 : 8 F1 : 623 G2.4 : 80
The typical first principal stress distribution on the outer-most solder bump at 298K is shown in Figure 2. Clear stress concentrations are observed in two positions of ELK layer, at under corners of under bump metal (UBM, peak1) and at under PI opening edges (peak2). Recently, Lai et al. have investigated the structural design guideline for extreme low-k FC packages, and their analysis also leads two stress concentration peaks on low-k layer [4], as same as this simulation. For the further understanding of stress-buffer effect of PI layer, we focused to the shape factors (PI thickness, opening size, and slope angle) and the polymer’s mechanical properties (Young’s modulus, Tg, and CTE). Al pad thickness is also considered.
Figure 2 Stress concentration behavior and peaks(1 and 2).
Results and Discussion Significant parameter analysis for principle stress Figure 3 illustrates the significant factors and p-values indicate the contribution for stress responses on position of peak1. The factors of PI thickness, Al pad thickness and PI modulus are more significant and PI Tg and CTE indicate weak significance for ELK stress on peak1.
Figure 4 also shows a result for peak 2, in contrast, PI opening size and slope angle are significant. It is clearly observed that PI physical properties are effective relatively for peak1, and PI shape factors are correlative for peak2. Al pad thickness is significant for stress responses for the both peaks, but inverse contribution for peak1 and 2. Response surface of the interaction between PI thickness and PI modulus for peak1 is illustrated in Figure 5. These factors show significant corresponding interaction and thicker PI with higher modulus is better to reduce stress for peak1.
Figure 5 Response surface of interaction between PI thickness and modulus for peak1. The effect of PI thickness and mechanical properties for stress on ELK layer In Figure 6, the effects of PI thickness on maximum principle stress on ELK are illustrated. As PI thickness increase from 5um to 20um, both of stress on peak1 and 2 decrease, it is clearly shown that thicker PI is effective for reduce stress on
Figure 3 Principle stress and analysis of variance for peak1.
Figure 4 Principle stress and analysis of variance for peak2.
Figure 6 Stress contours and principle stress of ELK layer for PI thickness.
ELK. Figure 6 also illustrates stress contours of ELK under solder bump and it is found that stress concentration occur on edge of UBM layer and convey to Si die surface through the PI layer. This stress may be caused by the CTE mismatch between Si die and resin substrate during reflow cooling step. Figure 7 shows the simulated maximum principle strain of PI against distance from the surface at the UBM corner. The PI strain of 8GPa PI is smaller than that of 2GPa and 4GPa PI, and reach its constant value at near the surface. From the point of view of stress buffering effect, thick and high modulus PI would be endorsed, but leads to large warpage of the wafer and package.
Figure 9 shows the stress contour indicating the effect of PI Tg. It is observed that PI Tg is significant to the stress at peak1 (as shown in Figure 4), and seems to be better in the case of low Tg value. However, the strain of solder bump and UBM with lower Tg PI are larger than that of higher Tg, it may leads shorten fatigue life of solder joints. Hence, there might be a trade-off relationship between ELK damage during reflow cooling and bump life. PI is required to be designed with optimal Tg value for total reliability of FC packages with ELK. Magnification of deformation: x100
Figure 7 Relationship for simulated principle strain and PI thickness for PI modulus. Figure 8 shows the stress contours indicating the effect of PI modulus up to 8GPa. It is found that if PI modulus is higher, the region influenced by stress concentration is limited only nearby the UBM corner.
Figure 9 Stress contours and principle stress of ELK layer for PI Tg （Magnification of deformation: x100）. The effect of PI shape factors for stress on ELK layer Figure 10 shows contour figure and stress distribution for PI opening size. It is observed that, as PI opening size changes from 46um to 26um, the principle stress at peak2 decreases by 10%, on the other hand, stress at peak1 remains almost same value. Figure 11 shows stress distribution as the effect of PI opening slope. A slight stress reduction in peak2 revealed with slope decreasing from 90 degree to 60 degree. Although lower PI slope will be better for reduction of stress, but the impact is limited if Al pad is enough to thick (as discuss below).
Figure 8 Stress contours and principle stress of ELK layer for PI modulus.
Figure 10 Stress contours and principle stress of ELK layer for PI opening size.
Figure 12 Stress contours and principle stress of ELK layer for Al pad thickness.
Figure 11 Stress contours and principle stress of ELK layer for PI opening slope.
Conclusion and Outlook The stress buffer effect of PSPI was investigated and clarified by utilizing the FEM analysis. Thicker PI with higher modulus is effective to protect ELK under the edge of UBM and smaller PI opening size is favorite impact under the PI opening edge. TCT simulation analysis with underfill should also be investigated for further understanding of the suitable PI properties for various package design features. Acknowledgement
The effect of Al pad thickness for stress on ELK layer Figure 12 shows stress contour and distribution, for various thickness of Al pad. It should be mentioned that thicker Al pad is effective to stress reduction at peak2, in contrast, causes significant increase of stress at peak1. A possible explanation is that ELK layer is protected by Al layer located on ELK at peak2 position, however, at the position of peak1, as boundary of Al, SiN, and ELK layer, larger stress concentration occur if Al thickness is thicker. As shown in Figure 8, higher modulus PI is effective to reduce stress at peak1, it is considered that tensile tension from PI layer may work to cancel the stress concentration at peak1.
The Authors would like to extend their appreciation to Mr. Atsushi Fujii, Dr. Nobuchika Tamura and Dr. Nobuhiro Anzai with Asahi Kasei E-materials corp., for their cooperation.
References [1] W. Volksen, et al., “Low Dielectric Constant Materials”, Chem. Rev., Vol.110, pp.56-109, 2010. [2] G. Wang, et al., “Chip-packaging interaction: a critical concern for Cu/low k packaging”, Microelectronics Reliability, Vol.45, pp.1079-1093, 2005. [3] Y. Kanda, et al., “Visco-elastic Effect of underfill materials in Reliability Analysis of Flip-chip Package”, Proceedings of the 23rd JIEP Annual Meeting, pp.189-190, 2009. [4] Y-S. Lai et al., “Structural Design Guideline for Minimizing Extreme Low-k Delamination Potential in Flip chip Packages with 40nm Wafer Node”, International Conference on Electronics Packaging: ICEP 2011 Proceedings, pp.172-176.
