Rte de Raoued Ian 3.5 - 2083 El Ghazala Tunisia, Tel: +216 1 857 000, Fax: +216 1 856 829 e-mail: adel.&azel~suvcom.mu.tn. Abstract. This paper deals with ...
Efficient low-cost DSP-based Hardware Architecture for Power Line Communications Adel Ghazel, Fatma Rouissi Unit6 de Recherche en Technologies de 1'Information et des Communicatios (UTIC) Ecole Sup6rieure des Communications (SUP'COM), Cit6 Technologique des Comunications Rte de Raoued Ian 3.5 - 2083 El Ghazala Tunisia, Tel: +216 1 857 000, Fax: +216 1 856 829 e-mail: adel.&azel~suvcom.mu.tn
Abstract This paper deals with an optimized hardware design and DSP implementation of a narrow band power line Modem. By considering a standard application of Residential Power Line Carrier (RPLC), a design approach is carried out to look for the best compromise between efficiency and hardware complexity. To combat further the hostile communication environments of power line-channel and to respect the application specification, a DualCarrier binary phase shift keying (BPSK) modulation with convolutional coding scheme is proposed. For digital implementation of this scheme, efficient hierarchic software structure is defined with an appropriate programming of a general purpose DSP to reduce computational time and memory use. Some experimental results are presented to show efficiency of designed prototype.
Key words: power line communication, channel characterization, BPSK-Modem, DSP implementation
1 Introduction This work concerns residential power line carrier (RPLC) systems. The residential power circuit (RPC) refers to the low-voltage part of the powerdistribution circuit, which is basically everything attached to the secondary side of the distribution transformer including the low-voltage network within the consumers premises and all the loads connected to it. Although RPLC systems have a relatively long history [1][2], only few publications that investigate new communication devices exist. A distinction is made between the part of the RPC inside and the part outside buildings. In this paper, emphasis will lay on the part of the RPC inside buildings. The object is to allow some appliances to exchange information by transmitting data over the mains wiring. As a result there is no need to install extra control cables and appliances can be connected to the network simply by plugging them into he nearest wall socket. Apart fiom the obviously saving in installation cost, this virtual network also makes modification and enhancement very simple since new devicesjust have a wall socket to be instantly connected to the network. Many commercials PLC-Modems are proposed for such application. Most of them are based on dedicated modem integrate circuits that use either ASK or FSK techniques to reach an affordable cost for high volume consumer markets. All of these dedicated hardware solutions adopted by manufacturers are strongly proprietary and have limited flexibility. To build low cost reliable and flexible system, the authors propose to define a new architecture based on a general purpose DSP and a few analog components to i n t d c e with power line. Hence, we obtain a multiservice PLC-Modem reconfigurable and reprogrammable by software. The implementation of a fully digital programmable Modem requires the definition of the DSP real time software structure. To reach these goals, a design approach is proposed in this paper. First, by considering application specification and power line experimental capacity the choice of a narrow band BPSK communication scheme is justified. Second, optimized DSP-based s o h e is defined by applying hierarchic organization structure that permit to use the maximum of DSP hardware parallelism and pipeline process then by an appropriate choice for signal digital format and resolution to reduce memory space and calculation time. The efficiency of the proposed optimized design was illustrated by some experimental results and measurements that show the performances of the PLC-Modem implemented on a 16-bit fixed point 33MIPS (Analog Devices ADSP2181).
2 Commlmnicatio~scheme d e E ~ i i o n To optimize the design of power line modem architecture it is necessary to adapt the design to the application specifications. These specifications concern the following information: power line network type (in-building, out-building), transmission distance, data rate, communication protocol characteristics,... In this work, we are interested to an application of data transmission between computers over electric in-building power line network. A maximum transmission distance of 500m and a bit rate of 9600 baud are requested. The local power line network of our university (SUP'COM) is considered to carry out experimental tests. According to this design approach, some experimental measurements are carried out, at SUP'COM 220V HotNeutral local distribution power line, to determine the best choice of modulation and coding scheme, frequency carrier, transmission bandwidth, transmitted and received signal filtering and amplification parameters. The transmission channel capacity is analyzed at the band (95 to 148.5kHz) defined by the European Norm EN50065-1 issued in 1991 by CENELEC. Analysis of the measurement results [3] have shown that channel attenuation may reach 70dB including additional attenuation caused by branch circuit connection loss. Time domain noise measurement has shown that this noise consists of background and impulse noise components (figure 1-a) with peak to peak values equal respectively to 200mV and 20V. Spectral analysis in the considered band (figure I-b) shows large peaks above -4OdBm. Beside high attenuation and strongly noise, power line channel suffers from severe fading. This fading is caused by change of impedance. Many published works [4][5] show that the impedance of the residential power circuits increases with frequency and is in the range fkom about 1.5 to 8OQ at 100kHz. For our application, we should also consider standing wave effects since in the band (95 to 148.5kHz) physical dimensions of the communication medium are similar to about one-eight of a wavelength, which is about 375 and 2501x1 at carrier frequency of 100 and 150kHzrespectively. This effect will induce multipath transmission.
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Figure 1: Channel noise measnrements. (a): noise time domain signal @): noise spectrum
In oyr Modem design discussion the object is to define a desirable modulation scheme that provides low bit error rates at low received SNR, p e r f m s well in multipath and fhding conditions, occupies a minimum bandwidth, and is easy and cost effective to implement. To combat further the hostile communication environments of power line-channel and to respect the application specification, simple narrow bands ASK and FSK wide used techniques are insufficient. Recently, higher carrier frequency and different digital modulation schemes such as spread spectrum (SS) [6][7], minimum shift keying (MSK) and binary phase shift keying (BPSK) have been developed to increase the transmission bit rate and to combat low SNR. Specially, Direct Sequence Spread S p e c t m technique (DS-SS) is well suited due its antimultipath fading capabilities. With this technique, the transmitted signal occupies a bandwidth considerably greater than the minimum necessary to send the information. In terms of performances, wider receive bandwidth picks more large amplitude interference and high level of distortion is occurred. In terms of implementation complexity, this technique will induce the choice of higher carrier and requires distortion conection [3]. To reach the best compromise between performances and implementation cost a binary phase shift keying (BPSK) modulation scheme is used to increase transmission bit rate and to combat low SNR (figure 2). To obtain frequency singularities noise cancellation with much lower levels of distortion than wide band spread spectrum signals a dual carrier narrow band technique with channel error correction codes is used. Due to its impulse noise components, Hot-Neutral noise is not a white noise. So a convolutional code is used since with the same complexity as block coding larger coding gain can be achieved.
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Figure 2: Dual-Carrier BPSK block diagram system
3 Hardware design and implementation Priority in design was given to modularity, simplicity, low cost and reliability. A 16 bit - fixed point DSP is used for the implementation of the Dual-Carrier-BPSK Modem software. The DSP communicates in full duplex, with the host computer through RS-232 serial interhe. At the other end, the DSP communicates, in half duplex, through power line via a coupling interface (figure 3). At the transmitter side, the modulated data is applied to a digital to analog converter PAC). The analog signal is then amplified and sent to the power line-coupling band pass filter. At the receiver side, the filtered signal is then amplified and converted to digital data to be applied at the multichannel DSP serial port n02. The Modem software is implemented on Analog Devices ADSP-2181 whom is a 33MIPS DSP. The DSP programming structure was defmed not only for modulation scheme implementation but also to well support inputloutput communication management with the host computer and the power line-coupling interface.
Figure 3: Power Line Modem hardware architecture design block diagram
Figure 4: Dual-Carrier BPSK software hierarchic structure
To respect real-time constraints, although the DSP is a fast device, efficient hierarchic software structure (figure 4) is defined to accomplish all the requested processing in accordance with the processor timing ability and without any information distortion. For that, offline initialization steps are proposed to fill Look-Up Table corresponding to the .sinusoidal carrier. The module, that permits to calculate this table, makes call in a first time to a sub-module that approximate sine function. To optimize memory size use, we calculate, for the sine function, only ?4 of period and store it in a data file with 1.15 format. The periodic carrier signal at two frequencies can be easily generated, by an appropriate programming of the DSP Data Address generators (DAGs), to read the ?4 sine period from a circular buffer with using sine function symmetries. After initialization, the DSP processes in real time the communication subroutines.
4 Experimental results We have used a DSP sited to an evaluation board (fiom Analog Devices) with necessary features for inputloutput interfacing. Experimental performances of implemented Modem software are analyzed by means of experimental setup of figure 5. In this installation, hardware emulator is placed between the target card (ADSP2181) and a PC. The emulator pennits to analyze in real time all input and output signals of any implemented module. While DSP running is in progress, inputloutput data are dumped in files, converted in decimal format and plotted on the screen. Figures 6 and 7 illustrates time domain profile of Modem important signals. This shows the efficiencyof hardware prototype and DSP implemented Software.
Figure 5: PLC-Modem experimental test set-up
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Figure 6: Modem experimental results DSP important signals
(a) Received signal spectrum with
@) Received modulated signal after filtering and amplification
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Figure 7: Modem experimental results Analog coupling interface signals
In this paper, we have described the architecture design of a narrow band Modem for power line communication based on DSP implementation of an optimized communication scheme complying with CENELEC EN 50065 standard. To overcome power line channel attenuation, impedance varying and high levels of noise, a DualCarrier binary phase shift keying (BPSK) modulation with convolutional coding scheme is proposed. By considering, for our application, channel capacity experimental measurement, we defined the best choice of frequency carrier, transmission bandwidth, transmitted and received signal filtering and amplification parameters. A hardware prototype is designed by implementing the BPSK Modem software on a DSP that communicates with power line via an analog coupling interface. A synchronous mode hierarchic structure DSP s o h e is developed to well support the computational processes commutation, in full duplex communication, thanks to low-level instructions and an interrupt management system. To increase the number of instructions executed per machine cycle, we used intensively DSP features such as: pipeline process, hardware parallelism, modulo-mode addressing,... The efficiency of the proposed optimized design was illustrated by some experimental results and measurements that show the performances of the software Modem implemented on a 16-bit fixed point 33MHz DSP (Analog Devices ADSP2181).
References [I] J.B. O'Neal "The residential power circuit as a communications medium" IEEE Trans. Consumer Electronic, Vot CE-32, pp. 567-577, Aug. 1986 [2] A.G. Hudson, D.R. Beuerle and H.J. Fielder, " SSB carrier for utility control and communication", Proc. of IEEENational ,TelecommunicationConf., pp. 2.1.1-2.1.7,1976 [3] A. Ghazel, F. Rouissi, W, Mseddi "Design and DSP Ixnplementaton of Spread-Spectm Communications on Power Line" Smart Systems and Devices Conference(SSD'2001), Hammamet - Tunisia, March 2001
[43 O.G. Hooijen, "A Channel Model for the ResidentiaI Power Circuit Used as a Digital Communications Medium", FEEE Trans. on EMC, Vo1.40 No.4, November 1998
[S] T. Esmailian, F.R. Kschischang, P.G. Gulak ''Chara&&iics of in-building ower Lines at High Frequencies and their Channel ckpacity", Proc. of 4' International Symposium on Power Lines ~omunicationsand its Applications, Tokyo, 2000
[6J D.Raphaeli, E. Bassin, "A Comparaison between OFDM, Single Carrier and Spread for High Data Rate PLC", Proc. of 3 International Symposium on Power Lines Communications and its Applications, Lancaster, UK., March 1999 R. Kohno, H. lrnai, M. Hatori, S. Pasupathy, "An Adaptive Canceller of &channel Interference for Spread-Spectnun Multiple-Access Communication Networks in a Power Line", IEEE Journal on selected Areas in Communications, Vo1.8, N0.4,May 1990
Acknowledgements This work was supported by: e-device technology, Analog Devices-SST Division and the Tunisian Communication Ministry.
