Exact Combinational Logic Synthesis and Non-Standard Circuit Design Paul Tarau
Brenda Luderman
Dept. of Computer Science and Engineering University of North Texas, Denton, Texas
[email protected]
ACES CAD Lewisville, Texas
[email protected]
ABSTRACT Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first based on how many gates are used to synthesize all binary operators, the second based on how many N -variable truth table values are covered by combining up to M gates from the library. By applying the indicators to an exhaustive enumeration of minimal universal libraries, two dual asymmetrical operations, Logic Implication “⇒” and Half XOR “, ∗, +, ⊕. Note that > is the symmetric of ^ ntail nand
2 6 10 14
head + ,0 ,=> >,ntail =>,ntail