Exploring the Opportunity of Optimizing Sequencing Elements in ASIC ...
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Exploring the Opportunity of Optimizing Sequencing Elements in ASIC ...
sequencing element in ASIC designs. As sequencing elements occupy increasing portion of timing and power, it is necessar
Exploring the Opportunity of Optimizing Sequencing Elements in ASIC Designs Seungwhun Paik
Jaeha Kung
Youngsoo Shin
Department of Electrical Engineering, KAIST Daejeon 305-701, Korea
60
Abstract- An edge-triggered flip-flop is a de facto standard sequencing element in ASIC designs. As sequencing elements occupy increasing portion of timing and power, it is necessary to explore other types of elements. We identify pulsed-latch and dual edge-triggered flip-flop as two promising candidates. The challenges when they are employed for conventional ASIC design are identified, and potential solutions are addressed.
I. INTRODUCTION Most ASIC designs rely on an edge-triggered flip-flop as underlying sequencing element. This is mainly because of
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predictable timing that it offers. The amount of time available to a combinational block that lies between two flip-flops is fixed. This constrains timing uncertainties within a combina
