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FPGA Implementation of Image Steganography using. Haar DWT and Modified LSB Techniques. Nikhil Simha H.N.. Dept of Telecommunication Engineering,.
2016 IEEE International Conference on Advances in Computer Applications (ICACA)

FPGA Implementation of Image Steganography using Haar DWT and Modified LSB Techniques Nikhil Simha H.N.

Pradeep M. Prakash

Dept of Telecommunication Engineering, Institute of Technology Bangalore, India [email protected]

Dept of Telecommunication Engineering Institute of Technology Bangalore,India [email protected]

Suraj S. Kashyap Dept of Telecommunication Engineering, Bangalore Institute of Technology Bangalore, India [email protected] Abstract—Security places an important role in communication applications for secure data transfers. Image Steganography is one of the most reliable technique in encryption and decryption of an image (hidden) inside other image (cover) such way that only cover image is visible. In this paper frequency domain Image Steganography using DWT and Modified LSB technique is proposed. The proposed approach uses DWT to convert spatial domain information to frequency domain information. The LL band is used for further Image Steganographic process. The image is decoded using inverse LSB. Since the LL band is used for encoding and decoding purpose, memory requirement of the design is less for hardware implementation. Also this will increase the operating frequency of the architecture. The proposed technique obtains high PSNR for both stegano and recovered hidden image. Keywords— Haar DWT; Image Steganography; Modified LSB Technique; Gaussian Filter

I. INTRODUCTION Security is an important issue in various field such as communication and storage of confidential data in present era. A variety of encryption scheme have been proposed to ensure security of data like cryptography, steganography etc. Image encryption has wide applications [1] such as internet communication, multimedia systems, medical imaging, telemedicine, military communication, etc. Cryptography is used to achieve confidentiality (amongst others) in transmission and storage of data. Complex mathematical operation is performed by cryptographic schemes for encoding and decoding secret data. The Visual Cryptography is mainly based on the vision systems of human being. This approach can be able to solve various security issues with less complex mathematical models. In Visual Cryptography the secret information is hidden inside a visual media such as image or video which acts as carrier of the message. Visual cryptography scheme [2] is a secret sharing technique used for encrypting images. In this case the image is spitted into a large number of shares and at the decryption a finite amount of share required.

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Sayantam Sarkar Dept of Electronics and Communication Engineering Vijaya Vittala Institute of Technology Bangalore, India. [email protected] Steganography is the technique in which we can embed a secret image into a cover image without affecting its perceptual quality of the cover image in such way that secret image can be revealed by some process. The advantage of Steganography over Cryptography is the inseparability of the stegano (secret image) from the cover image. Steganography schemes can be applied to video, audio and image based on the application [3]. Steganography schemes are mainly divided into following methods [4] as spatial-domain Steganography and frequency-domain steganography. In spatial domain steganography method the secret information is modified by using spatial characteristics and then the modified information is attached with carrier information to maintain the secrecy. Normally pixel values and statistical trails are used to modify the spatial cheracterstics of the secret message. Similarly in the frequency domain steganography method both the secret message and carrier data are converted into frequency domain by using domain transforms such as Discrete Fourier Transform (DFT), Discrete Cosine Transform (DCT), and Discrete Wavelet Transform (DWT), Fourier Mellin Transform (FMT), Fractal Transform etc. Then those frequency domain information is merged to generate stegano media. In decryption time domain transformation is necessary to extract the hidden data. Contribution- In this paper novel LSB technique is proposed. The proposed technique takes 4 bits of binary hidden image pixel data from MSB side and merges with 4 bit MSBs of Cover image. This will increase the capacity of hidden image size. Also the uses of pre-shared key as the position of the pixel of secret image will provide security. Organization- In this paper Section-2 gives brief review of existing techniques with their advantages and drawbacks. Section-3 presents the proposed architecture along with all details. Simulation results and performance analysis are given in Section-4. Similarly Section-5 and Section-6 represents FPGA implementation results and Performance comparisons respectively.

2016 IEEE International Conference on Advances in Computer Applications (ICACA)

II. LITERATURE SURVEYS Ran-Zan and Yeh-Shun [5] proposed two way block matching based Steganography technique. This technique first generates a series of blocks and then search the similar blocks from the image. Hop embedding schemes are used to merge secret information into cover image. This scheme provides high PSNR for both cover and Hidden information. Vojtech and Jessica [6] proposed high pass directional filter banks with adaptive steganographics distortion function. The distortion is used to obtain the directional residues which are mainly used to measure the quality of stegano image. Chen et al., [7] proposed adaptive embedding algorithm for image Steganography. To minimize error multi-image and multi-bits are used by the algorithm. The algorithm is mainly divided into three steps as (i) embedded logo into cover (ii) adjust LSB of cover adaptively (iii) adjust MSB of cover adaptively. Ajit and Manjula [8] proposed an image steganography using DWT and hybrid wavelet transform. In this method first both images are normalized and thed DWT is applied on the respective image to generate all four sub-bands. Next all sub-bands are fused to get stegano image. Manoj kumar et al., [9] proposed image steganography which is mainly based on the Data Encryption Standard (DES) algorithm. The DES algorithm uses the S-box mapping and secret key. Embedding function is used to preprocess the secret image. Now by replacing the embedding function values into the cover image the stegano image is formed. Prabhakaran and Bhavani [10] proposed image steganography technique using Discrete Wavelet Transform (DWT). Amold transformation with secret key is used to make secret image. Then DWT is applied to both cover image and payload followed by alpha blending operation. This alpha blending matrix is obtained by addition of wavelet sub bands of cover image and secret image. Payload is hidden in the DWT coefficient of cover image. Prem kumar and Narayanan [11] have proposed a new scheme for secure banking application based on visual cryptography. The proposed technique incorporates both steganography and cryptography technology. Maximum numbers of surrounding pixels are considered to achieve best embedding capacity of every target pixel. Rong– Jian and Shi-Jinn [12] proposed an anti-forensic steganography system having high performance and high embedding capacity. To increase the randomness of encoding and decoding multi-bit adaptive embedding concept is used. Chao wang et al., [13] proposed fast matrix embedding algorithm for image Steganography. This method based on matrix extending for reducing the computational complexity of matrix based embedding. Vladimar et al., [14] proposed a secure steganography system in JPEG file based on modulus function which is secure against histogram attacks. First the message is encrypted using 128 bit AES cipher which will give added security. This encrypted text is then embedded in a JPEG image.

DWT is applied and only LL band is considered. This is because the LL band contains most of the valuable information about the image and the size of LL band is one forth of actual image which helps to reduce the size of the memory and channel bandwidth. As a result we get faster processing. By taking both LL bands the stegano image is generated by using modified LSB techniques. This stegano image is transmitted through communication channel and at the receiving end reverse operation is performed to retrieve back LL band of hidden image.

III. PROPOSED ARCHITECTURE The basic block diagram of proposed architecture is divided into two parts encoding and decoding as shown in the Fig. 1 and Fig. 2 respectively. At encoding part first both the image is pre-processed and then noise present in the image is filtered out by Gaussian filter. This will increase the quality of stegano and recovered image. On the filtered image Haar

Fig. 1. Encoding of Two Images

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2016 IEEE International Conference on Advances in Computer Applications (ICACA)

equations are implemented on hardware by using adder, subtractior and shifter only. =

(3)

=

(4)

=

(5)

=

(6)

Where,

is 2x2 image sub-matrix. yLL, yLH, yHL and yHH are four sub-bands respectively.

Fig. 2. Decoding of Hidden Image

A. Pre-processing In pre-processing first the image is converted to a specific size (i.e. 256x256) which is suitable for hardware implementation. Also color image is converted to gray image to reduce hardware requirements.

The Haar wavelet decomposition of Lena image is shown in Fig. 3 below.

B. Gaussian Filter Gaussian filter is mainly used to remove random noise present in any image. The equation for Gaussian filter in two dimensions [15] is given in equation (1) below ( , )=

(1)

Where, x is the distance from the origin in the horizontal axis. y is the distance from the origin in the vertical axis. σ is the standard deviation of the Gaussian distribution. The 3x3 Gaussian filter equation [15] is then

Where,



=

1 2 1 2 4 2 ∗ 1 2 1

Fig. 3. Haar Wavelet Decomposition



(2)

is 3x3 sub-matrix pixel values of an

image. C. 2D-DWT Discrete Wavelet Transform (DWT) gives multi-resolution characteristics of the image in frequency domain. The DWT is used in the paper is Haar DWT. We can decompose an image having MxN number of pixels into four sub-bands where each sub-bands having (M/2)x(N/2) pixels. The four sub-bands are named as LL, LH, HL and HH bands [16] respectively. Most of the information (low frequency components) of the image is present in LL bands and remaining bands contains edges (high frequency components) of the images. The equation for first four sub-bands [16] of Haar transform is given in equation (3) to equation (6) below. Those

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D. Modified LSB Technique The modified LSB technique is divided into two parts namely encoding and decoding as explained below a) Encryption Algorithm In this case we hide one image inside other image using a pre-shared key. So, the output is encrypted image which is also known as stegano image. The pre-shared key is mainly used for security purpose which is shared by both encoding and decoding end for proper operation. Here pre-shared key is used to generate the pixel position for encoding which will give more security. Consider the last 4 bits from MSB side of both cover and hidden image. Now merge both image pixels using concatenate operation and the position of the pixel is decided by the pre-shared key. The steps involved in encryption is given below Take the pixel values of cover image in binary format present in the image. ii. Consider only last 4 bits of the corresponding pixel value in MSB side. i.

2016 IEEE International Conference on Advances in Computer Applications (ICACA)

iii.

Take the pixel value of the hidden image whose position is defined by the pre-shared key equation. Consider only last 4 bits of the corresponding pixel value in MSB side. Merge both truncated pixel values to generate stegano image using the equation is given as

iv. v.

(





)

=



(





)







(7)

b) Decryption Algorithm This is reverse of encryption algorithm i.e. recover back the hidden image from cover image. To decrypt the stegano image first consider 4 bits from LSB side and then pad four zeros after the number. Now store that number into a temporary memory. Using pre-shared key determine the pixel values in actual order and send it to output which is recovering of hidden image. The steps involved in decryption is given below i. Take the pixel values of stegano image in binary format present in the image. ii. Image pixel position for decryption is defined by preshared key equation. iii. Consider only fast 4 bits of the corresponding pixel value in LSB side. iv. Merge the truncated pixel values with 4 zeros to generate hidden image using the equation is given as

(



IV.

)

=







(4

)

(8)

SIMULATION RESULTS AND PERFORMANCE ANALYSIS

In this section the proposed design is simulated using MATLAB R2012a (7.14.0.739) version. A. Performance Parameter In this section, the performance parameters are evaluated using PSNR values between original image and stegno image by using the formula [17] as = 10 log



(9)

∑ Where, MSE = ∑ I (x, y) − O (x, y) IN(x,y) is input image pixel values. OP(x,y) is stegno image pixel values. AB is the image dimensions (256x256). B. Image Output The original, hidden, stegno and recovered image is shown in Fig.4 where the cover image is a Lena image and the hidden image is Barbara image.

Fig. 4. Software Simulation Output

C. Performance Analysis To analyze the performance of proposed architecture we take different test images and encrypt same information into the image and check PSNR values using equation (7). Those values are tabulated into Table 1. TABLE I.

SIMULATED PSNR VALUE OF PROPOSED ARCHITECTURE

Cover Image

Hidden Image

PSNR Value (dB) of Cover Image

PSNR value (dB) of Hidden image

Lena

Plane

75.25

71.83

Barbara

Rice

70.05

65.41

Mandrill

RBC

73.75

70.38

Plane

Lena

74.73

71.39

Rice

Barbara

70.54

70.02

RBC

Mandrill

71.68

69.79

Taj Mahal

Cameraman

69.68

65.62

V.

FPGA IMPLEMENTATIONS

In this section the proposed design is implemented on Spartan 6 (XC6SLX45-3csg324) FPGA board and the coding is done by using VHDL language. A. Hardware Utilization Device utilization of the architecture is given in Table 2. Gaussian Filter uses 112 slice registers, 225 slice LUTs, 29 LUT-FF pairs and it’s maximum operating frequency is 164.841 MHz. LSB encoding and decoding both uses separately 3 slice registers, 1 slice LUTs and it’s maximum operating frequency is 866.643 MHz. Similarly Haar DWT uses 359 slice registers, 1835 slice LUTs, 248 LUT-FF pairs and maximum operating frequency is 286.75 MHz. Total module uses 514 slice registers, 331 slice LUTs, 297 LUT-FF pairs and the maximum operating frequency is 153.312 MHz. The extra hardware resources are used to

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2016 IEEE International Conference on Advances in Computer Applications (ICACA)

maintain synchronous operation between all blocks. Also this reduces the operating frequency of overall module. TABLE II.

HARDWARE UTILIZATIONS OF PROPOSED ARCHITECTURE

Parameters

Gaussian Filter

LSB Encoding

LSB Decoding

Haar DWT

Total

No. of Slice Registers No. of Slice LUTs No. of fully used LUTFF pairs Maximum operating frequency (MHz)

112

3

3

359

514

225

1

1

1835

2085

29

0

0

248

297

286.759

153.3 12

164.841

866.643

866.643

B. Image Output The original, hidden, stegno and recovered image is shown in Fig. 5 where the cover image is a real JPEG image and the hidden image is cameraman image

Fig. 5. Hardware Output

most of the image information is present (ii) Single bit replacement concept is replaced by multi-bit concept TABLE III. Authors

Techniques

Motamedi and Jafari [18]

Wavelet transforms and image de-noising techniques. LSB with Pixel value difference.

Tasnuva Mahajabin et al.,[19] Ashish Soni et al.,[20]

A. Software Comparisons Table 3 shows the comparison of PSNR of proposed technique and the existing techniques. The PSNR varies between 35.79 and 39.65 based on cover images. The proposed technique is compared with existing techniques presented by Hoda Motamedi and Ayyoob Jafari [18], Tasnuva Mahajabin et. al., [19] and Ashish Soni et al., [20]. It is observed that the PSNR values values are higher in the case of proposed algorithm compare to existing algorithms for the following reasons as (i) only LL band is considered where

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Discrete Fractional Fourier Transform.

Proposed Method

Haar DWT and Modified LSB Technique

Cover Image Barbara Boat

PSNR (dB) 39.65 36.34

Mandrill

32.67

Rice

32.46

Barbara Boat Mandrill Rice

70.05 72.49 73.75 76.79

B. Hardware Comparisons Hardware comparisons of proposed technique with existing techniques are given in Table 4. The architecture presented by Maya and Sabarinath [21] is implemented on Spartan-3 EDK embedded processor and the architecture uses 1474 slice registers, 1569 slice flip-flops, 2330 LUTs and 3 MULT18x18s. The algorithm presented by Jatin and Bhatt [22] is implemented on NIOS processor and the coding is done using C++ language which uses 2411 slice registers and maximum operating frequency is 107.75 MHz. The architecture presented by Vasantha and Vidhya [23] is implemented on Spartan-3 EDK embedded processor and the architecture uses 1880 slice registers, 2118 slice flip-flops, 2971 LUTs and 3 MULT18x18s. The proposed Technique is implemented on Spartan-6 FPGA and coding is done by using VHDL language. The proposed architecture uses 514 slice registers, 297 slice flip-flops, 2108 LUTs and maximum operating frequency is 153.312 MHz. Hardware utilization is very less compared to existing techniques because of simple and multiplier-less architecture. Here multipliers are replaced by shifters. TABLE IV.

HARDWARE COMPARISONS OF PROPOSED ARCHITECTURE WITH EXISTING ARCHITECTURES Jatin and Bhatt [22] Nios-II Processor

Vasantha and Videya [23]

Proposed Method

Spartan-3 EDK Processor

Spartan-6

1475

2411

1880

514

No. of Slice Flip-flops

1569

----

2118

297

No. of 4 input LUTs

2330

----

2971

2108

No. of MULT18x18s Maximum operating frequency (MHz)

3

----

3

0

----

107.75

65.342

153.312

Parameters

Maya and Sabarinath [21]

Device

Spartan-3 EDK Processor

No. of Slice Registers

VI. PERFORMANCE COMPARISONS In this section performance comparison of proposed technique with existing techniques in-terms of both software (i.e. PSNR) and hardware (i.e. device utilization and maximum operating frequency) is discussed

PSNR COMPARISONS OF PROPOSED ARCHITECTURE WITH EXISTING ARCHITECTURES

2016 IEEE International Conference on Advances in Computer Applications (ICACA)

VII. CONCLUSION Image steganography is the current area of research. In existing techniques both DWT and IDWT is used to provide security at decryption stage. But this will need large amounts of hardware resources and large execution time. To reduce hardware utilization and execution time the proposed system uses only LL band of both cover and hidden image for encryption. The uses of pre-shared key provide high security for both encryption and decryption. Also in proposed architecture multiplier and dividers are replaced by shifters which will increase the operating frequency. The proposed approach involves frequency domain transformation for compression of image which combined with modified LSB scheme provides better PSNR for any image.

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