Fractal-based low computation space phasor

www.ietdl.org Published in IET Electric Power Applications Received on 25th November 2011 Revised on 14th June 2012 doi: 10.1049/iet-epa.2012.0111

ISSN 1751-8660

Fractal-based low computation space phasor generation scheme for a four-level inverter using an open-end winding induction motor G. Shiny M.R. Baiju Department of Electronics and Communication Engineering, Power Electronics Research Laboratory, College of Engineering, Trivandrum, Kerala, India E-mail: [email protected]

Abstract: In this study, a space vector-based pulse width modulation scheme for an inverter with even number of levels is proposed. An approach based on fractal theory which utilises the self-similarity of the triangular sectors is employed in the present work, to find the sector and the inverter switching vectors. The space vector locations and associated computations are performed in a 608 coordinate system. Representation in a 608 framework avoids fractional arithmetic, thereby reducing computational complexity compared with the methods based on a Cartesian coordinate system. The duration of the switching vectors is determined after mapping the instantaneous reference space vector to an equivalent two-level inverter. The scheme is experimentally verified by using a four-level inverter configuration. four-level inversion is achieved with a dual inverter fed induction motor in the open-end winding configuration. The individual inverters are supplied with asymmetric DC link voltages. The switching vectors for the two inverters are automatically generated without using look-up tables. The scheme is implemented and tested with a 2-HP open-end winding induction motor drive.

1

Introduction

Inverters based on space vector PWM (SVPWM) modulation are extensively used in high-power industrial drive applications owing to their ability to synthesise waveform with higher number of voltage levels and low harmonic distortion [1– 6]. The different inverter topologies are neutral point clamped inverter, diode clamped inverter, flying capacitor inverter and cascaded H-bridge converters [1 – 9]. Inverter structures can also be realised by feeding an open-end winding induction motor from both ends [10 – 18]. Sine triangle PWM (SPWM) and SVPWM are the most widely used modulation schemes for inverters. SPWM technique involves the comparison of the reference voltage signal with a number of level shifted carrier waves to generate the PWM signal [10, 19, 20]. In SVPWM, the reference space vector is approximated by switching among the three nearest voltage space vectors [11 – 17, 21– 23]. Better harmonic performance and easier digital implementation makes SVPWM the most popular choice [1, 2]. In SVPWM, at every switching instant, the sector in which the reference space vector lies and the associated vectors to be switched are to be identified. As the number of levels of the inverter increases, the number of sectors and switching vectors involved increase and the switching algorithm becomes complex in the case of space vector modulation. The present work is based on the view that the space vector representation of multilevel inverters has an inherent fractal 652 & The Institution of Engineering and Technology 2012

structure, owing to the fact that as the number of levels increases, each sector gets progressively subdivided into self-similar triangular sectors. This concept can be employed for the identification of the sector where the instantaneous space vector is located [16, 21]. This paper proposes a PWM scheme, which can also be applied to generate the switching vectors for an inverter with even number of levels. The scheme is experimentally verified for a four-level inverter in open-end winding configuration. In the proposed SVPWM approach, the 608 coordinate system is used to represent the space vectors. The SVPWM scheme based on a 608 coordinate framework reduces the computational complexity [9]. The switching vectors required to realise the reference vector can be directly generated from the 608 coordinates without using look up tables.

2

Principle of the proposed scheme

In the present work, sector identification and associated switching vector determination are carried out using a fractal approach. To determine the duration of the switching vectors and optimum switching sequence, the instantaneous reference space vector is mapped to the space vector representation of an equivalent two-level inverter, by appropriate coordinate transformation. The actual switching vectors for realising the reference space vector are then generated by reverse mapping and the vectors are switched for the time durations calculated from the mapped reference IET Electr. Power Appl., 2012, Vol. 6, Iss. 9, pp. 652 –660 doi: 10.1049/iet-epa.2012.0111

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Fig. 1 Principles of triangularisation a b c d e f

Space vector locations of two-level inverter Space vector locations of three-level inverter. The new vector locations are marked as circles (W) Space vector locations of a five-level inverter. New vector locations are marked as stars (q) Space vector representation of three-level inverter showing two layers of operation designated as L ¼ 1 and 2 Space vector representation of five-level inverter showing four layers of operation designated as L ¼ 1 to 4 One basic sector of a five-level inverter with four layers of operation

vector. The logic for generating the switching signals necessary for driving the two inverters is generated by using a field-programmable gate array FPGA platform. The scheme can be used to generate the switching signals needed for any four-level inverter topology. In the proposed scheme, experimental results are presented for a four-level inverter using an open-end winding induction motor. The proposed algorithm also covers operation in an over modulation region. 2.1 Sector identification by the principle of triangularisation In SVPWM, the reference space vector is realised by switching three voltage space vectors nearest to the tip of the instantaneous reference space vector. To locate the tip IET Electr. Power Appl., 2012, Vol. 6, Iss. 9, pp. 652– 660 doi: 10.1049/iet-epa.2012.0111

of the reference vector, the sector enclosing the tip of the reference vector is to be identified. Fig. 1a shows the switching vector location for a two-level inverter. Coming to the space vector representation of a threelevel inverter shown in Fig. 1b, in addition to the existing seven switching vector locations, there are 12 more switching vector locations. It should be noted that the new switching vectors, marked as circles (O) in Fig. 1b are located in the middle of the existing vectors. When new vectors appear at the mid-points of the existing space vector locations of a three-level inverter, the space vector representation of a five-level inverter will result as shown in Fig. 1c. The additional switching vectors formed are marked as star (q) in Fig. 1c. The space vector representation of a two-level inverter can be viewed as a hexagonal structure with a single layer of 653

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www.ietdl.org operation (inner hexagon). It is interesting to observe that the formation of the new switching vectors in the middle of the existing vectors will add one more layer to the space vector representation of a two-level inverter. Thus, there are two layers of operation in the space vector representation of a three-level inverter and are designated as L ¼ 1 and 2 as shown in Fig. 1d. Similarly, the formation of new switching vectors in the middle of the existing vectors of a three-level space vector representation will add two more layers, thereby making the total number of layers as four in the space vector representation of a five-level inverter shown in Fig. 1e. One basic sector of a five-level inverter with four layers of operation is shown in Fig. 1f. As new switching vectors appear at the mid-points of the lines joining the existing vectors, the space vector representation of a two-level inverter progressively develops into the space vector representation of higher level inverters. The occurrence of new switching vectors at the mid-points also results in additional layers to the space vector representation. Thus, from the two-level structure (which has a single layer) higher level structures are progressively developed with the number of layers as 21, 22, 23, 24 etc. This layer formation is valid only for the values of n ¼ 3, 5, 9, 17, . . . . where ‘n ’ is the level of operation of the inverter. 2.1.1 Fractals and principle of triangularisation: A fractal is a fragmented geometric shape that can be subdivided into parts, each of which is a reduced size copy

of the whole. Fractals are generally self-similar and independent of scale. The proposed work is based on the Sierpinski triangle, introduced by the Polish mathematician Waclaw Sierpinski [24]. In fractal approach, a basic triangular sector gets divided into four self-similar triangular subsectors, as a result of the formation of new switching vectors in the middle of the existing vectors. This process of division of a triangular sector into four similar subsectors is called triangularisation [16]. This feature can be utilised to determine the sector of operation and associated switching vectors in the space vector representation of multilevel inverters. The principle of triangularisation applied to the space vector representation of a two-level inverter to find the sector of operation and to generate the switching vectors of inverter configuration is shown in Fig. 2. Since the new vectors are always located in the middle of the existing vectors, the subsectors can be generated by finding the mid-points of the lines joining the vertices forming the sectors. Fig. 2a shows the basic sector of a two-level inverter with switching vectors located at A0, A1 and A2. The 608 coordinates [m, n] of the switching vectors at locations A0, A1 and A2 are (m0 , n0), (m1 , n1) and (m2 , n2), respectively. One triangularisation applied to the basic sector of a two-level inverter generates four subsectors as shown in Fig. 2b. The additional switching vectors formed owing to triangularisation are situated at the mid-points of the lines and are designated as B0, B1 and B2. The 608 coordinates corresponding to these newly formed vector locations [(m3 , n3), (m4 , n4) and (m5 , n5)] are

Fig. 2 Generation of switching vectors for a five-level inverter using triangularisation a Sector-1 of basic two-level inverter b One triangularisation of the basic sector of two-level inverter generates four small triangular regions, which constitute the basic sector of a three-level inverter. The new vectors formed are located at the mid-points and are designated as B0, B1 and B2 c Further triangularisation generates four more sectors with switching vectors formed at locations C0, C1 and C2 d Complete triangularisation of the basic sector of a two-level inverter generates 16 small triangular regions, which constitute the basic sector of a five-level inverter. The new vectors formed are located at C0–C8 654 & The Institution of Engineering and Technology 2012

IET Electr. Power Appl., 2012, Vol. 6, Iss. 9, pp. 652 –660 doi: 10.1049/iet-epa.2012.0111

www.ietdl.org given by the equations m3 = (m0 + m1 )/2,

n3 = (n0 + n1 )/2

(1)

m4 = (m1 + m2 )/2,

n4 = (n1 + n2 )/2

(2)

m5 = (m0 + m2 )/2,

n5 = (n0 + n2 )/2

(3)

One more triangularisation to each sector will produce four more subsectors as shown in Fig. 2c. The vertices forming the newly created subsectors are designated in Fig. 2c as C0, C1 and C2. Thus, the second triangularisation will generate a total of 16 subsectors as shown in Fig. 2d. It is to be noted that ‘qth’ triangularisation applied to the basic sector of a two-level inverter results in the space vector representation of an ‘n ’-level inverter, with n ¼ 2q + 1 where q ¼ 1, 2, 3, 4, . . . . Also, the number of layers after ‘qth’ triangularisation will be L ¼ n 2 1 ¼ 2q. It may be noted that this method of deriving the space vector representation from the basic two-level by applying successive triangularisation can be used to realise ‘n ’-level inverter where n ¼ 3, 5, 9, 17, . . . (corresponding to q ¼ 1, 2, 3, 4, . . .). In other words, to generate the switching vectors using a fractal approach, the space vector

representation of the inverter should have the number of layers as a power of 2. This property of progressive self-division of the triangular sectors into subsectors to generate the sectors in the space vector representation of a higher level inverter is utilised in the present work to find the sector of operation and associated switching vectors of inverters, including even number of levels. To illustrate the proposed scheme for inverters with even number of levels, consider the space vector representation of a four-level inverter shown in Fig. 3a. As shown, in the space vector representation of a four-level inverter, the switching vectors are not located at the mid-points of the basic sector and hence the fractalbased algorithm cannot be applied to find the sector of operation and generation of switching vectors for a fourlevel inverter. In the present work, a method is proposed where the space vector representation of the four-level inverter is transformed into a nearest space vector representation in which the principle of the proposed algorithm can be applied. It is ensured that this transformation does not change the total DC link voltage VDC and the actual switching vectors. In the space vector representation of a four-level inverter shown in Fig. 3a, VDC represent the DC link voltage, which is equivalent to the DC link voltage of a single two-level

Fig. 3 Space vector representation of a four-level inverter a Space vector representation of four-level inverter b Addition of one more layer to the space vector representation of a four-level inverter generates a space vector diagram with number of layers as a power of 2 (here four layers) c Flowchart for finding the number of triangularisation and total apparent DC link voltage IET Electr. Power Appl., 2012, Vol. 6, Iss. 9, pp. 652– 660 doi: 10.1049/iet-epa.2012.0111

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www.ietdl.org inverter. For an ‘n ’-level inverter, the end vector will have a vector length of VDC and each switching vector will be normalised through division by a factor of VDC/(n 2 1). In Fig. 3a, each division in the A-phase axis is equivalent to a voltage of VDC/3. It can be seen that, the addition of one more layer to the space vector diagram of a four-level inverter will result in the space vector representation of a five-level inverter as shown in Fig. 3b. Then, the switching vectors of the fourlevel inverter can be generated from the newly created representation of a five-level space vector diagram using the fractal approach. Now, the total apparent DC link voltage ′ (VDC ) corresponding to the newly formed five-level space vector representation is given by ′ VDC = VDC +

VDC 4 × VDC = 3 3

(4)

′ represents a scaled version of VDC. where VDC Therefore the end switching vector (4 0 0) in the five-level space vector diagram is equivalent to a DC link voltage of 4 × VDC/3. Since the present scheme is based on the space vector representation shown in Fig. 3a which is a generalised representation of the switching vectors of a general fourlevel inverter, the scheme is applicable for any four-level inverter topology. The algorithm that determines the number of triangularisation to be performed and calculates the total

apparent DC link voltage is shown in the flowchart given in Fig. 3c. 2.1.2 Sector identification: Sector identification is used to determine the subsector that encloses the tip of the reference space vector. Fig. 4a shows the switching states of a five-level inverter in the ABC-frame for space vector locations and a reference space vector OT. Fig. 4b shows the 608 coordinates corresponding to the switching states. As shown in Fig. 4a, the tip of the reference space vector OT is enclosed by vertices located at B10, B11 and C15. The 608 coordinates representing these vertices are (1, 22), (2, 22) and (2, 23), respectively (Fig. 4b). The process of triangularisation will generate subsectors and switching vectors. From the generated subsectors, the centroid of each subsector is calculated from the 608 coordinates of the vertices forming the subsectors. For example, if (mx , nx), (my , ny) and (mz , nz) represent the 608 coordinates of the subsector enclosing the tip of the reference space vector OT as shown in Fig. 4c, then the coordinates corresponding to the centroid of that subsector, designated as (mcent , ncent), can be calculated as mcent = mx + my + mz /3

(5)

ncent = nx + ny + nz /3

(6)

Similar equations can be used to find the 608 coordinates of the centroid of other subsectors. The subsector with its centroid closest to the tip of the reference vector is

Fig. 4 Switching states of a five-level inverter a Space vector diagram showing switching states, subhexagon centres, reference space vector OT and mapped vector OT′ b Space vector diagram showing switching vectors in 608 (m, n) coordinate system c Space vector diagram showing (m, n) coordinates enclosing reference space vector OT 656 & The Institution of Engineering and Technology 2012

IET Electr. Power Appl., 2012, Vol. 6, Iss. 9, pp. 652 –660 doi: 10.1049/iet-epa.2012.0111

www.ietdl.org identified and that subsector is taken as the sector of operation.

Table 1

Conversion of (m, n) coordinates of subhexagon centre into corresponding switching vectors Basic sector

2.2 Identification of subhexagon centre and mapping to two-level inner hexagon The space vector diagram of multilevel inverters can be viewed as a hexagonal structure with one inner hexagon and several outer subhexagons, where six adjacent sectors constitute a subhexagon. The centre of each hexagon is called a subhexagon centre. In Fig. 4a, the centre of the inner subhexagon is represented as ‘O ’. The centres of the outer subhexagons are designated as, A1 – A6, B1 – B12 and C1 – C18. At any point of operation, the tip of the instantaneous reference space vector can lie in any one of the subhexagons. It may be observed that any outer subhexagon can be mapped to the innermost subhexagon (which is equivalent to the space vector representation of a conventional two-level inverter) by subtracting the coordinates of the subhexagon centre nearest to the tip of the reference space vector from the instantaneous coordinates of the reference space vector. This coordinate transformation by which the outer hexagon enclosing the tip of the reference space vector is shifted to coincide with the inner most subhexagon is referred to as mapping [13, 15, 22]. This principle of mapping is used in the proposed work to determine the duration of the switching vectors. Using the instantaneous amplitude of a three-phase reference sinusoid corresponding to this mapped reference space vector, the SVPWM gating signals for the two-level inverter can be generated in an optimum sequence [23]. The actual switching vectors required to realise the reference space vector are generated by reverse mapping [17]. In reverse mapping, the switching vector corresponding to a subhexagon centre is added with the two-level PWM signal to generate the actual switching vectors, in the optimum sequence. To illustrate the principle of mapping for the proposed scheme, consider the reference space vector OT shown in Fig. 4a. In mapping, the identified subhexagon centre nearest to the tip of the reference space vector is shifted to coincide with the inner subhexagon with centre ‘O ’. For the reference space vector OT, the nearest subhexagon centre is B10, with the switching vector in a 608 coordinate system

1 and 2 3 and 4 5 and 6

Switching vectors SVa

SVb

SVc

Vms + Vns 0 Vms

Vns 2Vms 0

0 2Vms 2 Vns 2Vns

as (1, 22) (Fig. 4b). After mapping, the subhexagon centre B10 coincides with centre ‘O ’ and reference space phasor OT gets mapped into vector OT′ as shown in Fig. 4b. The switching vectors required to realise the reference space vector OT are then determined by reverse mapping; that is by the addition of the subhexagon centre vector with the vectors corresponding to the mapped vector OT ′, as shown in Fig. 5. For reverse mapping, the switching vector corresponding to the subhexagon centre in a 608 coordinate system is converted to the normalised switching vectors SVa , SVb and SVc in the ABC-frame by using simple equations as given in Table 1. As an example, for the reference space vector OT, the 608 coordinate corresponding to the subhexagon centre B10 is (1, 22). The vector OT is situated in basic sector number five as shown in Fig. 4a. The switching vectors corresponding to B10 are calculated as SVa = Vms = 1

(7)

SVb = 0

(8)

SVc = −Vns = 2

(9)

Thus, the switching vector corresponding to the subhexagon centre B10 is (102). This vector (102) is added with the two-level switching vectors (000, 100 and 101) to generate the actual switching vectors (102, 202 and 203) as shown in Fig. 5.

2.3

Operation in over modulation region

In the proposed work, the layer of operation ‘L ’ is given by [17] √  3 VDC L = 1 + int Vj max / 2 n−1 

Fig. 5 Addition of subhexagon centre vector and the vectors corresponding to mapped reference vector OT ′ realises the actual switching vectors for reference space vector OT IET Electr. Power Appl., 2012, Vol. 6, Iss. 9, pp. 652– 660 doi: 10.1049/iet-epa.2012.0111

(10)

For an ‘n ’-level inverter, the number of the outermost layer is L ¼ n 2 1. Therefore in the case of a four-level inverter, the outer most layer is L ¼ 3 and the linear range of operation is up to L ¼ 3. In the proposed scheme, if the layer of operation L . 3, the inverter will be operating in the over modulation region. In this region, the vector corresponding to the subhexagon centre will not be switching and the other two active vectors will switch for the entire sample period. The proposed scheme also works in an over modulation region. 657

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www.ietdl.org 3 Experimental verification of the proposed scheme

Table 2 Status of top switches of the individual inverters during

3.1 Four-level inverter using induction motor in an open-end winding configuration

Top switch status of INV-1 (S1)

Fig. 6 shows a four-level inverter configuration realised by feeding an open-end winding IM from both ends by 2 two-level inverters [13]. The inverters are supplied with asymmetric DC link voltages. The DC link voltage of Inverter-1 is 2VDC/3. Inverter-2 is fed with a DC link voltage of VDC/3. The DC link voltage VDC used for the experimental set up is 120 V. The pole voltages of Inverter1 are represented as VAO , VBO and VCO . The corresponding voltages for Inverter-2 are VA‘O’ , VB‘O’ and VC‘O’ . Depending on the individual pole voltages of Inverter-1 and Inverter-2, the effective pole voltages [(VAO 2 VA‘O’), (VBO 2 VB‘O’) and (VCO 2 VC‘O’)] of the four-level inverter can achieve four levels viz. 2VDC/3, 0, VDC/3 and 2VDC/3. These four voltage levels can be represented by vectors 0, 1, 2 and 3, respectively. The phase voltages measured directly across the windings are denoted by VAA′ , VBB′ and VCC′ . Table 2 shows the status of top switches of the individual inverters during different voltage levels (for A-phase leg). In the multilevel inverter topology using inverters with an asymmetric DC link and employing an open-end winding induction motor, the high voltage converter will overcharge the lower converter in some space vector combinations of PWM operation [25]. This overcharging can be avoided either by using a controlled DC link supply [25] or by using SVPWM schemes which avoid space vector combinations causing this overcharging [15, 18].

different voltage levels (for A-phase leg)

OFF OFF ON ON

Top switch status of INV-2 (S1′ )

Effective pole voltage (VAO 2 VA‘O’)

Realised switching level

ON OFF ON OFF

2VDC/3 0 VDC/3 2VDC/3

0 1 2 3

The combined effect of the three voltages in the three 1208 separated phase windings of the induction motor at any instant can be represented by an equivalent vector in space. This space vector Vs for the dual inverter fed open-end winding scheme is given by the equation Vs = VAA′ + VBB′ e(j2p/3) + VCC′ e(j4p/3)

(11)

In terms of pole voltages, the space vector can be represented as Vs = (VAO−A′ O′ ) + (VBO−B′ O′ )e(j2p/3) + (VCO−C′ O′ )e(j4p/3) (12) 3.2

Experimental results

The proposed PWM scheme is experimentally verified by implementing the scheme on a 2 HP, three-phase IM drive in open loop with a v/f control for different modulation indices. The modulation index (m) in the proposed scheme is defined as Modulation index, m = Vref /(0.866 × VDC )

Fig. 6 Four-level inverter using induction motor in open-end winding configuration with asymmetric DC link voltages

where Vref is the amplitude of the reference and 0.866 × VDC is the maximum modulation index before an over modulation operation of the inverter. The gating pulses for the two inverters are generated using the dSPACE DS 1104 RTI platform and FPGA Xilinx Virtex. As mentioned earlier, the gating signals are generated by the addition of the subhexagon centre with the two-level PWM signal. By using the FPGA platform, gating signals necessary for driving any four-level inverter topology can be generated by the proposed scheme. The switching frequency used for the generation of gating signals for all modulation indices is 2.5 kHz. The gating signals used to drive the inverters, captured using a logic analyser, for a three-level (modulation index m ¼ 0.5 and

Fig. 7 Gating signals captured using a logic analyser, for different modulation indices a Gating signals captured using logic analyser for three-level operation (m ¼ 0.5). Upper three traces for inverter-1. Lower three traces for inverter-2 b Gating signals captured using logic analyser for four-level operation (m ¼ 0.8). Upper three traces for inverter-1. Lower three traces for inverter-2 c Gating signals captured using logic analyser for over modulation operation (m ¼ 1.1). Upper three traces for inverter-1. Lower three traces for tnverter-2 658 & The Institution of Engineering and Technology 2012

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Fig. 8 Experimental results for the proposed scheme a Pole voltage waveforms for modulation index 0.5. Upper trace pole voltage of inverter-1. Middle trace pole voltage of inverter-2. Lower trace effective pole voltage. Scale: X-axis: 10 ms/div; Y-axis: upper trace: 100 V/div. Middle and lower trace: 50 V/div b Phase voltage and motor current waveform for modulation index 0.5. Scale: X-axis: 10 ms/div; upper trace Y-axis: 25 V/div. Lower trace Y-axis: 1 A/div c Pole voltage waveforms for modulation index 0.8. Upper trace pole voltage of inverter-1. Middle trace pole voltage of inverter-2. Lower trace effective pole voltage scale: X-axis: 4 ms/div; Y-axis: upper trace: 100 V/div. Middle and lower trace: 50 V/div d Phase voltage and motor current waveform for modulation index 0.8. Scale: X-axis: 4 ms/div; upper trace Y-axis: 50 V/div. Lower trace Y-axis: 1 A/div e Pole voltage waveforms for modulation index 1.1 (over modulation). Upper trace pole voltage of inverter-1. Middle trace pole voltage of inverter-2. Lower trace effective pole voltage scale: X-axis: 4 ms/div; Y-axis: upper trace: 100 V/div. Middle and lower trace: 50 V/div f Phase voltage and motor current waveform for modulation index 1.1. Scale: X-axis: 4 ms/div; upper trace Y-axis: 50 V/div. Lower trace Y-axis: 1 A/div g Spectra of phase voltage for modulation index 0.5. Scale: X-axis: 10 ms/div; Y-axis: 20 dB/div h Spectra of phase current for modulation index 0.5. Scale: X-axis: 10 ms/div; Y-axis: 20 dB/div i Spectra of phase voltage for modulation index 0.8. Scale: X-axis: 10 ms/div; Y-axis: 20 dB/div j Spectra of phase current for modulation index 0.8. Scale: X-axis: 10 ms/div; Y-axis: 20 dB/div

layer of operation L ¼ 2), four-level operation (m ¼ 0.8 and L ¼ 3) and over modulation operation (m ¼ 1.1 and L ¼ 4) are shown in Figs. 7a – c, respectively. For a three-level and a four-level operation, Inverter-2 switches for the entire period whereas Inverter-1 shows less switching. The pole voltage waveform for the inverter for a three-level operation is shown in Fig. 8a. The effective pole voltage (VAO 2 VA‘O’) shown is captured using the MATH subtraction feature of the scope. Phase voltage and motor current for a three-level operation are shown in Fig. 8b. The pole voltage waveform for a four-level operation is shown in Fig. 8c. The phase voltage waveform for a four-level operation in Fig. 8d shows more number of steps in the waveform compared with the phase voltage waveform for a three-level operation, and the current waveform Fig. 8d is smoother than the three-level operation. The experimental results of pole voltage, phase voltage and motor current for over modulation are shown in Figs. 8e and f, respectively. The phase voltage waveform shown in Fig. 8f shows ten distinct levels, since the vectors in the outer boundary are switched over during modulation. The spectra of phase voltage and phase current for m ¼ 0.5 and 0.8 are shown in Figs. 8h – k. IET Electr. Power Appl., 2012, Vol. 6, Iss. 9, pp. 652– 660 doi: 10.1049/iet-epa.2012.0111

4

Conclusion

An SVPWM scheme based on fractal approach for a multilevel inverter is proposed. The present work exploits the fractal nature in the space vector representation of multilevel inverters, and can also be used to find the switching vectors of inverters with even number of levels. The switching vectors are represented in a 608 coordinate framework which helps to avoid fractional arithmetic. The switching vectors and the optimum sequence of vectors are achieved without using look up tables. The switching vectors are directly generated from the 608 coordinates using simple equations. The scheme can be applied for any multilevel inverter topology and the experimental results are presented for a four-level inverter. The four-level inverter is realised with 2 two-level inverters using an asymmetrical DC link, feeding the open-end winding induction motor.

5

Acknowledgment

The authors wish to acknowledge the assistance provided by Centre for Engineering Research and Development (CERD), Kerala, India. 659

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IET Electr. Power Appl., 2012, Vol. 6, Iss. 9, pp. 652 –660 doi: 10.1049/iet-epa.2012.0111