High Performance Non-Planar Tri-gate Transistor Architecture
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High Performance Non-Planar Tri-gate Transistor Architecture
Invention of a novel tri-gate fully depleted transistor with industry leading
performance. −. Research targeted for 2nd half of the decade. • A three
dimensional ...
High Performance Non-Planar Tri-gate Transistor Architecture Dr. Gerald Marcyk Director Components Research Logic Technology Development
Intel Intel
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What Are We Announcing? •
Invention of a novel tri-gate fully depleted transistor with industry leading performance −
•
A three dimensional extension of the TeraHertz architecture − −
•
Highest reported drive current for non-planar devices Depleted substrate improves Ioff leakage
Improved manufacturability over proposed double gate structures −
Intel Intel
Research targeted for 2nd half of the decade
Uses 300mm equipment and existing lithography capabilities
2
Why is this Important? • Transistor research breakthroughs will allow us to continue Moore’s Law through end of decade • IC Industry is making transition from Planar to Non-Planar Transistors • This development has potential to enable products with higher performance that use less power • Intel transistors lead industry performance in both research and manufacturing • Intel’s $4B investment in R&D continues on track: delivering a new process technology every 2 years
Intel Intel
3
Moore’s Law A new technology every 2 years Process Name
