15th International Power Electronics and Motion Control Conference, EPE-PEMC 2012 ECCE Europe, Novi Sad, Serbia
Implementation of FPGA based LED dimmer control as practical workshop for students of power electronics A.Avotins1, A.Suzdalenko2, I.Galkins3 1
Riga Technical University, Riga, Latvia, Email:
[email protected],
[email protected],
[email protected]
Abstract — Project based workshop on LED dimmer control with FPGA development kit, is aimed to increase practical skills for engineering students. Workshop consists of lectures and various laboratory works, which implements widely used industry tasks as examples, like indication with 7 segment display, serial communication, and specific timer module for PWM generation and proportional regulator for power converter control. Laboratory works improve students’ design and practical skills as well as decrease the time spent on solving such simple tasks. Those skills are well received from industrial companies when students do their practice during the Bachelor study course. Keywords — FPGA, LEDs, control.
I. INTRODUCTION The problem of rapidly rising global energy consumption is very topical. As research from [1] concludes lighting is quite important consumer due to fact, that it consumes one fifth of globally generated electrical energy. As a result, various technologies are introduced helping to stop the increase of energy consumption in this sphere, at growing number of illuminated objects. Rapid development of solid-state lighting sources, and implementation of luminaries with light emitting diodes, into indoor and outdoor illumination systems, creates a need and possibility for smart lighting control approaches, such as reduced lamp’s luminous output (dimming), when no object is registered; or even objectfollowing lighting, when illuminated path is moving synchronously with object, similar to the lighting system described and visualized in [2-3]. These techniques also require introduction of communication technologies making lighting network “smarter” and realizing selfcontrolling features. All these initiatives bring us to dynamical illumination, for which LED is the best suited choice, due to its linear character of light output dependence on driving current of LED, thus there are no such negative effects, like long warm-ups, typical for gas discharge lamps. Besides, SSL has good potential to overcome any other lighting technologies in perspective, comparing efficacy and price, within next 10 years [4]. For educational purposes of study program and to motivate the students to do more than it is asked within study course, it is a good practice, to give them tasks that are also topical within the fields of research or industrial application all over the world. Students of Riga Technical University (RTU) Bachelor study program
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“Computerized Control of Electrical Technology” (CCET) became interested in modern lighting technologies, where they need to contribute with their practical design and technical solution, designing both hardware (dimmable ballast for LED luminary, using topologies of power electronic converters, taught in previous courses), as well as software (control algorithm using also elements of Regulation Theory also taught in previous theoretical courses). As the Programmable Logic Devices (PLD) become more relevant in industry applications [5-6], it is very important to teach the basics of Field-Programmable Gate Array (FPGA) also to students, so that they can understand and use them to create a solution for defined technical task or problem. PLD programming is a bit different than Microcontroller (MCU) programming, as it is no more typical C code with algorithmic type of thinking, but logical thinking, which combines knowledge from Digital Electronics course and elements from Boolean algebra. Therefore this workshop can also contribute for the students as repetition course of previously taught materials, raising the quality of learning process. This article presents RTU new workshop of PLD usage for controlling light emitting diodes (LED) ballast, as a competitive and attractive solution of teaching power electronics and computer control methods to university students. II. BACKGROUND OF STUDY PROGRAMME It is important to know, that RTU is the only university in Latvia that prepares engineers and young specialists in the field of power and electrical engineering, thus study program CCET is responsible to teach students power electronics, electrical drives and computer control. As the field of power electronics is very wide, also wide scope of study courses is needed, in order to prepare a student, that could fit the needs of different type of industrial companies and also to fulfil the demands of European Union and Latvian Ministry of Education. Historically a structure of education levels of CCET study program started with enrolment of students into 3year study program of Academic Bachelors, obtaining first level diploma, student could decide either to continue 2-year professional studies to become an engineer and obtain a degree of engineering or continue studies in 2-year Academic Master program, and after that – 3-year Doctoral studies. As it was possible to skip the “engineer program”, and students mostly enrolled into the Academic masters program, it became a problem to
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the industry, as they did not receive the needed young specialists and some creative actions were made to deal with this problem. A new branch of study program was created – Professional studies, where two new study programs were introduced – Professional Bachelor and Professional Master Study program. The main difference is that Professional Bachelor studies one year longer compared to Academic studies, as students need to go to practice (one semester) at local companies and at the end to prepare the Bachelor thesis with Project part (engineering designs). The professional bachelor study program totally has 160 Credit Points (CP) (1CP-1.5 ECTS), where 20 CP are general study courses, 36 CP are industry and IT related courses, 40 CP are industry specialization courses, 20 CP for specific specialty courses, 6 CP for courses that student chooses himself, 26 CP for industry practice (split in 3 semesters) and 12 CP for development of bachelor thesis with project part. The Professional Master program is only one year long and deals mostly with advanced power electronics and computer control courses in the first semester, and additional 5 CP for practice and 21 CP for Master Thesis development. Furthermore it is possible to start as Academic Bachelor and finish as Professional master, as there is a transition program with one year, where students have practice and development of engineer work (like practical part of professional bachelor thesis). The Professional Bachelor study program is quite new, started just in the year 2004, but became very popular among the students and now 90% of bachelor students choose learning at professional studies, in spite of the fact it is much harder to achieve, but it seems that practical experience and possibility to obtain higher education diploma in 4 years (two diplomas simultaneously – degree of Academic Bachelor and engineering specialty) is a good motivation. Another factor is that according to the information gained from Ministry of Education, the unemployment rate of graduates of Professional programs of CCET is zero. The study program is also realized as full-time, parttime, and as RTU has its branches in 4 other Latvia cities, also courses of first two years are taught there. As the travelling costs are too high to deliver lectures each week, then a modular approach is used, with intensive learning of only one course during the stay of lecturer. The course then automatically is arranged as a workshop in this case, also a distant teaching method, like e-learning, mlearning is possible to apply. It also makes the course available for other university students to choose, within 6 CP of their free choice courses and also for the students, coming from foreign countries and ERASMUS type exchange program. The course with modular concept as well as workshop is also convenient to industry people, in the case they need to improve their skills in some specific field. Formerly the study program proposed such modular courses in Programmable Logic Controllers and Frequency Converters, when this kind of technology was emerging, and industry engineers needed to improve their knowledge and skills, thus contributing to the concept of lifelong learning. As the students of Professional Bachelor program are
making practice at local companies, as well as European companies like “Daimler AG”, “FESTO”, “ABB”, at the end a feedback in the form of written evaluation and filled survey from industry practice manager and the student is obtained and analyzed. And in some cases it can show where additional focus must be placed when teaching theoretical and practical courses. As the study program is accepted by Ministry of Education, it is not an easy task, to change it, and just minor changes are allowed, therefore sometimes there is not enough CP to implement additional courses to improve specific skills needed by industry, so the only way to solve that is workshops, where it is a free choice for both – the student and the lecturer, where the first one gets new knowledge for free, and the second one – can test his course with real people, to ensure the quality and correct errors. Similar situation is also with FPGA and PLD programming within CCET study program, which is hard to teach, a lot of background knowledge is needed and no spare CP and funding are available for this course. III. REQUIREMENTS FOR THE WORKSHOP AND PREVIOUS EXPERIENCE Proposed workshop is based on previously taught courses, like Power Electronics, involving knowledge of power converters, Digital Electronics, basic triggers and counters, as well as basic structures of digital electronic scheme description on VHDL (Very high speed integrated circuits Hardware Description Language) for CPLD (Complex Programmable Logic Device) development kit, such as definition of timers, shift registers etc., and Regulation Theory, with deep knowledge of transfer function and different coefficient tuning methods. Thus all the theoretical knowledge can now be used in practical application. The students have also available free access to different learning tools, like Virtuallab [7], which is developed in RTU, especially for the students of CCET study program, as well as to Java applets, which are the part of the Introductory Course on Power Electronics taught by Prof. J. W. Kolar at the ETH Zurich [8], where different power converters and their topologies can be modelled and mastered. Also for study program CCET, some other practical workshops are developed and used as e-learning tools, where [9] deals with electrical drives, like servo, DC motors and stepper motors using Arduino MCU as a main control unit, that needs to be programmed, using also feedback signals from voltage and current sensors, and also MEMS (Micro Electro Mechanical Sensor) tilt sensor. Here the students easy can get first real practical experience and also solve first practical task, using knowledge gained from theoretical courses. The work also can be done in groups, as it is possible to search web forums to get ideas for their program codes, and everyone can be a great help there, thus the students gain additional knowledge by teaching each other. The main motivator and reward for students is to get the motors turning – so it is a result that can be seen and heard. Another workshop that is already implemented in RTU is discussed in [10]. The solution is based on utilization of Texas Instruments LaunchPad development board, which costs about 5 USD and includes the development board with removable MCU, two LEDs and two pushbuttons and USB programmator integrated on the development board. This solution has excellent price-
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15th International Power Electronics and Motion Control Conference, EPE-PEMC 2012 ECCE Europe, Novi Sad, Serbia functionality ratio due to simplified connection with PC (only USB cable is required) and moderate functionality that is suitable for implementation of the control loop for LED dimmer. Four dimming circuits can be tested: buck, boost, buck-boost and Ćuk. Their basic schematics are well known from the literature. The discussed dimmers are realized in pulse mode circuits. The transistor of these converters has to be controlled by a pulse signal the duty cycle of which defines the amount of energy transferred from the input of the converter to its output. There are several approaches of generation of such signal depending on a control command. Thus the students can create Pulse modulation methods for LED dimmers using such ways like pulse-width modulation, constant pulse frequency modulation, variable pulse variable pause frequency modulation and constant pause frequency modulation. Realization of control algorithm for LED dimmer requires understanding and repetition of many theoretical courses presented for students previously. This practical example will help them to build strong relation between studied materials and encourage understanding them. Within this course the students are taught to realize control algorithm for the process, starting with simple examples, helping them to get familiar with the use of particular microcontroller. Then the basic idea of interrupt-driven program is being presented and additional examples are shown. Within the following example the students write their own programs to generate PWM (Pulse Width Modulation) signal in respect to some analogue value acquired from ADC module. At the end of this course regulation theory is applied in practice by realizing stable operation of LED
dimmer with non-stable input parameters. However this practical workshop is focused on practical implementation of MSP430 MCU for control of LED dimmer for those students, who have passed “Basics of MSP430”, and again at successful LED dimmer control programming, student as a reward can practically see the light output regulation and also in some cases to hear noises from choke when dimming is applied. Workshop task methodology according to Bloom’s Taxonomy key [16] terms is shown in Table I. It is a common practice at RTU to use Bloom’s key terms for description of new course or workshop, it also helps to describe and plan the lectures or practical tasks. Currently the proposed workshop is based on the use of FPGA, demonstrating its computational potential, flexibility in organization of internal structure and teaching to use them in student’s own solutions. During this workshop a student is advised to implement closed loop digital control based on FPGA for LED lamp ballast, that for he or she will be forced to use different knowledge from various courses (Power Electronics, Digital Electronics, Regulation Theory), besides, the student receives specific knowledge about modern trends in lighting sphere, getting information about the features of non-linear load (as that in the case of LEDs), dimming methods and control approaches from the course materials. Additional benefit for a student is that versatile VHDL structures are presented, which are often used in industrial applications, such as specific timer modules for PWM signals generation and for serial communication. On the top of that, realization of PID regulator is presented integrating all taught materials in one project.
TABLE I. GENERAL OVERVIEW OF THE PROPOSED TASK METHODOLOGY USING BLOOM'S TAXONOMY KEY TERMS. Bloom’s Taxonomy key terms
Task starting conditions
Performed task
Task result
Evaluation
Basic knowledge of Digital Evaluation of given schematics of LED Ability to work and make decisions Electronics, Boolean dimmer and choice of needed elements independently. Algebra, and Power and hardware and development of Ability to analyse and select best choice. Electronics. control algorithm.
Synthesis
PC and software for VHDL Design and assembling process for Knowledge about PLD programming. programming (Altera’s programmable logic. Ability to use dedicated software. Quartus II or Xilinx’s Web Ability to apply different programming tools in Pack) VHDL code for practical task.
Analysis
PC and software for VHDL Functional simulation, verification of Ability to run simulations and evaluate obtained programming (Altera’s the design. results according to expected. Translation of the Quartus II or Xilinx’s Web design into a standard form netlist. Pack).
Application
PC and software for VHDL Choice of actual FPGA device. programming. Programmer (USB-Blaster).
Comprehension
PC and software for VHDL Timing simulation, In-system Ability to choose appropriate chip, or change the programming, programmer debugging. Selection of another chip, if timings or revise the design. Ability to download and system PCB with needed. and debug the bitstream into a target device. JTAG-compliant PLD.
Knowledge
Lectures, handouts, laboratory works and results, hardware platform and PC with software.
Ability to generate output file (bitstream).
Analysis of given task, literature. Ability to find and use information in lecture Choice of VHDL Tools, hardware. materials or technical documentation. Ability to Design of full-ready system. solve tasks independently. Remember examples showed by lecturer.
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IV. DESCRIPTION OF WORKSHOP Some of already available course structures [6], [1113], are mainly focused on delivering hardware description language, rather than on industrial applications, which might help students getting engineer experience in digital design, based on programmable logic devices. To the authors’ mind, the practical tasks (or small projects) are the best way in delivering the course on FPGAs, by designing completely working solutions multiple times during the course, helping students to become accustomed with design process with repeated actions. It is also much harder for the lecturer when the student groups are large. A. Materials All materials presented during the course are available electronically, through university’s intranet. As the workshop and its concept already is tested with PhD students from Tallinn University of Technology (TUT), the draft materials of the course still are available on TUT server [14]. For the workshop implementation in RTU, an intranet portal ORTUS will be used, as it contains also elearning platform – Moodle. Students also have advantage of available full workshop material in one document as text book, since the printed materials are suitable for students to make notes or highlight some text, so they can better navigate in the workshop material. Students are able to read material before and prepare any questions about the lecture, or launch the task individually at home and prepare specific questions about different realization of the task. Workshop material (totally 63 pages) consists of three major parts, and content is arranged in the following way: Part I. Introduction to Programmable Logic • Genesis of Programmable Logic • Simple Programmable Logic Devices • Complex Programmable Logic Devices • Field Programmable Gate Arrays • Design Process • Manufacturers of Programmable Logic Devices Part II. Basics of VHDL • Design Approaches • Generalised Structure of VHDL File • Lexical Elements of VHDL • Data Types • Data objects • VHDL Operators • Entity’s Declaration • Entity’s Architecture Description Part III. VHDL programming • VHDL Tools for Dataflow Modelling (Concurrent Statements) • VHDL Tools for Structural Modelling (Component Statement) • VHDL Tools for Behavioural Modelling (Sequential Statements)
Appendix A: Internal structure of Atmel’s SPLD ATF16V8B Appendix B: Basic Elements of Altera’s MAX3000 Appendix C: Basic Elements of Altera’s EP2C5 FPGAs Appendix D: Schematic of CPLD Target Board (MAX3064) Appendix E: Pinout of FPGA Target Board (EC2P5) B. Lectures Lectures are delivered by employing presentations and spreading hand-outs with actual materials of the lecture. As the objectives of the workshop are rather specific, background theory of the system operation is presented during the introductory part, dividing difficult blocks into discrete elements for better understanding of the presented material. After discretization the VHDL code the examples are presented step by step, describing behaviour of each entity and its interactions. On the whole, any lecture delivers all the necessary material for implementation of specific task or project during laboratory works as well as some closely related topics that might be useful for the student in the future, such as similar interfaces, peripheral modules with specific functions, etc. C. Laboratory tasks The practical tasks help students to consolidate their theoretical knowledge and attain first engineer practice, as the electrical circuit should be assembled for each laboratory task individually for students, helping them to penetrate into the task content. A programmable logic device can be compared with an empty experimenting board where a digital electronic expert put digital gates and connects them together with wires. In the case of programmable logic this design and assembling process occurs virtually with assistance of dedicated software (for example, Altera’s Quartus II or Xilinx’s Web Pack) installed on an instrumental computer. Hardware is required at the very final stage in order to test the designed circuit in reality. The most advanced approach assumes that the design is deployed in a programmable logic device (target device) that can be programmed “in-system”. Then the target is all the time attached to the instrumental computer usually through a device called “in-system programmer/debugger” that in fact is an interface between the target and instrumental computer – Fig. 1. An alternative approach assumes that the target is programmed in the dedicated device called “programmer” but not in the system.
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Fig. 1.
Debugging hardware.
Fig. 2.
Design flow diagram
The design process of the programmable logic devices (often called “design flow” (Fig. 2) [15]) consists of several steps: 1) design entry/editing; 2) functional simulation; 3) synthesis; 4) implementation; 5) timing simulation; 6) download and in-system debugging. The design entry/editing is the stage of the design flow at which the developed system is described. This can be done either with a schematic or text entry tool. The text entry is realised by menas of one of Hardware Description Languages (HDLs): VHDL (Very high speed integrated circuits Hardware Description Language – IEEE St. 1076), Verilog HDL (IEEE St. 1364), AHDL (Altera’s HDL) or ABEL (Advanced Boolean Expression Language). The device independent entry is made with schematic, VHDL or Verilog (AHDL is owned by Altera, but ABEL – by Xilinx). The entered design is compiled. During the compilation the source code of the design is translated into the object code that can be used by simulators or can be written into the target device. Note that “source code” and “object code” definitions regards rather structural than algorithmic description. The functional simulation stage (device independent) verifies if the design operates in an expected way. It is checked if correct output is produced for typical combinations of inputs, which is produced by a software tool called “waveform editor”. If this stage reveals mistakes the design flow returns to entry/editing stage. The synthesis stage (device independent) provides translation of the design into a standard form netlist. The next stage is called implementation. At this stage the standard netlist generated during the synthesis phase is mapped in an actual device. At this stage all inputs and outputs of the design are tied to the particular pins of the device, as well as constraints of deployment in the device
are taken into account. At the end of this stage an output file suitable to deployment in the target device, so called bitstream, is generated. This phase is device dependant. The timing simulation stage verifies if the design is able to operate in the particular programmable device. All propagation delays that take place in the chosen programmable device are taken into account. If the timing simulation reveals that the design deployed in the particular chip does not satisfy the timing requirements the design must be either revised or deployed in another chip. In order to implement the design in hardware the download stage is necessary. At this stage the previously obtained bitstream is deployed in the chosen programmable device (target device). As it has been mentioned the most comprehensive kind of debugging assumes that the target chip is attached to the instrumental computer through an in-system programmer/debugger. Then the design can be deployed in the chip and tested in the real operation environment and in the real time. “USB-Blaster” is example of insystem programmer for Altera’s devices. It is attached to the instrumental computer through USB, but to the target through JTAG interface. Task N1 – Implementation of state table by means of four push buttons (D1..D4) and displaying Boolean function value on two colour LED (see Fig. 3. ). Pushing the buttons the student imitates input data and observes the result with indication LED. This laboratory is made in different approaches: in Schematics, in VHDL with structural approach, VHDL behavioural approach. This simple task teaches the students to distinguish different approaches of digital design.
Fig. 3.
Simplified diagram of Task N1.
Task N2 – Implementation of decoder for 7 segment indicator (see Fig. 4. ). The decoder receives four signals of push button states and indicates appropriate hexadecimal digit on 7 segment display. This task is made in Schematic, drawing boxes and defining inputs and outputs and then creating design file for describing its behavior with VHDL. This approach is thought for design-and-reuse practice for further tasks.
Fig. 4.
Simplified diagram of Task N2.
Task N3 – Implementation of serial communication (see Fig. 5. ). Serial communication is used to acquire data from ADC (Analogue to Digital Converter) integrated circuit communicating through SPI (Serial Peripheral Interface) bus and displaying its value (normalized to 99) with two 7 segment indicators. This task uses blocks from previous task, where the decoder
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for 7 segment indicator is already made, and obtaining design-and-reuse practice. Implementation of SPI interface, which contains various signals – Chip Select, Clock, Master Out, Master In; students ought to realize parallel processes, such as clock signal generation with certain number of pulses, shift registers for data transmitting/receiving, as well as chip select signal generation.
Fig. 5.
Simplified diagram of Task N3.
Simplified diagram of Task N4.
Task N5 – Implementation of proportional (P) regulator (see Fig. 7. ). By connecting FPGA board to power circuitry with required hardware, student is ready to realize P regulator, controlling output voltage value of a power converter driving different loads. Student is proposed to make digital control system by using previously designed modules (SPI, timer, and decoder) and making one major project of controlling power converter. D. Reports Additional goal of this course is obtaining skills of documentary work for each project, as it is important part of engineering work at a big company, as well as good practice for the student itself, helping him/her to observe the goals and results of the project in written form.
a) Main board of RTU development kit
V. CHOICE OF HARDWARE PLATFORM As it was mentioned in the workshop methodology part the following hardware specification is defined: FPGA chip, clock generator, 4 push buttons (PB), 8 R/G LEDs, two 7 segment indicators, ADC with SPI bus and board with power converter (which shall not be integrated on FPGA board, as FPGA can be used in different training purposes). FPGA development kits available on the market were analyzed for the use in the proposed course, where the main criterion was the end price of the development kit. DEP013 (http://iteadstudio.com) board is the most attractive one as it has all free pins of FPGA chip routed to terminal blocks, which allows connecting controllable training board with specified hardware, that could be designed at a low price. However, custom designed two board development kit, containing FPGA, LEDs and PBs on main board, others on training board (see Fig. 8. a, b) made profit of 20% in comparison with DPE013 development kit, thus it was chosen for the proposed course. The reconfigurable power board (see Fig. 8. c) allows testing three basic DC/DC converters: buck, boost, buck-boost by inserting corresponding configuration board. VI. EVALUATION To provide feedback to presenter, evaluate quality of workshop materials, and understand need for the possible improvements, a long term evaluation is needed. In this way it is possible to meet lifelong-learning requirements.
b) RTU development kit setup with training board Fig. 8.
Simplified diagram of Task N5.
Any report contains the following chapters: 1) Task description – describing the initial goals of the project (with state diagrams, Boolean functions, signal diagrams and etc.); 2) Schematic diagram – containing student’s solution with major blocks; 3) Details – describing VHDL with comments; 4) Electrical scheme – drawing the connection scheme of electric hardware; 5) Results – written conclusions and obtained results.
Task N4 – Implementation of versatile PWM block (see Fig. 6. ). Various applications require timers, as for time period measuring or for specific task realization, such as PWM signal generation required in this course. Students are proposed to design versatile PWM module, controlled with specific registers. This task is built on top of previous task design, where normalized value of analogue signal is used to control duty cycle of generated signal with added timer module. The PWM signal is observed on the display of oscilloscope.
Fig. 6.
Fig. 7.
RTU development kit based on Cyclone II.
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c) Reconfigurable power converter board
The part B is supposed to get feedback about the workshop and to evaluate the training staff where participants evaluate given statements using 5-point Likert scale (1 - strongly disagree, 2 – disagree, 3 – neither, 4 - agree, 5 - strongly agree). The survey contains statements like “The program of the workshop met your expectations”, “Training staff covered all topics of the program and available time was spent efficiently”, “Topics of workshop were good structured and well understood”, “Teaching method of the workshop was interesting and exciting”, “Topics covered by workshop I already learned previously”, “Topics covered by workshop I understood best from: a) presentation and lectures, b) course materials, c) practical experiments”, “Workshop significantly improved my knowledge and understanding of: a) power electronics, b) regulation theory, c) VHDL programming, d) PLDs”, “workshop significantly improved my ability to: a) find and use information, b) implement theoretical knowledge for realisation of practical task, c) perform and understand practical and industrial application tasks, d)apply programming in VHDL for practical application, e) interlink regulation theory with power electronics, f) work and make decisions independently”. Also a free field is left for individual suggestions for improvement, and after a test survey, it was indicated, that the time for the workshop (4 days x 8 hours) is enough, if the materials are available and students can prepare before the workshop. Additionally it is possible to get student evaluation (grade/test result) from previous courses and compare them with test results after the workshop/course evaluation of specific knowledge and abilities, thus it will show the improvements in student skills or a very valuable feedback for lecturers of previous courses, to make a deeper focus on some specific topics. Besides the practical tasks students solve during the workshop, a test is needed to see how much student remembers from both – the lectures and practical tasks. At least one question from each subtopic of course material should be covered. It would be wise to add some questions about elements used in practical tasks. During the test students are not allowed to use course materials and correct answer is deducted only if all multiple choice questions are answered correctly. When evaluating the results it should be taken into an account that students can be with different levels of programming knowledge background and most of them are not familiar with PLDs.
and develop the final survey, that could include view also from practice managers at industry. ACKNOWLEDGEMENT Development of this article is co-financed by the European Regional Development Fund within the project „Intellectual Hybrid Uninterruptible Power Systems and Component Development and Research to Improve Energy Efficiency” agreement No. 2010/0225/2DP/2.1.1.1.0/10/APIA/VIAA/160, within call „INVESTMENT IN YOUR FUTURE”
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VII. CONCLUSIONS The proposed workshop is aimed for industry needs, delivering project based lectures for the students of RTU study program CCET. During this workshop the student obtains advanced engineer practice implementing widely used tasks, such as indication with 7 segment display, serial communication over SPI bus, creating versatile timer and proportional regulator, also obtaining designand-reuse methodology, as it helps to decrease the development time. The students are encouraged by the lecture materials and practical examples, this is important to attract student attention during the course and having good results at the end. The next task is to conduct workshop on larger group of bachelor, master and doctoral study program students, to obtain full feedback,
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