Implementation of Rapid Prototyping Tools for Power Loss and ... - MDPI

energies Article

Implementation of Rapid Prototyping Tools for Power Loss and Cost Minimization of DC-DC Converters Amruta V. Kulkarni, Weiqiang Chen * and Ali M. Bazzi Department of Electrical and Computer Engineering, University of Connecticut, Storrs, CT 06269, USA; [email protected] (A.V.K.); [email protected] (A.M.B.) * Correspondence: [email protected]; Tel.: +1-860-771-8222 Academic Editor: Gabriele Grandi Received: 30 March 2016; Accepted: 20 June 2016; Published: 1 July 2016

Abstract: In this paper, power loss and cost models of power electronic converters based on converter ratings and datasheet information are presented. These models aid in creating rapid prototypes which facilitate the component selection process. Through rapid prototyping, users can estimate power loss and cost which are essential in design decisions. The proposed approach treats main power electronic components of a converter as building blocks that can be arranged to obtain multiple topologies to facilitate rapid prototyping. In order to get system-level power loss and cost models, two processes are implemented. The first process automatically provides minimum power loss or cost estimates and identifies components for specific applications and ratings; the second process estimates power losses and costs of each component of interest as well as the whole system. Two examples are used to illustrate the proposed approaches—boost and buck converters in continuous conduction mode. Achieved cost and loss estimates are over 93% accurate when compared to measured losses and real cost data. This research presents derivations of the proposed models, experimental validation of the models and demonstration of a user friendly interface that integrates all the models. Tools presented in this paper are expected to be very useful for practicing engineers, designers, and researchers, and are flexible and adaptable with changing or new technologies and varying component prices. Keywords: rapid prototyping; design methodology; DC-DC converters; user centered design; user interface; design optimization

1. Introduction 1.1. Overview As dependence on electronic appliances, digital products and computer systems in both industrial and household applications grows, the demand for power electronic converters is increasing. DC-DC converters continue to grow in popularity in all major electronics applications. Given the high demand for these converters, engineers are faced with a major challenge to design them in a very short period of time while still ensuring competitive cost. Rapid prototyping tools for converter development help solve this constraint and thus are of interest as both time- and cost-saving methods. Existing literature indicates significant research related to power loss estimation of various power electronic components. Loss estimation, for example, is used in [1] to analyze how power loss can be redistributed in a power converter using a modulation technique. Another reason for the need for power loss estimation is when evaluating the effect of different material on device power losses, e.g., [2,3]. In other applications, e.g., [4], power loss estimation is central in evaluating the usability of a power electronic converter, and power loss is used as a metric when comparing various converters. Since temperature rise in semiconductors and other power electronic devices is mainly caused by power losses, power losses have also been used for thermal analysis and modeling of power electronic

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systems, e.g., [5,6]. Therefore, power loss estimation is essential for new material, device, and converter evaluation, in addition to comparing various converters and designs where efficiency is a major figure of merit. Modeling of power electronic converters can be improved by loss and cost estimation, such as distributed power converters in a standalone DC microgrid [7], or DC microgrids for electric vehicle charging stations [8]. Also, essential application which relies on power converter topology can benefit from loss and cost estimation, like PFC converters for plug-in-hybrid electric vehicles [9], and novel bidirectional DC/DC converter topologies [10]. Several techniques have been implemented to find out power loss or cost models of specific components. A majority of this research has focused on selecting components for power electronic converters, e.g., [11]. Extensive research has been conducted for finding specific losses in semiconductors and magnetic components, e.g., [12]. Power loss estimation in semiconductors has also been extensively studied, e.g., [6,13] where power losses are correlated with temperature rise in the devices using thermal resistance datasheet values. Topology-specific power loss models also exist, which address specific component losses, e.g., power MOSFET losses in a buck converter [14], or system-level losses, e.g., boost converter [15]. Several methods to measure system-level power loss have also been proposed, e.g., [16,17]. Power losses in other parts of the converter, e.g., PCB losses [18–20] and gate drive losses [21], have been addressed but are only introduced in the Appendix A of this paper. Cost consideration is the most important factor for industries which mass-produce power electronic converters, to achieve market success and competitiveness by reducing cost [22]. However, most existing literature mainly focuses on methods to predict costs of specific systems and avoids generalized cost models of power electronic devices and converters. For example, in [23] the cost models of a battery, inverter and converter were developed on the basis of power ratings of these sub-systems. Cost estimation and reduction techniques have been developed for a single component such as inductor or heat sink in [24]. Some cost models are also developed for switch-mode power supplies by considering component power losses, weight, manufacturing process and raw material cost fluctuations [25]. An important application of power loss and cost estimation is design optimization of power electronic converters. With a well-established power loss or cost model of various devices that can form the converter, an optimization problem can be established where the converter’s power loss or cost are the figures of merit. Attempts for such analytical design approaches are [26], but mostly focus on power losses, especially semiconductor losses in [26]. Cost models and power loss models of specific devices which can be extended for integration in power electronic converters, have been presented in [27] but without converter design optimization. Therefore, generalized power loss models of major power electronic devices, as well as cost models of these devices, have not been shown in the literature for ease of integration for any power converter topology. For example, textbook models such as those presented in [16,28–30], are presented in an introductory ay where they may not be easily integrated into any power converter topology. Research papers, on the other hand, present very specific models for devices or topologies but rarely provide a flexible model that can be integrated with different power converter topologies. 1.2. Proposed Approach and Contribution This paper presents a building-block approach, as demonstrated in Figure 1, towards modeling power loss and the cost of power electronic converters. Power loss models are based on converter voltage, current, power, and frequency ratings and operating conditions along with basic datasheet information. Cost models are based on average prices related to component ratings obtained using an extensive market survey and surface-fitting tools. It is important to note that component technology and cost profiles change over time as a result of changes in material and manufacturing techniques and thus this paper intends to develop power loss and cost modeling methodologies that can evolve with time and changes in technology. The paper focuses on the building-block approach of the modeling of power loss and the cost of power electronic converters to achieve minimum power loss and cost design instead of the model

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The paper focuses on the building‐block approach of the modeling of power loss and the cost of The paper focuses on the building‐block approach of the modeling of power loss and the cost of power electronic converters to achieve minimum power loss and cost design instead of the model construction of single component. The proposed method provides a new tool and effective way where power electronic converters to achieve minimum power loss and cost design instead of the model construction of single component. The proposed method provides a new tool and effective way assembles the circuit from component. parts to an entirety to evaluate theprovides power loss andtool costand of an entire converter. construction of single The proposed method a new effective way where assembles the circuit from parts to an entirety to evaluate the power loss and cost of an entire The overall process used in rapid prototyping tools for cost and power loss models in optimization where assembles the circuit from parts to an entirety to evaluate the power loss and cost of an entire converter. The overall process used in rapid prototyping tools for cost and power loss models in and component-specific proposed here is illustrated 2. power The target of the models converter. The overall modes process asused in rapid prototyping tools in for Figure cost and loss models in optimization and component‐specific modes as proposed here is illustrated in Figure 2. The target of is the models is to minimize the estimation error when comparing actual component power loss and to minimize the estimation error when comparing actual component power loss and cost values optimization and component‐specific modes as proposed here is illustrated in Figure 2. The target of the models is to minimize the estimation error when comparing actual component power loss and with measured power losses or actual cost.or Their main advantage is the ability tois evaluate a large cost the values with the measured power losses actual cost. Their main advantage the ability to cost ofvalues with the measured power losses or achieve actual cost. Their main advantage is and the loss ability to number possible component combinations and almost instantaneous cost estimates. evaluate a large number of possible component combinations and achieve almost instantaneous cost evaluate a large number of possible component combinations and achieve almost instantaneous cost Thus largeestimates. quantity component library is generated as the basement of the models the web and aloss Thus a large quantity component library is generated as the and basement of based the and loss estimates. Thus a large quantity component library is generated as the basement of the program of the rapid prototyping tool ensures the component library is up to date along with the models and the web based program of the rapid prototyping tool ensures the component library is models and the web based program of the rapid prototyping tool ensures the component library is newest marketing price and technology. From customer perspective, once the converter topology is up to date along with the newest marketing price and technology. From customer perspective, once up to date along with the newest marketing price and technology. From customer perspective, once chosen and desired power loss and cost are typed into the GUI interfacing panel, the rapid prototyping the converter topology is chosen and desired power loss and cost are typed into the GUI interfacing the converter topology is chosen and desired power loss and cost are typed into the GUI interfacing tool ispanel, the rapid prototyping tool is able to search, chose the appropriate component and assemble able to search, chose the appropriate component and assemble the converter rapidly to save the panel, the rapid prototyping tool is able to search, chose the appropriate component and assemble time of customer to search and evaluate the component. Also, the rapid prototyping tool is able to the converter rapidly to save the time of customer to search and evaluate the component. Also, the the converter rapidly to save the time of customer to search and evaluate the component. Also, the rapid prototyping tool is able to optimize the results to minimize the power loss and cost with the optimize the results to minimize the power loss and cost with the change of the custom parameters rapid prototyping tool is able to optimize the results to minimize the power loss and cost with the change of the custom parameters such as topology, total cost and power loss. change of the custom parameters such as topology, total cost and power loss. such as topology, total cost and power loss.

Figure 1. Example illustration on how to aggregate component models a system Figure 1. 1. Example illustration on on how to aggregate component levellevel models intointo ainto system ($: Cost, Figure Example illustration how to aggregate component level models a system ($: Cost, η: Efficiency).

η:($: Cost, η: Efficiency). Efficiency).

Figure 2. Procedure for the proposed rapid prototyping tools.

Rapid prototyping tools for DC‐DC converters are of main interest here due to the converters’ Figure 2. Procedure for the proposed rapid prototyping tools. Figure 2. Procedure for the proposed rapid prototyping tools. simplicity, wide range of their applications and since the methodology for developing models is of main interest rather than actual topologies. Rapid prototyping tools for DC‐DC converters are of main interest here due to the converters’

Rapid prototyping tools for DC-DC converters are of main interest here due to the converters’ simplicity, wide range of their applications and since the methodology for developing models is of simplicity, wide range of their applications and since the methodology for developing models is of main interest rather than actual topologies. main interest rather than actual topologies.


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The paper proceeds as follows: Section 2 shows generalized component‐level power loss models. The paper proceeds as follows: Section 2 shows generalized component-level power loss models. Section 3 discusses the application of generalized power loss models for several power electronic Section 3 discusses the application of generalized power loss models for several power electronic converters. Section 4 explains the concept behind cost model development and illustrates these converters. Section 4 explains the concept behind cost model development and illustrates these models. models. Section 5 shows experimental results that validate the developed models. Section 6 explains Section 5 shows experimental results that validate the developed models. Section 6 explains rapid Energies 2016, 9, 509 4 of 35 rapid prototyping tools for model‐based power loss minimization while Section 7 presents tools for prototyping tools for model-based power loss minimization and presents tools for cost minimization. cost minimization. Section 8 concludes with the summary remarks and future work. The paper proceeds as follows: Section 2 shows generalized component‐level power loss models. Section 7 concludes with the summary remarks and future work. Section 3 discusses the application of generalized power loss models for several power electronic

converters. Section 4 explains the concept behind cost model development and illustrates these 2. Generalized Component‐Level Power Loss Models 2. Generalized Component-Level Power Loss Models models. Section 5 shows experimental results that validate the developed models. Section 6 explains Generalized power loss models of power electronic components are derived based on equivalent rapid prototyping tools for model‐based power loss minimization while Section 7 presents tools for Generalized power loss models of power electronic components are derived based on equivalent cost minimization. Section 8 concludes with the summary remarks and future work. circuit models of each each major major component component by by considering considering component component non-idealities non‐idealities and parasitic parasitic circuit models of and elements. The models presented here stem from existing models in textbooks and foundational elements. 2. Generalized Component‐Level Power Loss Models The models presented here stem from existing models in textbooks and foundational research papers, e.g., [13,19,28–30] and others. Therefore, this Section is a summary of such models, research papers, e.g., [13,19,28–30] and others. Therefore, this Section is a summary of such models, Generalized power loss models of power electronic components are derived based on equivalent while Section 3 presents these models when massaged for specific buck and boost converter topologies. circuit models of these each major component by considering component non‐idealities parasitic topologies. while Section 3 presents models when massaged for specific buck and boostand converter elements. The models presented here stem from existing models in textbooks and foundational

2.1. MOSFET Losses research papers, e.g., [13,19,28–30] and others. Therefore, this Section is a summary of such models, 2.1. MOSFET Losses while Section 3 presents these models when massaged for specific buck and boost converter topologies.

In power power electronic electronic converters, converters, MOSFETs MOSFETs operate operate as as switching switching elements. elements. Figure shows aa In Figure 3 3 shows 2.1. MOSFET Losses MOSFET model with its non‐idealities. MOSFET model with its non-idealities. In power electronic converters, MOSFETs operate as switching elements. Figure 3 shows a MOSFET model with its non‐idealities.

Figure 3. MOSFET model with non‐idealities. Figure 3. MOSFET model with non-idealities. Figure 3. MOSFET model with non‐idealities. The MOSFET P CM [28] is: The MOSFET P CM [28] is: The MOSFET PCM [28] is:

2 CM  DSon IDrms PCMPP “ RRDSon I2Drms CM  R DSon IDrms 2

(1)

(1) (1)

where ID is represented as shown in Figure 4 when the MOSFET operates as a switch. IDrms can be

where is represented in Figure 4 when the MOSFET operates as a switch. IDrms can be where IIDD is represented as shown in Figure 4 when the MOSFET operates as a switch. I Drms can be b asr shown 1 T Δi 1 1 b2 1 1 computed by I Drms1  2  2 t  I Lavg  1 Δi )2 dt Δi 1D  (2I Lavg  Δi )iD 1( I Lavg  Δi )2 D . T ∆i ( 1 0 tDT computed by IDrms “ 1T T0 TpΔDT dt “31 3 ∆i D ` pI D. 2 Lavg 2 ` pILavg i ` ILavg ´1 22 ∆iq 1 ´ 2 ∆iq∆iD 1 ´2 2 ∆iq 2 2 computed by I Drms  . ( t  I Lavg  Δi ) dt  Δi D  ( I Lavg  Δi )iD  ( I Lavg  Δi ) D  0 T DT 2 3 2 2

Figure 4. MOSFET drain current.

Figure 4. MOSFET drain current. Switching losses of MOSFETs are mainly divided into two parts, PON(M) and POFF(M). Because only won’t be steady state efficiency is concerned, voltage overshoot and diode reverse recovery effect Switching losses of MOSFETs are mainly divided into two parts, PON(M) and POFF(M) . Because only considered. The total switching loss P SW is thus [31]: Figure 4. MOSFET drain current.

steady state efficiency is concerned, voltage overshoot and diode reverse recovery effect won’t be PSW  PON(M)  POFF(M) (2) considered. The total switching loss PSW is thus [31]: Switching losses of MOSFETs are mainly divided into two parts, PON(M) and POFF(M). Because only where for a fixed fsw: steady state efficiency is concerned, voltage and diode reverse recovery effect won’t (2) be PSW “ Povershoot ONpMq ` POFFpMq considered. The total switching loss PSW is thus [31]: where for a fixed fsw :

where for a fixed fsw:

PSW  PON(M)  POFF(M)

1 PONpMq “ VDS IDon ptr ` tdponq q fsw 2

(2) (3)

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1 PON ( M )  VDS I Don (t r  t d ( on ) ) f sw 21 PON ( M )  VDS I Don (t r  t d ( on ) ) f sw 12 POFF ( M ) 1 VDS I Doff (t f  t d ( off ) ) f sw POFFpMq “ 21VDS IDo f f pt f ` tdpo f f q q fsw POFF ( M ) 2 VDS I Doff (t f  t d ( off ) ) f sw 2

The gate loss P The gate loss PGG is usually observed at C is usually observed at Cgsgs [17]: [17]: The gate loss PG is usually observed at Cgs [17]: PG  QgsVSupply fsw PG “ Qgs VSupply fsw PG  Q gsVSupply f sw Thus, total power losses in a MOSFET are: Thus, total power losses in a MOSFET are: Thus, total power losses in a MOSFET are:

Ploss(MOSFET)  PCM  PSW  PG

PlosspMOSFET Ploss(MOSFET)  PCM PSWPSW  PG` PG CM` q“

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(3) (3)

(4) (4) (4) (5) (5) (5) (6) (6) (6)

2.2. Diode Losses 2.2. Diode Losses 2.2. Diode Losses Diodes in power electronic converters act as rectifiers and uncontrolled switches. Figure 5 shows Diodes in power electronic converters act as rectifiers and uncontrolled switches. Figure 5 shows Diodes in power electronic converters act as rectifiers and uncontrolled switches. Figure 5 shows a diode model with its non‐idealities. a diode model with its non-idealities. a diode model with its non‐idealities.

Figure 5. Diode model with non‐idealities. Figure 5. Diode model with non-idealities. Figure 5. Diode model with non‐idealities.

The diode conduction loss PCD is modeled as: The diode conduction loss P is modeled as: The diode conduction loss PCD CD is modeled as: 2 PCD  VD0 (1  D)I Favg  RD (1  D)I Frms (7) 2 2 PCD “ ´ DqI Favg `RR (7) D0Vp1 D p1 PCDV  D´)IDqI (7) D0 (1  D)IFavg D (1 Frms Frms where typical values of VD0 and RD are: where typical values of VD0 and RDD are: are: where typical values of V D0 and R VD0 = VDmax/VDtyp (8) V D0 = VDmax/VDtyp (8) {V (8) VDmax VD0R“ D = ΔV F/ΔI F Dtyp (9) RD = ΔVF/ΔIF (9) There are two switching losses of a diode—turn‐on loss and turn‐off loss. The turn‐on loss is RD “ ∆VF {∆IF (9) There are two switching losses of a diode—turn‐on loss and turn‐off loss. The turn‐on loss is usually ignored because the diode starts conducting from an off‐state. P SWD is thus [6]: There are two switching losses of a diode—turn-on loss and turn-off loss. The turn-on loss is usually ignored because the diode starts conducting from an off‐state. P SWD is thus [6]: 1 PSWD  Qrrfrom Vrr f sw an off-state. PSWD is thus [6]: usually ignored because the diode starts conducting (10) 21 PSWD  QrrVrr f sw (10) 12 and the total diode power loss is: PSWD “ Qrr Vrr f sw (10) 2 and the total diode power loss is: Ploss(Diode)  PCD  PSWD (11) and the total diode power loss is: Ploss(Diode)  PCD  PSWD (11) PlosspDiodeq “ PCD ` PSWD (11) 2.3. Inductor Losses 2.3. Inductor Losses 2.3. Inductor Losses An inductor stores energy in its magnetic field. Figure 6 shows an inductor with non‐idealities An inductor stores energy in its magnetic field. Figure 6 shows an inductor with non-idealities An inductor stores energy in its magnetic field. Figure 6 shows an inductor with non‐idealities and Figure 7 shows a typical inductor current waveform in a DC‐DC converter. and Figure 7 shows a typical inductor current waveform in a DC-DC converter. and Figure 7 shows a typical inductor current waveform in a DC‐DC converter.

Figure 6. Inductor model with non‐idealities. Figure 6. Inductor model with non‐idealities. Figure 6. Inductor model with non-idealities.

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Figure 7. Inductor current waveform.

Figure 7. Inductor current waveform. The core loss PCORE is usually obtained by the Steinmetz equation [16,32] to be:

PCORE  K1 f B Ve (12) The core loss PCORE is usually obtained by the Steinmetz equation [16,32] to be: Energies 2016, 9, 509

x

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y

Note that modified Steinmetz equations are also common for core loss estimation, but if core loss coefficients are not supplied in a datasheet, a constant R x y C can be used and PCORE is estimated as:

PCORE “ K1 f B Ve PCORE 

VL2 RC

(12)

(13)

Note that modified Steinmetz equations are also common for core loss estimation, but if core loss coefficients are notThe Steinmetz equation is used as an example, but the methodology is intended to support other supplied in a datasheet, a constant RC can be used and PCORE is estimated as: forms of loss models. This is clear by using either Equation (12) or Equation (13) and can extend to Figure 7. Inductor current waveform. more detailed models. Resistive losses can also be estimated as shown in [16,32], DCR and ACR are VL2 provided by datasheets or manufacturers: The core loss PCORE is usually obtained by the Steinmetz equation [16,32] to be:

PCORE «

R  I 2 DCR

P

DCR PCORE  K1Lavg f x ByVeC

(13)

(14)

(12)

PACR  ILrmsbut ACRthe (15) to support other The Steinmetz equation is used as an example, methodology is intended Note that modified Steinmetz equations are also common for core loss estimation, but if core C can be used and PCORE is estimated as: Total power loss of an inductor is thus: forms of lossloss coefficients are not supplied in a datasheet, a constant R models. This is clear by using either Equation (12) or Equation (13) and can extend to 2 V Ploss(also P estimated  P  PACR as shown in [16,32], (16) more detailed models. Resistive losses can DCR and ACR are Inductor ) be  L DCR PCORECORE (13) RC provided by datasheets or manufacturers: 2

2.4. Capacitor Losses The Steinmetz equation is used as an example, but the methodology is intended to support other 2 forms of loss models. This is clear by using either Equation (12) or Equation (13) and can extend to Capacitors are major storage elements electronic PDCR in “ power ILavg DCR converters and their typical non‐ more detailed models. Resistive losses can also be estimated as shown in [16,32], DCR and ACR are idealities are shown in Figure 8. provided by datasheets or manufacturers: 2 “ I2Lrms ACR PACR PDCR  I Lavg DCR (14)

Total power loss of an inductor is thus: P  I 2 ACR ACR Lrms Total power loss of an inductor is thus: Plossp Inductorq “

(14) (15)

(15)

PCORE ` PDCR ` PACR

(16)

Ploss( Inductor )  PCORE  PDCR  PACR Figure 8. Capacitor model with non‐idealities.

(16)

2.4. Capacitor LossesTwo major power losses in the capacitor are those in its AC and DC resistances [33]. Pac is: 2.4. Capacitor Losses

2  ICrms ESR Capacitors are major storage elements Pacin power electronic converters (17) and their typical Capacitors are major storage elements in power electronic converters and their typical non‐ non-idealities are shown while P dc is: in Figure 8. idealities are shown in Figure 8.

Pdc 

VC2 RP

(18)

Total power loss of the capacitor is thus:

Ploss(Capacitor )  Pac  Pdc

(19)

Figure 8. Capacitor model with non‐idealities.

Figure 8. Capacitor model with non-idealities. Two major power losses in the capacitor are those in its AC and DC resistances [33]. Pac is: 2 Pac  Ithose Two major power losses in the capacitor are [33]. Pac is: Crms ESR in its AC and DC resistances (17)

while Pdc is:

2 Pac “ ICrms ESR 2 Pdc 

while Pdc is:

VC RP

(17) (18)

Total power loss of the capacitor is thus:

VC2 P “ dc )  Pac  Pdc Ploss(Capacitor RP

(19)

(18)

Total power loss of the capacitor is thus: PlosspCapacitorq “ Pac ` Pdc

(19)

Pdc is small as compared to Pac as capacitors are mainly used to pass current ripple, thus Pdc it is frequently ignored.

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Pdc is small as compared to Pac as capacitors are mainly used to pass current ripple, thus Pdc it is 7 of 35 frequently ignored.

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3. Power Loss Models for Several Converters 3. Power Loss Models for Several Converters Equations explained inin previous section are common in the literature, but are rarely Equations explained thethe previous section are common in the literature, but are rarely presented presented for specific converter topologies. In this section power loss models for boost and buck for specific converter topologies. In this section power loss models for boost and buck converter converter in continuous conduction mode (CCM) and flyback converter in discontinuous conduction in continuous conduction mode (CCM) and flyback converter in discontinuous conduction mode mode (DCM) are explained in detail. These converters are used as examples due to their common use (DCM) are explained in detail. These converters are used as examples due to their common use in any in any applications their simple construction analysis. All generalized equations are applications and theirand simple construction and analysis.and All generalized equations are reformulated in reformulated in terms of input and output parameters and datasheet information. terms of input and output parameters and datasheet information. 3.1. Boost Converter in CCM 3.1. Boost Converter in CCM A typical non-ideal non‐ideal boost boost converter is shown in Figure 9 followed by derivations for power A typical converter is shown in Figure 9 followed by derivations for power losses losses in main boost converter components operating in CCM. in main boost converter components operating in CCM.

Figure 9. Boost converter with its non‐idealities. Figure 9. Boost converter with its non-idealities.

3.1.1. MOSFET Losses 3.1.1. MOSFET Losses P is obtained from Equation (1) and can be estimated [34] as: PCM CM is obtained from Equation (1) and can be estimated [34] as: „ i 2  2  PCM  RDSon D  I in2 2 ∆i  PCM “ R DSon D Iin `12 

12 To calculate PSW, IDon and IDoff can be obtained from Figure 7: To calculate PSW , IDon and IDoff can be obtained from Figure 7: I Don  I in 

Δi

IDon “ Iin ´ I Doff  I in 

Δ2 i

IDo f f “ Iin ` V D S  V in

2∆i

(20) (20)

(21) (21)

(22)

2

(22) (23) (23)

2∆i

V “ Vin Thus, PON(M) and POFF(M) are calculated as: DS Thus, PON(M) and POFF(M) are calculated as: 1  Δi  PON (M)  Vin ˆ I in   tr˙f sw  2 ∆i  12  PON pMq “ Vin Iin ´ tr f sw 2 2 1  i  POFF (M)  Vin ˆ  Iin  2  t f˙f sw  12  ∆i t f f sw POFFpMq “ Vin Iin ` 2 2

(24) (24)

(25) (25)

3.1.2. Diode Losses 3.1.2. Diode Losses PCD and PSWD are obtained using Equations (7) and (10) as: PCD and PSWD are obtained using Equations (7) and (10) as:

PCD  VD0 (1 D)Iin  RD (1 D)Iin2

2 PCD “ VD0 p1 ´ DqIin ` R D p1 ´ DqIin

PSWD

1

Q V  V  I DCR  f sw 1 2 rr out in in “ Qrr pVout ´ Vin ´ Iin DCRq f sw 2

PSWD 

(26) (26) (27) (27)

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3.1.3. Inductor Losses

PCORE, PDCR and PACR can be calculated as: 3.1.3. Inductor Losses

V  V  I DCR  VF  PCORE , PDCR and PACR can be calculated PCORE  outas: in in RC pVout ´ Vin ´ Iin DCR ´ VF q2 PCORE « PDCR  Iin2 DCR RC 2

(28) (28) (29)

2

2 PDCR “ΔIiin DCR PACR  ACR 12 2 ∆i PACR “ ACR 12

(29) (30) (30)

3.1.4. Capacitor Losses 3.1.4. Capacitor Losses Ploss(Capacitor) is obtained using Equation (17) as: Ploss(Capacitor) is obtained using Equation (17) as:

Δi2 Ploss(Capacitor)  ESR 2 12∆i PlosspCapacitorq “ ESR 12

(31) (31)

3.2. Buck Converter in CCM 3.2. Buck Converter in CCM A typical non‐ideal buck converter is shown in Figure 10. A typical non-ideal buck converter is shown in Figure 10.

Figure 10. Buck converter topology for power loss model. Figure 10. Buck converter topology for power loss model.

3.2.1. MOSFETs Losses 3.2.1. MOSFETs Losses PCM is obtained from Equation (1) and can be estimated [30] as: P is obtained from Equation (1) and can be estimated [30] as: CM

„ 2 Δi 2  2   PCM  RDSon D  I out  2 12 ∆i PCM “ R DSon D Iout ` 

(32) (32) 12 To calculate PSW, IDon and IDoff can be obtained from Figure 7 and VDS as in Equation (23). Thus, To calculate PSW , IDon and I can be obtained from Figure 7 and VDS as in Equation (23). Thus, PON and P OFF are calculated as: Doff PON and POFF are calculated as: Δ∆i i I Don“ IIout (33) IDon ´2 (33) out  2 Δ i∆i  I out IDoI fDoff (34) (34) out` f “ 22 ˆ ˙ 11  Δi∆i  PON pM “V (35) out´ t f tr f sw inin IIout PONq (M) V (35)  22 2 r sw 2   ˆ ˙ 1 ∆i POFFpMq “ 1Vin  Iout `Δi  t f f sw (36) POFF (M) 2 Vin  I out  2 t f f sw (36) 2  2  3.2.2. Diode Losses 3.2.2. Diode Losses PCD and PSWD are obtained by referring Equations (7) and (10) as: PCD and PSWD are obtained by referring Equations (7) and (10) as: 2 PCD “ VD0 p1 ´ DqIout ` R D p1 ´ DqIout

PCD  VD0 (1 D)Iout  RD (1 D)I 2 out

(37)

(37)

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PSWD 

1

PSWD 

1

Energies 2016, 9, 509

3.2.3. Inductor Losses

2

2

Qrr Vout  I out DCR  f sw

9 of 35 (38)

9 of 35

Qrr Vout  I out DCR  f sw

(38)

1 PSWD “ Qrr pVout ` Iout DCRq f sw 2 PCORE, PDCR and PACR can be calculated as: 3.2.3. Inductor Losses 2 3.2.3. Inductor Losses V V  I R  I DCR and PACR can be calculated as: PCORE, PDCR PCORE  in out in DSon out RC PCORE , PDCR and PACR can be calculated as: 2 V  V  I R  I DCR   PCORE  in out in2 DSon out R P  I DCR pV ´ VDCR ´ Iout DCRq2 C DSon out ´ Iout in R PCORE « in RC 2 PDCR  Δ Iout i 2DCR

(38)

(39) (39)

(40) (39) (40) (41) (40)

2 ACR ACR  PPDCR “ Iout 2 DCR

Δ12 i PACR  ∆i2 ACR

3.2.4. Capacitor Losses

(41) (41)

PACR “ 12 ACR 12

3.2.4. Losses 3.2.4. Capacitor Losses PCapacitor loss (Capacitor) is obtained using Equation (17) as: Ploss is obtained using Equation (17) as: Ploss (Capacitor) (Capacitor) is obtained using Equation (17) as:

Ploss (Capacitor ) 

Δi 2

ESR

(42)

2 2 Δ12 i∆i  ESR ESR PP “ lossp(Capacitor Capacitor ) q loss

(42) (42)

1212

3.3. Flyback Converter in DCM 3.3. Flyback Converter in DCM 3.3. Flyback Converter in DCM Flyback converters are widely used in DCM. A non‐ideal flyback converter in DCM is shown in Flyback converters are widely used in DCM. A non-ideal flyback converter in DCM is shown the Figure 11. For the sake of illustration, the MOSFET switching period was considered as T ON + TOFF in the Flyback converters are widely used in DCM. A non‐ideal flyback converter in DCM is shown in Figure 11. For the sake of illustration, the MOSFET switching period was considered as the Figure 11. For the sake of illustration, the MOSFET switching period was considered as T ON + TOFF = 0.8T S as shown in Figure 12. TON + TOFF = 0.8TS as shown in Figure 12. = 0.8TS as shown in Figure 12.

Figure 11. Flyback converter model with its non‐idealities. Figure 11. Flyback converter model with its non-idealities. Figure 11. Flyback converter model with its non‐idealities.

Figure 12. MOSFET switching waveform. Figure 12. MOSFET switching waveform. Figure 12. MOSFET switching waveform.

3.3.1. MOSFET Losses 3.3.1. MOSFET Losses 3.3.1. MOSFET Losses 0.8T V  V  TON  0.8TSS Voutout  VF F  T ON 0.8TS pV VF out ` VF q VF TON “

VF V D S  V in  nV o ut

V in  nV o ut S V VDSV D“ in ` nVout PCM in the flyback converter is described in [30,35] as: PCM in the flyback converter is described in [30,35] as:

(43) (43) (43) (44) (44) (44)

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PCM in the flyback converter is described in [30,35] as:

PCM

2 d ¸ ˜   ˆVout V ˙ 2 V in V   out in 0.26 1 P  R D    “ RCMDSon DSon` L  L ˘ f D 0.26 1V`  F  VF  fswsw pri Lm m` L pri 





(45) (45)

Don is zero but I Doff and P For a flyback converter in DCM, I For a flyback converter in DCM, IDon is zero but IDoff and PSW are determined using [35,36] and SW are determined using [35,36] and Figure 13 as: Figure 13 as: 0.9V D D ˘ IDo f f “ ` 0.9Vinin (46) I Doff 2 Lm ` L pri f sw (46) 2  Lm  Lpri  fsw « ff tf 0.9Vin D PSW “ POFFpMq “ pVin ` nVoutq 0.9`V D  t ˘ (47) f in 2 PSW  POFF (M)  Vin  nVout   2 Lm `L pri (47)  2  Lm  Lpri   2

Figure 13. Inductor switching waveform. Figure 13. Inductor switching waveform.

3.3.2. Diode Losses 3.3.2. Diode Losses P and PSWD of the flyback diode are calculated as: PCD CD and PSWD of the flyback diode are calculated as: 2

PCD

 «0.52nV D  in PCD  VD 0 (1  D) I out  RD (1  D)  0.52nV D “ VD0 p1 ´ DqIout ` R D p1 ´ Dq  Lm`  Lpri  f sw in˘ L `L f m

pri

ff2 sw

1

PSWD  QrrVout f sw

PSWD “

(48) (48)

12 Qrr Vout f sw 2

(49) (49)

3.3.3. Flyback Coupled‐Inductor/Transformer Lossses 3.3.3. Flyback Coupled-Inductor/Transformer Lossses is given in [34,36,20] as: PCORE is given in [20,34,36] as: CORE

where: where:

β PCORE  K fe BAC AC Lm PCORE “ K f e Bβ AC AC Lm

(50) (50)

LLmΔ∆i i β “ Bβ BAC  Nm A AC C N pri pri AC

(51) (51)

Primary PRpri and secondary PRsec resistive power losses are calculated [21] as: and secondary PRsec resistive power losses are calculated [21] as: Primary PRpri ¸2 ˜ 2  0.4V 0.4 V inDD  in ˘  R R PRpri P“Rpri ` LmLm` Lpripri f swfsw pri pri   ˜ 2 ¸2  0.4nV 0.4nVin D  in D ˘  Rsec Rsec PRsec P“R sec ` f  pri  swf sw LmLm` LLpri

3.3.4. Capacitor Losses Form Equation (17), Ploss(Capacitor) is calculate as:

(52) (52)

(53) (53)

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3.3.4. Capacitor Losses Form Equation (17), Ploss(Capacitor) is calculate as: $« &

0.52nVin D ` ˘ PlosspCapacitorq “ % Lm ` L pri f sw

ff2 2 ´ Iout

, . ESR

(54)

-

3.3.5. Snubber Circuit Losses The main components in the snubber branch are Rsn , Csn and Dsn . Rsn and Csn form a clamp unit. Pclamp is represented as [35]: Pclamp “ or: Pclamp

pVclamp q2 p0.9VDSBR ´ Vin q2 “ Rsn Rsn

ˆ ˙ 1 Vin 2 “ f sw L pri ∆i 1 ` 2 0.9VDSBR ´ 2Vin

(55)

(56)

Snubber diode conduction loss PCDsn is obtained from Equation (7) as: 2 PCDsn “ VDsn0 p1 ´ DqnIout ` R Dsn p1 ´ DqnISrms

while PSWDsn is obtained as: PSWDsn “

1 Qrrsn Vin f sw 2

(57)

(58)

Total snubber circuit power loss is the summation of snubber diode power loss and power loss in the clamp unit. Therefore, all power loss equations for the three different converter examples are derived based on datasheet information and converter ratings. Results that validate the derived models are shown in Section 5 where experimental prototypes are used to measure the total loss in the converter. 4. Major Component Cost Models A large database of cost information for multiple elements was compiled from common manufacturers’ and suppliers’ data. The two main sources of this data were Digikey [37] and Mouser Electronics [38], where searches were performed for MOSFETs, diodes, capacitors, and inductors of specific rating ranges. Search filters were applied to achieve such range limits, and the database is compiled and available for public use [39]. Since multiple options exist for different power, voltage, current, and/or device value rating (e.g., inductance and capacitance), the average cost for each component at a certain rating combination was found by considering these multiple options. This database was input to MATLAB to create interpolated graphs and find a mathematical relationship between cost and component ratings. Cost per quantity was also considered. The impact of time on cost is not considered due to availability of present prices only. Some other costs such as costs resulting from auxiliaries, heat sinks, fan/clod plates, etc are also not considered because they are beyond the scope of this work, where the focus is mainly on methodology. 4.1. MOSFETs SiC and GaN type semiconductor cost is still varying rapidly due to continued production improvements, thus to demonstrate the methodology we focus on Si. To create a MOSFET cost model CostM , a large database was prepared using VDS , ID and cost. αi coefficients are as listed in Table 1, but it should be noted that these coefficients vary across a certain range and the values shown are

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selected to achieve the best fit for specific components used in Section 5. Figures 14 and 15 show the mathematical relationship for this database. CostM is represented as: Energies 2016, 9, 509 12 of 35 i“15

ÿ Table 1. Coefficients for the MOSFET cost model equation. βi γi Cost M pVDS , ID q “

Coefficient α0 α1 Table 1. α 2 Coefficient α 3 α0 α4 α1 α5 α2 α6 α3 α4 α7 α5 α8 α6 α9 α7 α8 α10 α9 α11 α10 α α12 11 α12 α13 α13 α14 α14 α α15 15

αi VDS ID

i“0 Range βi Value 0.8091 (−17.52, 19.14) 0 Coefficients for the MOSFET cost model equation. 0.01964 (−0.06058, 0.09985) 1 −0.1375 (−2.465, 2.19) 0 Value Range βi γ −3.497 × 10−5 (−0.0001393, 6.939 × 10−5) 2 i 0.8091 (´17.52, 19.14) 0 0 −0.00323 (−0.0106, 0.004137) 1 0 0.01964 (´0.06058, 0.09985) 1 ´0.1375 (´2.465, 2.19) 0 0.01736 (−0.08388, 0.1186) 0 1 ´5 2 ´3.497 ˆ−810 (´0.0001393, 6.939 ˆ 10´5−6) ) 1.3 × 10 (−1.6 × 10−6 , 1.6 × 10 3 0 ´0.00323 (´0.0106, 0.004137) 1 1 −6 −6 −5 5.022 × 10 (−4.517 × 10 ) 0 2 2 0.01736 (´0.08388,, 1.456 × 10 0.1186) −5 3 1.3 ˆ 10´8 (´1.6 ˆ 10´6−5, , 0.0002804) 1.6 ˆ 10´6 ) 9.087 × 10 (−9.87 × 10 1 0 2 5.022 ˆ 10´6 (´4.517 ˆ 10´6 , 1.456 ˆ 10´5 ) −0.0005698 (−0.002582, 0.001443) 0 1 ´5 ´5 1 2 9.087 ˆ 10 (´9.87 ˆ 10 , 0.0002804) −8 −7, 1.37 × 10−7) −8.033 × 10 (−2.976 × 10 2 3 ´0.0005698 (´0.002582, 0.001443) 0 −6,, 1.032 × 10 ´8.033 ˆ 10−7´8 (´2.976 ˆ 10´7 1.37 ˆ 10´7 ) −6) 2 −9.716 × 10 (−2.976 × 10 1 2 ´7 1 3 ´9.716 ˆ 10 (´2.976 ˆ 10´6−5 , 1.032 ˆ 10´6−5 ) −6 7.185 × 10 ´6 (−1.183 × 10 , 2.62 × 10 ) 0 ´5 ´5 0 4 7.185 ˆ 10 (´1.183 ˆ 10 , 2.62 ˆ 10 ) −10 −9 −9 3.17 × 10 (−1.034 × 10 2 3 3.17 ˆ 10´10 (´1.034 ˆ 10´9 , , 1.668 × 10 1.668 ˆ 10´9 ) ) 2 4 ˆ 10−9´9 (´5.126 ˆ 10´9−9, , 1.313 × 10 1.313 ˆ 10´8 )−8) 1 4 × 10 (−5.126 × 10 1 4 0 5 ´3.103 ˆ 10−8´8 (´1.006 ˆ 10´7−7, 3.851 ˆ 10´8 )−8 −3.103 × 10 (−1.006 × 10 , 3.851 × 10 ) 0

(59) γi 0 0 1 0 1 2 0 1 2 3 2 3 4 3 4 5

M M

Cost CostM ($) ($)

40 20

0 150 I (A) D

100

D

50

0

400 VDS (V)

200

0

600

DS

Figure 14. MOSFET cost model for one unit. Figure 14. MOSFET cost model for one unit.

M M

Cost Cost ($) ($)

20 10

0 150

100 I (A) D D

50

0

400 V (V) DS

200

0

600

DS

Figure 15. MOSFET cost model for 1000 units. Figure 15. MOSFET cost model for 1000 units.

4.2. Diodes 4.2. Diodes

D D

Cost CostD ($) ($)

A VB, I F and cost where Figures 16 and 17 show the A diode diode cost database cost database was was prepared using prepared using V B , IF and cost where Figures 16 and 17 show the interpolated cost surfaces while the mathematical model is shown in Equation (60) and its coefficients interpolated cost surfaces while the mathematical model is shown in Equation (60) and its coefficients are shown in Table 2. are shown in Table 2. 2 1 0 8

6 4 IF (A) F

2

0 0

200

400

600 V (V) B

800

B

Figure 16. Diode cost model for one unit. Figure 16. Diode cost model for one unit.

1000

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13 of 35 13 of 35 13 of 35

Cost ($) Cost ($) Cost D ($) D

1 1 D

0.5 0.5 0 08 8

6 6 I (A) 4 I F(A) 4 F

2 2

F

600 400 600 400 V (V) V B (V) B

200 200

0 0 0 0

1000 1000

800 800

B

Figure 17. Diode cost model for 1000 units. Figure 17. Diode cost model for 1000 units. Figure 17. Diode cost model for 1000 units. j 2 j 2

 

θ

κ

“V2 θ jj Iκ jj CostD((VVB,,II F ))  δδjÿ j B F θ κ j Cost B F jVB I F j δ j VB IF CostD D pV B , IF q “ j 0 j 0

(60) (60) (60)

j “0

Table 2. Coefficients for the diode cost model equation. Table 2. Coefficients for the diode cost model equation. Table 2. Coefficients for the diode cost model equation.

Coefficients

θjj θ θj 0 0 0 1 1 1 0 0 0

Value

Range Range Range 0.22 (0.1, 0.3) 0.22 (0.1, 0.3) 0.22 (0.1, 0.3) 5 −4, 1.2 × 10−4) 7 × 10 (−2.6 × 10−4 5 −4) (−2.6 × 10 7 ˆ7 × 10 105 (´2.6 ˆ 10´4, 1.2 × 10 , 1.2 ˆ 10´4 ) 0.1 (0.08, 0.13) 0.10.1 (0.08, 0.13) (0.08, 0.13)

Coefficients Value Value Coefficients δ0 δ1 δ2

δδ00 δδ11 δδ22

κjj κ κj 0 0 0 0 0 0 1 1 1

4.3. Inductors 4.3. Inductors 4.3. Inductors Inductor cost data is compiled based on L, IL and cost. Figures 18 and 19 show the interpolated Inductor cost data is compiled based on L, I Inductor cost data is compiled based on L, ILL and cost. Figures 18 and 19 show the interpolated and cost. Figures 18 and 19 show the interpolated cost surfaces while the mathematical model is shown in Equation (61) and its coefficients are where cost surfaces while the mathematical model is shown in Equation (61) and its coefficients are where cost surfaces while the mathematical model is shown in Equation (61) and its coefficients are where x = 9.67, μ = 61.64, ϕ = −8.246, v = 4.495, ω = −0.08658. x = 9.67, μ = 61.64, ϕ = −8.246, v = 4.495, ω = −0.08658. x = 9.67, µ = 61.64, φ = ´8.246, v = 4.495, ω = ´0.08658.

L

Cost ($) Cost ($) Cost LL ($)

100 100 50 50 0 0 60 60

40 40 I (A) I L(A) L

20 20

L

0 0 0 0

2000 2000

4000 4000

10000 10000

8000 6000 8000 6000 L (µH) L (µH)

Figure 18. Inductor cost model for one unit. Figure 18. Inductor cost model for one unit. Figure 18. Inductor cost model for one unit.

L

Cost ($) Cost ($) Cost LL ($)

100 100 50 50 0 0 60 60

40 40 I (A) I L(A) L L

20 20

0 0 0 0

2000 2000

4000 4000

8000 6000 8000 6000 L (µH) L (µH)

10000 10000

Figure 19. Inductor cost model for 1000 units. Figure 19. Inductor cost model for 1000 units. Figure 19. Inductor cost model for 1000 units. 2

(ωIIL))2 CostL((LL,,IIL)) χχ μsin( μsin(ππLI LIL)) ee(ω L Cost L L L ´pωIL q2

Cost L pL, IL q “ χ ` µsinpυπLIL q ` φe

(61) (61) (61)

4.4. Capacitors 4.4. Capacitors 4.4. Capacitors A capacitor cost (CostCCC) database for electrolytic capacitors was prepared using C, V ) database for electrolytic capacitors was prepared using C, VCCC and cost and cost A capacitor cost (Cost ) database for electrolytic capacitors was prepared using C, V and cost A capacitor cost (Cost where Figures 20 and 21 show the interpolated cost surfaces while the model is shown in Equation (62) where Figures 20 and 21 show the interpolated cost surfaces while the model is shown in Equation where Figures 20 and 21 show the interpolated cost surfaces while the model is shown in Equation and its coefficients are shown in Table 3. Different material of capacitor will lead to different cost, but (62) and its coefficients are shown in Table 3. Different material of capacitor will lead to different cost, (62) and its coefficients are shown in Table 3. Different material of capacitor will lead to different cost, electrolytic capacitor is chosen as an example to illustrate the methodology: but electrolytic capacitor is chosen as an example to illustrate the methodology: but electrolytic capacitor is chosen as an example to illustrate the methodology: z 8

 

 88 zz“ ξz CostCpC, (C C,,V VCq)) “  ÿ ηηη zC CσσσzzzV VCξξ zz Cost ( V  C Cost V C C C C C zz C z 0

 00 zz“

(62) (62) (62)


14 of 35 14 of 35 14 of 35

Table 3. Coefficients for the capacitor cost model equation. Table 3. Coefficients for the capacitor cost model equation. Table 3. Coefficients for the capacitor cost model equation. Ranges Coefficients Value σ Ranges Coefficients Value σzz ηη00 −0.5651 (−4.043, 2.913) 0 Coefficients Value Ranges σ −0.5651 (−4.043, 2.913) 0 z 7.98 × 10 (−0.017, 0.019) 1 η11 7.98 × 10−4−4 (−0.017, 0.019) 1 η0 η ´0.5651 (´4.043, 2.913) 0 (−0.022, 0.082) 0 η1 η (´0.017, 0.019) 1 7.98 ˆ 0.03 10´4 0.03 (−0.022, 0.082) 0 η22 −7 −5 η2 η 0.03 (´0.022, 0.082) −53 0 −7 −5, 1.74× 10 −53)) 5.35 × 10 (−1.6× 10 2 5.35 × 10 (−1.6× 10 , 1.74× 10 2 η33 ´5 , 1.74 ˆ 10´53 ) η3 η4 2 5.353.2 × 10 ˆ 10´7 −5 (´1.6 ˆ 10 −5 (−5× 10 1 3.2 × 10−5 η4 (−5× 10−5, 0.0001139) , 0.0001139) 1 η4 1 3.2 ˆ 10´5 −4 (´5 ˆ 10´5 , 0.0001139) −4 −5 −4 −4, 5.9 × 10 −5) −1.72 × 10 (−4 × 10 0 ηη55 −1.72 × 10 (−4 × 10 , 5.9 × 10 ) 0 ´4 ´4 ´5 η5 0 ´1.72 ˆ 10 (´4 ˆ 10 , 5.9 ˆ 10 ) −8 −7 −8 −8) −4.81 × 10 (−1.1 × 10 2 η66 −4.81 × 10 (−1.1 × 10 , 1 × 10 ) 2 η6 η 2 ´4.81 ˆ 10´8 −8 (´1.1 ˆ 10´7−7,, 1 × 10 1 ˆ 10´8 ) −7 −7 −8 −7) (4.2 × 10 1 η7 η 1 1.6 1.6 × 10 ˆ 10´7 −7 (4.2 ˆ 10´8−8 , , 2.8 × 10 2.8 ˆ 10´7 )) 1.6 × 10 (4.2 × 10 , 2.8 × 10 1 η77 −8 η8 η 0 −7 −8,, 5.6 × 10 −8) 2.5 2.5 × 10 ˆ 10´7 −7 (´5.5 ˆ 10´8−8 5.6 ˆ 10´8 ) (−5.5 × 10 0 2.5 × 10 (−5.5 × 10 , 5.6 × 10 ) 0 η88

ξξzz 0 0 ξz 0 0 0 1 1 0 0 0 1 0 1 1 1 2 2 2 1 1 1 2 2 2 3 3 3

20 20

C

Cost ($) ($) Cost C

40 40

00 600 600

400 400

200 200

VVC(V) (V) C

00 00

200 200

400 400

1000 1000

800 800 600 600 C (µF) C (µF)

Figure 20. Capacitor cost model for one unit. Figure 20. Capacitor cost model for one unit. Figure 20. Capacitor cost model for one unit.

Cost ($) ($) Cost C

40 40 C

20 20

00 600 600

400 400 VVC (V) (V) C

200 200

00 00

200 200

400 400

600 600

800 800 CC (µF) (µF)

1000 1000

Figure 21. Capacitor cost model for 1000 units. Figure 21. Capacitor cost model for 1000 units. Figure 21. Capacitor cost model for 1000 units.

4.5. Flyback Coupled‐Inductor Core 4.5. Flyback Coupled‐Inductor Core 4.5. Flyback Coupled-Inductor Core Typical core materials include silicon steel, iron powder and ferrites. A ferrite material core is Typical core materials include silicon steel, iron powder and ferrites. A ferrite material core is Typical core materials include silicon steel, iron powder and ferrites. A ferrite material core used in the selected transformer to demonstrate the methodology. Two types of cores, gapped and used in the selected transformer to demonstrate the methodology. Two types of cores, gapped and is used in the selected transformer to demonstrate the methodology. Two types of cores, gapped ungapped, are considered in the proposed cost model with a frequency range between 50 KHz and ungapped, are considered in the proposed cost model with a frequency range between 50 KHz and and ungapped, are considered in the proposed cost model with a frequency range between 50 KHz 500 High frequency cores which are used for 500 KHz. KHz. High frequency cores which are used for radio or telecommunications application are and 500 KHz. High frequency cores which are used forradio radioor ortelecommunications telecommunicationsapplication application are are excluded. The cost core cost model was prepared using f LL and cost. Figures 22 and 23 show the excluded. The cost core cost model was prepared using f swf, A , A and cost. Figures 22 and 23 show the excluded. The cost core cost model was prepared usingsw , A and cost. Figures 22 and 23 show sw L interpolated Cost CO while the mathematical model is shown interpolated CostCost CO surfaces surfaces while the the mathematical model is is shown in inEquation Equation (63) and its the interpolated while mathematical model shownin Equation(63) (63) and and its its CO surfaces coefficients are shown in Table 4. coefficients are shown in Table 4. coefficients are shown in Table 4.

Co

Cost ($) ($) Cost Co

10 10

55

00 600 600

400 400 200 200 ff (KHz) sw (KHz) sw

00 00

10000 10000 5000 5000 AAL (nH) (nH) L

15000 15000

Figure 22. Flyback core cost model for one unit. Figure 22. Flyback core cost model for one unit. Figure 22. Flyback core cost model for one unit.


15 of 35 15 of 35

Cost

Co

($)

10

5

0 600 400 f

sw

(KHz)

200 0

5000

0

10000 A (nH)

15000

L

Figure 23. Flyback core cost model for 1000 units. Figure 23. Flyback core cost model for 1000 units. m mÿ 4“4

ψ m mρm m Cost pA , f ) q“ τ mτA Cost (A mLA Lf swf sw CoCo L ,L f swsw

ψ

ρ

(63) (63)

m0“0 m

Table 4. Coefficients for the core cost model equation. Table 4. Coefficients for the core cost model equation. Coefficients Coefficients τ0 τ10 ττ21 ττ32 τ 3 τ4 τ4

Value Value 1.204 1.204 1.625 1.625 0.1432 0.1432 −0.007604 ´0.007604 −0.1744 ´0.1744

Ranges ψm Ranges ψm0 (0.6736, 1.735) (0.6736, 1.735) 0 1 (1.31, 1.939) (1.31, 1.939) 1 0 (−0.6245, 0.9078) (´0.6245, 0.9078) 0 1 (−0.467, 0.4518) (´0.467, 0.4518) 1 0 (−0.6827, 0.344) (´0.6827, 0.344) 0

ρm ρm0 0 0 0 1 1 1 1 2 2

Cost models presented here were evaluated based on two criteria. The first criterion is that an Cost models herethe were evaluated based on two criteria. The firstexponential, criterion is that analytical form is presented available for cost model, i.e., polynomial, trigonometric, etc. an in analytical form is available for the cost model, i.e., polynomial, trigonometric, exponential, etc. in order to integrate this model with other mathematical and optimization tools. The second criterion is order to integrate this model with other mathematical and optimization tools. The second criterion 2 value for each model, which is a measure between 0 and 1 of how well does the model that the R 2 value for each model, which is a measure between 0 and 1 of how well does the model is that the R match discrete data points, is acceptable. An R2 value that is closer to 1 is desired. The second criterion match discrete data points, is acceptable. An R2 value that is closer to 1 is desired. The second is essential when dealing with cost modeling of power electronic devices since their ratings are not criterion isas essential whenoptions; dealingfor with cost modeling of power electronic theirbut ratings available continuous example, MOSFET ratings of 50 V devices and 100 since V exist, not are not available as continuous options; for example, MOSFET ratings of 50 V and 100 V exist, but not necessarily at 63.5 V, and the surface fit provided applies to the continuous range. All R2 values of 2 necessarily at 63.5 V, and the surface fit provided applies to the continuous range. All R values of the the proposed models are shown in Table 5, and are all acceptable except for MOSFETs whose cost proposed are shown in Table 5, and are all acceptable except for MOSFETs whose cost model’s 2 value is low. To mitigate this case, a locally weighted scatterplot smoothing (LOWESS) model’s Rmodels 2 R value is low. To mitigate this case, locally weighted scatterplot smoothing (LOWESS) model was 2 = 0.9436 for Cost M but does not have an explicitly model model was established to achieve an a R 2 = 0.9436 for Cost but does not have an explicitly model equation like the established to achieve an R M equation like the polynomial one. Also, note that that exact cost estimates of specific components can polynomial one. Also, note that that exact cost estimates of specific components can be obtained if be obtained if coefficients are changed within the specified ranges shown in Tables 1–4. coefficients are changed within the specified ranges shown in Tables 1–4. Table 5. Surface fitting evaluation of cost models. Table 5. Surface fitting evaluation of cost models. Cost Model R2 Value (0 to 1) 2 CostM (Polynomial, presented here) 0.6717 Cost Model R Value (0 to 1) CostM (LOWESS, no analytical expression) 0.9436 CostM (Polynomial, presented here) 0.6717 CostD 0.8899 CostM (LOWESS, no analytical expression) 0.9436 C 0.8274 Cost CostD 0.8899 L 0.7014 Cost CostC 0.8274 CostCost CO 0.9365 0.7014 L CostCO 0.9365

5. Results 5. Results Basic boost, buck and flyback converters were experimentally developed to test the power loss and cost models presented here. Bus bar losses are not considered since the experimental prototype Basic boost, buck and flyback converters were experimentally developed to test the power loss is at a power level that does not require bus bar. More bus bar losses information can be found in and cost models presented here. Bus bar losses are not considered since the experimental prototype is [40]. All parasitic elements and specific test condition examples are given in Table 6. Figure 24 shows at a power level that does not require bus bar. More bus bar losses information can be found in [40]. the board housing both the boost and buck converters (flyback converter not shown). All parasitic elements and specific test condition examples are given in Table 6. Figure 24 shows the board housing both the boost and buck converters (flyback converter not shown).

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Energies 2016, 9, 509

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Figure 24. Experimental setup for the buck and boost converters. Figure 24. Experimental setup for the buck and boost converters. Table 6. Example testing conditions and parasitic elements in experimental prototypes. Table 6. Example testing conditions and parasitic elements in experimental prototypes. Parameter Boost Buck Flyback Parameter Boost Buck Flyback Vin 19.3 V 60 V 12.1 V Iin Vin 3.18 A 1.04 A 0.434 A 19.3 V 60 V 12.1 V 3.18 A 1.04 A 0.434 A 75.2 V 24.1 V 25.7 V Vout Iin Vout 75.2 V 24.1 V 25.7 V Iout 0.794 A 2.39 A 0.151 A Iout 0.794 A 2.39 A 0.151 A Δi ∆i 1.1 A 2.95 A 0.89 A 1.1 A 2.95 A 0.89 A 50 KHz 50 KHz 100 KHz fsw fsw 50 KHz 50 KHz 100 KHz 0.75 0.4 0.7 D D 0.75 0.4 0.7 ESR 0.603 Ω 0.603 Ω 0.603 Ω ESR 0.603 Ω 0.603 Ω 0.603 Ω VD0 1V 1V 1V 1 V 1 V 1 V VD0 R 7 mΩ 7 mΩ 7 mΩ D R D 7 mΩ 7 mΩ 7 mΩ DCR/Rpri 0.06 Ω 34 mΩ 0.09 pri sec 0.06 Ω 34 mΩ 0.09 DCR/R ACR/R 0 1.5 Ω 0.58 Qsec 195 195 nC 1950.58 nC rr ACR/R 0 nC 1.5 Ω 64 nC 13 nC 13 nC gs 195 nC 195 nC 195 nC QrrQ RDSon 0.029 Ω 0.18 Ω 0.18 Ω 64 nC 13 nC Qgs t 100 nsec 51 nsec 5113 nC nsec r RDSont f 0.029 Ω 0.18 Ω 63 nsec 36 nsec 360.18 Ω nsec 3325 Ω 100 nsec 51 nsec 51 nsec tr «Rc 59.4 µH, 3.5 µH 63 nsec 36 nsec 36 nsec tLf m , Lpri 3400 mT 42.42 mT ≈Rc B 3325 Ω ‐ 3 ‐ Ve /AC 0.24 cm 0.97 cm3 ‐ ‐ 59.4 μH, 3.5 μH Lm, Lpri B ‐ 3400 mT 42.42 mT 3 datasheets 3 Ve/AC in Table 6 ‐ 0.24 cm 0.97 cm Parasitic elements shown are extracted from of the components used in the

experimental setup and which are IRFP4332PBF MOSFET, AIRD-03-101K inductor, MURF860G diode, Parasitic elements shown in Table 6 are extracted from datasheets of the components used in the and EEU-EB2D221 capacitor in the boost converter and IRFP240 MOSFET, AIRD-03-101K inductor, experimental setup and which are IRFP4332PBF MOSFET, AIRD‐03‐101K inductor, MURF860G MURF860G diode, and EEU-EB2D221 capacitor in buck converters, and IRFP240 MOSFET, Q4338-BL diode, and EEU‐EB2D221 capacitor in the boost converter and are IRFP240 MOSFET, AIRD‐03‐101K flyback transformer, EGP10G Diode, and EEU-EB2D221 capacitor used in the flyback converter. inductor, MURF860G diode, and EEU‐EB2D221 capacitor in buck converters, and IRFP240 MOSFET, 5.1. Power Loss Modeltransformer, Verification EGP10G Diode, and EEU‐EB2D221 capacitor are used in the Q4338‐BL flyback flyback converter. To validate the power loss models derived in Section 3, each of the three converters was tested under the conditions shown in Table 6, along with various output voltages and currents varied with 5.1. Power Loss Model Verification the duty ratio. Power losses were measured by deducting the output power of the converter from its input power. Gate drive losses can be measured, but were not considered since the gate drive To validate the power loss models derived in Section 3, each of the three converters was tested power supply was separate in the experimental setup and the gate drive losses do not contribute to the under the conditions shown in Table 6, along with various output voltages and currents varied with experimental system-level verification. Voltage divider and current sensor in the prototype consume the duty ratio. Power losses were measured by deducting the output power of the converter from its much less power than main power losses, thus they are not taken into consideration. Figures 25–27 input power. Gate drive losses can be measured, but were not considered since the gate drive power show experimental results of each convertersetup at the and specified test conditions in Table 6. contribute Input and output supply was separate in the experimental the gate drive losses do not to the voltage and current were measured to obtain totally converter loss to verify converter scope-level experimental system‐level verification. Voltage divider and current sensor in the prototype consume power loss. All measurements are under zero offset condition and using calibrated probes to ensure much less power than main power losses, thus they are not taken into consideration. Figures 25–27 measurement accuracy. show experimental results of each converter at the specified test conditions in Table 6. Input and Tables 7–9 show power loss estimates of each converter under different duty ratios. It is clear output voltage and current were measured to obtain totally converter loss to verify converter scope‐ from Tables 5–7 that the error in estimating power losses using the derived models is less than 8% level power loss. All measurements are under zero offset condition and using calibrated probes to ensure measurement accuracy.


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Energies 2016, 9, 509 17 of 35 Tables 7–9 show power loss estimates of each converter under different duty ratios. It is clear

Tables 7–9 show power loss estimates of each converter under different duty ratios. It is clear Tables 7–9 show power loss estimates of each converter under different duty ratios. It is clear from Tables 5–7 that the error in estimating power losses using the derived models is less than 8% from Tables 5–7 that the error in estimating power losses using the derived models is less than 8% from Tables 5–7 that the error in estimating power losses using the derived models is less than 8% leading to more than 92% accuracy. More accurate measurements and models would still be of very leading to more than 92% accuracy. More accurate measurements and models would still be of very leading to more than 92% accuracy. More accurate measurements and models would still be of very leading to more than 92% accuracy. More accurate measurements and models would still be of very high value for rapid prototyping, but the achieved model‐based estimation error is very satisfactory high value for rapid prototyping, but the achieved model‐based estimation error is very satisfactory high value for rapid prototyping, but the achieved model‐based estimation error is very satisfactory high value for rapid prototyping, but the achieved model-based estimation error is very satisfactory for evaluating various design options. Among the sources of estimation error are approximations, for evaluating various design options. Among the sources of estimation error are approximations, for evaluating various design options. Among the sources of estimation error are approximations, for evaluating various design options. Among the sources of estimation error are approximations, e.g., e.g., R C (when not in a datasheet), and limited measurement accuracy. e.g., R (when not in a datasheet), and limited measurement accuracy. e.g., R CC (when not in a datasheet), and limited measurement accuracy. R (when not in a datasheet), and limited measurement accuracy. C

Figure 25. Boost converter experimental results for D = 75%. Figure 25. Boost converter experimental results for D = 75%. Figure 25. Boost converter experimental results for D = 75%. Figure 25. Boost converter experimental results for D = 75%.

Figure 26. Buck converter experimental results for D = 40%. Figure 26. Buck converter experimental results for D = 40%. Figure 26. Buck converter experimental results for D = 40%. Figure 26. Buck converter experimental results for D = 40%.

Figure 27. Flyback converter experimental results for D = 50%. Figure 27. Flyback converter experimental results for D = 50%. Figure 27. Flyback converter experimental results for D = 50%. Figure 27. Flyback converter experimental results for D = 50%. Table 7. Estimated and measured power loss in boost converter. Table 7. Estimated and measured power loss in boost converter. Table 7. Estimated and measured power loss in boost converter. Table 7. Estimated and measured power loss in boost converter. (W) PPEstimated (W) Duty Ratio PPMeasured Measured (W) Estimated (W) (W) Duty Ratio Measured (W) Estimated Duty Ratio Duty Ratio P PMeasured (W) P P Estimated (W) 30% 0.6 0.56 30% 0.6 0.56 30% 0.6 0.56 30% 0.6 0.56 40% 0.78 0.72 40% 0.78 0.72 40% 0.78 0.72 40% 0.78 0.72 50% 0.97 0.92 50% 0.97 0.92 50% 0.97 0.92 50% 0.97 0.92 60% 1.36 1.37 60% 1.36 1.37 60% 1.36 1.37 60% 1.36 1.37

Error % −6.6% −6.6% −6.6% ´6.6% −7.69% −7.69% −7.69% ´7.69% −5.15% ´5.15% −5.15% −5.15% 0.74% 0.74% 0.74% 0.74%

Error%% % Error Error

Table 8. Estimated and measured power loss in buck converter. Table 8. Estimated and measured power loss in buck converter. Table 8. Estimated and measured power loss in buck converter. Table 8. Estimated and measured power loss in buck converter. Duty Ratio PPMeasured (W) PPEstimated (W) Duty Ratio Measured (W) (W) Estimated (W) (W) Duty Ratio Measured Estimated Duty Ratio P PMeasured (W) P P Estimated (W) 20% 2.54 2.49 20% 2.54 2.49 20% 2.54 2.49 20% 2.54 2.49 30% 3.76 3.78 30% 3.76 3.78 30% 3.76 3.78 30% 3.76 3.78 40% 4.8 5.04 40% 4.8 5.04 40% 4.8 5.04 40% 4.8 5.04 50% 7.05 6.55 50% 7.05 6.55 50% 7.05 6.55 50% 7.05 6.55

Error % −1.96% −1.96% −1.96% ´1.96% 0.53% 0.53% 0.53% 0.53% 5% 5% 5% 5% −7.09% ´7.09% −7.09% −7.09%

Error % Error Error %%

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Table 9. Estimated and measured power loss in flyback converter. Duty Ratio

PMeasured (W)

PEstimated (W)

Error %

20% 30% 40% 50%

0.32 0.55 0.85 1.32

0.31 0.56 0.82 1.27

´3.13% 1.81% ´4.7% ´3.78%

5.2. Cost Model Verification In order to validate the cost models proposed in Section 3, prices of the parts used were compared to prices generated from the mathematical models for the MOSFET, diode, inductor, and capacitor utilized. The flyback coupled inductor model was split into wire and cores due to their abundant information, thus similar core and wire to the Q4338-BL model are used for cost validation. Cost figures of these components were generated based on Equations (59)–(63), and results are compared to estimated prices in Table 10. Table 10. Detailed cost comparison for power components. Component

Actual Cost

Estimated Cost

Error %

MOSFET (IRFP4332PBF) Inductor (AIRD-03-101K) Diode (MURF860G) Capacitor (EEU-EB2D221) Core (B66421G0000X187) Wire (Belden 22AWG)

$4.33 $5.97 $0.99 $0.723 $0.69 $49.03

$4.37 $5.95 $1.03 $0.752 $0.724 $48.03

´0.92% 0.33% ´4.04% ´4.01% ´4.93% 2.039%

Results in Table 10 are shown to have less than 5% error and thus the cost models established prove that the results are more than 95% accurate. The accuracy of the cost model was improved with the help of interpolated graphs and surface fitting tools. Since cost of components changes with technology and manufacturing trends, the methodology presented here can be applied for future technologies or with a refined, more comprehensive database. 6. Optimization of Converter Designs for a Specific Figure of Merit 6.1. Optimal Design Selection Approach The main objective of establishing power loss models in Sections 3 and 4 is to achieve the capability of selecting the “right components” in a converter. Such components can be selected based on a figure of merit, or an optimization objective function. These figures of merit include two main factors which are (1) minimum power loss; and (2) minimum cost. While co-optimizing for both can establish a Pareto front for acceptable local minima of cost and power loss, the next sections optimize for either power loss or cost, independently. Co-optimization is left for future work and is a natural next step of this paper. In order to find component combinations that can optimize a figure of merit, a direct search optimization is performed with priority given to the component with most influence on the figure of merit being optimized. In both power loss and cost optimizations, inductors are given priority—(1) In power loss optimization, the impact of inductors on ripple and other components’ power losses is very significant; (2) in cost optimization, inductors tend to be the most expensive components. Figure 28 demonstrates the overall high-level direct search optimization performed. Sections 6.2 and 6.3 present approaches for two different figures of merit being power loss and cost, respectively.


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Figure 28. High‐level block diagram of proposed figure of merit optimization. Figure 28. High-level block diagram of proposed figure of merit optimization.

6.2. Minimum Power Loss Designs 6.2. Minimum Power Loss Designs Power loss models models developed here are combined with converter to automatically Power loss developed here are combined with converter ratings ratings to automatically produce produce system‐level minimum power loss and select the right components. This procedure reduces system-level minimum power loss and select the right components. This procedure reduces the manual the manual effort in calculating component power losses to select a combination of components that effort in calculating component power losses to select a combination of components that minimizes minimizes power losses. Components in affects the order that of affects of other power losses. Components are selected inare theselected order that selection other selection components—For components—For example, selecting the inductor in a boost converter comes as a priority as it affects example, selecting the inductor in a boost converter comes as a priority as it affects the losses in the losses in semiconductors and capacitor as the inductor determines the input current ripple. In semiconductors and capacitor as the inductor determines the input current ripple. In order to search order to search for components with compatible voltage and current ratings which are set by the for components with compatible voltage and current ratings which are set by the designer, minimum designer, minimum inductance and capacitance values in addition to MOSFET and diode ratings for inductance and capacitance values in addition to MOSFET and diode ratings for boost and buck boost and buck converters in CCM are calculated based on [41,42], while component ratings are converters in CCM are calculated based on [41,42], while component ratings are double the converter double the converter ratings even though this factor can be modified. The resulting minimum power ratings even though this factor can be modified. The resulting minimum power loss does not guarantee loss does not guarantee low cost but selects components leading to a minimum converter power loss low cost but selects components leading to a minimum converter power loss from the available from the available database. A pseudo‐code is shown below as an example for inductor selection for database. A pseudo-code is shown below as an example for inductor selection for minimum inductor minimum inductor power loss and similar logic is applied to other components. Figure 29 shows a power loss and similar logic is applied to other components. Figure 29 shows a flowchart for the flowchart for the minimum power loss rapid prototyping tool. minimum power loss rapid prototyping tool. Start Start Get input and output parameters; Get input and output parameters; IL = Iin; IL = Iin ; L = ((Vin × D × (1 − D))/(2 × fsw × Iout)); L = ((Vin ˆ D ˆ (1 ´ D))/(2 ˆ fsw ˆ Iout )); = 2 × L; Lmax Lmax = 2 ˆ L; Read inductor.xls file and get the entire database; Read inductor.xls file and get the entire database; for i = 1 to all database for i = 1 to all database if L inductor values in database if Iif L

Implementation of Rapid Prototyping Tools for Power Loss and ... - MDPI

Implementation of Rapid Prototyping Tools for Power Loss and ... - MDPI

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