Improving Efficiency of IC Burn-In Testing

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... and reliability of the produced semiconductors before shipping them to final users. ... This paper looks at improving efficiency of practical burn-in testing process in the IC fabrication setting. ... ensuring required quality and reliability of manufactured ... In addition to that, there are procedures that have to be carried out.
Improving Efficiency of IC Burn-In Testing Yong Han Ng1, Yew Hock Low1 and Serge Demidenko2,3 Freescale Semiconductor, No. 2, Jalan SS 8/2, 47300, Selangor, Malaysia 2 Institute of Information Sciences and Technology, Massey University, Wellington, New Zealand 3 School of Engineering, Monash University Sunway Campus, Malaysia, [email protected], [email protected], [email protected] 1

Abstract Burn-in (i.e., electronic test performed under elevated temperature and other stress conditions) plays an important role in integrated circuits (ICs) manufacturing process to ensure required high quality and reliability of the produced semiconductors before shipping them to final users. Burn-in aims at accelerating detection and screening out of so-called ‘infant mortalities’ (early-life latent failures). It is normally associated with lengthy test time and high cost, often making it a bottleneck of the entire IC manufacturing process. It is no surprise therefore, that much attention and efforts have been dedicated towards possible ways of improving efficiency of the entire burn-in process. This paper looks at improving efficiency of practical burn-in testing process in the IC fabrication setting. The paper presents development of applied algorithms and relevant embedded software the burn-in and binning processes automation. In addition to the improved burn-in test efficiency, the developed tools lead also to yield improvement by providing more comprehensive test results data logging and analysis.

Keywords: burn-in, electronic testing, binning, data logging. 1

Introduction

Testing plays an important role in controlling and ensuring required quality and reliability of manufactured integrated circuits (ICs) also known as chips before shipping them to final users. Several types of testing are performed at different stages of the IC fabrication process: such as Pre-Burn-in, Burnin and Final Test [1]. The pre-burn-in test provides limited electrical parametric and/or functionality check to ensure that ICs are not damaged during assembly before sending them to a long and expensive burn-in test. The burn-in test subjects chips to elevated temperature. It may be combined also with functional test application. The ICs are placed onto special Burnin Load Boards (BILB) while the test is executed inside special Burn-in Chambers (BIC). There are four main types of burn-in tests employed in the industry. They are: Static, Dynamic, Monitored and so-called Test-In Burn-In (TIBI). An overview of these tests is presented in Table 1 [2]. During the static burn-in (also known as a traditional burn-in) devices under test (DUTs) are subjected to elevated temperature for a period that can range from just few hours to tenths of hours. The dynamic burn-in is similar to the static one. However it also includes exercising DUTs by applying test vectors or stimuli sets to toggle internal nodes of the devices. Neither static nor dynamic burnin types provide any monitoring of DUT responses. Consequently faulty ICs are not detected until a subsequent final test stage.

The monitored burn-in is aimed at identifying passing and failing devices during the burn-in process itself while the TIBI is a process that combines some DUT functionality testing with burn-in. Input test patterns are applied to DUTs and output responses are then observed and compared with reference values corresponding to fault-free operation. TIBI is more costly compared to the other types of burn-in. Table 1. Types of Burn-In Test Type

Description Static

Dynamic

Monitored

Test-In Burn-In (TIBI)

Device under test (DUT) is stressed at elevated constant temperature for an extended period of time. IC is supplied with Vcc. No input signals are applied. Functionality and parameters of ICs are then evaluated during the Final test Similar to Static burn-in. However here test vectors are applied to IC inputs toggle internal nodes of the device Similar to Dynamic burn-in. However in this case in addition to applying input stimulus, the IC output is monitored (limited point) to determine if the chip is functioning. This allows identifying failed units and separating them from good devices. IC functionality and parameters are comprehensively evaluated at a later stage during the Final test TIBI is a combination of functional and burn-in testing. Functional input patterns are applied to IC inputs and output responses are fully evaluated.

The burn-in test conditions should trigger DUT failures due to defective components without damaging good components of the circuit [2]. A proper burn-in process should stabilize device characteristics, provoke early failures of weak devices and screen out those with excessive parametric drift. After ICs passed burn-in, the devices go through the Final Test process that normally includes DC Parametric Test (to verify steady-state electrical parameters of IC such as input and output currents and voltages, power consumption, etc.), AC Parametric Test (to verify time-related parameters of such as delay, set-up, hold, rise, etc., times as well as to check that IC operates over its full frequency range), Functional Test (to verify that IC performs its functions as the design intended) and/or defect oriented Structural Test (to prove that the circuit was manufactured defect free). The tests are performed at room, hot and cold temperatures using special Automatic Test Equipment (ATE) - testers and handlers.

The burn-in process flow may vary from one manufacturer to another. At the same time since the main objective of this test is identical (i.e., ensuring reliability of ICs by weeding out defective parts before they are released to the customers) the burn-in process flows used by different manufacturers have a lot of commonality. The simplified typical burn-in flow is presented in Figure 1 while the description of each of the process steps is given below in Table 2. Table 2. Burn-In Test Process Steps Process Step Arrival, checking, scheduling

Boards loading Bench Q-check

After completion of testing ICs are sorted (binned) into various grades according to their test results.

2

Burn-In Process

While burn-in can provide some guarantee of the reliability and quality of a product, it is a timeconsuming and highly expensive process. Devices may require very long burn-in test duration (up to 24 48 hours, or even more) [1, 3-5]. In addition to that, there are procedures that have to be carried out between actual burn-in sessions. For example, test floor operators must ensure that all the test boards (load boards) are properly connected to the sockets in the test chamber before starting the process. Upon completion of the burn-in testing, the test chambers must be cooled down before any of the load boards can be removed. As a result, burn-in testing may take up to 80% of the total time of product testing thus reducing the production throughput.

Burn-in chamber loading and chamber Q-check

Burn-in test

Lot arrival, checking, scheduling Boards loading Bench Q-check Burn-in chamber loading and chamber Q-check

Burn-in chambers and boards offloading

Burn-in test Burn-in chambers and boards offloading

Quality control

Quality control Packing, labelling, shipping out

Figure 1: Burn-in process flow

Packing, labelling, shipping out

Description ICs are delivered to burn-in site. The lot is verified and ICs undergo visual inspection. Burn-in is scheduled depending on the number and availability of the burn-in load boards (BILB), test drivers and chambers (ovens). Scheduling may involve dividing a received lot into smaller lots. ICs are placed onto BILBs and delivered to the oven room staging area. This is to verify that all the devices are idle and connected to the sockets, as well as that all of the sockets are communicating with the drivers. If communication failures are discovered a troubleshooting procedure is performed. If the problem can not be fixed promptly (i.e., the device still does not respond to the driver), the particular socket is marked as faulty. This process is normally done before BILBs are loaded into a burn-in oven BILBs are loaded into the oven and the Qcheck is again performed. It is similar to the previous one, except that this time it is performed involving the burn-in station. The check ensures that all DUTs are present on the BILBs and they correctly communicate with the test drivers. Troubleshooting is done in case of any Qcheck failure. DUTs are subjected to high temperature during a specified test time. In addition ICs can also be just exercised (if Dynamic burn-in is performed), exercised while their operation is monitored (when Monitored burn-in is implemented) or tested (if TIBI is done). This step may also include binning and data collection (in particular in monitored burn-in and TIBI) Once burn-in is completed and after the oven has been cooled down, BILBs are removed from the oven. DUTs are removed from the boards and sorted into appropriate groupings according to the burn-in test results. This process involves the lot quantity count and visual inspection of the devices. There could also be done a check for IC lead damage. Packing lists are prepared for the lot. The DUTs are packed in accordance to their binning grades; the packages are labelled and shipped to next stage of IC fabrication.

The temperature and duration of the burn-in test step as well as input signals (if any) applied to DUT depend on the type of IC and its application area. For example, signals applied to microcontroller devices (the main type of ICs discussed in this paper) could include: Write/Erase Cycling – writing and erasing embedded Electrical Erasable Program Only Memory (EEPROM) and/or Flash EEPROM, Module Exercising – looping signals to exercise peripherals modules in DUT, etc. Combined with the elevated temperature they aimed at wearing out weak parts of DUTs. In some cases TIBI can be implemented where functionality characteristics (or even some electrical parameters) of ICs are verified while they are undergoing burn-in. Obviously TIBI can not completely substitute the final test where advanced high-throughput ATE systems are employed to provide fast and accurate processing of multiple devices in parallel. The stress signals for microcontroller ICs undergoing burn-in (TIBI or monitored) can be programmed into RAM of the devices under test themselves and then be controlled from the devices. At the end of the testing, the DUT would store the pass or fail result for each test in an internal Electrically Erasable Programmable Read-Only Memory (EEPROM) of a flash type (that is normally present in modern microcontrollers) of the DUT. EEPROM is a nonvolatile memory and thus it can retain the pass/fail data even after the device is powered down. Optionally a data collection procedure can be carried out after completion of burn-in and binning. Information obtained from the data collection (e.g., pass/fail codes for burn-in, results of EEPROM write/erase cycling and module exercising, etc.) can be used for various engineering and management analyses related to yield improvement.

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Burn-in Equipment and Tools

Burn-in systems can be of two main types: • Computer-controlled • Stand alone The architecture of the typical computer-controlled burn-in system is presented in Figure 2. The system includes a host computer (normally it can be PC running specialised software under Windows operating system), universal drivers controlled by PC via a chosen communication interface (e.g., RS232/RS485, USB/RS485, etc. [6]) and burn-in load boards connected to drivers using edge connectors. Normally the drivers are microcontroller-based electronic systems supplying power, data (digital and analog) and clock signals to DUTs as well as collecting response signals from them. Devices to be tested are placed onto the multiple sockets available on BILBs (typical BILB is shown in Figure 3 [7]).

Burn-In Load Board Driver

...

Host Computer

Edge connector

...

Burn-In Load Board Driver

RS232/RS485 Interface

Edge connector

Burn-In Oven

Figure 2: Computer-controlled burn-in system In a stand-alone burn-in system the drivers operate without any connection to the host PC. The burn-in test program is loaded into EEPROM of the driver’s Microcontroller Unit (MCU). From there test signals and data are sent to DUTs through the load boards while the test responses are collected and stored in the internal memory of the drivers as well as in the programmable memory of DUTs themselves (in monitored burn-in and TIBI). Due to the limitations on data analysis process in standalone mode, most of the current burn-in systems use computer-controlled configuration. Thus the computer-controlled burn-in is discussed in this paper.

Figure 3: Burn-in load board A computer-controlled burn-in system located in some particular manufacturing site of a large IC manufacturing company operates as a part of the worldwide network of computerized burn-in and programming systems. Such an arrangement called Integrated Burn-in Environment (IBE) allows implementation of massively parallel burn-in test process [8]. The environment ensures fault tolerance, data integrity and security in a synergistic fashion across all sites. Figure 4 illustrates the general concept of the IBE site topology. Each of the burn-in sites is equipped with burn-in hardware components (ovens, drivers and host PCs used as controllers). Each site also has a local server acting as the central repository for all applications and files used locally. Moreover, it provides an interface between the site and the global (world) server in the company headquarters (HQ). The world server is linked to all the sites and supplies them with the required for operation information (e.g.,

global code releases, global updates, global history, etc.). At the same time all the sites are feed-back linked to the world server. All the site data are replicated to the world server thus allowing for global visibility (data for all sites are accumulated and monitored in one location) and data redundancy (the files are stored in two places – world and local servers) [9]. SITE 1

HQ

SITE 2

SITE N

Figure 4: IBE architecture All the controllers of the local sites have the same standard configuration and share the same software. The controllers are equipped with the software and configurations required to run operation of their sites locally (independent of the network) while the world server provides required updates on a regular basis. On the lower level the system is based on the use of universal generic drivers which are independent on types of devices being tested and which can run varying test programs (so-called device test codes). The information on the typical test drivers employed in the reported system can be found in [9]. The software of the discussed local burn-in site includes driver Operating System (OS), device specific driver codes, DUT codes, database system and special driver controller software. Driver OS is programmed into the MCU EEPROM of the driver [9]. It includes a set of low level subroutines that perform common functions such as communication between drivers and host PC, interrupts handlers, drivers’ voltage and operating frequency setup, etc. Each type of tested ICs employs its own devicespecific driver code (driver program). This program is used to setup input/output ports of the devices under test, establish communication with a particular device being tested and perform such typical tasks as resetting DUT, downloading device test programs (also called DUT codes), setting DUT voltages, reading DUT memory contents, etc. DUT test program (which is also called DUT code) is loaded into SRAM of the devices being tested under supervision the burn-in drivers. It is intended for execution of a set of specified test tasks. The set may consists of predefined operations stressing and exercising various modules of the devices under test,

writing pass/fail codes into the specially allocated memory area of FLASH EEPROM of DUTs, etc. The database of the burn-in site can be based on one of the appropriate standard software systems, e.g., MS Access. In order to manage burn-in through a computer controlled driver it has to be configured and contain all the information related to the burn-in system configuration and burn-in parameters of DUT. The driver controller software (called MBI [9]) is a graphical user interface and controller program running on the host PC. It enables user to control burn-in process (oven temperature, process flow, data collection, etc.) through the drivers in both a standalone and computer-control modes of operation. The communication with drivers are organised through broadcast messaging: all drivers receive the same message; however only the driver being addressed responds. The general data flow on this level of the IBE system includes using MBI to program the burn-in test parameters and sending a relevant driver test code (test program) to a driver for burn-in control. In turn the driver sends a required device test code to DUTs. The devices being tested run their own test codes while being also temperature stressed. Upon completion of the test, the driver collects results/data from the devices, while controller software collects results from the drivers [9].

4

Advanced Soft Binning

The traditional IBE system arrangement allows the logging of actual (raw) burn-in test data (individual test results such as flash memory write/erase test, modules exercise results, etc.) into a log file at the end of burn-in through the execution of data logging process (also called status dump process). Tedious data analysis and interpretation process (e.g., using a Parser or Pearl script program) is done then based on the information from the log file produced (Figure5). Burn-In (IBE)

Parser preprocessor & Pearl script

log file

End

ICs

Binning

Final test

Figure 5: BI results and data processing flow Data of two types are produced at the end of burn-in testing: burn-in test results and raw production data. The burn-in test results are loaded on IBE server and used for binning purposes (i.e., segregation of passed, failed and non-responding devices). The sorted devices are sent to undergo the Final test (parametric,

functional and structural). It is normally done not just for the devices passed the burn-in, but often also for those that failed (for failure analysis purposes). The raw data consists of the pass/fail codes for burnin test, memory write-erase test, etc. The information is used just occasionally (at the need basis) as without interpretation it doesn’t make too much sense to the end users. The interpretation includes data sorting using a Parser pre-processor followed by data analysis with the aid of Pearl script tools. Next, the interpreted data is exported to Excel template for results visualization. All the steps involved in the yield analysis process are done manually and acquire ample of time from collection of burn-in data to graphing activities. The main advantage of the presented Advanced Soft Binning system is the enhanced and automated data collection and interpretation. This in turn leads greater efficiency in continuous yield improvement. The system (Figure 6) allows collection of real production data without any interpretation from IBE. By storing the original test data returned from driver to IBE (Raw BI Data), the system always has access to the actual process information, and it ensures also that no raw process information has been lost. At the same time the system also provides automated burn-in data processing and interpretation greatly assisting in yield analysis as well as in identifying production issues for continuous yield improvement. log file

Binning

Final test

ICs Burn-in (IBE) BI Data ASB log file

®

dataPower

software

Figure 6: Results and data processing with Advanced Soft Binning At the end of the burn-in, in addition to storing the raw data, the summarised burn-in process results are stored into separate advanced soft binning (ASB) log file. These results (burn-in pass/fail codes and identification numbers as well as xy-coordinates on a wafer for each DUT) are used for the post-processing aimed at the yield improvement. The summarised data is automatically forwarded and stored at the IBE/SQL server enabling access to the results online. Such an arrangement eliminates the

manual data collection and provides greater flexibility. The information is then loaded into a BI Data pre-processor for converting the data into a standard format (BIFF file) required for dataPOWER™ yield management and statistical analysis software [10]. The software enables to analyze yield and production issues quickly thus enabling identification of fabrication processing problems, improving quality and increasing yield. In addition, the BI results are also captured at the end of burn-in (the flow of BI results is shown as the dash line in Figure 6). This information is vital for the unloading process to sort the DUT into different categories (bins). Once the DUT are sorted, only good devices are transferred to undergo the Final Test. The elimination of burn-in rejects testing at Final Test significantly reduces the cost. On the other side, it also simplifies the failure analysis process in order to achieve continuous yield improvement. The final full-size camera-ready paper will present in greater details the advanced features of the system and shows its operational benefits. In addition few other burn-in system improvements enhancing efficiency of the burn-in process will be discussed.

5

References

[1] D. Kececioglu and F.-B. Sun, Burn-in Testing: Its Quantification and Optimization, DEStech Publications Inc., UK (1997). [2] M. P.-L. Ooi, Z. Abu Kassim and S. Demidenko, “Shortening Burn-In Test: Application of HVST Weibull Statistical Analysis”, IEEE Transactions on I&M, 56(3), pp 990-999 (2007). [3] R.-P. Vollertsen, “Burn-In”, IEEE Inl.Integrated Reliability Workshop, USA, pp 167-173 (1999). [4] Quality and Reliability. ASIC Products Application Note. Revision 3. SA 14-2280-03. IBM Microelectronics Division, 15 pp (1999). [5] Burn-In. MIL-STD-883F: Test Method Standard. Microchips. Method 1015.9, US DoD (2004). [6] J. Axelson, Serial Port Complete, 2nd Edition, Lakeview Research (2007). [7] Sockets, Boards, Systems for Burn-in and Test. Loranger International Corporation. http://www.loranger.com/loranger_edc2/html/ind ex.php?page=burnin_boards (2007). [8] Massive Parallel Semiconductor Manufacturing Test Process, Motorola, Inc. (Schaumburg, IL), United States Patent No 6433568 (2002). [9] M. Noel, A. Dobbin and D. Van Overloop, “Reducing the Cost of Test in Burn-in - An Integrated Approach”, Archive: Burn-in and Test Socket Workshop, Mesa, USA, pp 34-59 (2004). [10] dataPOWER®. The Complete Yield Management Solution. PDF Solutions Inc., USA http://dp.pdf.com/site/products/dpc.html (2007).